A method and device used in a node for wireless communication

Abstract

The present application discloses a method and apparatus used in a node for wireless communication. A first receiver receives Q1 bit blocks, where Q1 is a positive integer greater than 1; a first transmitter sends a first message and a first bit block; wherein the first message is used to indicate a set of associated bit blocks for each bit in the first bit block, the set of associated bit blocks for each bit in the first bit block includes at least one bit block in the Q1 bit blocks, and each bit in the first bit block is used to indicate whether the corresponding set of associated bit blocks is correctly decoded.

Description

Technical Field

[0001] The present application relates to a transmission method and device in a wireless communication system, and in particular to a transmission method and device for wireless signals in a wireless communication system supporting a cellular network. Background Art

[0002] In the design of 5G NR (New Radio) systems, data rate and reliability are two important considerations to support diverse communication services. The transmission of high-data-rate and high-reliability services (such as XR (Extended Reality)) will bring a lot of HARQ-ACK (Hybrid Automatic Repeat reQuest ACKnowledgement) feedback overhead. Summary of the invention

[0003] Designing a reasonable feedback method to save HARQ-ACK feedback overhead is a key issue that needs to be solved.

[0004] In response to the above problems, the present application discloses a solution. It should be noted that although the above description uses HARQ-ACK feedback for high data rate and high reliability services in 5G NR as an example, the present application is also applicable to other scenarios, such as other service type scenarios in 5GNR, scenarios in 6G networks, Internet of Vehicles, etc., and achieves similar technical effects. In addition, the use of a unified solution for different scenarios (including but not limited to various scenarios in 5G NR or 6G networks, Internet of Vehicles) can also help reduce hardware complexity and cost, or improve performance. In the absence of conflict, the embodiments and features in any node of the present application can be applied to any other node. In the absence of conflict, the embodiments and features in the embodiments of the present application can be arbitrarily combined with each other.

[0005] As an embodiment, the interpretation of the terminology in this application refers to the definition of the TS36 series of specification protocols of 3GPP.

[0006] As an example, the interpretation of the terms in the present application refers to the definitions of the TS38 series of specification protocols of 3GPP.

[0007] As an example, the interpretation of the terms in the present application refers to the definitions of the TS37 series of specification protocols of 3GPP.

[0008] As an embodiment, the interpretation of the terms in this application refers to the definition of the standard protocol of IEEE (Institute of Electrical and Electronics Engineers).

[0009] The present application discloses a method in a first node used for wireless communication, characterized by comprising:

[0010] Receiving Q1 bit blocks, where Q1 is a positive integer greater than 1;

[0011] sending a first message and a first bit block;

[0012] The first message is used to indicate a set of associated bit blocks for each bit in the first bit block, the set of associated bit blocks for each bit in the first bit block includes at least one bit block among the Q1 bit blocks, and each bit in the first bit block is used to indicate whether the corresponding set of associated bit blocks is correctly decoded.

[0013] As an embodiment, the problem to be solved by the present application includes: how to reduce the overhead for retransmission under limited HARQ-ACK feedback overhead.

[0014] As an embodiment, the problem to be solved by the present application includes: how to optimize the trade-off between HARQ-ACK feedback overhead and retransmission overhead.

[0015] As an embodiment, the characteristics of the above method include: the first node sends both the HARQ-ACK information bits and an indication message of the association relationship between the HARQ-ACK information bits and the Q1 bit blocks.

[0016] As an embodiment, the characteristics of the above method include: the UE flexibly determines the association relationship between each bit in the first bit block and the Q1 bit blocks, and reports the association relationship between the two to the base station.

[0017] As an embodiment, the benefits of the above method include: it is helpful to save HARQ-ACK feedback overhead.

[0018] As an embodiment, the benefits of the above method include: the first node can flexibly determine the association between each bit in the first bit block and the Q1 bit blocks based on which bit blocks in the Q1 bit blocks are correctly decoded, which is beneficial to reducing the overhead for retransmission under limited HARQ-ACK feedback overhead.

[0019] As an embodiment, the benefits of the above method include: it is helpful to reduce unnecessary retransmission overhead.

[0020] As an embodiment, the benefits of the above method include: improving the resource utilization of the system.

[0021] According to one aspect of the present application, the above method is characterized in that:

[0022] The first bit block consists of Q2 bits, where Q2 is a positive integer less than Q1; the associated bit block set for each bit in the Q2 bits consists of one or more bit blocks in the Q1 bit blocks; any bit block in the Q1 bit blocks is associated to and only to one bit in the Q2 bits.

[0023] According to one aspect of the present application, the above method is characterized in that:

[0024] Any bit block among the Q1 bit blocks belongs to and only belongs to one bit block group among the Q3 bit block groups; any bit in the first bit block belongs to and only belongs to one bit sub-block among the Q3 bit sub-blocks; the Q3 bit sub-blocks respectively indicate whether the bit blocks in the Q3 bit block groups are correctly decoded, and the Q3 bit sub-blocks correspond one-to-one to the Q3 bit block groups; for any bit sub-block among the Q3 bit sub-blocks, the first message is used to indicate the associated bit block set of each bit from the corresponding bit block group; Q3 is a positive integer greater than 1 and less than Q1.

[0025] As an embodiment, the characteristics of the above method include: the first message is used to indicate the corresponding relationship between each {bit block group, bit sub-block} pair; the benefits of the above method include: it is conducive to reducing the overhead of the first message.

[0026] According to one aspect of the present application, the above method is characterized in that:

[0027] The second bit block consists of Q4 bits, each bit block in the Q1 bit blocks corresponds to one bit in the Q4 bits, and Q4 is a positive integer greater than 1; the first message is used to indicate the associated bit set of each bit in the first bit block, and the associated bit set of each bit in the first bit block includes at least one bit in the Q4 bits; the associated bit block set of a given bit in the first bit block includes all bit blocks in the Q1 bit blocks corresponding to any bit in the associated bit set of the given bit in the first bit block.

[0028] According to one aspect of the present application, the above method is characterized in that it includes:

[0029] receiving a first signaling;

[0030] The first signaling is used to indicate L1 association modes, the first message is used to indicate a first association mode from the L1 association modes, the first association mode is used to determine the bit block to which each bit in the first bit block is associated in the Q1 bit blocks; and L1 is a positive integer greater than 1.

[0031] According to one aspect of the present application, the above method is characterized in that:

[0032] The first message and the first bit block are sent on the same physical layer channel.

[0033] According to one aspect of the present application, the above method is characterized in that:

[0034] The first message and the first bit block are sent on two physical layer channels respectively.

[0035] The present application discloses a method used in a second node of wireless communication, characterized by comprising:

[0036] Send Q1 bit blocks, where Q1 is a positive integer greater than 1;

[0037] receiving a first message and a first block of bits;

[0038] The first message is used to indicate a set of associated bit blocks for each bit in the first bit block, the set of associated bit blocks for each bit in the first bit block includes at least one bit block among the Q1 bit blocks, and each bit in the first bit block is used to indicate whether the corresponding set of associated bit blocks is correctly decoded.

[0039] According to one aspect of the present application, the above method is characterized in that:

[0040] The first bit block consists of Q2 bits, where Q2 is a positive integer less than Q1; the associated bit block set for each bit in the Q2 bits consists of one or more bit blocks in the Q1 bit blocks; any bit block in the Q1 bit blocks is associated to and only to one bit in the Q2 bits.

[0041] According to one aspect of the present application, the above method is characterized in that:

[0042] Any bit block among the Q1 bit blocks belongs to and only belongs to one bit block group among the Q3 bit block groups; any bit in the first bit block belongs to and only belongs to one bit sub-block among the Q3 bit sub-blocks; the Q3 bit sub-blocks respectively indicate whether the bit blocks in the Q3 bit block groups are correctly decoded, and the Q3 bit sub-blocks correspond one-to-one to the Q3 bit block groups; for any bit sub-block among the Q3 bit sub-blocks, the first message is used to indicate the associated bit block set of each bit from the corresponding bit block group; Q3 is a positive integer greater than 1 and less than Q1.

[0043] According to one aspect of the present application, the above method is characterized in that:

[0044] The second bit block consists of Q4 bits, each bit block in the Q1 bit blocks corresponds to one bit in the Q4 bits, and Q4 is a positive integer greater than 1; the first message is used to indicate the associated bit set of each bit in the first bit block, and the associated bit set of each bit in the first bit block includes at least one bit in the Q4 bits; the associated bit block set of a given bit in the first bit block includes all bit blocks in the Q1 bit blocks corresponding to any bit in the associated bit set of the given bit in the first bit block.

[0045] According to one aspect of the present application, the above method is characterized in that it includes:

[0046] Sending a first signaling;

[0047] The first signaling is used to indicate L1 association modes, the first message is used to indicate a first association mode from the L1 association modes, the first association mode is used to determine the bit block to which each bit in the first bit block is associated in the Q1 bit blocks; and L1 is a positive integer greater than 1.

[0048] According to one aspect of the present application, the above method is characterized in that:

[0049] The first message and the first bit block are sent on the same physical layer channel.

[0050] According to one aspect of the present application, the above method is characterized in that:

[0051] The first message and the first bit block are sent on two physical layer channels respectively.

[0052] The present application discloses a first node device used for wireless communication, characterized in that it includes:

[0053] A first receiver receives Q1 bit blocks, where Q1 is a positive integer greater than 1;

[0054] A first transmitter sends a first message and a first bit block;

[0055] The first message is used to indicate a set of associated bit blocks for each bit in the first bit block, the set of associated bit blocks for each bit in the first bit block includes at least one bit block among the Q1 bit blocks, and each bit in the first bit block is used to indicate whether the corresponding set of associated bit blocks is correctly decoded.

[0056] The present application discloses a second node device used for wireless communication, characterized in that it includes:

[0057] A second transmitter sends Q1 bit blocks, where Q1 is a positive integer greater than 1;

[0058] a second receiver, receiving the first message and the first bit block;

[0059] The first message is used to indicate a set of associated bit blocks for each bit in the first bit block, the set of associated bit blocks for each bit in the first bit block includes at least one bit block among the Q1 bit blocks, and each bit in the first bit block is used to indicate whether the corresponding set of associated bit blocks is correctly decoded.

[0060] As an embodiment, the method in this application has the following advantages:

[0061] - Helps save HARQ-ACK feedback overhead;

[0062] - It is beneficial to reduce the overhead for retransmission under limited HARQ-ACK feedback overhead;

[0063] - It is helpful to reduce unnecessary retransmission overhead;

[0064] -Improved system resource utilization. BRIEF DESCRIPTION OF THE DRAWINGS

[0065] Other features, objects and advantages of the present application will become more apparent by reading the detailed description of non-limiting embodiments with reference to the following drawings:

[0066] Figure 1 A processing flow chart of a first node according to an embodiment of the present application is shown;

[0067] Figure 2 A schematic diagram of a network architecture according to an embodiment of the present application is shown;

[0068] Figure 3A schematic diagram showing a wireless protocol architecture of a user plane and a control plane according to an embodiment of the present application is shown;

[0069] Figure 4 A schematic diagram showing a first communication device and a second communication device according to an embodiment of the present application is shown;

[0070] Figure 5 A signal transmission flow chart according to an embodiment of the present application is shown;

[0071] Figure 6 A schematic diagram showing a relationship between a given bit in Q2 bits and a block of Q1 bits according to an embodiment of the present application;

[0072] Figure 7 A schematic diagram showing the relationship between Q1 bit blocks, Q3 bit block groups, a first bit block and Q3 bit sub-blocks according to an embodiment of the present application;

[0073] Figure 8 A schematic diagram showing the relationship between the Q1 bit block, the second bit block, the Q4 bits, the first bit block and the first message according to an embodiment of the present application;

[0074] Fig. 9 A schematic diagram showing the relationship between a given bit in a first bit block, Q1 bit blocks, and Q4 bits according to an embodiment of the present application;

[0075] Fig.10 A schematic diagram showing a relationship between first signaling, L1 association modes, a first message, a first association mode, and bit blocks associated with each bit in a first bit block in Q1 bit blocks according to an embodiment of the present application;

[0076] Fig.11 A schematic diagram showing a method of sending a first message and a first bit block according to an embodiment of the present application is shown;

[0077] Fig.12 A schematic diagram showing a method of sending a first message and a first bit block according to an embodiment of the present application is shown;

[0078] Fig.13 A structural block diagram of a processing device in a first node device according to an embodiment of the present application is shown;

[0079] Fig.14 A structural block diagram of a processing device in a second node device according to an embodiment of the present application is shown. DETAILED DESCRIPTION

[0080] The technical solution of the present application will be further described in detail below in conjunction with the accompanying drawings. It should be noted that, in the absence of conflict, the embodiments of the present application and the features in the embodiments can be combined with each other at will.

[0081] Example 1

[0082] Embodiment 1 illustrates a processing flow chart of a first node according to an embodiment of the present application, as shown in the attached Figure 1 shown.

[0083] In Embodiment 1, the first node in the present application receives Q1 bit blocks in step 101 ; and sends a first message and a first bit block in step 102 .

[0084] In embodiment 1, Q1 is a positive integer greater than 1; the first message is used to indicate a set of associated bit blocks for each bit in the first bit block, the set of associated bit blocks for each bit in the first bit block includes at least one bit block among the Q1 bit blocks, and each bit in the first bit block is used to indicate whether the corresponding set of associated bit blocks is correctly decoded.

[0085] As an embodiment, any bit block among the Q1 bit blocks includes multiple bits.

[0086] As an embodiment, any bit block among the Q1 bit blocks is a TB (Transport Block).

[0087] As an embodiment, any bit block among the Q1 bit blocks includes one TB.

[0088] As an embodiment, any bit block among the Q1 bit blocks is a TB or a CBG.

[0089] As an embodiment, any bit block among the Q1 bit blocks includes a TB or a DCI format.

[0090] As an embodiment, any bit block among the Q1 bit blocks includes at least one CBG (Code Block Group).

[0091] As an embodiment, the Q1 bit blocks are sent on Q1 physical layer channels respectively.

[0092] As an embodiment, the Q1 bit blocks are sent on Q1 PDSCHs respectively.

[0093] As an embodiment, the Q1 bit blocks are sent on Q1 SPS PDSCHs respectively.

[0094] As an embodiment, the Q1 bit blocks are respectively sent on Q1 sidelink physical layer channels.

[0095] As an embodiment, any two bit blocks in the Q1 bit blocks are the same in size.

[0096] As an embodiment, at least two bit blocks among the Q1 bit blocks are of different sizes.

[0097] As an embodiment, at least two bit blocks among the Q1 bit blocks are sent on two physical layer channels respectively.

[0098] As an embodiment, each of the Q1 bit blocks undergoes at least CRC (Cyclic Redundancy Check) attachment, code block segmentation, code block CRC attachment, channel coding, rate matching and code block concatenation, scrambling, modulation and resource block mapping before being sent on the physical layer channel.

[0099] As an embodiment, each of the Q1 bit blocks undergoes at least CRC appending, channel coding and rate matching, scrambling, modulation and resource block mapping before being sent on the physical layer channel.

[0100] As an embodiment, each of the Q1 bit blocks undergoes at least CRC addition, code block segmentation, code block CRC addition, channel coding, rate matching and code block concatenation, scrambling, modulation, layer mapping, antenna port mapping and resource block mapping before being sent on the physical layer channel.

[0101] As an embodiment, each of the Q1 bit blocks undergoes at least CRC appending, channel coding and rate matching, scrambling, modulation, layer mapping, antenna port mapping and resource block mapping before being sent on the physical layer channel.

[0102] As an embodiment, the output of each of the Q1 bit blocks after undergoing at least part of CRC addition, code block segmentation, code block CRC addition, channel coding, rate matching, code block concatenation, scrambling, modulation (Modulation), spreading (Spreading), layer mapping (Layer Mapping), precoding (Precoding), mapping to physical resources, multi-carrier symbol generation (Generation), and modulation and upconversion (Modulation and Upconversion) is sent on the physical channel.

[0103] As an embodiment, the associated bit block set of a given bit in the first bit block is composed of all bit blocks associated with the given bit in the first bit block.

[0104] As an embodiment, the associated bit block set of a given bit in the first bit block is composed of all bit blocks associated with the given bit in the first bit block in the Q1 bit blocks.

[0105] As an embodiment, any bit block in a set of associated bit blocks of any bit in the first bit block is one of the Q1 bit blocks.

[0106] As an embodiment, the associated bit block set for each bit in the first bit block consists of one or more bit blocks among the Q1 bit blocks.

[0107] As an embodiment, any bit block in the Q1 bit blocks can only be associated with one bit in the first bit block.

[0108] As an embodiment, there is a bit block in the Q1 bit blocks that is associated with multiple bits in the first bit block.

[0109] As an embodiment, the first message is a value of one or more bits.

[0110] As an embodiment, the first message is one of 0 or 1.

[0111] As an embodiment, the first message is one of 00, 01, 10, and 11.

[0112] As an embodiment, the first message is one of 000, 010, 100, 110, 001, 011, 101, and 111.

[0113] As an embodiment, the first message is represented by one or more bits.

[0114] As an embodiment, the first message is a physical layer message.

[0115] As an embodiment, the first message is UCI, and the first bit block is UCI.

[0116] As an embodiment, the first message is MAC CE, and the first bit block is UCI.

[0117] As an embodiment, the first message is an RRC layer message, and the first bit block is UCI.

[0118] As an embodiment, the first bit block includes multiple bits.

[0119] As an embodiment, the first bit block is a bit block in which each bit is used to indicate whether one or more bit blocks among the Q1 bit blocks are correctly decoded.

[0120] As an embodiment, each bit included in the first bit block is a HARQ-ACK information bit.

[0121] As an embodiment, the first bit block is a HARQ-ACK codebook.

[0122] As an embodiment, the first bit block belongs to a HARQ-ACK codebook.

[0123] As an embodiment, the first bit block is generated by a HARQ-ACK codebook.

[0124] As an embodiment, the first message is used to explicitly indicate a set of associated bit blocks for each bit in the first bit block.

[0125] As an embodiment, the first message is used to indicate the index of each bit block in the set of associated bit blocks of each bit in the first bit block in the Q1 bit blocks.

[0126] As an embodiment, the first message is used to implicitly indicate a set of associated bit blocks for each bit in the first bit block.

[0127] As an embodiment, the statement in the present application that the first message is used to indicate the associated bit block set of each bit in the first bit block includes: the second bit block is composed of Q4 bits, each bit block in the Q1 bit blocks corresponds to one bit in the Q4 bits, and Q4 is a positive integer greater than 1; the first message is used to indicate the associated bit set of each bit in the first bit block, the associated bit set of each bit in the first bit block includes at least one bit in the Q4 bits, and the associated bit block set of a given bit in the first bit block includes all bit blocks in the Q1 bit blocks corresponding to any bit in the associated bit set of the given bit in the first bit block.

[0128] As an embodiment, the statement in the present application that the first message is used to indicate a set of associated bit blocks for each bit in the first bit block includes: the first message is used to indicate a first association mode from L1 association modes indicated by a signaling, and the first association mode is used to determine the bit block to which each bit in the first bit block is associated among the Q1 bit blocks; and L1 is a positive integer greater than 1.

[0129] As an embodiment, the first bit block is a bit block in which each bit is used to indicate whether at least one bit block among the Q1 bit blocks is correctly decoded.

[0130] As an embodiment, the statement in the present application that each bit in the first bit block is used to indicate whether the corresponding associated bit block set is correctly decoded includes: each bit in the first bit block is used to indicate whether all bit blocks in the corresponding associated bit block set are correctly decoded.

[0131] As an embodiment, the statement in the present application that each bit in the first bit block is used to indicate whether the corresponding associated bit block set is correctly decoded includes: for any bit in the first bit block, bit value 0 is used to indicate that all bit blocks in the corresponding associated bit block set are correctly decoded, and bit value 1 is used to indicate that at least one bit block in the corresponding associated bit block set is not correctly decoded.

[0132] As an embodiment, the statement in the present application that each bit in the first bit block is used to indicate whether the corresponding associated bit block set is correctly decoded includes: for any bit in the first bit block, the bit value 1 is used to indicate that all bit blocks in the corresponding associated bit block set are correctly decoded, and the bit value 0 is used to indicate that at least one bit block in the corresponding associated bit block set is not correctly decoded.

[0133] As an embodiment, the statement in the present application that each bit in the first bit block is used to indicate whether the corresponding associated bit block set is correctly decoded includes: each bit in the first bit block is used to indicate whether at least one bit block in the corresponding associated bit block set is correctly decoded.

[0134] As an embodiment, the statement in the present application that each bit in the first bit block is used to indicate whether the corresponding associated bit block set is correctly decoded includes: for any bit in the first bit block, bit value 0 is used to indicate that all bit blocks in the corresponding associated bit block set are not correctly decoded, and bit value 1 is used to indicate that at least one bit block in the corresponding associated bit block set is correctly decoded.

[0135] As an embodiment, the statement in the present application that each bit in the first bit block is used to indicate whether the corresponding associated bit block set is correctly decoded includes: for any bit in the first bit block, a bit value of 1 is used to indicate that all bit blocks in the corresponding associated bit block set are not correctly decoded, and a bit value of 0 is used to indicate that at least one bit block in the corresponding associated bit block set is correctly decoded.

[0136] As an embodiment, the first bit block consists of Q2 bits, where Q2 is a positive integer less than Q1; the associated bit block set of each bit in the Q2 bits consists of one or more bit blocks in the Q1 bit blocks; any bit block in the Q1 bit blocks is associated with at least one bit in the Q2 bits, and at least one bit block in the Q1 bit blocks is associated with multiple bits in the Q2 bits.

[0137] As an embodiment, the first bit block consists of Q2 bits, where Q2 is a positive integer not less than Q1; the associated bit block set of each bit in the Q2 bits consists of one or more bit blocks in the Q1 bit blocks; and any bit block in the Q1 bit blocks is associated with at least one bit in the Q2 bits.

[0138] As an embodiment, the first bit block consists of Q2 bits, where Q2 is a positive integer greater than Q1; the associated bit block set for each bit in the Q2 bits consists of one or more bit blocks in the Q1 bit blocks; any bit block in the Q1 bit blocks is associated with at least one bit in the Q2 bits, and at least one bit block in the Q1 bit blocks is associated with multiple bits in the Q2 bits.

[0139] As an embodiment, any bit block among the Q1 bit blocks belongs to a bit block group among the Q3 bit block groups, and at least one bit block among the Q1 bit blocks belongs to multiple bit block groups among the Q3 bit block groups; any bit in the first bit block belongs to and only belongs to one bit sub-block among the Q3 bit sub-blocks; the Q3 bit sub-blocks respectively indicate whether the bit blocks in the Q3 bit block groups are correctly decoded, and the Q3 bit sub-blocks correspond one-to-one to the Q3 bit block groups; for any bit sub-block among the Q3 bit sub-blocks, the first message is used to indicate the associated bit block set of each bit from the corresponding bit block group; Q3 is a positive integer greater than 1 and less than Q1.

[0140] As an embodiment, any bit block among the Q1 bit blocks belongs to and only belongs to one bit block group among the Q3 bit block groups; any bit in the first bit block belongs to and only belongs to one bit sub-block among the Q3 bit sub-blocks; the Q3 bit sub-blocks respectively indicate whether the bit blocks in the Q3 bit block groups are correctly decoded, and the Q3 bit sub-blocks correspond one-to-one to the Q3 bit block groups; for any bit sub-block among the Q3 bit sub-blocks, the first message is used to indicate the associated bit block set of each bit from the corresponding bit block group; and Q3 is equal to 1.

[0141] Example 2

[0142] Embodiment 2 illustrates a schematic diagram of a network architecture according to the present application, as shown in the attached Figure 2 shown.

[0143] Attached Figure 2A diagram of a network architecture 200 for 5G NR, LTE (Long-Term Evolution) and LTE-A (Long-Term Evolution Advanced) systems is illustrated. The 5G NR or LTE network architecture 200 may be referred to as an EPS (Evolved Packet System) 200 or some other suitable terminology. The EPS 200 may include one or more UEs (User Equipment) 201, NG-RAN (Next Generation Radio Access Network) 202, EPC (Evolved Packet Core) / 5G-CN (5G-Core Network) 210, HSS (Home Subscriber Server) 220, and Internet services 230. The EPS may be interconnected with other access networks, but these entities / interfaces are not shown for simplicity. As shown, the EPS provides packet-switched services, but those skilled in the art will readily appreciate that the various concepts presented throughout this application may be extended to networks providing circuit-switched services or other cellular networks. NG-RAN includes NR Node B (gNB) 203 and other gNBs 204. gNB 203 provides user and control plane protocol terminations towards UE 201. gNB 203 can be connected to other gNBs 204 via an Xn interface (e.g., backhaul). gNB 203 may also be referred to as a base station, a base transceiver station, a radio base station, a radio transceiver, a transceiver function, a basic service set (BSS), an extended service set (ESS), a TRP (transmit receive node), or some other suitable term. gNB 203 provides an access point to EPC / 5G-CN 210 for UE 201. Examples of UE 201 include cellular phones, smart phones, session initiation protocol (SIP) phones, laptop computers, personal digital assistants (PDAs), satellite radios, non-terrestrial base station communications, satellite mobile communications, global positioning systems, multimedia devices, video devices, digital audio players (e.g., MP3 players), cameras, game consoles, drones, aircraft, narrowband Internet of Things devices, machine type communication devices, land vehicles, cars, wearable devices, or any other similar functional devices. Those skilled in the art may also refer to UE 201 as a mobile station, a subscriber station, a mobile unit, a subscriber unit, a wireless unit, a remote unit, a mobile device, a wireless device, a wireless communication device, a remote device, a mobile subscriber station, an access terminal, a mobile terminal, a wireless terminal, a remote terminal, a handset, a user agent, a mobile client, a client, or some other suitable term. gNB 203 is connected to EPC / 5G-CN 210 via an S1 / NG interface.EPC / 5G-CN 210 includes MME (Mobility Management Entity) / AMF (Authentication Management Field) / UPF (User Plane Function) 211, other MME / AMF / UPF214, S-GW (Service Gateway) 212 and P-GW (Packet Data Network Gateway) 213. MME / AMF / UPF211 is a control node that handles signaling between UE201 and EPC / 5G-CN 210. Generally, MME / AMF / UPF211 provides bearer and connection management. All user IP (Internet Protocal) packets are transmitted through S-GW212, which itself is connected to P-GW213. P-GW213 provides UE IP address allocation and other functions. P-GW213 is connected to Internet service 230. The Internet service 230 includes operator-compatible Internet protocol services, which may specifically include the Internet, intranet, IMS (IP Multimedia Subsystem) and packet-switched streaming services.

[0144] As an embodiment, the UE201 corresponds to the first node in the present application.

[0145] As an embodiment, the UE201 corresponds to the second node in the present application.

[0146] As an embodiment, the gNB203 corresponds to the first node in this application.

[0147] As an embodiment, the gNB203 corresponds to the second node in this application.

[0148] As an embodiment, the UE201 corresponds to the first node in the present application, and the gNB203 corresponds to the second node in the present application.

[0149] As an embodiment, the gNB203 is a macrocellular base station.

[0150] As an embodiment, the gNB203 is a micro cell base station.

[0151] As an embodiment, the gNB203 is a picoCell base station.

[0152] As an embodiment, the gNB203 is a home base station (Femtocell).

[0153] As an embodiment, the gNB203 is a base station device that supports large delay difference.

[0154] As an embodiment, the gNB203 is a flying platform device.

[0155] As an embodiment, the gNB203 is a satellite device.

[0156] As an embodiment, the first node and the second node in the present application both correspond to the UE201, for example, V2X communication is performed between the first node and the second node.

[0157] Example 3

[0158] Embodiment 3 shows a schematic diagram of an embodiment of a wireless protocol architecture of a user plane and a control plane according to the present application, as shown in the attached Figure 3 shown. Figure 3 is a schematic diagram illustrating an embodiment of a radio protocol architecture for a user plane 350 and a control plane 300, Figure 3The radio protocol architecture of the control plane 300 for a first communication node device (UE, gNB or RSU in V2X) and a second communication node device (gNB, UE or RSU in V2X), or between two UEs is shown with three layers: Layer 1, Layer 2 and Layer 3. Layer 1 (L1 layer) is the lowest layer and implements various PHY (physical layer) signal processing functions. The L1 layer will be referred to as PHY301 in this article. Layer 2 (L2 layer) 305 is above PHY301 and is responsible for the link between the first communication node device and the second communication node device and the two UEs through PHY301. The L2 layer 305 includes a MAC (Medium Access Control) sublayer 302, an RLC (Radio Link Control) sublayer 303, and a PDCP (Packet Data Convergence Protocol) sublayer 304, which terminate at the second communication node device. The PDCP sublayer 304 provides multiplexing between different radio bearers and logical channels. The PDCP sublayer 304 also provides security by encrypting data packets, and provides support for inter-zone mobility of the first communication node device between the second communication node device. The RLC sublayer 303 provides segmentation and reassembly of upper layer data packets, retransmission of lost data packets, and reordering of data packets to compensate for out-of-order reception due to HARQ. The MAC sublayer 302 provides multiplexing between logical and transport channels. The MAC sublayer 302 is also responsible for allocating various radio resources (e.g., resource blocks) in a cell between the first communication node devices. The MAC sublayer 302 is also responsible for HARQ operations. The RRC (Radio Resource Control) sublayer 306 in layer 3 (L3 layer) in the control plane 300 is responsible for obtaining radio resources (i.e., radio bearers) and configuring the lower layer using RRC signaling between the second communication node device and the first communication node device. The radio protocol architecture of the user plane 350 includes layer 1 (L1 layer) and layer 2 (L2 layer). The radio protocol architecture used for the first communication node device and the second communication node device in the user plane 350 is substantially the same as the corresponding layers and sublayers in the control plane 300 for the physical layer 351, the PDCP sublayer 354 in the L2 layer 355, the RLC sublayer 353 in the L2 layer 355, and the MAC sublayer 352 in the L2 layer 355, but the PDCP sublayer 354 also provides header compression for upper layer data packets to reduce radio transmission overhead.The L2 layer 355 in the user plane 350 also includes a SDAP (Service Data Adaptation Protocol) sublayer 356, which is responsible for mapping between QoS flows and data radio bearers (DRBs) to support the diversity of services. Although not shown in the figure, the first communication node device may have several upper layers above the L2 layer 355, including a network layer (e.g., an IP layer) terminated at the P-GW on the network side and an application layer terminated at the other end of the connection (e.g., a remote UE, a server, etc.).

[0159] As an example, Figure 3 The wireless protocol architecture in is applicable to the first node in this application.

[0160] As an example, Figure 3 The wireless protocol architecture in is applicable to the second node in this application.

[0161] As an embodiment, the first signaling in the present application is generated in the RRC sublayer 306.

[0162] As an embodiment, the first signaling in the present application is generated in the MAC sublayer 302.

[0163] As an embodiment, the first signaling in the present application is generated in the MAC sublayer 352.

[0164] As an embodiment, the first signaling in the present application is generated in the PHY301.

[0165] As an embodiment, the first signaling in the present application is generated by the PHY351.

[0166] As an embodiment, one bit block among the Q1 bit blocks in the present application is generated in the SDAP sublayer 356 .

[0167] As an embodiment, one bit block among the Q1 bit blocks in the present application is generated in the RRC sublayer 306.

[0168] As an embodiment, one bit block among the Q1 bit blocks in the present application is generated in the MAC sublayer 302 .

[0169] As an embodiment, one bit block among the Q1 bit blocks in the present application is generated in the MAC sublayer 352 .

[0170] As an embodiment, one bit block among the Q1 bit blocks in the present application is generated by the PHY301.

[0171] As an embodiment, one bit block among the Q1 bit blocks in the present application is generated by the PHY351.

[0172] As an embodiment, the first message in the present application is generated in the RRC sublayer 306.

[0173] As an embodiment, the first message in the present application is generated in the MAC sublayer 302.

[0174] As an embodiment, the first message in the present application is generated in the MAC sublayer 352.

[0175] As an embodiment, the first message in the present application is generated by the PHY301.

[0176] As an embodiment, the first message in the present application is generated by the PHY351.

[0177] As an embodiment, the first bit block in the present application is generated in the RRC sublayer 306.

[0178] As an embodiment, the first bit block in the present application is generated in the MAC sublayer 302.

[0179] As an embodiment, the first bit block in the present application is generated in the MAC sublayer 352.

[0180] As an embodiment, the first bit block in the present application is generated by the PHY301.

[0181] As an embodiment, the first bit block in the present application is generated by the PHY351.

[0182] As an embodiment, the second bit block in the present application is generated in the RRC sublayer 306.

[0183] As an embodiment, the second bit block in the present application is generated in the MAC sublayer 302.

[0184] As an embodiment, the second bit block in the present application is generated in the MAC sublayer 352.

[0185] As an embodiment, the second bit block in the present application is generated by the PHY301.

[0186] As an embodiment, the second bit block in the present application is generated by the PHY351.

[0187] Example 4

[0188] Embodiment 4 shows a schematic diagram of a first communication device and a second communication device according to the present application, as shown in the attached figure. Figure 4 shown. Figure 4 is a block diagram of a first communication device 410 and a second communication device 450 communicating with each other in an access network.

[0189] The first communication device 410 includes a controller / processor 475 , a memory 476 , a receive processor 470 , a transmit processor 416 , a multi-antenna receive processor 472 , a multi-antenna transmit processor 471 , a transmitter / receiver 418 and an antenna 420 .

[0190] The second communication device 450 includes a controller / processor 459, a memory 460, a data source 467, a transmit processor 468, a receive processor 456, a multi-antenna transmit processor 457, a multi-antenna receive processor 458, a transmitter / receiver 454 and an antenna 452.

[0191] In transmission from the first communication device 410 to the second communication device 450, at the first communication device 410, upper layer data packets from the core network are provided to the controller / processor 475. The controller / processor 475 implements the functionality of the L2 layer. In transmission from the first communication device 410 to the first communication device 450, the controller / processor 475 provides header compression, encryption, packet segmentation and reordering, multiplexing between logical and transport channels, and radio resource allocation to the second communication device 450 based on various priority metrics. The controller / processor 475 is also responsible for retransmission of lost packets and signaling to the second communication device 450. The transmit processor 416 and the multi-antenna transmit processor 471 implement various signal processing functions for the L1 layer (i.e., the physical layer). The transmit processor 416 implements coding and interleaving to facilitate forward error correction (FEC) at the second communication device 450, as well as mapping of signal constellations based on various modulation schemes (e.g., binary phase shift keying (BPSK), quadrature phase shift keying (QPSK), M-phase shift keying (M-PSK), M-quadrature amplitude modulation (M-QAM)). The multi-antenna transmit processor 471 performs digital spatial precoding, including codebook-based precoding and non-codebook-based precoding, and beamforming processing on the coded and modulated symbols to generate one or more spatial streams. The transmit processor 416 then maps each spatial stream to a subcarrier, multiplexes with a reference signal (e.g., a pilot) in the time domain and / or frequency domain, and then uses an inverse fast Fourier transform (IFFT) to generate a physical channel carrying a time-domain multi-carrier symbol stream. The multi-antenna transmit processor 471 then performs a transmit analog precoding / beamforming operation on the time-domain multi-carrier symbol stream. Each transmitter 418 converts the baseband multi-carrier symbol stream provided by the multi-antenna transmit processor 471 into a radio frequency stream, and then provides it to a different antenna 420.

[0192] In the transmission from the first communication device 410 to the second communication device 450, at the second communication device 450, each receiver 454 receives a signal through its corresponding antenna 452. Each receiver 454 recovers the information modulated onto the RF carrier and converts the RF stream into a baseband multi-carrier symbol stream and provides it to the receiving processor 456. The receiving processor 456 and the multi-antenna receiving processor 458 implement various signal processing functions of the L1 layer. The multi-antenna receiving processor 458 performs a receiving analog precoding / beamforming operation on the baseband multi-carrier symbol stream from the receiver 454. The receiving processor 456 uses a fast Fourier transform (FFT) to convert the baseband multi-carrier symbol stream after the receiving analog precoding / beamforming operation from the time domain to the frequency domain. In the frequency domain, the physical layer data signal and the reference signal are demultiplexed by the receiving processor 456, wherein the reference signal will be used for channel estimation, and the data signal is recovered after multi-antenna detection in the multi-antenna receiving processor 458 to any spatial stream destined for the second communication device 450. The symbols on each spatial stream are demodulated and recovered in the receiving processor 456, and soft decisions are generated. The receiving processor 456 then decodes and deinterleaves the soft decisions to recover the upper layer data and control signals transmitted by the first communication device 410 on the physical channel. The upper layer data and control signals are then provided to the controller / processor 459. The controller / processor 459 implements the functions of the L2 layer. The controller / processor 459 may be associated with a memory 460 that stores program codes and data. The memory 460 may be referred to as a computer-readable medium. In the transmission from the first communication device 410 to the second communication device 450, the controller / processor 459 provides multiplexing between transport and logical channels, packet reassembly, decryption, header decompression, and control signal processing to recover the upper layer data packets from the core network. The upper layer data packets are then provided to all protocol layers above the L2 layer. Various control signals may also be provided to L3 for L3 processing.

[0193] In the transmission from the second communication device 450 to the first communication device 410, at the second communication device 450, a data source 467 is used to provide upper layer data packets to the controller / processor 459. The data source 467 represents all protocol layers above the L2 layer. Similar to the transmission function at the first communication device 410 described in the transmission from the first communication device 410 to the second communication device 450, the controller / processor 459 implements header compression, encryption, packet segmentation and reordering, and multiplexing between logical and transport channels based on radio resource allocation, and implements L2 layer functions for user plane and control plane. The controller / processor 459 is also responsible for the retransmission of lost packets and signaling to the first communication device 410. The transmit processor 468 performs modulation mapping and channel coding processing, and the multi-antenna transmit processor 457 performs digital multi-antenna spatial precoding, including codebook-based precoding and non-codebook-based precoding, and beamforming processing. Then, the transmit processor 468 modulates the generated spatial stream into a multi-carrier / single-carrier symbol stream, which is then provided to different antennas 452 via the transmitter 454 after analog precoding / beamforming operations in the multi-antenna transmit processor 457. Each transmitter 454 first converts the baseband symbol stream provided by the multi-antenna transmit processor 457 into a radio frequency symbol stream, and then provides it to the antenna 452.

[0194] In the transmission from the second communication device 450 to the first communication device 410, the function at the first communication device 410 is similar to the reception function at the second communication device 450 described in the transmission from the first communication device 410 to the second communication device 450. Each receiver 418 receives a radio frequency signal through its corresponding antenna 420, converts the received radio frequency signal into a baseband signal, and provides the baseband signal to the multi-antenna reception processor 472 and the reception processor 470. The reception processor 470 and the multi-antenna reception processor 472 jointly implement the functions of the L1 layer. The controller / processor 475 implements the L2 layer functions. The controller / processor 475 can be associated with a memory 476 storing program codes and data. The memory 476 can be referred to as a computer-readable medium. In the transmission from the second communication device 450 to the first communication device 410, the controller / processor 475 provides multiplexing between transport and logical channels, packet reassembly, decryption, header decompression, control signal processing to recover the upper layer data packets from the UE 450. Upper layer packets from controller / processor 475 may be provided to the core network.

[0195] As an embodiment, the first node in the present application includes the second communication device 450 , and the second node in the present application includes the first communication device 410 .

[0196] As a sub-embodiment of the above embodiment, the first node is a user equipment, and the second node is a user equipment.

[0197] As a sub-embodiment of the above embodiment, the first node is a user equipment, and the second node is a relay node.

[0198] As a sub-embodiment of the above embodiment, the first node is a relay node, and the second node is a user equipment.

[0199] As a sub-embodiment of the above embodiment, the first node is a user equipment, and the second node is a base station device.

[0200] As a sub-embodiment of the above embodiment, the first node is a relay node, and the second node is a base station device.

[0201] As a sub-embodiment of the above embodiment, the second node is a user equipment, and the first node is a base station device.

[0202] As a sub-embodiment of the above embodiment, the second node is a relay node, and the first node is a base station device.

[0203] As a sub-embodiment of the above embodiment, the second communication device 450 includes: at least one controller / processor; the at least one controller / processor is responsible for HARQ operation.

[0204] As a sub-embodiment of the above embodiment, the first communication device 410 includes: at least one controller / processor; the at least one controller / processor is responsible for HARQ operation.

[0205] As a sub-embodiment of the above embodiment, the first communication device 410 includes: at least one controller / processor; the at least one controller / processor is responsible for error detection using positive acknowledgement (ACK) and / or negative acknowledgement (NACK) protocols to support HARQ operations.

[0206] As an embodiment, the second communication device 450 includes: at least one processor and at least one memory, the at least one memory includes computer program code; the at least one memory and the computer program code are configured to be used together with the at least one processor. The second communication device 450 device at least: receives Q1 bit blocks, where Q1 is a positive integer greater than 1; sends a first message and a first bit block; wherein the first message is used to indicate an associated bit block set for each bit in the first bit block, the associated bit block set for each bit in the first bit block includes at least one bit block in the Q1 bit blocks, and each bit in the first bit block is used to indicate whether the corresponding associated bit block set is correctly decoded.

[0207] As a sub-embodiment of the above embodiment, the second communication device 450 corresponds to the first node in this application.

[0208] As an embodiment, the second communication device 450 includes: a memory storing a computer-readable instruction program, wherein the computer-readable instruction program generates actions when executed by at least one processor, and the actions include: receiving Q1 bit blocks, wherein Q1 is a positive integer greater than 1; sending a first message and a first bit block; wherein the first message is used to indicate a set of associated bit blocks for each bit in the first bit block, and the set of associated bit blocks for each bit in the first bit block includes at least one bit block in the Q1 bit blocks, and each bit in the first bit block is used to indicate whether the corresponding set of associated bit blocks is correctly decoded.

[0209] As a sub-embodiment of the above embodiment, the second communication device 450 corresponds to the first node in this application.

[0210] As an embodiment, the first communication device 410 includes: at least one processor and at least one memory, the at least one memory includes computer program code; the at least one memory and the computer program code are configured to be used together with the at least one processor. The first communication device 410 device at least: sends Q1 bit blocks, where Q1 is a positive integer greater than 1; receives a first message and a first bit block; wherein the first message is used to indicate an associated bit block set for each bit in the first bit block, the associated bit block set for each bit in the first bit block includes at least one bit block in the Q1 bit blocks, and each bit in the first bit block is used to indicate whether the corresponding associated bit block set is correctly decoded.

[0211] As a sub-embodiment of the above embodiment, the first communication device 410 corresponds to the second node in this application.

[0212] As an embodiment, the first communication device 410 includes: a memory storing a computer-readable instruction program, wherein the computer-readable instruction program generates actions when executed by at least one processor, and the actions include: sending Q1 bit blocks, wherein Q1 is a positive integer greater than 1; receiving a first message and a first bit block; wherein the first message is used to indicate a set of associated bit blocks for each bit in the first bit block, and the set of associated bit blocks for each bit in the first bit block includes at least one bit block in the Q1 bit blocks, and each bit in the first bit block is used to indicate whether the corresponding set of associated bit blocks is correctly decoded.

[0213] As a sub-embodiment of the above embodiment, the first communication device 410 corresponds to the second node in this application.

[0214] As an embodiment, at least one of {the antenna 452, the receiver 454, the multi-antenna receiving processor 458, the receiving processor 456, the controller / processor 459, the memory 460, the data source 467} is used to receive the Q1 bit blocks in the present application.

[0215] As an embodiment, at least one of {the antenna 420, the transmitter 418, the multi-antenna transmit processor 471, the transmit processor 416, the controller / processor 475, and the memory 476} is used to send the Q1 bit blocks in the present application.

[0216] As an embodiment, at least one of {the antenna 452, the receiver 454, the multi-antenna receiving processor 458, the receiving processor 456, the controller / processor 459, the memory 460, the data source 467} is used to receive the first signaling in the present application.

[0217] As an embodiment, at least one of {the antenna 420, the transmitter 418, the multi-antenna transmit processor 471, the transmit processor 416, the controller / processor 475, and the memory 476} is used to send the first signaling in the present application.

[0218] As an embodiment, at least one of {the antenna 452, the transmitter 454, the multi-antenna transmit processor 458, the transmit processor 468, the controller / processor 459, the memory 460, the data source 467} is used to send the first message in the present application and the first bit block in the present application.

[0219] As an embodiment, at least one of {the antenna 420, the receiver 418, the multi-antenna receiving processor 472, the receiving processor 470, the controller / processor 475, and the memory 476} is used to receive the first message in the present application and the first bit block in the present application.

[0220] Example 5

[0221] Embodiment 5 illustrates a signal transmission flow chart according to an embodiment of the present application, as shown in the attached Figure 5 As shown in the attached Figure 5 In the embodiment, the first node U1 and the second node U2 communicate with each other through the air interface. Figure 5 , the steps in the dashed box F1 are optional.

[0222] The first node U1 receives the first signaling in step S5101; receives Q1 bit blocks in step S511; and sends the first message and the first bit block in step S512.

[0223] The second node U2 sends a first signaling in step S5201; sends Q1 bit blocks in step S521; and receives a first message and a first bit block in step S522.

[0224] In Embodiment 5, the Q1 is a positive integer greater than 1; the first message is used to indicate a set of associated bit blocks for each bit in the first bit block, the set of associated bit blocks for each bit in the first bit block includes at least one bit block in the Q1 bit blocks, and each bit in the first bit block is used to indicate whether the corresponding set of associated bit blocks is correctly decoded; the first bit block consists of Q2 bits, and Q2 is a positive integer less than Q1; the set of associated bit blocks for each bit in the Q2 bits consists of one or more bit blocks in the Q1 bit blocks; any bit block in the Q1 bit blocks is associated with and only associated with one bit in the Q2 bits; the first signaling is used to indicate L1 association modes, the first message is used to indicate a first association mode from the L1 association modes, and the first association mode is used to determine a bit block to which each bit in the first bit block is associated in the Q1 bit blocks; L1 is a positive integer greater than 1; the first message and the first bit block are sent on the same physical layer channel, or the first message and the first bit block are sent on two physical layer channels respectively.

[0225] As a sub-embodiment of Example 5, any bit block among the Q1 bit blocks belongs to and only belongs to one bit block group among the Q3 bit block groups; any bit in the first bit block belongs to and only belongs to one bit sub-block among the Q3 bit sub-blocks; the Q3 bit sub-blocks respectively indicate whether the bit blocks in the Q3 bit block groups are correctly decoded, and the Q3 bit sub-blocks correspond one-to-one to the Q3 bit block groups; for any bit sub-block among the Q3 bit sub-blocks, the first message is used to indicate the associated bit block set of each bit from the corresponding bit block group; Q3 is a positive integer greater than 1 and less than Q1.

[0226] As a sub-embodiment of Example 5, the second bit block consists of Q4 bits, each bit block in the Q1 bit blocks corresponds to one bit in the Q4 bits, and Q4 is a positive integer greater than 1; the first message is used to indicate an associated bit set for each bit in the first bit block, and the associated bit set for each bit in the first bit block includes at least one bit in the Q4 bits; the associated bit block set for a given bit in the first bit block includes all bit blocks in the Q1 bit blocks corresponding to any bit in the associated bit set of the given bit in the first bit block.

[0227] As an embodiment, the first node U1 is the first node in this application.

[0228] As an embodiment, the second node U2 is the second node in the present application.

[0229] As an embodiment, the first node U1 is a UE.

[0230] As an embodiment, the first node U1 is a base station.

[0231] As an embodiment, the second node U2 is a base station.

[0232] As an embodiment, the second node U2 is a UE.

[0233] As an embodiment, the air interface between the second node U2 and the first node U1 is a Uu interface.

[0234] As an embodiment, the air interface between the second node U2 and the first node U1 includes a cellular link.

[0235] As an embodiment, the air interface between the second node U2 and the first node U1 is a PC5 interface.

[0236] As an embodiment, the air interface between the second node U2 and the first node U1 includes a sidelink.

[0237] As an embodiment, the air interface between the second node U2 and the first node U1 includes a wireless interface between a base station device and a user equipment.

[0238] As an embodiment, the air interface between the second node U2 and the first node U1 includes a wireless interface between user equipments.

[0239] As an embodiment, the sending of the first message is no later than the sending of the first bit block.

[0240] As an embodiment, Q2 is greater than 1.

[0241] As an embodiment, Q2 is default or configurable.

[0242] As an embodiment, the steps in the dashed box F1 exist.

[0243] As an embodiment, the steps in the dashed box F1 do not exist.

[0244] Example 6

[0245] Embodiment 6 illustrates a schematic diagram of the relationship between a given bit in Q2 bits and a Q1 bit block according to an embodiment of the present application, as shown in the attached figure. Figure 6 As shown in the attached Figure 6 In the figure, a slash filled box represents one bit in Q2 bits, a slash filled box with bold borders represents a given bit in the Q2 bits, a blank box represents a bit block in Q1 bit blocks, and a blank box with bold borders represents a bit block in the associated bit block set of the given bit in the Q2 bits.

[0246] In Embodiment 6, the first bit block in the present application is composed of Q2 bits; and the associated bit block set of a given bit in the Q2 bits is composed of one or more bit blocks in the Q1 bit blocks in the present application.

[0247] As an embodiment, the given bit among the Q2 bits is any bit among the Q2 bits.

[0248] As an embodiment, any bit block among the Q1 bit blocks is associated with at least one bit among the Q2 bits.

[0249] As an embodiment, any bit block among the Q1 bit blocks is associated with and only associated with one bit among the Q2 bits.

[0250] As an embodiment, the associated bit block set of each bit in the Q2 bits is composed of one or more bit blocks in the Q1 bit blocks.

[0251] Example 7

[0252] Embodiment 7 illustrates a schematic diagram of the relationship between Q1 bit blocks, Q3 bit block groups, the first bit block and Q3 bit sub-blocks according to an embodiment of the present application, as shown in the attached figure. Figure 7 shown.

[0253] In Example 7, any bit block among the Q1 bit blocks in the present application belongs to and only belongs to one bit block group among the Q3 bit block groups in the present application; any bit in the first bit block in the present application belongs to and only belongs to one bit sub-block among the Q3 bit sub-blocks in the present application; the Q3 bit sub-blocks respectively indicate whether the bit blocks in the Q3 bit block group are correctly decoded, and the Q3 bit sub-blocks correspond one-to-one to the Q3 bit block group.

[0254] As an embodiment, for any bit sub-block among the Q3 bit sub-blocks, the first message in the present application is used to indicate the associated bit block set of each bit from the corresponding bit block group; Q3 is a positive integer greater than 1 and less than Q1.

[0255] As an embodiment, Q3 is default or configurable.

[0256] As an embodiment, Q3 is not greater than 1706.

[0257] As an embodiment, Q3 is not greater than 65536.

[0258] As an embodiment, Q1 is a positive integer multiple of Q3.

[0259] As an embodiment, Q1 is not a positive integer multiple of Q3.

[0260] As an embodiment, any bit block group among the Q3 bit block groups belongs to the Q1 bit blocks.

[0261] As an embodiment, any bit sub-block among the Q3 bit sub-blocks belongs to the first bit block.

[0262] As an embodiment, which bit block group among the Q3 bit block groups a bit block among the Q1 bit blocks belongs to is determined based on a default grouping rule or a grouping rule configured by a higher layer signaling.

[0263] As an embodiment, Q1 is a positive integer multiple of Q3; the i-th bit block group among the Q3 bit block groups includes the Q1 / Q3×(i-1)+1 to Q1 / Q3×i-th ​​bit blocks among the Q1 bit blocks; and i is any positive integer not greater than Q3.

[0264] As an embodiment, Q1 is a positive integer multiple of Q3; the i-th bit block group among the Q3 bit block groups includes the i-th, Q3+i-th, ..., (Q1 / Q3-1)×Q3+i bit blocks among the Q1 bit blocks; i is any positive integer not greater than Q3.

[0265] As an embodiment, which bit block group among the Q3 bit block groups a bit block among the Q1 bit blocks belongs to is determined by looking up a table.

[0266] As an embodiment, any bit sub-block of the Q3 bit sub-blocks includes at least two bits.

[0267] As an embodiment, the size of any bit sub-block among the Q3 bit sub-blocks is default or configurable.

[0268] As an embodiment, the Q3 bit sub-blocks are of the same size.

[0269] As an embodiment, there are two bit sub-blocks of different sizes in the Q3 bit sub-blocks.

[0270] As an embodiment, any bit block group among the Q3 bit block groups includes at least two bit blocks.

[0271] As an embodiment, the number of bit blocks included in any two bit block groups among the Q3 bit block groups is the same.

[0272] As an embodiment, the number of bit blocks included in one of the Q3 bit block groups is different from the number of bit blocks included in another bit block group of the Q3 bit block groups.

[0273] As an embodiment, for any bit sub-block among the Q3 bit sub-blocks, the first message is used to explicitly indicate the associated bit block set of each bit from the corresponding bit block group.

[0274] As an embodiment, for any bit sub-block among the Q3 bit sub-blocks, the first message is used to implicitly indicate the associated bit block set of each bit from the corresponding bit block group.

[0275] As an embodiment, any bit block among the Q1 bit blocks belongs to and only belongs to one bit block group among the Q3 bit block groups; any bit in the first bit block belongs to and only belongs to one bit sub-block among the Q3 bit sub-blocks; the Q3 bit sub-blocks respectively indicate whether the bit blocks in the Q3 bit block groups are correctly decoded, and the Q3 bit sub-blocks correspond one-to-one to the Q3 bit block groups; for any bit sub-block among the Q3 bit sub-blocks, the first association method in the present application is used to determine the associated bit block set of each bit from the corresponding bit block group.

[0276] As a sub-embodiment of the above-mentioned embodiment, the L1 kinds of association methods are respectively L1 different mapping relationships; the associated bit block set of a given bit in a given bit sub-block in the Q3 bit sub-blocks includes all bit blocks in the bit block group corresponding to the given bit sub-block in the Q3 bit sub-blocks that are mapped to the given bit in the given bit sub-block in the Q3 bit sub-blocks based on the first association method.

[0277] As a sub-embodiment of the above-mentioned embodiment, the L1 association methods are respectively L1 different mapping methods between multiple bit blocks and multiple bits; the associated bit block set of a given bit in a given bit sub-block in the Q3 bit sub-blocks includes all bit blocks in the bit block group corresponding to the given bit sub-block in the Q3 bit sub-blocks that are mapped to the given bit in the given bit sub-block in the Q3 bit sub-blocks based on the first association method.

[0278] As a sub-embodiment of the above-mentioned embodiment, the L1 kinds of association methods are respectively L1 different mapping methods between the first type of bit blocks and the first type of bits; the bit blocks in the Q3 bit block groups are all the first type of bit blocks, the bits in the Q3 bit sub-blocks are all the first type of bits, and the associated bit block set of the given bit in the given bit sub-block in the Q3 bit sub-blocks includes all bit blocks in the bit block group corresponding to the given bit sub-block in the Q3 bit sub-blocks that are mapped to the given bit in the given bit sub-block in the Q3 bit sub-blocks based on the first association method.

[0279] As a sub-embodiment of the above-mentioned embodiment, the L1 association methods correspond to L1 different lookup tables respectively; the associated bit block set of any bit in any bit sub-block of the Q3 bit sub-blocks includes all bit blocks associated with the given bit in the given bit sub-block of the Q3 bit sub-blocks in the bit block group corresponding to the given bit sub-block in the Q3 bit sub-blocks, which is determined by looking up the lookup table corresponding to the first association method.

[0280] As an embodiment, the given bit sub-block among the Q3 bit sub-blocks is any bit sub-block among the Q3 bit sub-blocks.

[0281] As an embodiment, the given bit in the given bit sub-block in the Q3 bit sub-blocks is any bit in the given bit sub-block in the Q3 bit sub-blocks.

[0282] As an embodiment, the expression in the present application that the Q3 bit sub-blocks respectively indicate whether the bit blocks in the Q3 bit block groups are correctly decoded includes: for any bit sub-block in the Q3 bit sub-blocks, each bit is used to indicate whether a bit block in the corresponding bit block group is correctly decoded or whether all multiple bit blocks in the corresponding bit block group are correctly decoded.

[0283] As an embodiment, the statement in the present application that the Q3 bit sub-blocks respectively indicate whether the bit blocks in the Q3 bit block groups are correctly decoded includes: for any bit sub-block in the Q3 bit sub-blocks, each bit is used to indicate whether all bit blocks in the corresponding associated bit block set are all correctly decoded.

[0284] As an embodiment, the expression in the present application that the Q3 bit sub-blocks respectively indicate whether the bit blocks in the Q3 bit block groups are correctly decoded includes: for any bit sub-block in the Q3 bit sub-blocks, each bit is used to indicate whether a bit block in the corresponding bit block group is correctly decoded or whether at least one bit block among the multiple bit blocks in the corresponding bit block group is correctly decoded.

[0285] As an embodiment, the statement in the present application that the Q3 bit sub-blocks respectively indicate whether the bit blocks in the Q3 bit block groups are correctly decoded includes: for any bit sub-block in the Q3 bit sub-blocks, each bit is used to indicate whether at least one bit block in the corresponding associated bit block set is correctly decoded.

[0286] Example 8

[0287] Embodiment 8 illustrates a schematic diagram of the relationship between the Q1 bit block, the second bit block, the Q4 bit, the first bit block and the first message according to an embodiment of the present application, as shown in the attached figure. Figure 8 shown.

[0288] In Example 8, the second bit block in the present application is composed of the Q4 bits in the present application, each bit block in the Q1 bit blocks in the present application corresponds to one bit in the Q4 bits, and Q4 is a positive integer greater than 1; the first message in the present application is used to indicate the associated bit set of each bit in the first bit block in the present application, and the associated bit set of each bit in the first bit block includes at least one bit in the Q4 bits; the associated bit block set of a given bit in the first bit block includes all bit blocks in the Q1 bit blocks corresponding to any bit in the associated bit set of the given bit in the first bit block.

[0289] In Embodiment 8, the given bit in the first bit block is any bit in the first bit block.

[0290] As an embodiment, the second bit block is obtained by performing calculations by the first node.

[0291] As an embodiment, the second bit block includes multiple HARQ-ACK information bits.

[0292] As an embodiment, each bit included in the second bit block is a HARQ-ACK information bit.

[0293] As an embodiment, the second bit block is a HARQ-ACK codebook.

[0294] As an embodiment, the second bit block belongs to a HARQ-ACK codebook.

[0295] As an embodiment, Q4 is not greater than 1706.

[0296] As an embodiment, Q4 is not greater than 65536.

[0297] As an embodiment, the Q4 is equal to the Q1, and the Q1 bit blocks correspond one-to-one to the Q4 bits.

[0298] As an embodiment, there is at least one bit in the Q4 bits that does not correspond to any bit block in the Q1 bit blocks.

[0299] As an embodiment, in the present application, the given bit in the first bit block is any bit in the first bit block.

[0300] As an embodiment, any bit in the associated bit set of each bit in the first bit block is one of the Q4 bits.

[0301] As an embodiment, each of the Q1 bit blocks corresponds to only one bit of the Q4 bits.

[0302] As an embodiment, the meaning of a bit in the associated bit set of a bit in the first bit block corresponding to a bit block in the Q1 bit blocks includes: a bit in the Q4 bits corresponding to the bit block in the Q1 bit blocks, and the bit in the Q4 bits is a bit in the associated bit set of the bit in the first bit block.

[0303] As an embodiment, the meaning that one bit block in the Q1 bit blocks corresponds to one bit in the Q4 bits includes: the one bit in the Q4 bits is used to indicate whether the one bit block in the Q1 bit block is correctly decoded.

[0304] As an embodiment, the meaning that one bit block in the Q1 bit blocks corresponds to one bit in the Q4 bits includes: the one bit block in the Q1 bit blocks is mapped to the one bit in the Q4 bits based on a default or configured mapping rule.

[0305] As an embodiment, the meaning that one bit block in the Q1 bit blocks corresponds to one bit in the Q4 bits includes: the one bit block in the Q1 bit blocks corresponds to the one bit in the Q4 bits based on a default or configured lookup table.

[0306] As an embodiment, all bits in the associated bit set of each bit in the first bit block are bits in the Q4 bits.

[0307] As an embodiment, the first association method in the present application is used to determine the associated bit set of each bit in the first bit block.

[0308] As an embodiment, the first association method in the present application is used to determine the bit associated with each bit in the first bit block in the Q4 bits.

[0309] As an embodiment, the L1 association methods in the present application are L1 different mapping relationships respectively; the associated bit set of the given bit in the first bit block includes all bits of the Q4 bits that are mapped to the given bit in the first bit block based on the first association method in the present application.

[0310] As an embodiment, the L1 association methods in the present application are L1 different mapping methods between bits; the associated bit set of a given bit in the first bit block includes all bits of the Q4 bits that are mapped to the given bit in the first bit block based on the first association method in the present application.

[0311] As an embodiment, the L1 association methods in the present application correspond to L1 different lookup tables respectively; the associated bit set of a given bit in the first bit block includes all bits associated with the given bit in the first bit block in the Q4 bits determined by looking up the lookup table corresponding to the first association method in the present application.

[0312] As an embodiment, the first message is used to explicitly indicate the associated bit set of each bit in the first block of bits.

[0313] As an embodiment, the first message is used to indicate the index of each bit in the associated bit set of each bit in the first bit block in the Q4 bits.

[0314] As an embodiment, the first message is used to implicitly indicate an associated bit set for each bit in the first block of bits.

[0315] As an embodiment, the statement in the present application that the set of associated bit blocks for a given bit in the first bit block includes all bit blocks of the Q1 bit blocks corresponding to any bit in the set of associated bits for the given bit in the first bit block means that the set of associated bit blocks for a given bit in the first bit block includes all bit blocks of the Q1 bit blocks corresponding to at least one bit in the set of associated bits for the given bit in the first bit block.

[0316] Example 9

[0317] Embodiment 9 illustrates a schematic diagram of the relationship between a given bit in the first bit block, Q1 bit blocks, and Q4 bits according to an embodiment of the present application, as shown in the attached figure. Fig. 9 As shown in the attached Fig. 9In the figure, a slash filled box represents a bit in the first bit block, a slash filled box with bold border represents a given bit in the first bit block, a gray filled box represents a bit in the Q4 bits constituting the second bit block, a gray filled box in the dotted box represents the associated bit set of the given bit in the first bit block, a blank box represents a bit block in the Q1 bit blocks, and a blank box in the dotted box represents the associated bit block set of the given bit in the first bit block.

[0318] In Example 9, each bit block in the Q1 bit blocks corresponds to one bit in the Q4 bits; the first message in the present application is used to indicate the associated bit set of each bit in the first bit block; the associated bit block set of the given bit in the first bit block includes all bit blocks in the Q1 bit blocks corresponding to any bit in the associated bit set of the given bit in the first bit block.

[0319] As an embodiment, the given bit in the first bit block is any bit in the first bit block.

[0320] Example 10

[0321] Embodiment 10 illustrates a schematic diagram of the relationship between the first signaling, L1 association modes, the first message, the first association mode, and the bit blocks associated with each bit in the first bit block in the Q1 bit blocks according to an embodiment of the present application, as shown in the attached figure. Fig.10 shown.

[0322] In embodiment 10, the first signaling in the present application is used to indicate the L1 association methods in the present application, the first message in the present application is used to indicate the first association method in the present application from the L1 association methods, and the first association method is used to determine the bit block to which each bit in the first bit block in the present application is associated in the Q1 bit blocks in the present application; the L1 is a positive integer greater than 1.

[0323] As an embodiment, the first signaling is RRC signaling.

[0324] As an embodiment, the first signaling includes one or more fields in an RRC signaling.

[0325] As an embodiment, the first signaling includes an IE (Information Element).

[0326] As an embodiment, the first signaling is MAC CE signaling.

[0327] As an embodiment, the first signaling includes one or more fields in a MAC CE signaling.

[0328] As an embodiment, the first signaling is a higher layer signaling.

[0329] As an embodiment, the first signaling is a downlink grant signaling (DownLink Grant Signaling).

[0330] As an embodiment, the first signaling is used to explicitly indicate the L1 association mode.

[0331] As an embodiment, the first signaling is used to implicitly indicate the L1 association mode.

[0332] As an embodiment, the first signaling is used to indicate the L1 association mode in the form of configuration parameters.

[0333] As an embodiment, the L1 association modes are L1 different mapping modes between bit blocks and bits.

[0334] As an embodiment, the L1 association modes are L1 different mapping modes between multiple bit blocks and multiple bits.

[0335] As an embodiment, the L1 association modes correspond to L1 different lookup tables respectively.

[0336] As an embodiment, the first message is used to explicitly indicate the first association mode from the L1 association modes.

[0337] As an embodiment, the first message is used to implicitly indicate the first association mode from among the L1 association modes.

[0338] As an embodiment, the first message is used to indicate the index of the first association mode in the L1 association modes.

[0339] As an embodiment, the L1 association modes are L1 different mapping relationships respectively; the associated bit block set of the given bit in the first bit block includes all bit blocks in the Q1 bit blocks that are mapped to the given bit in the first bit block based on the first association mode.

[0340] As an embodiment, the L1 association methods are L1 different mapping methods between multiple bit blocks and multiple bits; the associated bit block set of a given bit in the first bit block includes all bit blocks in the Q1 bit blocks that are mapped to the given bit in the first bit block based on the first association method.

[0341] As an embodiment, the L1 types of association methods are L1 different mapping methods between first-type bit blocks and first-type bits; the Q1 bit blocks are all first-type bit blocks, any bit in the first bit block is a first-type bit, and the associated bit block set of a given bit in the first bit block includes all bit blocks in the Q1 bit blocks that are mapped to the given bit in the first bit block based on the first association method.

[0342] As an embodiment, the first type of bit block in the present application is a transmission block.

[0343] As an embodiment, the first type of bit block in the present application is a CBG.

[0344] As an embodiment, the first type of bit block in the present application is a transmission block or a CBG.

[0345] As an embodiment, the first type of bit block in the present application is a bit block transmitted in a PDSCH.

[0346] As an embodiment, the first type of bit block in the present application is a bit block composed of at least one transmission block.

[0347] As an embodiment, the first type of bit block in the present application is a bit block composed of at least one CBG.

[0348] As an embodiment, a transmission block is the first type of bit block in the present application.

[0349] As an embodiment, a CBG is the first type of bit block in the present application.

[0350] As an embodiment, a DCI format used to indicate SPS (Semi-persistent scheduling) PDSCH (Physical Downlink Shared CHannel) release is the first type of bit block in the present application.

[0351] As an embodiment, the first type of bit in the present application is a HARQ-ACK information bit.

[0352] As an embodiment, a bit indicating ACK or NACK is the first type of bit in the present application.

[0353] As an embodiment, the first type of bit in the present application is a UCI (Uplink control information) bit.

[0354] As an embodiment, the first type of bit in the present application is a SCI (Sidelink control information) bit.

[0355] As an embodiment, the L1 association methods correspond to L1 different lookup tables respectively; the set of associated bit blocks of a given bit in the first bit block includes all bit blocks associated with the given bit in the first bit block in the Q1 bit blocks determined by looking up the lookup table corresponding to the first association method.

[0356] As an embodiment, the L1 association modes are L1 different mapping relationships respectively; the associated bit set of the given bit in the first bit block includes all bits of the Q4 bits in this application that are mapped to the given bit in the first bit block based on the first association mode.

[0357] As an embodiment, the L1 association methods are L1 different mapping methods between bits; the associated bit set of a given bit in the first bit block includes all bits of the Q4 bits in this application that are mapped to the given bit in the first bit block based on the first association method.

[0358] As an embodiment, the L1 association modes correspond to L1 different lookup tables respectively; the associated bit set of a given bit in the first bit block includes all bits associated with the given bit in the first bit block in the Q4 bits in this application, which are determined by looking up the lookup table corresponding to the first association mode.

[0359] Embodiment 11

[0360] Embodiment 11 illustrates a schematic diagram of a method for sending a first message and a first bit block according to an embodiment of the present application, as shown in the attached figure. Fig.11 shown.

[0361] In embodiment 11, the first message in the present application and the first bit block in the present application are sent on the same physical layer channel.

[0362] As an embodiment, before being sent on the same physical layer channel, the bit sequence consisting of the first message and the first bit block is at least modulated and mapped to physical resources.

[0363] As an embodiment, before being sent on the same physical layer channel, the bit sequence consisting of the first message and the first bit block is at least scrambled, modulated and mapped to physical resources.

[0364] As an embodiment, before being sent on the same physical layer channel, the bit sequence consisting of the first message and the first bit block undergoes at least channel coding, rate matching, scrambling, modulation and mapping to physical resources.

[0365] As an embodiment, before being sent on the same physical layer channel, the bit sequence consisting of the first message and the first bit block undergoes at least CRC attachment, channel coding, rate matching, scrambling, modulation and mapping to physical resources.

[0366] As an embodiment, before being sent on the same physical layer channel, the bit sequence consisting of the first message and the first bit block undergoes at least CRC attachment, code block segmentation, code block CRC attachment, channel coding, rate matching, code block concatenation, scrambling, modulation and mapping to physical resources.

[0367] As an embodiment, a bit sequence including the first message and the first bit block undergoes CRC addition, code block segmentation, code block CRC addition, channel coding, rate matching, code block concatenation, scrambling, modulation, spread spectrum, layer mapping, precoding, mapping to physical resources, multi-carrier symbol generation, and modulation up-conversion, and the output is sent on the same physical layer channel after part or all of the steps.

[0368] As an embodiment, the output of the first message after part or all of CRC appending, code block segmentation, code block CRC appending, channel coding, rate matching, code block concatenation, scrambling, modulation, spread spectrum, layer mapping, precoding, mapping to physical resources, multi-carrier symbol generation, and modulation up-conversion, and the output of the first bit block after part or all of CRC appending, code block segmentation, code block CRC appending, channel coding, rate matching, code block concatenation, scrambling, modulation, spread spectrum, layer mapping, precoding, mapping to physical resources, multi-carrier symbol generation, and modulation up-conversion are sent together on the same physical layer channel.

[0369] As an embodiment, the same physical layer channel is PUSCH (Physical Uplink Shared CHannel, physical uplink shared channel).

[0370] As an embodiment, the same physical layer channel is PUCCH (Physical Uplink ControlCHannel, physical uplink control channel).

[0371] As an embodiment, the same physical layer channel is a sidelink physical layer channel.

[0372] Example 12

[0373] Embodiment 12 illustrates a schematic diagram of a method for sending a first message and a first bit block according to an embodiment of the present application, as shown in the attached figure. Fig.12 shown.

[0374] In Example 12, the first message in the present application and the first bit block in the present application are sent respectively on two physical layer channels.

[0375] As an embodiment, the first node is a UE, and the two physical layer channels are PUSCH and PUCCH respectively.

[0376] As an embodiment, the first node is a UE, and the two physical layer channels are PUCCH and PUSCH respectively.

[0377] As an embodiment, the first node is a UE, and the two physical layer channels are two different PUSCHs.

[0378] As an embodiment, the first node is a UE, and the two physical layer channels are two different PUCCHs.

[0379] As an embodiment, the first node is a UE, and the two physical layer channels are two different sidelink physical layer channels.

[0380] As an embodiment, the first message is output after part or all of CRC appending, code block segmentation, code block CRC appending, channel coding, rate matching, code block concatenation, scrambling, modulation, spread spectrum, layer mapping, precoding, mapping to physical resources, multi-carrier symbol generation, and modulation up-conversion, and the first bit block is output after part or all of CRC appending, code block segmentation, code block CRC appending, channel coding, rate matching, code block concatenation, scrambling, modulation, spread spectrum, layer mapping, precoding, mapping to physical resources, multi-carrier symbol generation, and modulation up-conversion, respectively, and are sent on the two physical layer channels.

[0381] As an embodiment, the first message is at least modulated and mapped to physical resources before being sent on one of the two physical layer channels.

[0382] As an embodiment, the first message is at least scrambled, modulated and mapped to physical resources before being sent on one of the two physical layer channels.

[0383] As an embodiment, the first message is subjected to at least channel coding, rate matching, scrambling, modulation and mapping to physical resources before being sent on one of the two physical layer channels.

[0384] As an embodiment, the first message undergoes at least CRC attachment, channel coding, rate matching, scrambling, modulation and mapping to physical resources before being sent on one of the two physical layer channels.

[0385] As an embodiment, before being sent on one of the two physical layer channels, the first message undergoes at least CRC attachment, code block segmentation, code block CRC attachment, channel coding, rate matching, code block concatenation, scrambling, modulation and mapping to physical resources.

[0386] As an embodiment, the first bit block is at least modulated and mapped to a physical resource before being sent on one of the two physical layer channels.

[0387] As an embodiment, the first bit block is at least scrambled, modulated and mapped to physical resources before being sent on one of the two physical layer channels.

[0388] As an embodiment, the first bit block undergoes at least channel coding, rate matching, scrambling, modulation and mapping to physical resources before being sent on one of the two physical layer channels.

[0389] As an embodiment, the first bit block undergoes at least CRC attachment, channel coding, rate matching, scrambling, modulation and mapping to physical resources before being sent on one of the two physical layer channels.

[0390] As an embodiment, before being sent on one of the two physical layer channels, the first bit block undergoes at least CRC attachment, code block segmentation, code block CRC attachment, channel coding, rate matching, code block concatenation, scrambling, modulation and mapping to physical resources.

[0391] Embodiment 13

[0392] Embodiment 13 illustrates a structural block diagram of a processing device in a first node device, as shown in the attached figure. Fig.13 As shown in the attached Fig.13 In the embodiment, the first node device processing device 1300 includes a first receiver 1301 and a first transmitter 1302.

[0393] As an embodiment, the first node device 1300 is a user equipment.

[0394] As an embodiment, the first node device 1300 is a relay node.

[0395] As an embodiment, the first node device 1300 is a vehicle-mounted communication device.

[0396] As an embodiment, the first node device 1300 is a user equipment supporting V2X communication.

[0397] As an embodiment, the first node device 1300 is a relay node supporting V2X communication.

[0398] As an embodiment, the first receiver 1301 includes the attached Figure 4 At least one of the antenna 452, receiver 454, multi-antenna reception processor 458, reception processor 456, controller / processor 459, memory 460 and data source 467.

[0399] As an embodiment, the first receiver 1301 includes the attached Figure 4 At least the first five of the antenna 452, receiver 454, multi-antenna receive processor 458, receive processor 456, controller / processor 459, memory 460 and data source 467.

[0400] As an embodiment, the first receiver 1301 includes the attached Figure 4 At least the first four of the antenna 452, receiver 454, multi-antenna receive processor 458, receive processor 456, controller / processor 459, memory 460 and data source 467.

[0401] As an embodiment, the first receiver 1301 includes the attached Figure 4 At least the first three of the antenna 452, receiver 454, multi-antenna receive processor 458, receive processor 456, controller / processor 459, memory 460 and data source 467.

[0402] As an embodiment, the first receiver 1301 includes the attached Figure 4 At least the first two of the antenna 452, receiver 454, multi-antenna receive processor 458, receive processor 456, controller / processor 459, memory 460 and data source 467.

[0403] As an embodiment, the first transmitter 1302 includes the attached Figure 4 At least one of the antenna 452, transmitter 454, multi-antenna transmitter processor 457, transmit processor 468, controller / processor 459, memory 460 and data source 467.

[0404] As an embodiment, the first transmitter 1302 includes the attached Figure 4 At least the first five of the antenna 452, transmitter 454, multi-antenna transmitter processor 457, transmit processor 468, controller / processor 459, memory 460 and data source 467.

[0405] As an embodiment, the first transmitter 1302 includes the attached Figure 4 At least the first four of the antenna 452, transmitter 454, multi-antenna transmitter processor 457, transmit processor 468, controller / processor 459, memory 460 and data source 467.

[0406] As an embodiment, the first transmitter 1302 includes the attached Figure 4 At least the first three of the antenna 452, transmitter 454, multi-antenna transmitter processor 457, transmit processor 468, controller / processor 459, memory 460 and data source 467.

[0407] As an embodiment, the first transmitter 1302 includes the attached Figure 4 At least the first two of the antenna 452, transmitter 454, multi-antenna transmitter processor 457, transmit processor 468, controller / processor 459, memory 460 and data source 467.

[0408] In embodiment 13, the first receiver 1301 receives Q1 bit blocks, where Q1 is a positive integer greater than 1; the first transmitter 1302 sends a first message and a first bit block; wherein the first message is used to indicate a set of associated bit blocks for each bit in the first bit block, the set of associated bit blocks for each bit in the first bit block includes at least one bit block in the Q1 bit blocks, and each bit in the first bit block is used to indicate whether the corresponding set of associated bit blocks is correctly decoded.

[0409] As an embodiment, the first bit block consists of Q2 bits, where Q2 is a positive integer less than Q1; the associated bit block set of each bit in the Q2 bits consists of one or more bit blocks in the Q1 bit blocks; any bit block in the Q1 bit blocks is associated to and only to one bit in the Q2 bits.

[0410] As an embodiment, any one of the Q2 bits is a HARQ-ACK information bit.

[0411] As an embodiment, any bit block among the Q1 bit blocks belongs to and only belongs to one bit block group among the Q3 bit block groups; any bit in the first bit block belongs to and only belongs to one bit sub-block among the Q3 bit sub-blocks; the Q3 bit sub-blocks respectively indicate whether the bit blocks in the Q3 bit block groups are correctly decoded, and the Q3 bit sub-blocks correspond one-to-one to the Q3 bit block groups; for any bit sub-block among the Q3 bit sub-blocks, the first message is used to indicate the associated bit block set of each bit from the corresponding bit block group; Q3 is a positive integer greater than 1 and less than Q1.

[0412] As an embodiment, the second bit block consists of Q4 bits, each bit block in the Q1 bit blocks corresponds to one bit in the Q4 bits, and Q4 is a positive integer greater than 1; the first message is used to indicate the associated bit set of each bit in the first bit block, and the associated bit set of each bit in the first bit block includes at least one bit in the Q4 bits; the associated bit block set of a given bit in the first bit block includes all bit blocks in the Q1 bit blocks corresponding to any bit in the associated bit set of the given bit in the first bit block.

[0413] As an embodiment, any one of the Q4 bits is a HARQ-ACK information bit.

[0414] As an embodiment, the first receiver 1301 receives a first signaling; wherein the first signaling is used to indicate L1 association modes, the first message is used to indicate a first association mode from the L1 association modes, and the first association mode is used to determine the bit block to which each bit in the first bit block is associated in the Q1 bit blocks; and L1 is a positive integer greater than 1.

[0415] As an embodiment, the first message and the first bit block are sent on the same physical layer channel.

[0416] As an embodiment, the first message and the first bit block are sent on two physical layer channels respectively.

[0417] Embodiment 14

[0418] Embodiment 14 illustrates a structural block diagram of a processing device in a second node device, as shown in the attached figure. Fig.14 As shown in the attached Fig.14 In the embodiment, the second node device processing device 1400 includes a second transmitter 1401 and a second receiver 1402.

[0419] As an embodiment, the second node device 1400 is a user equipment.

[0420] As an embodiment, the second node device 1400 is a base station.

[0421] As an embodiment, the second node device 1400 is a relay node.

[0422] As an embodiment, the second node device 1400 is a vehicle-mounted communication device.

[0423] As an embodiment, the second node device 1400 is a user equipment supporting V2X communication.

[0424] As an embodiment, the second transmitter 1401 includes the attached Figure 4 At least one of the antenna 420, transmitter 418, multi-antenna transmit processor 471, transmit processor 416, controller / processor 475 and memory 476.

[0425] As an embodiment, the second transmitter 1401 includes the attached Figure 4 At least the first five of the antenna 420, transmitter 418, multi-antenna transmit processor 471, transmit processor 416, controller / processor 475 and memory 476.

[0426] As an embodiment, the second transmitter 1401 includes the attached Figure 4 At least the first four of the antenna 420, transmitter 418, multi-antenna transmit processor 471, transmit processor 416, controller / processor 475 and memory 476.

[0427] As an embodiment, the second transmitter 1401 includes the attached Figure 4 At least the first three of the antenna 420, transmitter 418, multi-antenna transmit processor 471, transmit processor 416, controller / processor 475 and memory 476.

[0428] As an embodiment, the second transmitter 1401 includes the attached Figure 4 At least the first two of the antenna 420, transmitter 418, multi-antenna transmit processor 471, transmit processor 416, controller / processor 475 and memory 476.

[0429] As an embodiment, the second receiver 1402 includes the attached Figure 4 At least one of the antenna 420, the receiver 418, the multi-antenna reception processor 472, the reception processor 470, the controller / processor 475 and the memory 476.

[0430] As an embodiment, the second receiver 1402 includes the attached Figure 4 At least the first five of the antenna 420, the receiver 418, the multi-antenna receive processor 472, the receive processor 470, the controller / processor 475 and the memory 476.

[0431] As an embodiment, the second receiver 1402 includes the attached Figure 4 At least the first four of the antenna 420, the receiver 418, the multi-antenna receive processor 472, the receive processor 470, the controller / processor 475 and the memory 476.

[0432] As an embodiment, the second receiver 1402 includes the attached Figure 4 At least the first three of the antenna 420, the receiver 418, the multi-antenna receive processor 472, the receive processor 470, the controller / processor 475 and the memory 476.

[0433] As an embodiment, the second receiver 1402 includes the attached Figure 4 At least the first two of the antenna 420, the receiver 418, the multi-antenna reception processor 472, the reception processor 470, the controller / processor 475 and the memory 476.

[0434] In Example 14, the second transmitter 1401 sends Q1 bit blocks, where Q1 is a positive integer greater than 1; the second receiver 1402 receives a first message and a first bit block; wherein the first message is used to indicate a set of associated bit blocks for each bit in the first bit block, the set of associated bit blocks for each bit in the first bit block includes at least one bit block in the Q1 bit blocks, and each bit in the first bit block is used to indicate whether the corresponding set of associated bit blocks is correctly decoded.

[0435] As an embodiment, the first bit block consists of Q2 bits, where Q2 is a positive integer less than Q1; the associated bit block set of each bit in the Q2 bits consists of one or more bit blocks in the Q1 bit blocks; any bit block in the Q1 bit blocks is associated to and only to one bit in the Q2 bits.

[0436] As an embodiment, any one of the Q2 bits is a HARQ-ACK information bit.

[0437] As an embodiment, any bit block among the Q1 bit blocks belongs to and only belongs to one bit block group among the Q3 bit block groups; any bit in the first bit block belongs to and only belongs to one bit sub-block among the Q3 bit sub-blocks; the Q3 bit sub-blocks respectively indicate whether the bit blocks in the Q3 bit block groups are correctly decoded, and the Q3 bit sub-blocks correspond one-to-one to the Q3 bit block groups; for any bit sub-block among the Q3 bit sub-blocks, the first message is used to indicate the associated bit block set of each bit from the corresponding bit block group; Q3 is a positive integer greater than 1 and less than Q1.

[0438] As an embodiment, the second bit block consists of Q4 bits, each bit block in the Q1 bit blocks corresponds to one bit in the Q4 bits, and Q4 is a positive integer greater than 1; the first message is used to indicate the associated bit set of each bit in the first bit block, and the associated bit set of each bit in the first bit block includes at least one bit in the Q4 bits; the associated bit block set of a given bit in the first bit block includes all bit blocks in the Q1 bit blocks corresponding to any bit in the associated bit set of the given bit in the first bit block.

[0439] As an embodiment, any one of the Q4 bits is a HARQ-ACK information bit.

[0440] As an embodiment, the second transmitter 1401 sends a first signaling; wherein the first signaling is used to indicate L1 association modes, the first message is used to indicate a first association mode from the L1 association modes, and the first association mode is used to determine the bit block to which each bit in the first bit block is associated in the Q1 bit blocks; and L1 is a positive integer greater than 1.

[0441] As an embodiment, the first message and the first bit block are sent on the same physical layer channel.

[0442] As an embodiment, the first message and the first bit block are sent on two physical layer channels respectively.

[0443] A person of ordinary skill in the art can understand that all or part of the steps in the above method can be completed by instructing the relevant hardware through a program, and the program can be stored in a computer-readable storage medium, such as a read-only memory, a hard disk or an optical disk. Optionally, all or part of the steps in the above embodiment can also be implemented using one or more integrated circuits. Accordingly, each module unit in the above embodiment can be implemented in the form of hardware or in the form of a software function module, and the present application is not limited to any specific form of software and hardware combination. The first node device in the present application includes but is not limited to mobile phones, tablet computers, notebooks, Internet cards, low-power devices, eMTC devices, NB-IoT devices, vehicle-mounted communication devices, aircraft, airplanes, drones, remote-controlled aircraft and other wireless communication devices. The second node device in the present application includes but is not limited to mobile phones, tablet computers, notebooks, Internet cards, low-power devices, eMTC devices, NB-IoT devices, vehicle-mounted communication devices, aircraft, airplanes, drones, remote-controlled aircraft and other wireless communication devices. The user equipment or UE or terminal in the present application includes but is not limited to mobile phones, tablet computers, notebooks, Internet cards, low-power devices, eMTC devices, NB-IoT devices, vehicle-mounted communication devices, aircraft, airplanes, drones, remote-controlled aircraft and other wireless communication devices. The base station equipment or base station or network side equipment in this application includes but is not limited to macrocell base stations, microcell base stations, home base stations, relay base stations, eNB, gNB, transmission receiving nodes TRP, GNSS, relay satellites, satellite base stations, aerial base stations, test devices, test equipment, test instruments and other equipment.

[0444] It should be understood by those skilled in the art that the present invention may be implemented in other specified forms without departing from its core or essential features. Therefore, the embodiments disclosed herein should be considered illustrative rather than restrictive in any way. The scope of the invention is determined by the appended claims rather than the preceding description, and all modifications within their equivalent meanings and regions are considered to be included therein.

Claims

1. A first node device used for wireless communication, characterized in that: include: A first receiver receives Q1 bit blocks, where Q1 is a positive integer greater than 1; A first transmitter sends a first message and a first bit block; the first message is used to indicate a set of associated bit blocks for each bit in the first bit block, the set of associated bit blocks for each bit in the first bit block includes at least one bit block in the Q1 bit blocks, and each bit in the first bit block is used to indicate whether the corresponding set of associated bit blocks is correctly decoded; Among them, any bit block in the Q1 bit blocks belongs to and only belongs to one bit block group in the Q3 bit block groups; any bit in the first bit block belongs to and only belongs to one bit sub-block in the Q3 bit sub-blocks; the Q3 bit sub-blocks respectively indicate whether the bit blocks in the Q3 bit block groups are correctly decoded, and the Q3 bit sub-blocks correspond to the Q3 bit block groups one by one; for any bit sub-block in the Q3 bit sub-blocks, the first message is used to indicate the associated bit block set of each bit from the corresponding bit block group; Q3 is a positive integer greater than 1 and less than Q1; or, The second bit block consists of Q4 bits, each bit block in the Q1 bit blocks corresponds to one bit in the Q4 bits, and Q4 is a positive integer greater than 1; the first message is used to indicate the associated bit set of each bit in the first bit block, and the associated bit set of each bit in the first bit block includes at least one bit in the Q4 bits; the associated bit block set of a given bit in the first bit block includes all bit blocks in the Q1 bit blocks corresponding to any bit in the associated bit set of the given bit in the first bit block.

2. The first node device according to claim 1, characterized in that: The first bit block consists of Q2 bits, where Q2 is a positive integer less than Q1; the associated bit block set for each bit in the Q2 bits consists of one or more bit blocks in the Q1 bit blocks; any bit block in the Q1 bit blocks is associated to and only to one bit in the Q2 bits.

3. The first node device according to claim 1 or 2, characterized in that: include: The first receiver receives a first signaling; The first signaling is used to indicate L1 association modes, the first message is used to indicate a first association mode from the L1 association modes, the first association mode is used to determine the bit block to which each bit in the first bit block is associated in the Q1 bit blocks; and L1 is a positive integer greater than 1.

4. The first node device according to any one of claims 1 to 3, characterized in that: The first message and the first bit block are sent on the same physical layer channel.

5. The first node device according to any one of claims 1 to 4, characterized in that: The first message and the first bit block are sent on two physical layer channels respectively.

6. A second node device used for wireless communication, characterized in that: include: A second transmitter sends Q1 bit blocks, where Q1 is a positive integer greater than 1; A second receiver receives a first message and a first bit block, wherein the first message is used to indicate a set of associated bit blocks for each bit in the first bit block, the set of associated bit blocks for each bit in the first bit block includes at least one bit block in the Q1 bit blocks, and each bit in the first bit block is used to indicate whether the corresponding set of associated bit blocks is correctly decoded; Among them, any bit block in the Q1 bit blocks belongs to and only belongs to one bit block group in the Q3 bit block groups; any bit in the first bit block belongs to and only belongs to one bit sub-block in the Q3 bit sub-blocks; the Q3 bit sub-blocks respectively indicate whether the bit blocks in the Q3 bit block groups are correctly decoded, and the Q3 bit sub-blocks correspond to the Q3 bit block groups one by one; for any bit sub-block in the Q3 bit sub-blocks, the first message is used to indicate the associated bit block set of each bit from the corresponding bit block group; Q3 is a positive integer greater than 1 and less than Q1; or, The second bit block consists of Q4 bits, each bit block in the Q1 bit blocks corresponds to one bit in the Q4 bits, and Q4 is a positive integer greater than 1; the first message is used to indicate the associated bit set of each bit in the first bit block, and the associated bit set of each bit in the first bit block includes at least one bit in the Q4 bits; the associated bit block set of a given bit in the first bit block includes all bit blocks in the Q1 bit blocks corresponding to any bit in the associated bit set of the given bit in the first bit block.

7. The second node device according to claim 6, characterized in that: The first bit block consists of Q2 bits, where Q2 is a positive integer less than Q1; the associated bit block set for each bit in the Q2 bits consists of one or more bit blocks in the Q1 bit blocks; any bit block in the Q1 bit blocks is associated to and only to one bit in the Q2 bits.

8. The second node device according to claim 6 or 7, characterized in that: include: The second transmitter sends a first signaling; The first signaling is used to indicate L1 association modes, the first message is used to indicate a first association mode from the L1 association modes, the first association mode is used to determine the bit block to which each bit in the first bit block is associated in the Q1 bit blocks; and L1 is a positive integer greater than 1.

9. The second node device according to any one of claims 6 to 8, characterized in that: The first message and the first bit block are sent on the same physical layer channel.

10. The second node device according to any one of claims 6 to 9, characterized in that: The first message and the first bit block are sent on two physical layer channels respectively.

11. A method in a first node for wireless communication, characterized in that: include: Receiving Q1 bit blocks, where Q1 is a positive integer greater than 1; Sending a first message and a first bit block; the first message is used to indicate a set of associated bit blocks for each bit in the first bit block, the set of associated bit blocks for each bit in the first bit block includes at least one bit block in the Q1 bit blocks, and each bit in the first bit block is used to indicate whether the corresponding set of associated bit blocks is correctly decoded; Among them, any bit block in the Q1 bit blocks belongs to and only belongs to one bit block group in the Q3 bit block groups; any bit in the first bit block belongs to and only belongs to one bit sub-block in the Q3 bit sub-blocks; the Q3 bit sub-blocks respectively indicate whether the bit blocks in the Q3 bit block groups are correctly decoded, and the Q3 bit sub-blocks correspond to the Q3 bit block groups one by one; for any bit sub-block in the Q3 bit sub-blocks, the first message is used to indicate the associated bit block set of each bit from the corresponding bit block group; Q3 is a positive integer greater than 1 and less than Q1; or, The second bit block consists of Q4 bits, each bit block in the Q1 bit blocks corresponds to one bit in the Q4 bits, and Q4 is a positive integer greater than 1; the first message is used to indicate the associated bit set of each bit in the first bit block, and the associated bit set of each bit in the first bit block includes at least one bit in the Q4 bits; the associated bit block set of a given bit in the first bit block includes all bit blocks in the Q1 bit blocks corresponding to any bit in the associated bit set of the given bit in the first bit block.

12. The method in the first node according to claim 11, characterized in that: The first bit block consists of Q2 bits, where Q2 is a positive integer less than Q1; the associated bit block set for each bit in the Q2 bits consists of one or more bit blocks in the Q1 bit blocks; any bit block in the Q1 bit blocks is associated to and only to one bit in the Q2 bits.

13. The method in the first node according to claim 11 or 12, characterized in that: include: receiving a first signaling; The first signaling is used to indicate L1 association modes, the first message is used to indicate a first association mode from the L1 association modes, the first association mode is used to determine the bit block to which each bit in the first bit block is associated in the Q1 bit blocks; and L1 is a positive integer greater than 1.

14. The method in the first node according to any one of claims 11 to 13, characterized in that: The first message and the first bit block are sent on the same physical layer channel.

15. The method in the first node according to any one of claims 11 to 14, characterized in that: The first message and the first bit block are sent on two physical layer channels respectively.

16. A method in a second node for wireless communication, characterized in that: include: Send Q1 bit blocks, where Q1 is a positive integer greater than 1; receiving a first message and a first bit block; wherein the first message is used to indicate a set of associated bit blocks for each bit in the first bit block, the set of associated bit blocks for each bit in the first bit block includes at least one bit block in the Q1 bit blocks, and each bit in the first bit block is used to indicate whether the corresponding set of associated bit blocks is correctly decoded; Among them, any bit block in the Q1 bit blocks belongs to and only belongs to one bit block group in the Q3 bit block groups; any bit in the first bit block belongs to and only belongs to one bit sub-block in the Q3 bit sub-blocks; the Q3 bit sub-blocks respectively indicate whether the bit blocks in the Q3 bit block groups are correctly decoded, and the Q3 bit sub-blocks correspond to the Q3 bit block groups one by one; for any bit sub-block in the Q3 bit sub-blocks, the first message is used to indicate the associated bit block set of each bit from the corresponding bit block group; Q3 is a positive integer greater than 1 and less than Q1; or, The second bit block consists of Q4 bits, each bit block in the Q1 bit blocks corresponds to one bit in the Q4 bits, and Q4 is a positive integer greater than 1; the first message is used to indicate the associated bit set of each bit in the first bit block, and the associated bit set of each bit in the first bit block includes at least one bit in the Q4 bits; the associated bit block set of a given bit in the first bit block includes all bit blocks in the Q1 bit blocks corresponding to any bit in the associated bit set of the given bit in the first bit block.

17. The method in the second node according to claim 16, characterized in that: The first bit block consists of Q2 bits, where Q2 is a positive integer less than Q1; the associated bit block set for each bit in the Q2 bits consists of one or more bit blocks in the Q1 bit blocks; any bit block in the Q1 bit blocks is associated to and only to one bit in the Q2 bits.

18. The method in the second node according to claim 16 or 17, characterized in that: include: Sending a first signaling; The first signaling is used to indicate L1 association modes, the first message is used to indicate a first association mode from the L1 association modes, the first association mode is used to determine the bit block to which each bit in the first bit block is associated in the Q1 bit blocks; and L1 is a positive integer greater than 1.

19. The method in the second node according to any one of claims 16 to 18, characterized in that: The first message and the first bit block are sent on the same physical layer channel.

20. The method in the second node according to any one of claims 16 to 19, characterized in that: The first message and the first bit block are sent on two physical layer channels respectively.

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