A single photon detector device and method

Abstract

The application discloses a single photon detector device and method, the device comprises: single photon detector, avalanche signal amplification module and pulse signal processing module, the cathode of single photon detector is connected with the input end of avalanche signal amplification module, the input end of pulse signal processing module is connected with the output end of avalanche signal amplification module, and the output end is connected with the anode of single photon detector; pulse signal processing module comprises: high-speed comparator, quenching module and latch module, the input end of high-speed comparator is connected with the output end of avalanche signal amplification module, the output end of high-speed comparator is connected with the input end of quenching module, the output end of quenching module is connected with the anode of single photon detector, and the input end of latch module is connected with the output end of high-speed comparator, and the output end is connected with the input end of high-speed comparator. Through the single photon detector device disclosed by the application, high counting rate can be realized.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of photoelectric detection, in particular to a single photon detector device and method. BACKGROUND

[0002] Single photon detector is a kind of photoelectric device that responds to photon signals, mainly including three types: Geiger mode single photon detector, photomultiplier tube and superconducting nanowire, etc., which is an indispensable detection device in the field of laser radar and quantum communication. In recent years, due to the rapid development of INGaAs / InP negative feedback avalanche diode (NFAD), the performance of free-running single photon detector has been greatly improved.

[0003] The greater the count rate of single photon detector, the greater the frequency range of the signal detected by single photon detector. When the count rate is not high, only low frequency optical signals can be detected. Among the main technical parameters affecting single photon detector, dead time refers to the time interval required for single photon detector to convert the detected single photon into an electrical signal, during which the next detection cannot be performed. The time interval between two detections is called dead time. Count rate refers to the frequency of photon pulses that can be detected, and count rate is inversely proportional to dead time. Therefore, dead time directly affects the count rate of single photon detector, and high count rate needs to be achieved by optimizing dead time. In the pulse signal processing module of single photon detector, one of the pulse signals that generates quenching signal is connected to the NFAD anode for bias control. The bias signal of NFAD anode will directly couple a large noise oscillation signal on the avalanche signal of cathode, which will be detected by single photon detector and cause false triggering.

[0004] In the prior art, the application publication number CN109238462A discloses a photon detection method and device, which detects photons by using asynchronous counting instead of synchronous query, and reads the count data in the count unit while adjusting the bias voltage of the detection unit to close the detection unit, which eliminates the limitation of clock frequency on photon count rate and realizes the improvement of dynamic range of photon detection, but does not solve the problem of false triggering caused by noise oscillation signal. SUMMARY

[0005] The technical problem to be solved by the present application is to solve the problems of limited count rate of the readout circuit of the existing single photon detector and false triggering of noise signal.

[0006] To solve the above technical problems, the present application provides the following technical solutions:

[0007] A single photon detector device, comprising: a single photon detector, an avalanche signal amplification module and a pulse signal processing module, the cathode of the single photon detector is in communication connection with the input end of the avalanche signal amplification module, the input end of the pulse signal processing module is in communication connection with the output end of the avalanche signal amplification module, and the output end is in communication connection with the anode of the single photon detector.

[0008] The pulse signal processing module comprises: a high-speed comparator, a quenching module and a latch module, the input end of the high-speed comparator is in communication connection with the output end of the avalanche signal amplification module, the output end of the high-speed comparator is in communication connection with the input end of the quenching module, the output end of the quenching module is in communication connection with the anode of the single photon detector, and the input end of the latch module is in communication connection with the output end of the high-speed comparator, and the output end is in communication connection with the input end of the high-speed comparator.

[0009] The high-speed comparator outputs a differential pulse signal, the differential pulse signal is divided into two paths, one path is transmitted to the quenching module and outputs a quenching signal, the anode of the single photon detector receives the quenching signal, controls the anode level of the single photon detector, makes the single photon detector self-quenching, makes the single photon detector quickly exit the Geiger mode, the other path of the differential pulse signal is transmitted to the latch module to output a dead time signal, and the dead time signal is transmitted to the high-speed comparator, the peak noise coupled by the cathode of the single photon detector is covered by the dead time signal, the high-speed comparator is latched, and the single photon detector is prevented from being triggered by the peak noise coupled by the cathode.

[0010] In an embodiment of the present application, the quenching module comprises: a first D flip-flop, a first level shifter, a field effect transistor and a first RC circuit, the first D flip-flop, the first level shifter and the field effect transistor are sequentially connected in communication, the input end of the first D flip-flop is in communication connection with the output end of the high-speed comparator, the drain of the field effect transistor is in communication connection with the anode of the single photon detector, one end of the first RC circuit is in communication connection with the output end of the first D flip-flop, and the other end is in communication connection with the reset end of the first D flip-flop.

[0011] In an embodiment of the present application, the latch module comprises a second D flip-flop, a second level shifter, a third level shifter and a second RC circuit, the second D flip-flop, the second level shifter and the third level shifter are sequentially connected in communication, the input end of the second D flip-flop is connected in communication with the input end of the first D flip-flop, the output end of the third level shifter is connected in communication with the high-speed comparator, one end of the second RC circuit is connected in communication with the output end of the second D flip-flop, and the other end is connected in communication with the reset end of the second D flip-flop.

[0012] In an embodiment of the present application, the first RC circuit comprises a first capacitor and a first resistor, one end of the first resistor is connected in communication with the output end of the first D flip-flop, and the other end is connected in communication with the reset end of the first D flip-flop, one end of the first capacitor is connected in communication with the other end of the first resistor, and the other end is grounded.

[0013] In an embodiment of the present application, the quenching module further comprises a first diode, the first diode is connected in parallel with the first resistor, or the anode of the first diode is connected in communication with the other end of the first resistor, and the cathode is connected in communication with the output end of the first level shifter.

[0014] In an embodiment of the present application, the avalanche signal amplification module comprises a power supply module, a coupling capacitor, a first amplification module and a second amplification module, the power supply module is connected in communication with the cathode of the single photon detector, one end of the coupling capacitor is connected in communication with the cathode of the single photon detector, and the other end is connected in communication with the input end of the first amplification module, the first amplification module and the second amplification module are sequentially connected in communication, and the output end of the second amplification module is connected in communication with the input end of the high-speed comparator.

[0015] In an embodiment of the present application, the first amplification module and the second amplification module both comprise an amplifier, an attenuator and a low-pass filter, the output end of the amplifier is sequentially connected in communication with the attenuator and the low-pass filter.

[0016] In an embodiment of the present application, the single photon detector device further comprises a refrigeration module, the refrigeration module comprises a thermistor and a refrigerator, and is connected in communication with the thermistor and the refrigerator pins integrated in the single photon detector, respectively, and the refrigeration module outputs refrigeration current to the single photon detector.

[0017] In an embodiment of the present application, the output end of the second D flip-flop is also connected in communication with the high-speed comparator.

[0018] The application also provides a method of a single photon detector device, the avalanche signal amplification module delivers the amplified avalanche signal to the high-speed comparator, the high-speed comparator outputs a differential pulse signal, the differential pulse signal is divided into two paths, one path is delivered to the quenching module and outputs a quenching signal, the anode of the single photon detector receives the quenching signal, controls the anode level of the single photon detector, and makes the single photon detector self-quenching, the other path of the differential pulse signal is delivered to the latch module to output a dead time signal, and the dead time signal is transmitted to the high-speed comparator to cover the peak noise coupled to the cathode of the single photon detector by the dead time signal to latch the high-speed comparator.

[0019] Compared with the prior art, the application has the following beneficial effects:

[0020] 1. In the pulse signal processing module, two diodes are connected in parallel with resistors in two RC circuits, the anodes of the two diodes are respectively connected in communication with the reset ends of two D flip-flops, and the cathodes are respectively connected in communication with the output ends of the two D flip-flops or the output ends of a level converter, so that the discharge time of the capacitor is shortened, the reset end of the D flip-flop can be quickly reset, the second differential pulse signal can maintain the same pulse width as the first differential pulse signal when the avalanche signal arrives immediately after the high-speed comparator outputs the first differential pulse signal, and timing disorder is avoided. The resistors in the two RC circuits are respectively connected in communication with the reset ends of the two D flip-flops, the quenching time and the dead time are adjusted, and then the maximum counting rate is adjusted.

[0021] 2. The first amplification module and the second amplification module are coupled to the cathode of the single photon detector through a coupling capacitor, the weak avalanche signal is amplified in two stages, and the output ends of the two amplifiers are sequentially connected in communication with an attenuator and a low-pass filter to reduce signal reflection and limit signal bandwidth. BRIEF DESCRIPTION OF DRAWINGS

[0022] Figure 1 It is a single photon detector device schematic diagram of an embodiment of the application.

[0023] Figure 2 It is another single photon detector device schematic diagram of an embodiment of the application.

[0024] Figure 3 It is a differential pulse signal comparison schematic diagram before and after the parallel diodes in the pulse signal processing module in an embodiment of the application. DETAILED DESCRIPTION

[0025] In order to facilitate those skilled in the art to understand the technical scheme of the application, the technical scheme of the application will be further described in conjunction with the drawings of the specification.

[0026] The terms "first", "second", "third", etc. are used only for descriptive purposes and should not be construed as implying or suggesting relative importance or an indicated number of technical features. Thus, features defined with "first", "second", etc. can explicitly or implicitly include one or more of the features. In the description of the present application, the meaning of "a plurality" is two or more, unless otherwise explicitly and specifically limited.

[0027] Embodiment one

[0028] Please refer to Figure 1 As shown in the figure, the present application provides a single photon detector device, comprising: a single photon detector 100, an avalanche signal amplification module 200 and a pulse signal processing module 300. The cathode of the single photon detector 100 is in communication connection with the input end of the avalanche signal amplification module 200, the input end of the pulse signal processing module 300 is in communication connection with the output end of the avalanche signal amplification module 200, and the output end is in communication connection with the anode of the single photon detector 100. Wherein, the pulse signal processing module 300 comprises: a high-speed comparator 310, a quenching module 320 and a latch module 330, the input end of the high-speed comparator 310 is in communication connection with the output end of the avalanche signal amplification module 200, the output end of the high-speed comparator 310 is in communication connection with the input end of the quenching module 310, the output end of the quenching module 310 is in communication connection with the anode of the single photon detector 100, and the input end of the latch module 330 is in communication connection with the output end of the high-speed comparator 310, and the output end is in communication connection with the output end of the high-speed comparator 310.

[0029] Please refer to Figure 1 As shown in the figure, in an embodiment of the present application, the single photon detector device further comprises a refrigeration module 400 and a third resistor 500, the refrigeration module 400 comprises a thermistor (not shown in the figure) and a refrigerator (not shown in the figure), and is in communication connection with the thermistor (not shown in the figure) and the refrigerator pin (not shown in the figure) integrated in the single photon detector 100, that is, the thermistor in the refrigeration module 400 is in communication connection with the thermistor integrated in the single photon detector 100, and the refrigerator is in communication connection with the refrigerator pin. The refrigeration module 400 outputs a refrigeration current to the single photon detector 100. The anode of the single photon detector 100 is in communication connection with one end of the third resistor 500, and the other end of the third resistor 500 is grounded. Specifically, the single photon detector 100 is an NFAD single photon detector, and a three-stage thermoelectric refrigerator is built-in, which can cool the temperature to-50℃. The single photon detector 100 further integrates a thin film resistor (not shown in the figure) and a parasitic capacitor (not shown in the figure), the thin film resistor is used to reduce the parasitic capacitor, and self-quenching can be realized in the Geiger mode. The quenching speed is slow by the thin film resistor, so the quenching signal is an active quenching signal.

[0030] Please refer toFigure 1 As shown, in an embodiment of the present application, the avalanche signal amplification module 200 comprises a power module 210, a coupling capacitor 220, a first amplification module 230 and a second amplification module 240. The power module 210 is in communication connection with the cathode of the single photon detector 100, and the maximum output voltage of the power module 210 reaches +90V. One end of the coupling capacitor 220 is in communication connection with the cathode of the single photon detector 100, and the other end of the coupling capacitor 220 is in communication connection with the input end of the first amplification module 230. The first amplification module 230 and the second amplification module 240 are sequentially in communication connection, and the output end of the second amplification module 240 is in communication connection with the input end of the high-speed comparator 310. The first amplification module 230 and the second amplification module 240 are coupled to the cathode of the single photon detector 100 through the coupling capacitor 220, and the weak avalanche signal is amplified by two stages. The first amplification module 230 and the second amplification module 240 are respectively provided with an amplifier 251, an attenuator 252 and a low-pass filter 253, and the output ends of the two amplifiers 251 are sequentially in communication connection with the attenuator 252 and the low-pass filter 253, for reducing signal reflection and limiting signal bandwidth. In this embodiment, the bandwidth is 50Mhz~3Ghz, the first amplification module 230 and the second amplification module 240 amplify the avalanche signal by 40dB, the attenuator 252 attenuates by 0~3dB, and the bandwidth of the low-pass filter 253 is 1Ghz.

[0031] Please refer to Figure 1As shown, in an embodiment of the present application, the quenching module 320 comprises a first D flip-flop 321, a first level converter 322, a field effect transistor 323 and a first RC circuit 324, and the first D flip-flop 321, the first level converter 322 and the field effect transistor 323 are sequentially connected in communication. The input end of the first D flip-flop 321 is connected in communication with the output end of the high-speed comparator 310, and the high-speed comparator 310 processes the amplified avalanche signal and outputs a differential pulse signal. The differential pulse signal output by the high-speed comparator 310 is divided into two paths, one of which is transmitted to the first D flip-flop 321 to generate a differential pulse through the first D flip-flop 321, and the differential pulse is transmitted to the first level converter 322, which converts the differential pulse into a level signal and transmits it to the field effect transistor 323. The anode of the field effect transistor 323 and the drain are connected in communication with the anode of the single photon detector 100, and the field effect transistor 323 generates a quenching signal after receiving the level signal, which is connected in communication with the anode of the single photon detector 100 to control the bias voltage. One end of the first RC circuit 324 is connected in communication with the output end of the first D flip-flop 321, and the other end is connected in communication with the reset end of the first D flip-flop 321 to generate a quenching signal. The quenching signal is connected to the gate of the field effect transistor 323, and the drain of the field effect transistor 323 is connected in communication with the anode of the single photon detector 100 to control the anode level of the single photon detector 100, thereby achieving an active quenching function. The first RC circuit 324 comprises a first capacitor 3241 and a first resistor 3242, one end of the first resistor 3242 is connected in communication with the output end of the first D flip-flop 321, and the other end is connected in communication with the reset end of the first D flip-flop 321. One end of the first capacitor 3241 is connected in communication with the other end of the first resistor 3242, and the other end is grounded. The quenching module 320 further comprises a first diode 325, which is connected in parallel with the first resistor 3242. Because the time constant t=RC of the first RC circuit 324 determines the charging and discharging time, by connecting the first diode 325 in parallel with the first resistor 3242 and setting the discharging time of the first capacitor 3241, a delay signal is output. The anode of the first diode 325 can also be connected in communication with the other end of the first resistor 3243, and the cathode is connected in communication with the output end of the first level converter 322. By connecting the first diode 325 in parallel with the first resistor 3242 directly, the same technical effect can be achieved.

[0032] Please refer to Figure 1As shown, in an embodiment of the present application, the latch module 330 comprises a second D flip-flop 331, a second level converter 332, a third level converter 333 and a second RC circuit 334, which are sequentially connected in communication. The input end of the second D flip-flop 331 is connected in communication with the input end 321 of the first D flip-flop, and the differential pulse signal output by the high-speed comparator 310 is transmitted to the second D flip-flop 331, and a differential pulse is generated by the second D flip-flop 331, which is transmitted to the second level converter 332, and the second level converter 332 converts the differential pulse into a level signal and transmits it to the third level converter 333. One end of the second RC circuit 334 is connected in communication with the output end of the second D flip-flop 331, and the other end is connected in communication with the reset end of the second D flip-flop 331, to generate a quenching signal. The quenching signal is also transmitted to the third level converter 333, and the third level converter 333 outputs a dead time signal, the output end of which is connected in communication with the high-speed comparator 310, to latch the high-speed comparator 310. The rising edge and falling edge of the quenching signal connected to the anode of the single photon detector 100 couple out a higher peak noise at the cathode of the single photon detector 100, and in order to avoid the false triggering of the high-speed comparator 310, the quenching signal pulse is covered by the dead time signal pulse. The second RC circuit 334 comprises a second capacitor 3341 and a second resistor 3342, one end of the second resistor 3342 is connected in communication with the output end of the second D flip-flop 331, and the other end of the second resistor 3342 is connected in communication with the reset end of the second D flip-flop 331. One end of the second capacitor 3341 is connected in communication with the other end of the second resistor 3342, and the other end of the second capacitor 3341 is grounded. The latch module 330 further comprises a second diode 335, which is connected in parallel with the second resistor 3342, so that by setting the discharge time of the second capacitor 3341, a delay signal is output. The anode of the second diode 335 can also be connected in communication with the other end of the second resistor 3342, and the cathode is connected in communication with the output end of the second level converter 332. By being directly connected in parallel with the second resistor 3342, the same technical effect can be achieved.

[0033] Embodiment Two

[0034] Please refer to Figure 2 As shown, the present application further provides another single photon detector device, which is different from the embodiment one in that the second level converter 332 and the third level converter 333 in the latch module 330 are removed, the output end of the second D flip-flop 331 is directly connected in communication with the high-speed comparator 310, and the dead time signal is transmitted to the high-speed comparator 310 to latch the high-speed comparator 310.

[0035] Please refer to Figure 1 and Figure 2As shown, in an embodiment of the present application, the first resistor 3242 and the second resistor 3342 are digitally controlled potentiometers, which adjust the quenching time and the dead time, and further adjust the maximum count rate. The first D flip-flop 321 and the second D flip-flop 331 are both D flip-flops with asynchronous reset function. In the pulse signal processing module 300, two diodes are connected in parallel with the resistors in the two RC circuits respectively, the anode of the diode is connected in communication with the reset end of the D flip-flop, and the cathode is connected in communication with the output end of the D flip-flop or the output end of the level converter, which shortens the discharge time of the capacitor, enables the reset end of the D flip-flop to reset rapidly, and enables the second differential pulse signal to maintain the same pulse width as the first differential pulse signal when the avalanche signal arrives immediately after the first differential pulse signal is output by the high-speed comparator 310, as shown in the following table. Figure 3 Without the diodes, in the pulse signal processing module 300, the reset signal of the D flip-flop is still in the discharge state, which will affect the pulse of the second differential pulse signal, and the pulse width of the second differential pulse signal will be shortened significantly, causing timing disorder.

[0036] Embodiment Three

[0037] According to the single-photon detector device provided in Embodiments One and Two, the present application further provides a method for a single-photon detector device, which comprises: the avalanche signal amplification module delivering the amplified avalanche signal to the high-speed comparator, the high-speed comparator outputting a differential pulse signal, the differential pulse signal being divided into two paths, one path being delivered to the quenching module and outputting a quenching signal, the anode of the single-photon detector receiving the quenching signal, controlling the anode level of the single-photon detector, and enabling the single-photon detector to quench autonomously, and the other path of the differential pulse signal being delivered to the latch module to output a dead time signal, and the dead time signal being transmitted to the high-speed comparator, the peak noise coupled by the cathode of the single-photon detector being covered by the dead time signal, and the high-speed comparator being latched.

[0038] It is apparent for those skilled in the art that the present application is not limited to the details of the foregoing exemplary embodiments, and the present application can be implemented in other concrete forms without departing from the spirit or essential characteristics of the present application. Therefore, the embodiments should be considered as exemplary and non-limiting, and the scope of the present application is defined by the appended claims rather than the foregoing description, and it is intended to encompass all changes falling within the meaning and scope of the equivalent elements of the claims, and any reference signs in the claims should not be considered as limiting the involved claims.

[0039] The above-described embodiments only represent the implementation of the application, the protection scope of the application is not limited to the above-described embodiments, and for those skilled in the art, several modifications and improvements can be made without departing from the concept of the application, and these all belong to the protection scope of the application.

Claims

1. A single photon detector device, characterized by The application relates to a single photon detector, an avalanche signal amplification module and a pulse signal processing module, wherein the cathode of the single photon detector is in communication connection with the input end of the avalanche signal amplification module, the input end of the pulse signal processing module is in communication connection with the output end of the avalanche signal amplification module, and the output end of the pulse signal processing module is in communication connection with the anode of the single photon detector. The pulse signal processing module comprises a high-speed comparator, a quenching module and a latch module, the input end of the high-speed comparator is in communication connection with the output end of the avalanche signal amplification module, the output end of the high-speed comparator is in communication connection with the input end of the quenching module, the output end of the quenching module is in communication connection with the anode of the single photon detector, and the input end of the latch module is in communication connection with the output end of the high-speed comparator, and the output end of the latch module is in communication connection with the input end of the high-speed comparator. The quenching module comprises a first D flip-flop, a first level converter, a field effect transistor, a first RC circuit and a first diode, the first D flip-flop, the first level converter and the field effect transistor are sequentially in communication connection, the input end of the first D flip-flop is in communication connection with the output end of the high-speed comparator, the drain of the field effect transistor is in communication connection with the anode of the single photon detector, one end of the first RC circuit is in communication connection with the output end of the first D flip-flop, and the other end is in communication connection with the reset end of the first D flip-flop. The first diode is in parallel connection with the resistor in the first RC circuit, the positive electrode of the first diode is connected with the reset end of the first D flip-flop, and the negative electrode of the first diode is connected with the output end of the first D flip-flop or the output end of the first level converter. The latch module comprises a second D flip-flop, a second level converter, a third level converter, a second RC circuit and a second diode, the second D flip-flop, the second level converter and the third level converter are sequentially in communication connection, the input end of the second D flip-flop is in communication connection with the input end of the first D flip-flop, the output end of the third level converter is in communication connection with the high-speed comparator, one end of the second RC circuit is in communication connection with the output end of the second D flip-flop, and the other end is in communication connection with the reset end of the second D flip-flop. The second diode is in parallel connection with the resistor in the second RC circuit, the positive electrode of the second diode is connected with the reset end of the second D flip-flop, and the negative electrode of the second diode is connected with the output end of the second D flip-flop. The first RC circuit comprises a first capacitor and a first resistor, one end of the first resistor is in communication connection with the output end of the first D flip-flop, the other end of the first resistor is in communication connection with the reset end of the first D flip-flop, one end of the first capacitor is in communication connection with the other end of the first resistor, and the other end of the first capacitor is grounded.

2. The single photon detector device of claim 1, wherein, The first diode is in parallel connection with the first resistor or the positive electrode of the first diode is in communication connection with the other end of the first resistor, and the negative electrode of the first diode is in communication connection with the output end of the first level converter.

3. The single photon detector device of claim 2, wherein, ​ 4. The single photon detector device of claim 1, wherein, The avalanche signal amplification module comprises a power module, a coupling capacitor, a first amplification module and a second amplification module, the power module is in communication connection with the cathode of the single photon detector, one end of the coupling capacitor is in communication connection with the cathode of the single photon detector, and the other end is in communication connection with the input end of the first amplification module, the first amplification module and the second amplification module are in communication connection in sequence, and the output end of the second amplification module is in communication connection with the input end of the high-speed comparator.

5. The single photon detector device of claim 4, wherein, The first amplification module and the second amplification module both comprise an amplifier, an attenuator and a low-pass filter, and the output end of the amplifier is in communication connection with the attenuator and the low-pass filter in sequence.

6. The single photon detector device of claim 1, wherein, The single photon detector device further comprises a refrigeration module, the refrigeration module comprises a thermistor and a refrigerator, and is in communication connection with the thermistor and the refrigerator pins integrated in the single photon detector, respectively, and the refrigeration module outputs a refrigeration current to the single photon detector.

7. The single photon detector device of claim 1, wherein, The output end of the second D flip-flop is also in communication connection with the high-speed comparator.

8. A method based on the single photon detector device according to claims 1-7, characterized by, The avalanche signal amplification module delivers the amplified avalanche signal to the high-speed comparator, the high-speed comparator outputs a differential pulse signal, divides the differential pulse signal into two paths, one path is delivered to the quenching module and outputs a quenching signal, the anode of the single photon detector receives the quenching signal, controls the anode level of the single photon detector, and makes the single photon detector self-quench, the other path of the differential pulse signal is delivered to the latch module to output a dead time signal, and the dead time signal is transmitted to the high-speed comparator, the peak noise coupled by the cathode of the single photon detector is covered by the dead time signal, and the high-speed comparator is latched.

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