Spectroscopic flux measurement method and dead time correction method

Abstract

The present application relates to a kind of energy spectrum diagram flux measurement method and dead time correction method, it solves the technical problems that when particle flux is too large, capacitor array in ASIC chip is saturated, resulting in obtaining inaccurate energy spectrum flux and the dead time of ASIC chip is too long in the process of measuring signal of existing silicon detector, it will the trigger signal of ASIC chip be separately led out and be counted in the way of timer, judge total signal quantity, can obtain complete energy spectrum in combination with the data in SCA.

Description

Technical Field

[0001] This invention relates to the field of radiation detection nuclear electronics, and more specifically, to a method for measuring energy spectrum flux and a dead time correction method. Background Technology

[0002] Silicon detectors have wide applications in fields such as nuclear radiation monitoring, high-energy particle detection, X-ray diffractometers, aerospace, and security inspection.

[0003] The circuit system of a silicon detector typically includes a power supply section, a detector section, a SKIROC2A chip, an FPGA, and an MCU. The power supply section includes the following components: (1) an isolation power supply, which isolates the satellite's 28V power circuit from the various power supplies of the payload and reduces the 28V power supply to 5V; (2) an LDO, which generates a 3.3V DC power supply from the 5V DC power supply to power the SKIROC2A and MCU. The 3.3V is then converted to 1.5V by a linear regulator TPS79915 to provide the core voltage for the FPGA, and to 2.5V by a linear regulator TPS79925 to provide the I / O voltage for the FPGA; (3) a high-voltage module, mainly composed of an NPN transistor 2N3904, a transformer, and a voltage doubler rectifier circuit, which can generate a 30V bias voltage with minimal power consumption. This ensures that the silicon PIN detector operates in a fully depleted state. The detector section is shown in the attached diagram of the manual. Figure 1 As shown, the bias voltage (HV) is generated by the high-voltage module of the power supply circuit board. The bias voltage (HV) is filtered through a 1 Mohm resistor and a 0.1 μF capacitor, and then connected to the detector cathode. The signal is generated by the detector anode, which is isolated by a 1 nF capacitor before being connected to the ASIC. The structure of the SKIROC2A chip, FPGA, and MCU is as follows: Figure 2 As shown, the SKIROC2A and FPGA are linked via an FPC (Flexible Printed Circuit), which includes an LVDS interface and several single-ended signals. The MCU and FPGA exchange data via an SPI data interface. Simultaneously, some signals from the SKIROC2A are directly connected to the MCU. The MCU is equipped with a CAN interface chip, NAND flash, Ethernet interface, and UART interface. The CAN and Ethernet interfaces are used for communication with the satellite host; the CAN interface transmits commands and telemetry signals, while the Ethernet interface is used for transmitting scientific data. The RS422 and USB interfaces are also used for communication with the satellite host; the RS422 interface transmits commands and telemetry signals, while the USB interface is used for transmitting scientific data.

[0004] The SKIROC2A is a 64-channel front-end ASIC designed for reading silicon PIN diodes. Each channel consists of a variable-gain, low-noise charge preamplifier, and each channel contains one fast-forming amplifier and two slow-forming amplifiers. The fast-forming amplifier generates the trigger signal, and the two slow-forming amplifiers, one with a gain of 1 and the other with a gain of 10, provide charge measurements from 0.2 fC to 10 pC. Timing is performed using a 12-bit TDC ramp. When the trigger signal is generated, the charge and time are stored in a 15-depth switched-capacitor array (SCA), whose values ​​are converted by a multi-channel 12-bit Wilkinson ADC and sent to an integrated 4KB memory. Analog values ​​of the charge are also available on an output pin. The trigger chain consists of a high-gain fast shaper and a discriminator, allowing each channel to automatically trigger to 0.2 fC. The thresholds for the 64 discriminators are set by a common 10-bit DAC and a separate 4-bit DAC for each channel. The output of each discriminator is sent to an 8-bit delay unit (the delay time is adjustable between 100ns and 300ns) to provide a hold signal for the SCA unit of the slow channel. A simplified block diagram of SKIROC is shown in the attached figure in the manual. Figure 3 As shown. The SKIROC2 requires four +3.3V power supplies. The 5V power supply is regulated by a 3.3V linear regulator, and each power supply is connected in parallel with capacitors of 470uF, 100uF, and 100nF. SKIROC has two types of control signals, named according to their speed: fast control and slow control. The signals are LVDS (Low Voltage Differential Signal) standard. Fast control signals such as SKIROC2 trigger and SCA reset or validity are sent directly to the SKIROC2 control center. Slow control signals are daisy-chained and configured in a 616-bit register on the chip. The register stores configuration settings such as the CSA feedback capacitor and trigger mode. SKIROC data is transmitted via LVDS to the FPGA's internal RAM for storage.

[0005] As shown in the attached diagram of the instruction manual. Figure 4As shown, the acquisition process is divided into three stages: acquisition, conversion, and readout. During acquisition, when the trigger is activated, the slow-forming signal and the TDC ramp signal are stored in the SCA. During conversion, the internal ADC converts the voltage signal stored in the SCA into a digital signal and stores it in an internal register. During readout, the shift register and DAQ system read the digital signal and transmit it to the host computer. The SKIROC2A operates in the normal acquisition process. Under normal acquisition conditions, the FPGA mainly controls the ASIC through three signals: StartAcquisition, StartConversion, and StartReadout. Simultaneously, the FPGA obtains the ASIC's operating status through two signals: Chip_Sat and End_Read_Out. Data is transmitted via the LVDS data link, and the format of each data frame is shown in the attached diagram in the manual. Figure 5 As shown. The chip acquisition process is divided into two cases: when the SCA is full of 15 events or not, this can be distinguished by the state of the Chip_Sat signal; a high level indicates full storage. When the SCA is full, all 15 events can be converted simultaneously. When the SCA is not full, acquisition can be stopped and conversion can begin at any time. Data acquisition can be stopped by pulling the Start_Acquisiton signal low. Pulling the Start_Acquisiton signal low can be done at any stage of acquisition, without requiring Chip_Sat to be high. Pulling the Start_ConversionB signal low controls the SKIROC2A to enter the data conversion state. After conversion, Chip_Sat will switch to low. At this point, pulling the Start_readout signal high will allow the SKIROC2A to enter the data transmission stage. After data transmission, End_readout will go high. Then, the next acquisition cycle can begin.

[0006] The SKIROC memory mapping format is shown in the attached diagram in the manual. Figure 6 As shown, each event is 16 bits long, starting with 00. The third bit is the gain flag, the fourth bit is the HIT flag, and the last 5 to 16 bits are the ADC value for charge or the ADC value for time TDC. Following the event record is the BCID, coarse time count (BCID). Finally, there is the chip ID, used for daisy-chaining in multi-chip systems.

[0007] The FPGA used is the Altera Cyclone EP1C6Q240C8N, and the MCU is the STMicroelectronics STM32F407VET6. Data transmission between the FPGA and ASIC is via LVDS. The ASIC is configured and controlled by the FPGA. After receiving data, the FPGA regroups the original data, repackages it, and sends it to the MCU via the SPI interface. The MCU timestamps the data and stores it in NAND flash memory using the FAT32 file system. The MCU communicates with the satellite host. Upon receiving a reset signal, the MCU powers the power board back on and resets the FPGA. The MCU analyzes the data and generates 8-bit rapidly varying telemetry signals and 64-bit slowly varying telemetry signals to display the payload's operating status. The MCU is equipped with two CAN interfaces for receiving commands and sending status information, and a 100M Ethernet interface for transmitting scientific data. In addition, for the convenience of ground testing, the MCU is also equipped with an RS422 interface and a USB interface for communication with the host computer during ground testing.

[0008] When an energy spectrometer measures signals such as particles, gamma rays, and neutrons, it obtains an energy spectrum. When the particle flux is too high, the capacitor array in the ASIC chip becomes saturated, resulting in inaccurate energy spectrum flux.

[0009] Switched capacitor array (SCA) ASIC chips are an important method for detector readout electronics systems. However, most common SCA ASIC chips operate using a sample-and-hold switching mode, which results in excessively long dead times, especially when the chip cannot synchronize with the accelerator's pulsed beam. Furthermore, due to the limited storage depth of these chips, once the internal data volume is saturated, the dead time becomes unreliable, making it impossible to determine the radiation dose.

[0010] A neutron spectrometer is a type of energy spectrometer. Summary of the Invention

[0011] This invention aims to solve the technical problems of inaccurate energy spectrum flux measurement and excessively long dead time of ASIC chips caused by the saturation of the capacitor array in the ASIC chip when the particle flux is too large during the measurement process of existing silicon detectors. The invention provides an energy spectrum flux measurement method and a dead time correction method.

[0012] This invention provides a method for measuring energy spectrum flux, comprising the following steps:

[0013] The first step is to connect the trigger signal TRIG OUT pin of the ASIC chip in the spectrometer to the etr pin of the timer TIM2 of the MCU.

[0014] The second step is to activate the silicon detector and obtain the energy spectrum within a certain time.

[0015] The third step is to obtain the number of falling edges k of the TRIG signal within a certain time period through the counting function of the MCU's TIM2 timer;

[0016] The fourth step is to establish the formula for the dead time of the ASIC chip:

[0017] =1.1674*N 2 *10 -10 (4-1)

[0018] In formula (4-1), N represents the number of events per second, and P is the percentage of dead time;

[0019] The inversion algorithm is used to compensate for the signal sticking caused by the close proximity of multiple trigger events in TRIG OUT. The number of sticking signals m is obtained by the inversion algorithm. The number of sticking signals is deduced by formula (4-1). The specific value of the number of events per second is substituted into formula (4-1) to calculate the specific value of the sticking signal ratio P. Then, the specific value of the number of sticking signals m is obtained by multiplying the total number of TRIG signals by the specific value of P.

[0020] Fifth step, sum the number of falling edges k and the number of sticky signals m: H = m + k;

[0021] Step 6: Calculate the ratio B of the summation result H to the number of data points S in the capacitor array of the SKIROC2A chip: B = H / S;

[0022] Step 7: The flux of the energy spectrum is A. Multiply A by B to calculate the actual energy flux F: F = A * B.

[0023] The present invention also provides a dead time correction method, comprising the following steps:

[0024] Connect the trigger signal TRIG OUT pin of the ASIC chip to the etr pin of the timer TIM2 of the MCU.

[0025] Formula for establishing the dead time of an ASIC chip:

[0026] =1.1674*N 2 *10 -10 (4-1)

[0027] In formula (4-1), N represents the number of events per second, and P is the percentage of dead time.

[0028] The beneficial effects of this invention are that by separately extracting the trigger signal of the ASIC chip and counting it using a timer, the total number of signals can be determined. Combined with the data inside the (SCA), a complete energy spectrum can be obtained. Simultaneously with obtaining the energy spectrum, radiative flux information is effectively acquired, and the influence of the dead time of the electronics section on radiative flux measurement is effectively reduced through a dead-time correction algorithm.

[0029] Further features and aspects of the present invention will be clearly described in the following detailed description with reference to the accompanying drawings. Attached Figure Description

[0030] Figure 1 This is a schematic diagram of the neutron spectrometer detector connection principle.

[0031] Figure 2 It is the overall architecture design of the neutron spectrometer.

[0032] Figure 3 This is a diagram of the internal structure of the SKIROC chip in the SKIROC2A chip.

[0033] Figure 4 This is a flowchart of the working process of the SKIROC2A chip.

[0034] Figure 5 It is the format of each data frame used in communication between the FPGA and the SKIROC2A.

[0035] Figure 6 It is the SKIROC memory mapping format.

[0036] Figure 7 This is a circuit block diagram showing the connection between the TRIG OUT pin of the ASIC chip and the timer in the MCU.

[0037] Figure 8 This is a waveform diagram of a single TRIG signal.

[0038] Figure 9 These are multiple sticky signals triggered by noise.

[0039] Figure 10 It is a linear fit of the frequency distribution of event intervals.

[0040] Figure 11 It represents the proportion of adhesion signals to the actual number of events.

[0041] Figure 12 The energy spectrum of this invention is verified through experiments. Detailed Implementation

[0042] The present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0043] The SKIROC2A chip was initially designed as a front-end chip for the readout of silicon PIN diodes in the Electromagnetic Calorimeter (ECAL) of the European Future International Linear Collider. The default acquisition time in the design was 1 ms per cycle, with each cycle being 200 ms, corresponding to a dead time of 99.5%. Each acquisition could simultaneously acquire 15 sets of data from the channels used. For neutron spectrometer applications, the payload is located in the SAA region of the Earth's radiation belts, where the detector experiences approximately 256.6 particle events per second. A design working state with an acquisition time of 64 ms per cycle, also with each cycle being 200 ms, corresponds to a dead time of 68%. However, considering the possibility of solar neutron events, the chip may saturate during actual applications. This means that the internal charge storage array may be fully loaded with data, leaving some events within the acquisition cycle unrecorded. In such cases, it is impossible to deduce the actual number of events, thus preventing flux calculations.

[0044] Under normal circumstances, the TRIG OUT trigger signal of the SKIROC2A chip is connected to the FPGA for external triggering of the chip and for testing trigger efficiency.

[0045] We can obtain the energy spectrum from the data in the switched capacitor array (SCA) of the SKIROC2A chip. However, when the SCA is saturated, the total flux in the energy spectrum cannot be inferred from the dead time. In this case, by obtaining the total number of signals through the falling edge, we can obtain the total number of events. This allows us to determine the ratio between the total number of events and the number of events in the SCA. Using this ratio to correct the energy spectrum, we can obtain the true energy spectrum.

[0046] The specific process for measuring energy spectral flux is as follows:

[0047] The first step is to connect the trigger signal TRIG OUT pin of the SKIROC2A chip in the energy dispersive spectrometer to the etr pin of the timer TIM2 in the MCU, as follows: Figure 7 As shown. The MCU model is STM32F407VET6.

[0048] The second step is to activate the silicon detector to measure signals such as particles and gamma rays, and obtain an energy spectrum within a certain time, such as 60ms.

[0049] The third step is to use the counting function of the TIM2 timer of the STM32F407VET6 to obtain the number of falling edges k of the TRIG signal within a certain time, such as 60ms.

[0050] Step four, the waveform of the TRIG signal is as follows: Figure 8 As shown, analysis of the TRIG signal reveals that:

[0051] (1) When TRIG is not triggered, it remains at a high level of 2.5V. When a trigger occurs, the signal will be pulled low and will return to a high level after a certain period of time. The length of the tail during recovery is related to the pull-up resistor of the signal. When the pull-up resistor is 1K ohm, the tail is about 100ns-150ns. (2) The width of the TRIG signal is related to the signal size of the silicon detector. Generally, the width of the TRIG generated by the α source is about 50ns-100ns. (3) The near-Earth orbit neutron energy obtained by simulation using the Geant4 Monte Carlo toolkit is concentrated below 20MEV. The width of the trig signal generated by the neutron signal in this energy range is about 50ns-220ns. (4) If the TRIG signal trigger interval is less than 300ns, the two signals will stick together. At this time, the MCU timer cannot distinguish between the two events. The trigger interval refers to the interval between the two signals output by the detector. Since the TRIG signal has a certain width, the signals overlap and stick together.

[0052] Multiple sticky signals triggered by noise, such as Figure 9 show.

[0053] To eliminate the impact of sticky signals on the number of events, simulation was performed. Uniformly randomly distributed particle signals within the time domain [a, b] were generated using Matlab. The signals were sorted in ascending order according to time T. The time interval ΔT between two adjacent signals was calculated. If ΔT is less than 300 ns (the width of the TRIG signal is approximately 300 ns during normal chip operation), the two adjacent signals are considered sticky signals, and only a falling edge is generated. The simulation range shown is ba = 1 s, and the signal frequency range is 100-20000. The frequency distribution of event intervals can be obtained, such as... Figure 10 As shown, the front end of the curve can be approximated as a linear distribution. A linear fit is then performed on this portion, as follows: Figure 11 As shown, a fitted linear relationship can be obtained for the frequency distribution of event intervals when the intervals are small. Intervals less than 300 ns are considered as adhesion.

[0054] The formula for dead time (4-1) can be obtained:

[0055] =1.1674*N 2 *10 -10 (4-1)

[0056] In formula (4-1), N represents the number of events per second, and P is the percentage of dead time.

[0057] The inversion algorithm compensates for signal sticking caused by multiple triggering events in TRIG OUT being too close in time.

[0058] The number of sticky signals m is obtained through the inversion algorithm. Specifically, the number of sticky signals is deduced by formula (4-1). The specific value of the number of events per second is substituted into formula (4-1) to calculate the specific value of the sticky signal ratio P. Then, the specific value of the number of sticky signals m is obtained by multiplying the total number of TRIG signals by the specific value of P.

[0059] Fifth step, sum the number of falling edges k and the number of sticky signals m: H = m + k.

[0060] Step 6: Calculate the ratio B of the summation result H to the number of data points S in the capacitor array of the SKIROC2A chip: B = H / S.

[0061] Step 7: The flux of the energy spectrum is A. Multiply A by B to calculate the actual energy flux F: F = A * B.

[0062] Experiments were conducted to demonstrate the innovation. The experimental data was obtained using a 2.5 MeV neutron incident neutron spectrometer, channel 7. During the experiment, the total count in the SCA of this channel was 131,644, the timer count was 340,000, and the test duration was 10 minutes. Substituting into formula (4-1), the proportion of adhesion signal was 3.7 * 10⁻⁶. -5 The adhesion signal is approximately 12, which can be basically ignored. Therefore, the ratio of the actual number of events to the number of events in the SCA is 340000 / 131644 = 2.58. Based on the data in the SCA, a comparison chart of the data before and after correction is drawn as follows. Figure 12 show.

[0063] The above description is merely a preferred embodiment of the present invention and is not intended to limit the invention. Various modifications and variations can be made to the present invention by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the scope of the claims of the present invention should be within the protection scope of the present invention.

Claims

1. A method for measuring flux through energy spectrum, characterized in that, Includes the following steps: The first step is to connect the trigger signal TRIG OUT pin of the ASIC chip in the spectrometer to the etr pin of the timer TIM2 of the MCU. The second step is to activate the silicon detector and obtain the energy spectrum within a certain time. The third step is to obtain the number of falling edges k of the TRIG signal within a certain time period through the counting function of the MCU's TIM2 timer; The fourth step is to establish the formula for the dead time of the ASIC chip: P=1.1674*N 2 *10 -10 (4-1) In formula (4-1), N represents the number of events per second, and P is the percentage of dead time; The inversion algorithm compensates for signal sticking caused by multiple trigger events in TRIG OUT being too close together. The number of sticky signals m is obtained by the inversion algorithm. The number of sticky signals is deduced by formula (4-1). The specific value of the number of events per second is substituted into formula (4-1) to calculate the specific value of the dead time percentage P. Then, the specific value of the number of sticky signals m is obtained by multiplying the number of falling edges k by the specific value of P. Fifth step, sum the number of falling edges k and the number of sticky signals m: H = m + k; Step 6: Calculate the ratio B of the summation result H to the number of data points S in the capacitor array of the SKIROC2A chip: B = H / S; Step 7: The flux of the energy spectrum is A. Multiply A by B to calculate the actual energy flux F: F = A * B.

2. A dead time correction method, characterized in that, Includes the following steps: (1) Connect the trigger signal TRIG OUT pin of the ASIC chip to the etr pin of the timer TIM2 of the MCU; (2) Formula for establishing the dead time of ASIC chips: P=1.1674*N 2 *10 -10 (4-1) In formula (4-1), N represents the number of events per second, and P is the percentage of dead time.

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