A test method and system

Abstract

The application discloses a test method and system, relates to the storage field, and can timely find whether data reading or writing is wrong, and avoids causing loss to enterprises. The writing test method comprises the following steps: a host device generates a first writing instruction; the first writing instruction comprises a first address and to-be-detected data; the to-be-detected data comprises the first address, a first mapping address and to-be-written data; the first mapping address is an address corresponding to the first address in a storage device; and the host device sends the first writing instruction to the storage device. The storage device receives the first writing instruction sent by the host device, and obtains a second writing instruction through analysis; the second writing instruction is a writing instruction obtained by the storage device through analysis when the first writing instruction is transmitted to the storage device; the second writing instruction comprises a second address and to-be-detected data; and when the second writing instruction satisfies a first preset condition, the storage device writes the to-be-written data into a storage space indicated by the first mapping address.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of storage, and in particular to a test method and system. BACKGROUND

[0002] Data assets are one of the core assets of enterprises today, and the production, operation and strategic planning of enterprises cannot be separated from the support of data. The reliability and security of storage devices carrying data are the most important features to protect data assets from loss, and data Input / Output (I / O) correctness directly affects the reliability and security of storage devices. In existing applications, the interaction between storage devices and host devices is multi-threaded and multi-IO stream concurrent. When the host device is running for a long time under high pressure, there may be a problem of reading or writing data into the wrong storage space by the host device, which will cause great loss to the enterprise. Therefore, how to provide an effective test method has become a problem to be solved at present. SUMMARY

[0003] The present application provides a test method and system, which can test whether data reading or writing is incorrect, and avoid causing loss to the enterprise.

[0004] To achieve the above technical purpose, the present application adopts the following technical scheme:

[0005] In a first aspect, the embodiments of the present application provide a test method, which comprises: a host device sends a first write instruction to a storage device; the first write instruction comprises a first address and to-be-detected data; the first address is the address of the storage space of the to-be-written data in the first write instruction in the host device; the to-be-detected data comprises the first address, a first mapping address and the to-be-written data; the first mapping address is the address corresponding to the first address in the storage device; the storage device receives the first write instruction sent by the host device and analyzes the first write instruction to obtain a second write instruction; the second write instruction comprises a second address and to-be-detected data; when the second write instruction satisfies a first preset condition, the storage device writes the to-be-written data into the storage space indicated by the first mapping address; wherein the first preset condition comprises that the second address is consistent with the first address, and the second mapping address is consistent with the first mapping address; the second mapping address is the address corresponding to the second address in the storage device.

[0006] It can be understood that due to storage device address resolution errors or other reasons (such as transmission errors), the address of the storage space to be written in the first write instruction generated by the host device may be inconsistent with the address of the storage space to be written in the second write instruction received and resolved by the storage device. In the method proposed in the application, the host device writes the address of the storage space to be written in the write instruction into the data to be written as the detection data, and the storage device parses the detection data in the received write instruction to determine whether the address of the storage space to be written in the received write instruction is incorrect, thereby solving the problem of writing data to incorrect storage space by the host device in the prior art and avoiding losses to the enterprise.

[0007] In a possible implementation, the first address, the second address, the first mapping address and the second mapping address are represented by logical block addresses; or, the first address, the second address, the first mapping address and the second mapping address are represented by logical volumes and logical block addresses in the logical volumes.

[0008] It can be understood that in the above two examples, the different setting modes of the addresses of the storage space by the host device and the storage device are pre-configured by the administrator in the host device and the storage device. The embodiments of the application do not limit how to set the addresses.

[0009] In another possible implementation, the detection data further includes at least one of flag information, a write operation number and a first check code of the detection data; the flag information is used to represent whether the detection data is valid data; and the write operation number is used to represent a cumulative write number of the storage space indicated by the first address.

[0010] It can be understood that the flag information, the write operation number and the first check code of the detection data are further set in the detection data, and the accuracy and reliability of the detection data can be verified in a timely manner, thereby improving the correctness of data writing.

[0011] In another possible implementation, when the detection data further includes the flag information, the first preset condition further includes that the detection data represented by the flag information is valid data; or, when the detection data further includes the write operation number, the first preset condition further includes that the write operation number satisfies a second preset condition; or, when the detection data further includes the first check code of the detection data, the first preset condition further includes that a second check code is consistent with the first check code; the second check code is a check code calculated by the storage device based on the detection data.

[0012] It can be understood that when the first preset condition comprises the plurality of conditions, the second write instruction needs to satisfy all the conditions comprised in the first preset condition, so as to be determined as satisfying the first preset condition. The method can effectively determine the correctness of the to-be-written data, the transmission process and the address, and improve the accuracy of data writing.

[0013] In another possible implementation, the method further includes: when the second write instruction does not satisfy the first preset condition, the storage device feeds back prompt information to the host device; wherein the prompt information is used to prompt the writing failure.

[0014] It can be understood that the storage device feeding back the prompt information to the host device can enable the host device and the management personnel to timely perceive the writing state, find problems and timely take relevant measures, and reduce the loss caused by the data writing failure.

[0015] In another possible implementation, the prompt information is further used to prompt the reason for the writing failure, which is a reason corresponding to the second write instruction not satisfying the first preset condition.

[0016] It can be understood that the prompt information prompting the reason for the writing failure can enable the host device or the management personnel to quickly obtain the specific reason for the writing failure, take corresponding solving measures, and improve the problem solving efficiency.

[0017] In another possible implementation, the method further includes: the storage device saving the first address and the first mapping address.

[0018] It can be understood that the storage device saving the first address and the first mapping address facilitates subsequent reading test, comparison with the reading address of a reading instruction of the reading test, and improvement of test efficiency.

[0019] In a second aspect, an embodiment of the present application provides a data reading method. A storage device saves a first address and a first mapping address. The first address is an address of a storage space of written data in the storage device in a host device. The first mapping address is an address corresponding to the first address in the storage device. The method includes: the host device sending a first reading instruction to the storage device; the first reading instruction comprising the first address; the storage device receiving the first reading instruction sent by the host device and analyzing the first reading instruction to obtain a second reading instruction; the second reading instruction comprising a second address; when the second reading instruction satisfies a third preset condition, reading the written data in the storage space indicated by the first mapping address and returning the written data to the host device; wherein the third preset condition comprises the second address being consistent with the first address, and the second mapping address being consistent with the first mapping address; and the second mapping address is an address corresponding to the second address in the storage device.

[0020] It can be understood that the storage device saves the write address in the write test after the write test is completed. When the read test is performed on the address in the write test, due to address resolution errors of the storage device or other reasons (such as transmission errors), the address of the storage space to be read in the first read instruction generated by the host device and the address of the storage space to be read in the second write read instruction received and resolved by the storage device can be inconsistent. After the storage device receives the read instruction, the storage device compares the address to be read by the read instruction with the address saved in the write test to determine whether the address of the storage space to be read by the received read instruction is incorrect, thereby solving the problem that the host device reads data from incorrect storage space in the prior application, and avoiding losses to the enterprise.

[0021] In a possible implementation, the first address, the second address, the first mapping address, and the second mapping address are represented by logical block addresses; or the first address, the second address, the first mapping address, and the second mapping address are represented by logical volumes and logical block addresses in the logical volumes.

[0022] It can be understood that in the two examples described above, different settings of the addresses of the storage space by the host device and the storage device are configured by the administrator in the host device and the storage device in advance. The embodiments of the present application do not limit how to set the addresses.

[0023] In another possible implementation, the host device stores reference data of the written data in the storage space indicated by the first mapping address, and the method further includes: after the host device receives the written data, comparing the reference data of the written data with the written data to obtain a comparison result; if the comparison result is consistent, the host device outputs a read-write test result as consistent; and if the comparison result is inconsistent, the host device outputs the read-write test result as inconsistent.

[0024] It can be understood that the reference data is data of the written data before the written data is written. After the data is read from the address in the write test, the read data is compared with the data before the written data is written to obtain a comparison result, which can ensure that the write and read are correct, and further test whether the write and read results are consistent, thereby improving the accuracy of the test.

[0025] In another possible implementation, the method further includes: when the second read instruction does not satisfy the third preset condition, the storage device feeds back prompt information to the host device; and the prompt information is used to prompt a read failure.

[0026] It can be understood that the storage device feeds back the prompt information to the host device, so that the host device and the administrator can timely perceive the write state, find problems and timely take relevant measures, and reduce losses caused by a read failure.

[0027] In another possible implementation, the prompt information is further used to prompt a reason for the read failure, the reason being a reason corresponding to the second read instruction not satisfying the first preset condition.

[0028] It can be understood that the prompt information prompts the reason for the write failure, which enables the host device or the management personnel to quickly obtain the specific reason for the read failure, take corresponding solutions, and improve the efficiency of solving problems.

[0029] In a third aspect, an embodiment of the present application provides a test system, including a host device, a switch and a storage device, the host device being connected with the storage device through the switch, the test system being applied to each module of the test method of the first aspect or any possible implementation manner of the first aspect; or the test system being applied to each module of the test method of the second aspect or any possible implementation manner of the second aspect.

[0030] In a fourth aspect, an embodiment of the present application provides a test device, for example, a host device or a storage device, wherein the test device is applied to each module of the test method of the first aspect or any possible implementation manner of the first aspect; or the test device is applied to each module of the test method of the second aspect or any possible implementation manner of the second aspect.

[0031] In a fifth aspect, an embodiment of the present application provides a test device, including a memory and a processor. The memory and the processor are coupled; the memory is used to store computer program code, the computer program code including computer instructions. When the processor executes the computer instructions, the test device executes the test method of the first aspect and any possible implementation manner thereof; or when the processor executes the computer instructions, the test device executes the test method of the second aspect and any possible implementation manner thereof.

[0032] In a sixth aspect, the present application provides a computer readable storage medium, including computer instructions. When the computer instructions run on a test device, the test device executes the test method of the first aspect and any possible implementation manner thereof; or when the computer instructions run on the test device, the test device executes the test method of the second aspect and any possible implementation manner thereof.

[0033] In a seventh aspect, the present application provides a computer program product, including computer instructions. When the computer instructions run on a test device, the test device executes the test method of the first aspect and any possible implementation manner thereof; or when the computer instructions run on the test device, the test device executes the test method of the second aspect and any possible implementation manner thereof.

[0034] The detailed description of the third aspect to the seventh aspect and various implementation manners thereof in the present application can refer to the detailed description in the first aspect or the second aspect and various implementation manners thereof; and the beneficial effects of the third aspect to the seventh aspect and various implementation manners thereof can refer to the beneficial effect analysis in the first aspect or the second aspect and various implementation manners thereof, which will not be repeated here.

[0035] These aspects or other aspects of the present application will be more apparent in the following description. BRIEF DESCRIPTION OF DRAWINGS

[0036] Figure 1 An implementation environment schematic diagram involved in a test method provided for an embodiment of the present application;

[0037] Figure 2 A test method flowchart provided for an embodiment of the present application;

[0038] Figure 3 An address setting manner schematic diagram of a storage space provided for an embodiment of the present application;

[0039] Figure 4 Another address setting manner schematic diagram of a storage space provided for an embodiment of the present application;

[0040] Figure 5 A to-be-detected data schematic diagram provided for an embodiment of the present application;

[0041] Figure 6 Another test method flowchart provided for an embodiment of the present application;

[0042] Figure 7 A structure schematic diagram of a test device provided for an embodiment of the present application;

[0043] Figure 8 Another structure schematic diagram of a test device provided for an embodiment of the present application;

[0044] Figure 9 Another structure schematic diagram of a test device provided for an embodiment of the present application. DETAILED DESCRIPTION

[0045] Hereinafter, the terms “first”, “second”, and “third” are used only for the purpose of description, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined with “first”, “second”, or “third” can explicitly or implicitly include one or more of the features.

[0046] As described in the background, the storage device and the host device interact in a multi-thread, multi-IO stream concurrent manner, and when the host device is under high pressure for a long time, the problem of reading or writing data into the wrong storage space is prone to occur, which will cause huge losses to the enterprise.

[0047] In the related art, there can be problems including:

[0048] When the host device writes data into the storage space indicated by the logical volume 100 mapped by the logical volume 0, due to logical volume resolution error or other reasons on the storage device side, the data is written into the storage space indicated by the logical volume 101 of the storage device. When the host device reads data from the storage space indicated by the logical volume 100 mapped by the logical volume 0, if the storage device reads data from the storage space indicated by the logical volume 101 of the storage device, the data written and read by the host device is consistent. However, the data should be saved in the storage space indicated by the logical volume 100 mapped by the logical volume 0, but actually it is not saved in the storage space indicated by the logical volume 100, at the same time, the host device should read data from the storage space indicated by the logical volume 100 mapped by the logical volume 0, but actually it does not read data from the storage space indicated by the logical volume 100, that is, there is a logical volume read or write error.

[0049] When the host device writes data into the storage space indicated by the logical block 0 of the logical volume 100 mapped by the logical volume 0, due to logical volume resolution error or other reasons on the storage side, the data is written into the storage space indicated by the logical block address 1 of the logical volume 100 of the storage device. When the host reads data from the storage space indicated by the logical block address 0 of the logical volume 100 mapped by the logical volume 0, if the storage device reads data from the storage space indicated by the logical block address 1 of the logical volume 100 of the storage device, the data written and read by the host is consistent. However, the data should be saved in the storage space indicated by the logical block address 0 of the logical volume 100 mapped by the logical volume 0, but actually it is not saved in the storage space indicated by the logical block address 0 of the logical volume 100, at the same time, the host device should read data from the storage space indicated by the logical block address 0 of the logical volume 100 mapped by the logical volume 0, but actually it does not read data from the storage space indicated by the logical block address 0 of the logical volume 100, although there is no logical volume error, but data is read or written into the wrong logical block address.

[0050] In the above two cases, although the data written and read by the host device is consistent, but the read or write error occurs, and the traditional technology cannot test this problem.

[0051] Based on this, the embodiment of the present application provides a test method, in which the host device generates a first write instruction, the first write instruction comprising a first address and to-be-detected data, wherein the to-be-detected data is filled with address information of a storage space of the host device and address information of a storage space of the storage device; the storage device receives and parses the first write instruction to obtain a second write instruction, the second write instruction comprising a second address and the to-be-detected data, and the mapping address of the second address based on an address mapping relationship is a second mapping address. The storage device compares the second address with the first address contained in the to-be-detected data, and compares the second mapping address with the first mapping address, to determine whether the second write instruction is consistent with the first write instruction. If yes, it is indicated that the second write instruction has no error, and the to-be-written data is written into the second address at this time. Meanwhile, the storage device saves the first address and the first mapping address information. After completing the write test, a read test is continued.

[0052] The host device generates a first read instruction, the instruction comprising a first address, the storage device receives and parses the first read instruction to obtain a second read instruction, the second read instruction comprising a second address, the mapping address of the second address based on an address mapping relationship is a second mapping address, and the storage device compares the second address with the first address and compares the second mapping address with the first mapping address, to determine whether the second read instruction is consistent with the first read instruction.

[0053] It can be understood that, due to address parsing errors of the storage device or other reasons, the address of the storage space to be read or written in the read or write instruction generated by the host device may be inconsistent with the address of the storage space to be read or written in the read or write instruction received by the storage device. In the embodiment of the present application, the host device and the storage device further perform data consistency test under the condition that the address of the storage space to be written or read in the write instruction and the read instruction is correct, so as to solve the problem of reading or writing data to the wrong storage space by the host device and avoid losses to enterprises.

[0054] The implementation manner of the embodiment of the present application will be described in detail below with reference to the drawings.

[0055] Please refer to Figure 1 which shows an implementation environment schematic diagram related to the test method provided by the embodiment of the present application. As shown in Figure 1 , the implementation environment can comprise a host device 100, a storage device 110 and a switch 120.

[0056] The host device 100 is a device for reading or writing data, and the storage device 110 is a device for storing data.

[0057] The switch 120 is configured to provide a network interconnection function for the host device and the storage device connected to the switch 120.

[0058] The host device 100 can be a single computing device, such as a server, a tablet, a desktop, a laptop, a notebook, and a netbook, or a host cluster composed of multiple computing devices, or a distributed server, a centralized server, a Windows host, a Linux host, a virtual machine, and the like.

[0059] The storage device 110 can be a single storage device, such as a hard disk, a memory, a redundant array of independent disks (RAID), or a storage cluster composed of multiple storage devices, or a memory server, a distributed storage device, a centralized storage device, and the like.

[0060] The number of the host device 100 and the storage device 110 is not limited in the embodiments of the present application.

[0061] In one example, the host device 100 includes a protocol assembling module 101 and a host bus adapter (HBA) 102. The protocol assembling module 101 is configured to specify a transmission protocol for a read or write data instruction, such as a small computer system interface (SCSI) protocol or an internet small computer system interface (iSCSI). The HBA 102 is a circuit board or an integrated circuit adapter that provides input / output processing and physical connection between the host device 100 and the storage device 110.

[0062] The storage device 110 includes an interface card 111 and a protocol parsing module 112. The interface card 111 is configured to receive the read or write data instruction sent by the host device 100. The protocol parsing module 112 is configured to parse the transmission protocol of the read or write data instruction.

[0063] In the embodiments of the present application, the host device 100 generates a read or write instruction based on a logical volume, assembles the read or write data instruction through the protocol assembling module 101, and sends the read or write data instruction to the switch 120 through the HBA 102. The switch 120 forwards the read or write instruction to the storage device 110. After receiving the read or write instruction, the interface card 111 of the storage device 110 parses the read or write instruction through the protocol parsing module 112, and reads or writes data from or to the storage space indicated by the logical volume corresponding to the storage device.

[0064] In an implementation, the data read or write test software 103 can be installed in the host device 100, and the data read or write test software can generate the to-be-tested data. Generally, the to-be-tested data is 512 bytes, and the to-be-tested data includes the address of the storage space of the to-be-read or to-be-written data. Optionally, the to-be-tested data further includes at least one of the flag information, the number of write operations, and the check code of the to-be-tested data.

[0065] In an implementation, the storage device 110 includes a read or write instruction analysis module 113, which is configured to analyze the address and the to-be-tested data included in the read or write instruction sent by the host device 100. Meanwhile, the analysis module analyzes the address of the storage space of the to-be-read or to-be-written data in the to-be-tested data, and optionally, the flag information, the number of write operations, and / or the check code of the to-be-tested data.

[0066] The test method provided by the embodiments of the present application is described below.

[0067] Please refer to Figure 2 , which is a flowchart of a test method provided by the embodiments of the present application. As shown in Figure 2 , the method can include S101-S110.

[0068] S101: The host device receives a write test instruction.

[0069] The write test instruction is used to request the host device to initiate a write test.

[0070] S102: The host device generates a first write instruction.

[0071] The first write instruction includes a first address and to-be-tested data.

[0072] The first address is the address of the storage space of the to-be-written data in the first write instruction in the host device. The first address is used for addressing.

[0073] The to-be-tested data includes the first address, a first mapping address, and to-be-written data. The first mapping address is the address corresponding to the first address in the storage device.

[0074] The first address and the first mapping address are represented by logical block addresses, or the first address and the first mapping address are represented by logical volumes and logical block addresses in the logical volumes.

[0075] In an example, as shown in Figure 3 , a schematic diagram of an address setting mode of a storage space is shown. Figure 3 Figure 3 ​In this architecture, host devices and storage devices do not distinguish between logical unit numbers (LUNs). Instead, logical block addresses (LBAs) are numbered, with a one-to-one correspondence between logical blocks in the host device and the storage device. For example, host device LBA0 corresponds to storage device LBA0, host device LBA1 corresponds to storage device LBA1, and so on, with host device LBAAm corresponding to storage device LBAAm.

[0076] In another example, such as Figure 4 As shown, the host device and storage device number logical volumes and logical blocks respectively. The storage device maintains a mapping relationship between logical volumes (LUNs) in the storage device and logical volumes (LUNs) in the host device. Each logical volume in the host device corresponds to a logical volume in the storage device. Each logical block in a logical volume in the host device corresponds one-to-one with each logical block in a logical volume in the storage device. For example, LBA0 in LUN0 of the host device corresponds to LBA0 in LUN100 of the storage device, and LBAn in LUN1 of the host device corresponds to LBAn in LUN101 of the storage device.

[0077] In the two examples above, the different address settings for the storage space on the host device and the storage device are pre-configured by the administrator on the host device and the storage device. This application does not limit how the second address is set.

[0078] Optionally, the data to be detected may also include at least one of the following: flag information, number of write operations, and first checksum of the data to be detected.

[0079] Flag information: Used to indicate whether the data to be detected is valid data.

[0080] Generally, flag information is pre-set information with a specific meaning, for example, using 0xAA55 to indicate valid data.

[0081] Write operation count: Used to characterize the cumulative number of writes to the memory space indicated by the first address.

[0082] The aforementioned cumulative write count refers to the cumulative number of write operations within a preset time period, which can be a period of time calculated from the moment the host device receives the write test command. This application embodiment does not limit the preset time period.

[0083] The first checksum of the data to be tested: for example, the cyclic redundancy check (CRC) checksum, which is used to verify whether the data to be tested has changed during transmission.

[0084] In one example, as shown in Figure 5 Figure 5 The schematic diagram of the to-be-detected data is shown. The to-be-detected data includes flag information, a first address, a first mapping address, a write operation number, to-be-written data, and a first check code of the to-be-detected data. For example, the to-be-detected data includes Flag, a logical address LUN ID of a host device, a LUN ID of a storage device, LBA, count, to-be-written data, and CRC. The to-be-detected data is 512 bytes in total, Flag occupies 2 bytes, the LUN ID of the host device occupies 8 bytes, the LUN ID of the storage device occupies 8 bytes, LBA occupies 8 bytes, count occupies 2 bytes, to-be-written data occupies 476 bytes, and CRC occupies 8 bytes.

[0085] Referring to the schematic diagram of the to-be-detected data shown in Figure 5 Figure 5 The first address and the first mapping address and LBA in the schematic diagram of the to-be-detected data are information automatically filled in the to-be-detected data by the host device based on configuration information, and are used to detect the correctness of the addressing address in the first write instruction. The data shown in Figure 5 When the accuracy and the reliability of the to-be-detected data are verified subsequently, problems can be found in time, and the correctness of data reading or writing is improved.

[0086] S103: The host device sends a first write instruction to the storage device.

[0087] S104: The storage device receives the first write instruction sent by the host device and parses to obtain a second write instruction.

[0088] The second write instruction is a write instruction parsed by the storage device when the first write instruction is transmitted to the storage device; and the second write instruction includes a second address and to-be-detected data.

[0089] The above-mentioned second address and second mapping address are represented by a logical block address; or the second address and the second mapping address are represented by a logical volume and a logical block address in the logical volume.

[0090] For example, the storage device parses the first write instruction by using the SCSI protocol to obtain the second write instruction. The second write instruction indicates that the instruction is a write instruction, a host device address (the second address) of a storage space to be written by the write instruction, and to-be-detected data. After the storage device parses the second address, the second mapping address corresponding to the second address is obtained based on a mapping relationship stored in the storage device.

[0091] In one example, the address in the instruction received by the storage device can be different from the address in the instruction sent by the host device. For example, Figure 4 ​​As shown in the mapping relationship, if the first address contained in the first write instruction sent by the host device is LUN0, LBA0, the first address contained in the to-be-detected data is LUN0, LBA0, and the first mapping address is LUN100, LBA0; the second address contained in the second write instruction received by the storage device is LUN1, LBA0, and the second mapping address obtained by the storage device based on LUN1, LBA0 is LUN101, LBA0.

[0092] It can be understood that, due to errors that may occur in the transmission process or the parsing process or mapping relationship configuration errors, the write instruction obtained by the storage device after receiving and parsing may deviate from the write instruction sent by the host device, and therefore, the second address contained in the instruction received by the storage device may be the same as or different from the first address contained in the instruction sent by the host device.

[0093] S105: The storage device determines whether the second write instruction satisfies a first preset condition.

[0094] If yes, S106 is performed;

[0095] If no, S109 is performed.

[0096] The first preset condition includes that the second address is consistent with the first address, and the second mapping address is consistent with the first mapping address.

[0097] The second mapping address is an address corresponding to the second address in the storage device.

[0098] When the second address is consistent with the first address, and the second mapping address is consistent with the first mapping address, it indicates that the address of the storage space to be written by the second write instruction has not occurred an error.

[0099] In one example, as shown in the figure, Figure 4 The first preset condition includes that the second address is consistent with the first address, and the second mapping address is consistent with the first mapping address. When the first address is LUN0, LBA0, the first mapping address is LUN100, LBA0, if the second address parsed by the storage device is LUN0, LBA0, the second mapping address is LUN100, LBA0, then the second address is consistent with the first address, and the second mapping address is consistent with the first mapping address, at this time, the second write instruction satisfies the first preset condition.

[0100] When the to-be-detected data further includes other information, the first preset condition further includes other conditions, and specific cases are as follows.

[0101] Case 1, when the to-be-detected data further includes flag information, the first preset condition further includes:

[0102] The to-be-detected data represented by the flag information is valid data.

[0103] In one example, 0xAA55 is used to represent valid data, and when the flag information contained in the to-be-detected data is 0xAA55, it indicates that the to-be-detected data is valid data, and when the flag information contained in the to-be-detected data is not 0xAA55, it indicates that the to-be-detected data is not valid data.

[0104] At this time, when the second write instruction meets the second address consistent with the first address contained in the first preset condition, and the second mapping address is consistent with the first mapping address, and the to-be-detected data represented by the flag information is valid data, it indicates that the second write instruction meets the first preset condition.

[0105] Case 2, when the to-be-detected data further includes the number of write operations, the first preset condition further includes:

[0106] The number of write operations meets the second preset condition.

[0107] The second preset condition includes: the number of write operations is equal to the last write operation number saved by the storage device plus one.

[0108] In one example, the number of write operations contained in the to-be-detected data is 3 times, and the last write operation number saved in the storage device is 2 times, then the number of write operations contained in the to-be-detected data is equal to the last write operation number plus one, that is, the number of write operations contained in the to-be-detected data meets the second preset condition.

[0109] At this time, when the second write instruction meets the second address consistent with the first address contained in the first preset condition, and the second mapping address is consistent with the first mapping address, and the number of write operations meets the second preset condition, it indicates that the second write instruction meets the first preset condition.

[0110] Setting the number of write operations in the to-be-detected data can verify that each write operation is indeed written to the storage device to ensure that there is no missing write or multiple write.

[0111] Case 3, when the to-be-detected data further includes the first check code of the to-be-detected data, the first preset condition further includes:

[0112] The second check code is consistent with the first check code; wherein the second check code is a check code calculated by the storage device based on the to-be-detected data.

[0113] The first check code is a check code calculated by the host device based on the to-be-detected data. If the second check code is consistent with the first check code, it indicates that the to-be-detected data has not occurred errors such as error codes during transmission.

[0114] In one example, if the check code calculated by the host device based on the to-be-detected data is 0 and the check code calculated by the storage device based on the to-be-detected data is 1, it indicates that the to-be-detected data has an error in the transmission process. If the check code calculated by the host device based on the to-be-detected data is 0 and the check code calculated by the storage device based on the to-be-detected data is 0, it indicates that the to-be-detected data has no error in the transmission process.

[0115] At this time, when the second write instruction meets the second address consistent with the first address, the second mapping address consistent with the first mapping address, and the second check code consistent with the first check code, it indicates that the second write instruction meets the first preset condition.

[0116] When the to-be-detected data contains data in the above-mentioned cases 1-case 3 at the same time, the first preset condition corresponds to conditions in the above-mentioned cases 1-case 3 at the same time. In addition to the second address consistent with the first address, the second write instruction also needs to meet the conditions in the above-mentioned cases 1-case 3 at the same time, so as to be determined as the second write instruction meeting the first preset condition. This method can effectively determine the correctness of the write data, the transmission process, and the address.

[0117] When the to-be-detected data contains one or more of the above-mentioned cases 1-case 3 at the same time, the order of verifying the multiple cases in the first preset condition by the second write instruction of the embodiment of the present application is not limited. Generally, the verification order with priority is: the flag information, the first check code, the write operation number, the second address, and the second mapping address.

[0118] S106: The storage device writes the to-be-written data into the storage space indicated by the first mapping address.

[0119] S107: The storage device saves the first address and the first mapping address.

[0120] (Optionally) S108: The storage device feeds back prompt information to the host device. The prompt information is used to prompt the writing success.

[0121] After S108 ends, S110 is executed.

[0122] S109: The storage device feeds back prompt information to the host device. The prompt information is used to prompt the writing failure.

[0123] The prompt information is also used to prompt the reason for the writing failure, which is the reason corresponding to the first preset condition not met by the second write instruction.

[0124] The first preset condition not met by the second write instruction, the prompt information, and the reason for the writing failure corresponding to the first preset condition are listed as follows.

[0125] The second write instruction does not satisfy the first preset condition that the to-be-detected data represented by the flag information is valid data, and the prompt information includes a write failure, and the cause includes that the to-be-detected data is not valid data.

[0126] The second write instruction does not satisfy the first preset condition that the number of write operations satisfies the second preset condition, and the prompt information includes a write failure, and the cause includes that the number of write operations does not satisfy the second preset condition, for example, the last write operation fails, data is not written or repeatedly written.

[0127] The second write instruction does not satisfy the first preset condition that the first check code is consistent with the second check code, and the prompt information includes a write failure, and the cause includes that the second check code is incorrect, and the to-be-detected data is incorrect in the transmission process.

[0128] The second write instruction does not satisfy the first preset condition that the second address is consistent with the first address, and the second mapping address is consistent with the first mapping address, and the prompt information includes a write failure, and the cause includes that the second address is incorrect, and / or the second mapping address is incorrect.

[0129] S110: The host device receives the prompt information fed back by the storage device.

[0130] If the prompt information is write failure information, it is beneficial for the host device and the management personnel to discover problems in time, and to take relevant measures in time according to specific causes, thereby reducing losses caused by data write failure. If the prompt information also prompts the cause of the write failure, the host device or the management personnel can quickly obtain the specific cause of the write failure, take corresponding solving measures, and improve the efficiency of solving problems.

[0131] When the above to-be-written data is successfully written, the host device also performs testing. Please refer to Figure 6 , a test method flowchart provided by the embodiment of the present application. Based on the above S107, the first address and the first mapping address are saved in the storage device, the first address is the address of the storage space of the data written in the storage device in the host device, and the first mapping address is the address corresponding to the first address in the storage device. As Figure 6 indicated, the method can include S201-S211.

[0132] S201: The host device receives a read test instruction.

[0133] The read test instruction is used to request the host device to initiate a read test.

[0134] S202: The host device generates a first read instruction.

[0135] The first read instruction includes the first address.

[0136] The first address and the first mapping address are represented by logical block addresses, or the first address and the first mapping address are represented by a logical volume and a logical block address in the logical volume.

[0137] S203: The host device sends a first read instruction to the storage device.

[0138] S204: The storage device receives the first read instruction sent by the host device and parses to obtain a second read instruction.

[0139] The second read instruction is a read instruction parsed by the storage device when the first read instruction generated by the host device is transmitted to the storage device, and the second read instruction includes a second address.

[0140] The storage device obtains a second mapping address based on the second address, and the second mapping address is an address corresponding to the second address in the storage device.

[0141] S205: The storage device determines whether the second read instruction meets a third preset condition.

[0142] The third preset condition includes that the second address is consistent with the first address, and the second mapping address is consistent with the first mapping address.

[0143] If yes, S206 is executed;

[0144] If no, S211 is executed.

[0145] S206: The storage device reads the written data in the storage space indicated by the first mapping address and returns the written data to the host device.

[0146] S207: After receiving the written data, the host device compares the reference data of the written data with the written data to obtain a comparison result.

[0147] The reference data of the written data in the storage space indicated by the first mapping address stored by the host device. The reference data is the data of the written data before being written into the storage space indicated by the first mapping address, that is, the data is the to-be-written data saved by the host device when generating the first write instruction.

[0148] S208: The host device determines whether the comparison result is consistent.

[0149] If the comparison result is consistent, S209 is executed;

[0150] If the comparison result is inconsistent, S210 is executed.

[0151] S209: The host device outputs a read-write test result as consistent.

[0152] S210: The host device outputs a read-write test result as inconsistent.

[0153] S211: The storage device feeds back the prompt information to the host device.

[0154] The prompt information is used to prompt the read failure.

[0155] The prompt information is also used to prompt the reason for the read failure, which is the reason corresponding to the first preset condition not being met by the second read instruction.

[0156] The prompt information is also used to prompt the reason for the write failure, which is the reason corresponding to the first preset condition not being met by the second write instruction.

[0157] The following lists the third preset condition not being met by the second read instruction, the prompt information, and the reason for the read failure corresponding to the third preset condition.

[0158] The second read instruction does not meet the third preset condition that the second address is consistent with the first address, and the second mapping address is consistent with the first mapping address, and the prompt information includes: the read failure, and the reason includes: the second address error, and / or the second mapping address error.

[0159] The specific description in S201-S211 can refer to S101-S110.

[0160] In the test method provided by the embodiments of the present application, due to address resolution errors or other reasons of the storage device, the address of the storage space to be read or written in the read or write instruction generated by the host device may not be consistent with the address of the storage space to be read or written in the read or write instruction received by the storage device. In the present application, the host device and the storage device further perform data consistency testing under the condition that the address of the storage space to be written or read by the write instruction and the read instruction is correct, so as to solve the problem of reading or writing data by the host device to the wrong storage space and avoid losses to the enterprise.

[0161] The above mainly describes the scheme provided by the embodiments of the present application from the perspective of the method. To realize the above functions, it contains the hardware structure and / or software module corresponding to the execution of each function. The technical person skilled in the art should easily realize that, in combination with the units and algorithm steps of each example described in the embodiments disclosed in the present application, the present application can be realized in the form of hardware or the combination of hardware and computer software. Whether a certain function is executed in the form of hardware or computer software driven hardware depends on the specific application and design constraints of the technical scheme. The professional technical person skilled in the art can use different methods to realize the described functions for each specific application, but such implementation should not be considered beyond the scope of the present application.

[0162] The embodiments of the present application also provide a test device 200. It can be the host device in the above. As shown in FIG. 2, the test device 200 includes a processor 201, a memory 202, and a bus 203. Figure 7As shown, a structural schematic diagram of a test device 200 provided by an embodiment of the present application is shown.

[0163] The test device 200 includes: a generating unit 201 configured to generate a first write instruction; the first write instruction includes a first address and to-be-detected data; the first address is an address of a storage space of the to-be-detected data in the first write instruction in the host device; the to-be-detected data includes the first address, a first mapping address and to-be-written data; the first mapping address is an address corresponding to the first address in the storage device; and a sending unit 202 configured to send the first write instruction to the storage device; the generating unit 201 is further configured to generate a first read instruction; the first read instruction includes the first address; and the sending unit 202 is further configured to send the first read instruction to the storage device. For example, as shown in Figure 2 and Figure 6 The generating unit 201 is configured to S102 and S202 in the method embodiment, and the sending unit 202 is configured to S103 and S203 in the method embodiment.

[0164] Optionally, the first address, the second address, the first mapping address and the second mapping address are represented by logical block addresses; or the first address, the second address, the first mapping address and the second mapping address are represented by logical volumes and logical block addresses in the logical volumes.

[0165] Optionally, the to-be-detected data further includes at least one of flag information, a write operation number and a first check code of the to-be-detected data; the flag information is used to represent whether the to-be-detected data is valid data; and the write operation number is used to represent a cumulative write number of the storage space indicated by the first address.

[0166] Optionally, when the to-be-detected data further includes the flag information, the first preset condition further includes that the to-be-detected data represented by the flag information is valid data; or, when the to-be-detected data further includes the write operation number, the first preset condition further includes that the write operation number satisfies a second preset condition; or, when the to-be-detected data further includes the first check code of the to-be-detected data, the first preset condition further includes that a second check code is consistent with the first check code; the second check code is a check code calculated by the storage device based on the to-be-detected data.

[0167] Optionally, the host device stores reference data of written data in the storage space indicated by the first mapping address, the test device 200 further includes a comparison unit 203 configured to compare the reference data of the written data with the written data after the written data is received, to obtain a comparison result; and the test device 200 further includes an output unit 204 configured to output, if the comparison result is consistent, a read-write test result of the host device as consistent; and output, if the comparison result is inconsistent, the read-write test result of the host device as inconsistent. For example, as shown in Figure 6As shown, the comparison unit 203 is used for S207 in the method embodiment, and the output unit 204 is used for S209 and S210 in the method embodiment.

[0168] The embodiment of the present application further provides another test device 300, which can be the storage device in the above. The storage device stores a first address and a first mapping address. The first address is an address of a storage space in the storage device where data has been written in the host device. The first mapping address is an address corresponding to the first address in the storage device. For example, as shown in Figure 8 As shown, the test device 300 provided by the embodiment of the present application is a structural schematic diagram of another test device 300.

[0169] The test device 300 includes: a receiving unit 301, configured to receive a first write instruction sent by a host device and parse to obtain a second write instruction; the second write instruction is a write instruction parsed by the storage device when the first write instruction is transmitted to the storage device; the second write instruction includes a second address and to-be-detected data; a writing unit 302, configured to write the to-be-written data into a storage space indicated by the first mapping address when the second write instruction meets a first preset condition; the first preset condition includes that the second address is consistent with the first address, and a second mapping address is consistent with the first mapping address; the second mapping address is an address corresponding to the second address in the storage device. The receiving unit 301 is further configured to receive a first read instruction sent by the host device and parse to obtain a second read instruction; the second read instruction is a read instruction parsed by the storage device when the first read instruction generated by the host device is transmitted to the storage device; the second read instruction includes the second address. A reading unit 303, configured to read the written data in the storage space indicated by the first mapping address and return the written data to the host device when the second read instruction meets a third preset condition; the third preset condition includes that the second address is consistent with the first address, and the second mapping address is consistent with the first mapping address; the second mapping address is an address corresponding to the second address in the storage device. For example, as shown in Figure 2 and Figure 6 As shown, the receiving unit 301 is used for S104 and S204 in the method embodiment, the writing unit 302 is used for S106 in the method embodiment, and the reading unit 303 is used for S206 in the method embodiment.

[0170] Optionally, when the second write instruction does not meet the first preset condition, the storage device feeds back prompt information to the host device; the prompt information is used to prompt a write failure.

[0171] Optionally, the test device 300 further includes a feedback unit 304, and the prompt information is further used to prompt a reason for the write failure, which is a reason corresponding to that the second write instruction does not meet the first preset condition. For example, as shown in Figure 2 As shown, the feedback unit 304 is used for S108 in the method embodiment.

[0172] Optionally, the test device 300 further comprises a storage unit 305, configured to store the first address and the first mapping address. For example, as shown in Figure 2 the storage unit 305 is configured to implement S107 in the method embodiment.

[0173] Optionally, the feedback unit 304 is further configured to feed back prompt information to the host device when the second read instruction does not satisfy the third preset condition; wherein the prompt information is used to prompt the read failure. For example, as shown in Figure 6 the feedback unit 304 is configured to implement S211 in the method embodiment.

[0174] Optionally, the prompt information is further used to prompt the reason of the read failure, which is the reason corresponding to the second read instruction not satisfying the first preset condition.

[0175] Figure 9 is a structural schematic diagram of a test device 400 provided by the embodiment of the present application. For example, the test device 400 can be the host device or the storage device in the above. As shown in Figure 9 the test device 400 comprises a processor 401, a memory 402 and a network interface 403.

[0176] The processor 401 comprises one or more CPUs. The CPU can be a single-CPU or a multi-CPU.

[0177] The memory 402 comprises, but is not limited to, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM), a flash memory or an optical memory, etc.

[0178] Optionally, the processor 401 realizes the test method provided by the embodiment of the present application by reading the instructions stored in the memory 402, or the processor 401 realizes the test method provided by the embodiment of the present application by internally storing the instructions. In the case that the processor 401 realizes the method in the above embodiment by reading the instructions stored in the memory 402, the memory 402 stores the instructions for realizing the test method provided by the embodiment of the present application.

[0179] The network interface 403, which includes a type of device with a transmitter and a receiver, is used to communicate with other devices or communication networks, and can be a wired interface (port), such as a fiber distributed data interface (FDDI), a gigabit Ethernet (GE) interface, or the like. Alternatively, the network interface 403 is a wireless interface. It should be understood that the network interface 403 includes a plurality of physical ports, and the network interface 403 is used for communication, etc.

[0180] Optionally, the test device 400 further includes a bus 404, and the processor 401, the memory 402, and the network interface 403 are generally connected to each other through the bus 404 or are connected to each other in other manners.

[0181] In actual implementation, the generation unit 201, the sending unit 202, the comparison unit 203, and the output unit 204, the receiving unit 301, the writing unit 302, the reading unit 303, the feedback unit 304, and the storage unit 305 can be implemented by a processor calling computer program code in a memory. The specific execution process can refer to the description in the method part, and will not be described here.

[0182] Another embodiment of the present application further provides a test device, which includes a memory and a processor. The memory and the processor are coupled; the memory is used to store computer program code, and the computer program code includes computer instructions. When the processor executes the computer instructions, the test device executes each step of the test method shown in the method embodiments. The test device can be a chip, or can be the storage device or the host device.

[0183] Another embodiment of the present application further provides a computer readable storage medium, which stores computer instructions. When the computer instructions run on the test device, the test device executes each step of the test method shown in the method embodiments.

[0184] Another embodiment of the present application further provides a chip system applied to a test device. The chip system includes one or more interface circuits and one or more processors. The interface circuit and the processor are interconnected through a circuit. The interface circuit is used to receive a signal from a memory of the test device and send a signal to the processor, and the signal includes computer instructions stored in the memory. When the processor of the test device executes the computer instructions, the test device executes each step of the test method shown in the method embodiments.

[0185] In another embodiment of the present application, a computer program product is also provided, which includes computer instructions, when the computer instructions are executed on the test device, cause the test device to perform each step performed by the test device in the test method flow shown in the method embodiment.

[0186] The above embodiments can be implemented in whole or in part by software, hardware, firmware, or any combination thereof. When implemented by a software program, the above embodiments can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer instructions are loaded and executed on a computer, the computer performs the flow or function according to the embodiments of the present application in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, a server, or other programmable devices. The computer instructions can be stored in a computer-readable storage medium or transferred from one computer-readable storage medium to another computer-readable storage medium, for example, the computer instructions can be transferred from one website, computer, server, or data center to another website, computer, server, or data center through wired (for example, coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (for example, infrared, wireless, microwave, etc.) manner. The computer-readable storage medium can be any available medium that can be accessed by a computer or data storage device including one or more servers, data centers, etc. integrated with the medium. The available medium can be a magnetic medium (for example, floppy disk, hard disk, magnetic tape), an optical medium (for example, DVD), or a semiconductor medium (for example, solid state disk (SSD)), etc.

[0187] The above is only a specific embodiment of the present application. Those skilled in the art can think of changes or replacements based on the specific embodiments provided by the present application, which should be covered within the protection scope of the present application.

Claims

1. A test method characterized by, The method comprises: a host device sends a first write instruction to a storage device; the first write instruction comprises a first address and to-be-detected data; the first address is an address of a storage space of the to-be-detected data in the first write instruction in the host device; the to-be-detected data comprises the first address, a first mapping address and the to-be-detected data; the first mapping address is an address corresponding to the first address in the storage device; the storage device receives the first write instruction sent by the host device and parses the first write instruction to obtain a second write instruction; the second write instruction comprises a second address and the to-be-detected data; when the second write instruction satisfies a first preset condition, the storage device writes the to-be-detected data into a storage space indicated by the first mapping address; wherein the first preset condition comprises that the second address is consistent with the first address, and a second mapping address is consistent with the first mapping address; the second mapping address is an address corresponding to the second address in the storage device; the to-be-detected data further comprises at least one of flag information, a write operation number and a first check code of the to-be-detected data; wherein the flag information is used to represent whether the to-be-detected data is valid data; and the write operation number is used to represent a cumulative write number of the storage space indicated by the first address.

2. The method of claim 1, wherein: the first address, the second address, the first mapping address and the second mapping address are represented by logical block addresses; or, the first address, the second address, the first mapping address and the second mapping address are represented by logical volumes and logical block addresses in the logical volumes.

3. The method of claim 1, wherein: when the to-be-detected data further comprises flag information, the first preset condition further comprises that the to-be-detected data represented by the flag information is valid data; or, when the to-be-detected data further comprises a write operation number, the first preset condition further comprises that the write operation number satisfies a second preset condition; or, when the to-be-detected data further comprises a first check code of the to-be-detected data, the first preset condition further comprises that a second check code is consistent with the first check code; wherein the second check code is a check code calculated by the storage device based on the to-be-detected data.

4. The method according to any one of claims 1 to 3, characterized in that, The method further comprises: when the second write instruction does not satisfy the first preset condition, the storage device feeds back prompt information to the host device; wherein the prompt information is used to prompt a write failure.

5. The method of claim 4, wherein, The prompt information is further used to prompt a reason for the write failure, and the reason is a reason corresponding to the second write instruction not satisfying the first preset condition.

6. The method according to any one of claims 1 to 5, characterized in that, The method further comprises: the storage device saves the first address and the first mapping address.

7. A test method characterized by, The storage device saves the first address and the first mapping address, and the first address is an address of a storage space of written data in the storage device in the host device; The first mapping address is an address corresponding to the first address in the storage device, and the method comprises: The host device sends a first read instruction to the storage device; the first read instruction comprises the first address; The storage device receives the first read instruction sent by the host device and parses the first read instruction to obtain a second read instruction; the second read instruction comprises a second address; When the second read instruction satisfies a third preset condition, the written data is read from the storage space indicated by the first mapping address, and the written data is returned to the host device; wherein the third preset condition comprises that the second address is consistent with the first address, and a second mapping address is consistent with the first mapping address; the second mapping address is an address corresponding to the second address in the storage device; The written data is written into the storage space indicated by the first mapping address when the storage device receives a first write instruction and satisfies a first preset condition; the first write instruction comprises the first address and to-be-detected data, the to-be-detected data comprises the first mapping address and the written data, and the first preset condition comprises that the second address is consistent with the first address, and the second mapping address is consistent with the first mapping address; The to-be-detected data further comprises at least one of flag information, a write operation number and a first check code of the to-be-detected data; wherein the flag information is used to represent whether the to-be-detected data is valid data; and the write operation number is used to represent a cumulative write number of the storage space indicated by the first address.

8. The method of claim 7, wherein: The first address, the second address, the first mapping address and the second mapping address are represented by logical block addresses; Alternatively, the first address, the second address, the first mapping address and the second mapping address are represented by logical volumes and logical block addresses in the logical volumes.

9. The method according to claim 7 or 8, characterized in that, The host device stores reference data of the written data in the storage space indicated by the first mapping address, and the method further comprises: After receiving the written data, the host device compares the reference data of the written data with the written data to obtain a comparison result; If the comparison result is consistent, the host device outputs a read-write test result as consistent; If the comparison result is inconsistent, the host device outputs a read-write test result as inconsistent.

10. The method according to claim 7 or 8, characterized in that, The method further comprises: When the second read instruction does not satisfy the third preset condition, the storage device feeds back prompt information to the host device; wherein the prompt information is used to prompt a read failure.

11. The method of claim 10, wherein, The prompt information is also used to prompt a reason for the read failure, and the reason is a reason corresponding to the first preset condition that the second read instruction does not satisfy.

12. A test system, characterized by The test system comprises a host device, a switch and a storage device, the host device and the storage device are connected through the switch, and the test system is used to execute the method of any one of claims 1 to 6 or 7 to 11.

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