Signal synthesis method, device, electronic device and storage medium

Abstract

The present application discloses a signal synthesis method, apparatus, electronic device and storage medium, belonging to the field of communication technologies. The electronic device includes a signal input module and a signal synthesis network. The signal input module is configured to input a signal to the signal synthesis network. The signal synthesis network includes a first single-pole single-throw switch, a second single-pole single-throw switch, a delay line, and a single-pole double-throw switch. A first end of the first single-pole single-throw switch is connected to the signal input module, a second end of the first single-pole single-throw switch is connected to a fixed end of the single-pole double-throw switch. A connection point is provided between the first single-pole single-throw switch and the single-pole double-throw switch. A first moving end of the single-pole double-throw switch is connected to the connection point through the second single-pole single-throw switch, and a second moving end of the single-pole double-throw switch is configured to output a signal.

Description

Technical Field

[0001] This application belongs to the field of communications, and particularly relates to a signal synthesis method, apparatus, electronic device, and storage medium. Background Art

[0002] Ultra Wide Band (UWB) technology is a wireless carrier communication technology that uses pulses. It spreads the pulses over a frequency range through modulation or direct spread spectrum. UWB technology has advantages such as low power consumption, insensitivity to channel fading, strong anti-interference ability, no interference to other devices, and high positioning accuracy. Based on the precise ranging and angle measurement capabilities of UWB technology, it can be widely applied in multiple fields, such as home pointing control, security geofencing, item finding, and smart car keys, among many application scenarios.

[0003] UWB technology uses a direct communication method of transmitting and receiving pulses between electronic devices (such as terminals). Since the pulse transmission power is limited by the transmission power of the signal input module of the electronic device itself, the UWB pulse coverage range of the electronic device is limited. Currently, the direct coverage range of UWB pulses of most electronic devices is in the order of hundreds of meters. When the distance between the communicating electronic devices exceeds its maximum coverage range, communication cannot continue. Summary of the Invention

[0004] The purpose of the embodiments of this application is to provide a signal synthesis method, apparatus, electronic device, and storage medium, which can solve the problem that communication cannot continue when the distance between communicating electronic devices exceeds its maximum coverage range.

[0005] In a first aspect, the embodiments of this application provide an electronic device, including a signal input module and a signal synthesis network. The signal input module is used to input a signal to the signal synthesis network. The signal synthesis network includes a first single-pole single-throw switch, a second single-pole single-throw switch, a delay line, and a single-pole double-throw switch. The first end of the first single-pole single-throw switch is connected to the signal input module, the second end of the first single-pole single-throw switch is connected to the fixed end of the single-pole double-throw switch, a connection point is provided between the first single-pole single-throw switch and the single-pole double-throw switch, the first moving end of the single-pole double-throw switch is connected to the connection point through the second single-pole single-throw switch, and the second moving end of the single-pole double-throw switch is used to output a signal.

[0006] In a second aspect, the embodiments of this application provide a signal synthesis method, which is applied to the electronic device provided in the first aspect. The method includes:

[0007] By adjusting the first single-pole single-throw switch, the second single-pole single-throw switch, and the single-pole double-throw switch in the signal synthesis network, N adjacent pulses input from the signal input module to the signal synthesis network are synthesized to obtain a target synthesized signal, where N is a positive integer greater than 1.

[0008] In a third aspect, an embodiment of the present application provides a signal synthesis device, which includes:

[0009] A synthesis module, configured to synthesize N adjacent pulses input from the signal input module to the signal synthesis network by adjusting the first single-pole single-throw switch, the second single-pole single-throw switch, and the single-pole double-throw switch in the signal synthesis network, to obtain a target synthesized signal, where N is a positive integer greater than 1.

[0010] In a fourth aspect, an embodiment of the present application provides an electronic device, which includes a processor and a memory. The memory stores a program or instruction that can run on the processor. When the program or instruction is executed by the processor, the steps of the method described in the second aspect are implemented.

[0011] In a fifth aspect, an embodiment of the present application provides a readable storage medium, on which a program or instruction is stored. When the program or instruction is executed by a processor, the steps of the method described in the second aspect are implemented.

[0012] In a sixth aspect, an embodiment of the present application provides a chip, which includes a processor and a communication interface. The communication interface is coupled to the processor, and the processor is configured to run a program or instruction to implement the method described in the second aspect.

[0013] In a seventh aspect, an embodiment of the present application provides a computer program product, which is stored in a storage medium and is executed by at least one processor to implement the method described in the second aspect.

[0014] In the embodiment of the present application, a signal synthesis network is installed in the electronic device. By controlling the cooperation of each switch in the signal synthesis network, it is possible to delay the pulse and perform self-synthesis with subsequent pulses, obtain a pulse with higher power and then send it, thereby enhancing the signal power, increasing the coverage range of pulse transmission, and improving the communication quality. Description of the Drawings

[0015] Figure 1 is one of the schematic structural diagrams of the electronic device provided by the embodiment of the present application;

[0016] Figure 2 is the schematic structural diagram of the microwave power circuit provided by the embodiment of the present application;

[0017] Figure 3It is a schematic flowchart of the signal synthesis method provided by an embodiment of the present application;

[0018] Figure 4 It is the second schematic structural diagram of the electronic device provided by an embodiment of the present application;

[0019] Figure 5 It is the first schematic structural diagram of the signal synthesis network provided by an embodiment of the present application;

[0020] Figure 6 It is the second schematic structural diagram of the signal synthesis network provided by an embodiment of the present application;

[0021] Figure 7 It is the third schematic structural diagram of the signal synthesis network provided by an embodiment of the present application;

[0022] Figure 8 It is the first schematic diagram of the signal synthesis network startup process provided by an embodiment of the present application;

[0023] Figure 9 It is the second schematic diagram of the signal synthesis network startup process provided by an embodiment of the present application;

[0024] Figure 10 It is the schematic structural diagram of the signal synthesis device provided by an embodiment of the present application;

[0025] Figure 11 It is the third schematic structural diagram of the electronic device provided by an embodiment of the present application;

[0026] Figure 12 It is the schematic hardware structure diagram of an electronic device for implementing an embodiment of the present application. Detailed implementation manners

[0027] Next, the technical solutions in the embodiments of the present application will be clearly described in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are some, rather than all, of the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art belong to the scope of protection of the present application.

[0028] The terms "first", "second", etc. in the specification and claims of the present application are used to distinguish similar objects, rather than to describe a specific order or sequence. It should be understood that such data can be interchanged under appropriate circumstances so that the embodiments of the present application can be implemented in an order other than those illustrated or described herein, and the objects distinguished by "first", "second", etc. are usually of the same category, and the number of objects is not limited. For example, the first object can be one or more. In addition, "and / or" in the specification and claims means at least one of the connected objects, and the character " / ", generally represents an "or" relationship between the associated objects before and after.

[0029] The signal synthesis method, apparatus, electronic device, and storage medium provided by the embodiments of the present application will be described in detail below with reference to the accompanying drawings through specific embodiments and their application scenarios.

[0030] Figure 1 is one of the structural schematic diagrams of the electronic device provided by the embodiments of the present application. As Figure 1 shown, the electronic device includes a signal input module 110 and a signal synthesis network 120. The signal input module 110 is configured to input a signal to the signal synthesis network 120. The signal synthesis network 120 includes a first single-pole single-throw switch 1231, a second single-pole single-throw switch 1232, a delay line 121, and a single-pole double-throw switch 1221. The first end 1231a of the first single-pole single-throw switch is connected to the signal input module, the second end 1231b of the first single-pole single-throw switch is connected to the stationary end 1221c of the single-pole double-throw switch. A connection point is provided between the first single-pole single-throw switch 1231 and the single-pole double-throw switch 1221. The first moving end 1221d of the single-pole double-throw switch is connected to the connection point through the second single-pole single-throw switch, and the second moving end 1221e of the single-pole double-throw switch is configured to output a signal.

[0031] Optionally, the delay line 121 may be a microwave transmission type delay line.

[0032] Optionally, the delay line 121 may adopt microwave transmission lines such as microstrip lines and coplanar waveguides, which are passive two-port components or devices that can delay a signal for a period of time. Electromagnetic waves require time to propagate in a microwave transmission line, and this time is determined by the length of the transmission line. By designing the structure of the transmission line, signal delay can be achieved.

[0033] Optionally, any delay line that can implement the signal delay function is applicable to the embodiments of the present application, and no limitation is made here.

[0034] Optionally, it is difficult to produce high-power devices for microwave solid-state devices due to problems such as process and heat dissipation. In order to obtain high-power output, microwave power synthesis technology can be adopted.

[0035] Optionally, the embodiments of the present application can construct a signal synthesis network by using a microwave transmission type delay line, a microwave power synthesis circuit structure, switches, and matching circuits.

[0036] Optionally, the signal input module is an ultra-wideband UWB chip, which can generate pulses and input the pulses into the signal synthesis network based on a certain period.

[0037] Optionally, the signal synthesis network can delay the pulses emitted by the signal input module and perform power synthesis on subsequent pulses with the same frequency and phase, so as to obtain a pulse transmission signal with higher power, realizing signal power enhancement. For example, it can improve the communication experience of UWB in the case of increasing real-time distance and NLOS environment.

[0038] For example, the signal synthesis network can delay a pulse emitted by the signal input module and perform power synthesis on the next pulse with the same frequency and phase.

[0039] Optionally, microwave signals with the same frequency and phase can be used to obtain higher power through a power synthesis circuit composed of planar microwave transmission lines; Figure 2 is a schematic structural diagram of the microwave power circuit provided by the embodiments of the present application. As Figure 2 shown, the T-junction structure can achieve power synthesis through signal synthesis.

[0040] Optionally, a connection point is provided between the first single-pole single-throw switch 1231 and the single-pole double-throw switch 1221. The first moving end 1221d of the single-pole double-throw switch is connected to the connection point through a second single-pole single-throw switch, which can achieve signal synthesis and thus power synthesis.

[0041] Optionally, a connection point is provided between the first single-pole single-throw switch 1231 and the single-pole double-throw switch 1221. The first moving end 1221d of the single-pole double-throw switch is connected to the connection point through a second single-pole single-throw switch, and the connection point is a T-junction structure.

[0042] Optionally, the length of the delay line can be preset as L. L can make the pulse reaching the first end of the second single-pole single-throw switch through the delay line and the pulse reaching the second end of the first single-pole single-throw switch after the UWB is generated meet exactly at the first node. The first node is the node where the second end of the first single-pole single-throw switch, the fixed end of the single-pole double-throw switch, and the first end of the second single-pole single-throw switch are connected.

[0043] Optionally, circuit structures with similar signal synthesis or other types of transmission lines and power synthesis circuits that can achieve the same pulse power synthesis function are applicable to the embodiments of the present application and can also be directly used to replace the T-junction structure, which is not limited herein.

[0044] Optionally, since the impedance of the RF circuit changes during the power synthesis process, impedance matching can be performed through a matching circuit. The matching circuit can be determined based on related technologies; the matching circuit can be determined based on related technologies of RF circuit design.

[0045] Optionally, any circuit structure that can implement the function of the matching circuit is applicable to the embodiments of the present application, which is not limited herein.

[0046] In an embodiment of the present application, a signal synthesis network is installed in an electronic device. By controlling the cooperation of each switch in the signal synthesis network, it is possible to delay a pulse and then perform self-synthesis with subsequent pulses to obtain a pulse with higher power and then transmit it, thereby enhancing the signal power, increasing the coverage range of pulse transmission, and improving the communication quality.

[0047] Figure 3 FIG. is a schematic flowchart of a signal synthesis method provided by an embodiment of the present application. This signal synthesis method is applied to an electronic device, which can be a transmitting end or a receiving end. As Figure 3 shown, the signal synthesis method includes the following steps:

[0048] Step 300: By adjusting the first single-pole single-throw switch, the second single-pole single-throw switch, and the single-pole double-throw switch in the signal synthesis network, N adjacent pulses input by the signal input module to the signal synthesis network are synthesized to obtain a target synthesis signal, where N is a positive integer greater than 1.

[0049] Optionally, the N adjacent pulses are pulse signals with the same frequency and the same phase.

[0050] Optionally, the state of the switches in the signal synthesis network can be adjusted first to activate the signal synthesis network.

[0051] Optionally, the signal synthesis network can be activated when signal synthesis is required.

[0052] Optionally, the signal synthesis network can be activated when signal power enhancement is required.

[0053] Optionally, the signal synthesis network can be used to synthesize pulses belonging to the same signal stream.

[0054] Optionally, the signal synthesis network can be used to synthesize continuous signals belonging to the same signal stream.

[0055] Optionally, the signal synthesis network can be used to synthesize discontinuous signals belonging to the same signal stream.

[0056] Taking the electronic device as the transmitting end as an example, Figure 4 FIG. is a second schematic structural diagram of an electronic device provided by an embodiment of the present application. As Figure 4 shown, the electronic device is equipped with a signal synthesis network. After obtaining the target synthesis signal through the signal synthesis network, it is transmitted to increase the signal power and thus improve the communication quality.

[0057] Optionally, the electronic device can be a receiving end. The electronic device can receive the signal sent by the communication peer, then input the received signal into the signal synthesis network for synthesis. After obtaining the target synthesized signal, it is processed to improve the signal power and the signal processing quality.

[0058] Optionally, the signal input module can generate and output pulses.

[0059] Optionally, the signal input module can generate and output continuous signals.

[0060] Optionally, the signal input module can generate and output discontinuous signals.

[0061] Optionally, the signal input module can be connected to the first end of the first single-pole single-throw switch, that is, the pulses or signals output by the signal input module first reach the first end of the first single-pole single-throw switch after being transmitted to the signal synthesis network.

[0062] Optionally, N adjacent pulses can be synthesized through the signal synthesis network to obtain the target synthesized signal, so as to achieve pulse power synthesis.

[0063] Optionally, the signals within M adjacent time periods can be synthesized through the signal synthesis network to obtain the target synthesized signal, so as to achieve signal power synthesis.

[0064] Optionally, the electronic device can be a sending end. After generating the target synthesized signal, the electronic device can send the target synthesized signal to the communication peer.

[0065] Optionally, the electronic device can be a receiving end. After receiving the signal sent by the communication peer, the electronic device inputs it into the signal synthesis network for synthesis. After obtaining the target synthesized signal, subsequent processing is performed. Correspondingly, the signal input module can be a receiver, that is, after the receiver of the electronic device receives the signal sent by the communication peer, it inputs it into the signal synthesis network for synthesis.

[0066] In the embodiment of the present application, a signal synthesis network is installed in the electronic device. Through the signal synthesis network, N adjacent pulses input by the signal input module to the signal synthesis network are synthesized, the target synthesized signal is obtained and sent, so as to obtain a signal with higher power, realize signal power enhancement, and further improve the communication quality.

[0067] Optionally, the method of synthesizing N adjacent pulses input by the signal input module to the signal synthesis network by adjusting the first single-pole single-throw switch, the second single-pole single-throw switch, and the single-pole double-throw switch in the signal synthesis network to obtain the target synthesized signal includes:

[0068] Before the first pulse among the N adjacent pulses arrives at the first single-pole single-throw switch, control the first single-pole single-throw switch to close, the second single-pole single-throw switch to open, and the fixed terminal of the single-pole double-throw switch to be connected to the first moving terminal;

[0069] When the first pulse among the N adjacent pulses arrives at the delay line, control the second single-pole single-throw switch to close;

[0070] When the second-to-last pulse among the N adjacent pulses arrives at the delay line, control the fixed terminal of the single-pole double-throw switch to be connected to the second moving terminal;

[0071] Output the target composite signal through the second moving terminal of the single-pole double-throw switch.

[0072] Optionally, from the moment a pulse enters the signal synthesis network until it reaches the connection point, i.e., the T-junction node, if the transmission time of this pulse matches the transmission time of the pulse transmitted in the delay line (i.e., the time from the moment the pulse in the delay line arrives at the delay line to the moment it reaches the connection point, i.e., the T-junction node), then the phases of the two pulses are the same during power synthesis.

[0073] Figure 5 is one of the schematic structural diagrams of the signal synthesis network provided by the embodiments of the present application. As Figure 5 shown, before it is determined that the first pulse among the N adjacent pulses arrives at the first single-pole single-throw switch (for example, at the moment t0 when the UWB chip generates the first pulse), the first single-pole single-throw switch 1231 can be controlled to close, the second single-pole single-throw switch 1232 to open, and the fixed terminal 1221c of the single-pole double-throw switch to be connected to the first moving terminal 1221d of the single-pole double-throw switch 1221, so that the first pulse can pass through the first single-pole single-throw switch, the fixed terminal of the single-pole double-throw switch, and then be transmitted to the second moving terminal of the single-pole double-throw switch.

[0074] Figure 6 is the second of the schematic structural diagrams of the signal synthesis network provided by the embodiments of the present application. As Figure 6 shown, when the first pulse among the N adjacent pulses arrives at the delay line, the second single-pole single-throw switch can be controlled to close, so that the first pulse passes through the delay line, and after passing through the first end of the second moving terminal, it is combined with the pulse transmitted through the first single-pole single-throw switch (i.e., the second pulse among the N adjacent pulses) to obtain a composite pulse.

[0075] Optionally, if N = 2 (the second-to-last pulse among the N adjacent pulses is the first pulse), then control the fixed terminal of the single-pole double-throw switch to be connected to the second moving terminal, and output the previously obtained composite pulse as the target composite signal.

[0076] Optionally, if N>2, control the fixed end of the single-pole double-throw switch to still be connected to the first moving end, then the synthesized pulse obtained above still transmits through the first moving end of the single-pole double-throw switch, passes through the delay line, and after passing through the first end of the second moving end, is further synthesized with the pulse newly transmitted through the first single-pole single-throw switch to obtain a new synthesized pulse. This new synthesized pulse still transmits through the first moving end of the single-pole double-throw switch, passes through the delay line, and after passing through the first end of the second moving end, is further synthesized with the pulse newly transmitted through the first single-pole single-throw switch to further obtain a new synthesized pulse, and so on, until after the penultimate pulse among the N adjacent pulses passes through the first moving end of the single-pole double-throw switch (i.e., the last new synthesized pulse transmits through the second moving end of the single-pole double-throw switch), control the fixed end of the single-pole double-throw switch to be connected to the second moving end. Figure 7 is the third structural schematic diagram of the signal synthesis network provided by the embodiment of the present application, as Figure 7 shown, the last new synthesized pulse can pass through the delay line, and after passing through the first end of the second moving end, is synthesized with the last pulse newly transmitted through the first single-pole single-throw switch to obtain the target synthesized signal, and is output through the second moving end of the single-pole double-throw switch.

[0077] Optionally, since the frequency of the pulses emitted by the signal input module is fixed, and the time for the pulses to pass through each node in the circuit can be predicted, therefore, it can be preset that the time when the signal input module emits the first pulse is t0, the time when the first pulse among the N adjacent pulses passes through the first moving end of the single-pole double-throw switch is t1, and the time when the penultimate pulse among the N adjacent pulses passes through the first moving end of the single-pole double-throw switch is t2. Based on the requirements of signal synthesis, t0, t1, and t2 can be predicted in advance and set in the pre-set electronic device. Then, the electronic device can directly control the first single-pole single-throw switch to close, the second single-pole single-throw switch to open, and the fixed end of the single-pole double-throw switch to be connected to the first moving end at the moment of t0; immediately control the second single-pole single-throw switch to close after passing through the moment of t1; and immediately control the fixed end of the single-pole double-throw switch to be connected to the second moving end after passing through the moment of t3.

[0078] Optionally, based on the above process, a target synthesized signal can be generated for every N pulses. In the case where the signal input module continuously outputs pulses, multiple target synthesized signals can be continuously generated for transmission.

[0079] In one embodiment, taking N = 2 as an example, at time T1, the signal input module emits pulse A1. At the same time, the electronic device uses the control signal to close the first single-pole single-throw switch, open the second single-pole single-throw switch, and connect the fixed end of the single-pole double-throw switch to the first moving end, as Figure 5As shown; Pulse A1 enters the delay line for delay until time T2, and there is no pulse passing through the solid line part of the delay line; At time T2, the signal input module emits pulse B1, and at the same time, the electronic device closes the second single-pole single-throw switch using a control signal, connecting the stationary terminal of the single-pole double-throw switch to the second moving terminal, as Figure 7 shown, the path is adjusted to the path shown by the solid line path. Among them, the selection of time T2 needs to ensure that pulse A1 has passed through the single-pole double-throw switch and entered the delay line, and pulse A1 and pulse B1 reach the connection point simultaneously for power combination (since the path times of pulse A1 and pulse B1 are the same from time T2 to the connection point, i.e., the T-junction node, so their phases are the same at the power combination point), and there is no pulse passing through the solid line part of the delay line. Pulse A1 and pulse B1 become the target combined signal 1 after passing through the "signal combination network"; By analogy, the combination process of the target combined signal n (n = 1, 2, 3,...) is similar to the above process.

[0080] The embodiment of the present application provides a construction of a signal combination network, which delays a pulse signal emitted by the signal input module and combines the power with the next pulse signal of the same frequency and phase, so as to obtain a pulse emission signal with higher power and realize the power enhancement of the UWB pulse signal.

[0081] Optionally, the time from when pulse An (n = 1, 2, 3,...) enters the signal combination network from the signal input module to when the target combined signal n (n = 1, 2, 3,...) is output from the signal combination network can be obtained by measurement or prediction and stored in the electronic device, denoted as t total . In engineering applications, if it is necessary to output pulse n from the signal combination network at the target time Tn, then the start time of pulse power combination is T n-total .

[0082] Optionally, the moments and durations involved in the combination process of the above target combined signal can be accurate to the nanosecond level.

[0083] In the embodiment of the present application, by controlling the timing of the switch, a simple circuit is used to realize the combination of multiple pulses, reducing the complexity of signal combination.

[0084] In the embodiment of the present application, the signal input module can be an ultra-wideband UWB chip. The signal combination network realizes the enhancement of UWB pulse power through self-pulse combination, thereby improving the quality of UWB communication.

[0085] Optionally, the process of combining the signals input by the signal input module into the signal combination network within M adjacent time periods through the signal combination network to obtain the target combined signal includes:

[0086] Before the signal in the first of the M time periods reaches the first single-pole single-throw switch, control the first single-pole single-throw switch to close, the second single-pole single-throw switch to open, and the stationary end of the single-pole double-throw switch to be connected to the first moving end;

[0087] When the signal in the first of the M time periods reaches the delay line, control the second single-pole single-throw switch to close;

[0088] When the signal in the penultimate of the M time periods completely reaches the delay line, control the stationary end of the single-pole double-throw switch to be connected to the second moving end.

[0089] M is a positive integer greater than 1.

[0090] Optionally, the durations of the M time periods can be the same.

[0091] Optionally, the durations of the M time periods can be determined based on the user's requirements.

[0092] Optionally, from the moment when the starting signal in a time period enters the signal synthesis network until it reaches the connection point, i.e., the T-junction node, if the transmission time of this starting signal matches the transmission time of the starting signal in the time period during which the signal transmitted in the delay line is located (i.e., the time from the moment when the starting signal in the time period during which the signal is being transmitted in the delay line reaches the delay line until it reaches the connection point, i.e., the T-junction node), then the phases of the signals in the two time periods are the same during power synthesis.

[0093] Optionally, before it is determined that the signal in the first of the M time periods reaches the first single-pole single-throw switch (such as at the start time t0 of the first time period), the first single-pole single-throw switch 1231 can be controlled to close, the second single-pole single-throw switch 1232 to open, and the stationary end 1221c of the single-pole double-throw switch to be connected to the first moving end 1221d of the single-pole double-throw switch 1221, so that the signal in the first time period can pass through the first single-pole single-throw switch, the stationary end of the single-pole double-throw switch, and then be transmitted to the second moving end of the single-pole double-throw switch.

[0094] Optionally, when the signal in the first of the M time periods reaches the delay line, the second single-pole single-throw switch can be controlled to close, so that the signal in the first time period passes through the delay line, and after passing through the first end of the second moving end, it starts to be synthesized with the signal in the second time period transmitted through the first single-pole single-throw switch to obtain a synthesized signal.

[0095] Optionally, if M = 2 (the penultimate time period among the M time periods is the first time period), the fixed end of the single-pole double-throw switch is controlled to be connected to the second moving end, and the obtained composite signal is used as the target composite signal for output.

[0096] Optionally, if M > 2, the fixed end of the single-pole double-throw switch is still controlled to be connected to the first moving end, then the obtained composite signal still passes through the first moving end of the single-pole double-throw switch, and passes through the delay line. After passing through the first end of the second moving end, it is further combined with the signal in the next time period newly transmitted through the first single-pole single-throw switch to obtain a new composite signal. This new composite signal still passes through the first moving end of the single-pole double-throw switch, and passes through the delay line. After passing through the first end of the second moving end, it is further combined with the signal in the next time period newly transmitted through the first single-pole single-throw switch to further obtain a new composite signal, and so on, until the signal in the penultimate time period among the M time periods completely reaches the delay line (that is, the last new composite signal completely passes through the second moving end of the single-pole double-throw switch). Then, the fixed end of the single-pole double-throw switch is controlled to be connected to the second moving end. The last new composite signal can pass through the delay line, and after passing through the first end of the second moving end, it is combined with the signal in the last time period newly transmitted through the first single-pole single-throw switch to obtain the target composite signal, which is output through the second moving end of the single-pole double-throw switch. Among them, the durations of the M time periods can be the same, and the length of each of the above composite signals can be the same as the time length of the M time periods, or due to the phase deviation caused by the combination, the length of the composite signal can be slightly longer than the time length of the M time periods.

[0097] Optionally, by adjusting the first single-pole single-throw switch, the second single-pole single-throw switch, and the single-pole double-throw switch in the signal synthesis network, the N adjacent pulses input by the signal input module to the signal synthesis network are combined to obtain the target composite signal, including:

[0098] When the distance between the electronic device and the communication peer is greater than the distance threshold, by adjusting the first single-pole single-throw switch, the second single-pole single-throw switch, and the single-pole double-throw switch in the signal synthesis network, the N adjacent pulses input by the signal input module to the signal synthesis network are combined to obtain the target composite signal.

[0099] Optionally, the electronic device can test the maximum distance that can be covered when the signal synthesis network is enabled and disabled before leaving the factory, and store it in the electronic device as a condition for enabling the signal synthesis network for later call.

[0100] Optionally, when the electronic device determines that the distance between it and the communication peer is greater than the distance threshold, it can consider that the communication peer is no longer within the coverage range where the electronic device can perform UWB communication, that is, power enhancement is required, and then the signal synthesis network can be activated.

[0101] In the embodiments of the present application, the signal synthesis network can be activated in a timely manner to improve the stability of UWB communication between the electronic device and the communication peer.

[0102] Optionally, the method further includes:

[0103] When the distance between the electronic device and the communication peer is less than or equal to the distance threshold, control the first single-pole single-throw switch to close, the second single-pole single-throw switch to open, and the stationary terminal of the single-pole double-throw switch to be connected to the second moving terminal.

[0104] Optionally, when the distance between the electronic device and the communication peer is less than or equal to the distance threshold, it can be considered that the communication peer is within the coverage range where the electronic device can perform UWB communication, that is, power enhancement is not required, and then the signal synthesis network can be not activated.

[0105] Optionally, the signal synthesis network can be not activated by adjusting the switch state of the signal synthesis network. For example, by controlling the first single-pole single-throw switch to close, the second single-pole single-throw switch to open, and the stationary terminal of the single-pole double-throw switch to be connected to the second moving terminal, it can be considered that the signal synthesis network is not activated.

[0106] In one embodiment, assuming that the signal synthesis network is not enabled, the maximum distance that the electronic device can cover is l1, and the maximum distance that the communication peer can cover is l2; when the signal synthesis network is enabled, the maximum distance that the electronic device can cover is l3, and the maximum distance that the communication peer can cover is l4, where l1 ≤ l2 < l3 ≤ l4. After the electronic device and the communication peer establish UWB communication, the real-time distance l between the electronic device and the communication peer can be obtained. After the electronic device and the communication peer establish UWB communication at a short distance (such as l is much smaller than l1), the real-time distance between the electronic device and the communication peer is constantly changing. According to the change of the real-time distance between the electronic device and the communication peer, it can be judged whether to activate the signal synthesis network. Figure 8 is one of the schematic diagrams of the signal synthesis network activation process provided by the embodiments of the present application. As Figure 8 shown, the detailed implementation process of activating the signal synthesis network is as follows:

[0107] When the real-time distance between the electronic device and the communication peer is less than the maximum distance that the electronic device can cover without enabling the signal synthesis network, that is, l ≤ l1 - Δl (where Δl is a stability margin introduced to avoid connection interruption and ping-pong switching), the electronic device does not enable the signal synthesis network, and the communication peer does not enable the signal synthesis network.

[0108] When the real-time distance between the electronic device and the communication peer is close to the maximum distance that the electronic device can cover without enabling the signal synthesis network and less than the maximum distance that the communication peer can cover without enabling the signal synthesis network, that is, l1 - Δl < l ≤ l2 - Δl, the electronic device enables the signal synthesis network, and the communication peer does not enable the signal synthesis network.

[0109] When the real-time distance between the electronic device and the communication peer is close to the maximum distance that the communication peer can cover without enabling the signal synthesis network and less than the maximum distance that the electronic device can cover when enabling the signal synthesis network, that is, l2 - Δl < l ≤ l3 - Δl, the electronic device enables the signal synthesis network, and the communication peer enables the signal synthesis network.

[0110] In the embodiments of the present application, for an electronic device equipped with a signal synthesis network, the transmission power of its UWB pulse signal is higher, and the coverage range is wider; after the electronic device establishes UWB communication, using the ranging ability of UWB, the real-time distance between the electronic device and the communication peer is obtained, and it is determined whether to enable the "signal synthesis network" according to the change of the real-time distance; when the electronic device does not enable the signal synthesis network, it can have lower power consumption while ensuring the user's communication experience; after the electronic device enables the signal synthesis network, the communication range of the UWB signal is expanded, and it can ensure the user's UWB communication experience at a long distance.

[0111] Optionally, the method of synthesizing N adjacent pulses input by the signal input module into the signal synthesis network by adjusting the first single-pole single-throw switch, the second single-pole single-throw switch, and the single-pole double-throw switch in the signal synthesis network to obtain a target synthesized signal includes:

[0112] Receiving a signal synthesis network start indication sent by the communication peer when a first condition is satisfied;

[0113] Based on the signal synthesis network start indication, by adjusting the first single-pole single-throw switch, the second single-pole single-throw switch, and the single-pole double-throw switch in the signal synthesis network, N adjacent pulses input by the signal input module into the signal synthesis network are synthesized to obtain a target synthesized signal;

[0114] The first condition includes at least one of the following:

[0115] The first signal power is less than the power threshold corresponding to the receiving sensitivity of the communication peer;

[0116] The first signal power continuously decreases;

[0117] Wherein, the first signal power is the power of the signal received by the communication peer.

[0118] Optionally, when the electronic device is the transmitting end, the receiving sensitivity of the communication peer can be the receiver sensitivity of the communication peer.

[0119] Optionally, the electronic device can test the power threshold P corresponding to the sensitivity of its receiver before leaving the factory, store it in the electronic device as a condition for starting the signal synthesis network of the communication peer for subsequent call. RS for subsequent call.

[0120] Optionally, the electronic device can send a pulse. After the communication peer receives the pulse, it can determine the power of the received pulse. When the power is less than the power threshold corresponding to the receiving sensitivity of the communication peer and / or when the power continuously decreases, the communication peer sends a network start indication to the electronic device, and the electronic device can receive the signal synthesis network start indication and then start the signal synthesis network.

[0121] Optionally, starting the signal synthesis network may mean starting to synthesize N pulses. For example, before the first pulse in the N adjacent pulses arrives at the first single-pole single-throw switch, control the first single-pole single-throw switch to close, the second single-pole single-throw switch to open, and the fixed end of the single-pole double-throw switch to be connected to the first moving end. When the first pulse in the N adjacent pulses arrives at the delay line, control the second single-pole single-throw switch to close; when the second-to-last pulse in the N adjacent pulses arrives at the delay line, control the fixed end of the single-pole double-throw switch to be connected to the second moving end; output the target synthesized signal through the second moving end of the single-pole double-throw switch, then it is considered that the signal synthesis network is started.

[0122] Embodiments of the present application can start the signal synthesis network in a timely manner to improve the stability of UWB communication between the electronic device and the communication peer.

[0123] Optionally, the method further includes:

[0124] Receiving a signal sent by the communication peer and determining the second signal power of the received signal;

[0125] Sending a signal synthesis network start indication to the communication peer when a second condition is satisfied;

[0126] Wherein, the second condition includes at least one of the following:

[0127] The power of the second signal is less than the power threshold corresponding to the receiving sensitivity of the electronic device;

[0128] The power of the second signal continues to decrease.

[0129] Optionally, when the electronic device is the receiving end and the communication peer is the sending end, the receiving sensitivity of the electronic device can be the receiver sensitivity of the electronic device.

[0130] Optionally, the communication peer can send a pulse. After receiving the pulse, the electronic device can determine the power of the received pulse. When the power is less than the power threshold corresponding to the receiving sensitivity of the electronic device and / or when the power continues to decrease, the electronic device sends a network startup indication to the communication peer, and the communication peer can receive the signal synthesis network startup indication and then start the signal synthesis network.

[0131] In the embodiments of the present application, the signal synthesis network can be started in a timely manner to improve the stability of UWB communication between the electronic device and the communication peer.

[0132] In one embodiment, when the electronic device and the communication peer perform UWB communication in the NLOS (Non Line of sight) scenario, the electronic device can determine that the current communication is in the NLOS scenario based on the power of the received pulse (for example, by determining that the first path is not the strongest multipath component), and this state lasts for t'. Figure 9 This is the second schematic diagram of the signal synthesis network startup process provided by the embodiments of the present application. As Figure 9 shown, the detailed implementation process of starting the signal synthesis network is as follows:

[0133] When the pulse power of the first path received by the electronic device is higher than the power threshold corresponding to the receiving sensitivity, that is, P≥P RS +ΔP (where ΔP is a stability margin introduced to avoid ping-pong switching), the electronic device does not send an indication (signal synthesis network startup indication) to enable the signal synthesis network by the communication peer, and the communication peer does not enable the signal synthesis network.

[0134] When the pulse power of the first path received by the electronic device is close to the power threshold corresponding to the receiving sensitivity, that is, P≤P RS +ΔP, and it is continuously decreasing, the electronic device sends an indication (signal synthesis network startup indication) to enable the signal synthesis network by the communication peer, and the communication peer enables the signal synthesis network.

[0135] When the pulse power of the first path received by the electronic device is less than the power threshold corresponding to the receiving sensitivity, that is, P<P RSWhen -ΔP occurs, the electronic device sends an indication to enable the signal synthesis network to the communication peer (signal synthesis network startup indication), and the communication peer enables the signal synthesis network.

[0136] In the embodiments of the present application, for the electronic device and the communication peer equipped with the signal synthesis network, the transmission power of their UWB pulse signals is higher; in the NLOS environment, the electronic device determines whether to notify the communication peer to enable the signal synthesis network based on the relationship between the power of the received UWB signal and the power threshold corresponding to the sensitivity; when the electronic device does not enable the signal synthesis network, it can have lower power consumption while ensuring the user's communication experience; after the electronic device enables the signal synthesis network, the power of the UWB signal is increased, which can ensure the user's UWB communication experience in the NLOS environment.

[0137] The embodiments of the present application improve the UWB communication process, judge the states between the electronic device and the communication peer, and set the conditions for enabling the signal synthesis network of the UWB electronic device, thereby improving the UWB communication experience of the electronic device in the case of increasing real-time distance and in the NLOS environment.

[0138] For the signal synthesis method provided by the embodiments of the present application, the execution subject may be a signal synthesis device. In the embodiments of the present application, taking the signal synthesis device executing the signal synthesis method as an example, the signal synthesis device provided by the embodiments of the present application is described.

[0139] Figure 10 is a schematic structural diagram of the signal synthesis device provided by the embodiments of the present application, as Figure 10 shown, the device 1000 includes: a synthesis module 1010; where:

[0140] The synthesis module 1010 is used to synthesize N adjacent pulses input by the signal input module into the signal synthesis network by adjusting the first single-pole single-throw switch, the second single-pole single-throw switch, and the single-pole double-throw switch in the signal synthesis network, to obtain a target synthesized signal, where N is a positive integer greater than 1.

[0141] The signal synthesis device provided by the embodiments of the present application can implement each process implemented by the above method embodiments and achieve the same technical effects. To avoid repetition, it will not be elaborated here.

[0142] In the embodiments of the present application, a signal synthesis network is installed in the electronic device. By controlling the cooperation of each switch in the signal synthesis network, it is possible to delay the pulse and perform self-synthesis with subsequent pulses, obtain a pulse with higher power and then send it, realizing signal power enhancement, improving the coverage range of pulse transmission, and enhancing communication quality.

[0143] Optionally, the synthesis module includes:

[0144] The first control unit is configured to control the first single-pole single-throw switch to close, the second single-pole single-throw switch to open, and the stationary terminal of the single-pole double-throw switch to be connected to the first moving terminal before the first pulse among the N adjacent pulses arrives at the first single-pole single-throw switch;

[0145] The second control unit is configured to control the second single-pole single-throw switch to close when the first pulse among the N adjacent pulses arrives at the delay line;

[0146] The third control unit is configured to control the stationary terminal of the single-pole double-throw switch to be connected to the second moving terminal when the second-to-last pulse among the N adjacent pulses arrives at the delay line;

[0147] The output unit is configured to output the target composite signal through the second moving terminal of the single-pole double-throw switch.

[0148] Optionally, the composite module is configured to: when the distance between the electronic device and the communication peer is greater than a distance threshold, synthesize the N adjacent pulses input by the signal input module into the signal synthesis network by adjusting the first single-pole single-throw switch, the second single-pole single-throw switch, and the single-pole double-throw switch in the signal synthesis network to obtain a target composite signal.

[0149] Optionally, the device further includes:

[0150] The control module is configured to control the first single-pole single-throw switch to close, the second single-pole single-throw switch to open, and the stationary terminal of the single-pole double-throw switch to be connected to the second moving terminal when the distance between the electronic device and the communication peer is less than or equal to the distance threshold.

[0151] Optionally, the composite module is configured to:

[0152] The receiving unit is configured to receive a signal synthesis network start instruction sent by the communication peer when a first condition is satisfied;

[0153] The starting unit is configured to, based on the signal synthesis network start instruction, synthesize the N adjacent pulses input by the signal input module into the signal synthesis network by adjusting the first single-pole single-throw switch, the second single-pole single-throw switch, and the single-pole double-throw switch in the signal synthesis network to obtain a target composite signal;

[0154] The first condition includes at least one of the following:

[0155] The power of the first signal is less than the power threshold corresponding to the receiving sensitivity of the communication peer;

[0156] The power of the first signal continuously decreases;

[0157] Wherein, the first signal power is the power of the signal received by the communication peer.

[0158] Optionally, the device further includes:

[0159] a receiving module, configured to receive a signal sent by a communication peer and determine a second signal power of the received signal;

[0160] a second sending module, configured to send a signal synthesis network startup instruction to the communication peer when a second condition is satisfied;

[0161] Wherein, the second condition includes at least one of the following:

[0162] the second signal power is less than the power threshold corresponding to the receiving sensitivity of the electronic device;

[0163] the second signal power continuously decreases.

[0164] In an embodiment of the present application, a signal synthesis network is installed in an electronic device. By controlling the cooperation of each switch in the signal synthesis network, it is possible to delay a pulse and perform self-synthesis with subsequent pulses, obtain a pulse with higher power and then send it, so as to enhance the signal power, improve the coverage range of pulse transmission, and improve the communication quality.

[0165] The signal synthesis device in the embodiment of the present application may be an electronic device or a component in an electronic device, such as an integrated circuit or a chip. The electronic device may be a terminal or other devices other than a terminal. Exemplarily, the electronic device may be a mobile phone, a tablet computer, a laptop computer, a handheld computer, a vehicle-mounted electronic device, a Mobile Internet Device (MID), an augmented reality (AR) / virtual reality (VR) device, a robot, a wearable device, an ultra-mobile personal computer (UMPC), a netbook, or a personal digital assistant (PDA), etc., and may also be a server, a Network Attached Storage (NAS), a personal computer (PC), a television (TV), a teller machine, or a self-service machine, etc. The embodiment of the present application does not make specific limitations.

[0166] The signal synthesis device in the embodiments of the present application can be a device with an operating system. The operating system can be the Android operating system, the iOS operating system, or other possible operating systems, which are not specifically limited in the embodiments of the present application.

[0167] The signal synthesis device provided by the embodiments of the present application can implement Figures 1 to 9 each process implemented by the method embodiments. To avoid repetition, it will not be elaborated here.

[0168] Optionally, Figure 11 is the third schematic structural diagram of the electronic device provided by the embodiments of the present application. As Figure 11 shown, the embodiments of the present application also provide an electronic device 1100, including a processor 1101 and a memory 1102. A program or instruction that can run on the processor 1101 is stored on the memory 1102. When the program or instruction is executed by the processor 1101, it implements each step of the above signal synthesis method embodiment and can achieve the same technical effect. To avoid repetition, it will not be elaborated here.

[0169] It should be noted that the electronic devices in the embodiments of the present application include the above-mentioned mobile electronic devices and non-mobile electronic devices.

[0170] Figure 12 It is a schematic diagram of the hardware structure of an electronic device for implementing the embodiments of the present application.

[0171] The electronic device 1200 includes but is not limited to: a radio frequency unit 1201, a network module 1202, an audio output unit 1203, an input unit 1204, a sensor 1205, a display unit 1206, a user input unit 1207, an interface unit 1208, a memory 1209, and a processor 1210, etc.

[0172] Those skilled in the art can understand that the electronic device 1200 may further include a power supply (such as a battery) for supplying power to each component. The power supply can be logically connected to the processor 1210 through a power management system, so as to realize functions such as management of charging, discharging, and power consumption management through the power management system. Figure 12 The structural diagram of the electronic device shown in

[0173] does not constitute a limitation to the electronic device. The electronic device may include more or fewer components than shown in the figure, or combine some components, or have different component arrangements, which will not be elaborated here.

[0174] By adjusting the first single-pole single-throw switch, the second single-pole single-throw switch, and the single-pole double-throw switch in the signal synthesis network, N adjacent pulses input by the signal input module to the signal synthesis network are synthesized to obtain a target synthesized signal, where N is a positive integer greater than 1.

[0175] Optionally, the processor 1210 is configured to:

[0176] Before the first pulse among the N adjacent pulses arrives at the first single-pole single-throw switch, control the first single-pole single-throw switch to be closed, the second single-pole single-throw switch to be open, and the stationary terminal of the single-pole double-throw switch to be connected to the first moving terminal;

[0177] When the first pulse among the N adjacent pulses arrives at the delay line, control the second single-pole single-throw switch to be closed;

[0178] When the second-to-last pulse among the N adjacent pulses arrives at the delay line, control the stationary terminal of the single-pole double-throw switch to be connected to the second moving terminal;

[0179] Output the target synthesized signal through the second moving terminal of the single-pole double-throw switch.

[0180] Optionally, the processor 1210 is configured to:

[0181] When the distance between the electronic device and the communication peer is greater than the distance threshold, by adjusting the first single-pole single-throw switch, the second single-pole single-throw switch, and the single-pole double-throw switch in the signal synthesis network, N adjacent pulses input by the signal input module to the signal synthesis network are synthesized to obtain a target synthesized signal.

[0182] Optionally, the processor 1210 is configured to:

[0183] When the distance between the electronic device and the communication peer is less than or equal to the distance threshold, control the first single-pole single-throw switch to be closed, the second single-pole single-throw switch to be open, and the stationary terminal of the single-pole double-throw switch to be connected to the second moving terminal.

[0184] Optionally, the radio frequency unit 1201 is configured to:

[0185] Receive a signal synthesis network start indication sent by the communication peer when the first condition is satisfied;

[0186] The processor 1210 is configured to:

[0187] Based on the signal synthesis network start indication, by adjusting the first single-pole single-throw switch, the second single-pole single-throw switch, and the single-pole double-throw switch in the signal synthesis network, N adjacent pulses input by the signal input module to the signal synthesis network are synthesized to obtain a target synthesized signal;

[0188] The first condition includes at least one of the following:

[0189] The power of the first signal is less than the power threshold corresponding to the receiving sensitivity of the communication peer;

[0190] The power of the first signal continuously decreases;

[0191] Wherein, the power of the first signal is the power of the signal received by the communication peer.

[0192] Optionally, the radio frequency unit 1201 is configured to:

[0193] Receive the signal sent by the communication peer and determine the second signal power of the received signal;

[0194] The radio frequency unit 1201 is configured to:

[0195] Send a signal synthesis network startup instruction to the communication peer when the second condition is satisfied;

[0196] Wherein, the second condition includes at least one of the following:

[0197] The power of the second signal is less than the power threshold corresponding to the receiving sensitivity of the electronic device;

[0198] The power of the second signal continuously decreases.

[0199] In the embodiments of the present application, a signal synthesis network is installed in the electronic device. By controlling the cooperation of each switch in the signal synthesis network, it is possible to delay the pulse and perform self-synthesis with subsequent pulses, obtain a pulse with higher power and then send it, so as to enhance the signal power, improve the coverage range of pulse transmission, and improve the communication quality.

[0200] It should be understood that in the embodiments of the present application, the input unit 1204 may include a Graphics Processing Unit (GPU) 12041 and a microphone 12042. The graphics processor 12041 processes the image data of static pictures or videos obtained by an image capture device (such as a camera) in a video capture mode or an image capture mode. The display unit 1206 may include a display panel 12061, and the display panel 12061 may be configured in the form of, for example, a liquid crystal display, an organic light emitting diode, etc. The user input unit 1207 includes at least one of a touch panel 12071 and other input devices 12072. The touch panel 12071 is also referred to as a touch screen. The touch panel 12071 may include two parts: a touch detection device and a touch controller. The other input devices 12072 may include, but are not limited to, a physical keyboard, function keys (such as volume control keys, switch keys, etc.), a trackball, a mouse, and a joystick, which will not be elaborated here.

[0201] The memory 1209 can be used to store software programs and various data. The memory 1209 may mainly include a first storage area for storing programs or instructions and a second storage area for storing data. Among them, the first storage area may store an operating system, application programs or instructions required for at least one function (such as a sound playback function, an image playback function, etc.). In addition, the memory 1209 may include a volatile memory or a non-volatile memory, or the memory 1209 may include both a volatile and a non-volatile memory. Among them, the non-volatile memory may be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The volatile memory may be a random access memory (RAM), a static random access memory (SRAM), a dynamic random access memory (DRAM), a synchronous dynamic random access memory (SDRAM), a double data rate synchronous dynamic random access memory (DDR SDRAM), an enhanced synchronous dynamic random access memory (ESDRAM), a synch link dynamic random access memory (SLDRAM), and a direct rambus random access memory (DRRAM). The memory 1209 in the embodiments of the present application includes but is not limited to these and any other suitable types of memories.

[0202] The processor 1210 may include one or more processing units; optionally, the processor 1210 integrates an application processor and a modem processor. Among them, the application processor mainly processes operations related to the operating system, user interface, and application programs, etc., and the modem processor mainly processes wireless communication signals, such as a baseband processor. It can be understood that the above modem processor may not be integrated into the processor 1210 either.

[0203] The embodiments of the present application further provide a readable storage medium, on which a program or instruction is stored. When the program or instruction is executed by a processor, it implements each process of the signal synthesis method embodiment described above and can achieve the same technical effect. To avoid repetition, it will not be elaborated here.

[0204] Among them, the processor is the processor in the electronic device described in the above embodiments. The readable storage medium includes computer-readable storage media such as computer read-only memory ROM, random access memory RAM, magnetic disks, or optical discs, etc.

[0205] Another embodiment of the present application provides a chip, which includes a processor and a communication interface. The communication interface is coupled to the processor. The processor is used to run programs or instructions to implement each process of the signal synthesis method embodiment described above, and can achieve the same technical effects. To avoid repetition, it will not be elaborated here.

[0206] It should be understood that the chip mentioned in the embodiments of the present application may also be referred to as a system-on-chip, system chip, chip system, or system-on-chip, etc.

[0207] The embodiments of the present application provide a computer program product. The program product is stored in a storage medium and is executed by at least one processor to implement each process of the signal synthesis method embodiment described above, and can achieve the same technical effects. To avoid repetition, it will not be elaborated here.

[0208] It should be noted that in this article, the term "including", "comprising", or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, method, article, or device including a series of elements not only includes those elements, but also includes other elements not explicitly listed, or further includes elements inherent to such process, method, article, or device. Without further limitations, an element defined by the statement "including a..." does not exclude the existence of additional identical elements in the process, method, article, or device including that element. In addition, it should be pointed out that the scope of the methods and devices in the embodiments of the present application is not limited to performing functions in the order shown or discussed. It may also include performing functions in a substantially simultaneous manner or in a reverse order according to the functions involved. For example, the described methods may be performed in an order different from that described, and various steps may be added, omitted, or combined. Additionally, the features described with reference to certain examples may be combined in other examples.

[0209] Through the description of the above embodiments, those skilled in the art can clearly understand that the methods of the above embodiments can be implemented by means of software plus a necessary general hardware platform. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation. Based on such an understanding, the technical solution of the present application, in essence or the part that contributes to the prior art, can be embodied in the form of a computer software product. The computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk) and includes several instructions for causing a terminal (which can be a mobile phone, computer, server, or network device, etc.) to execute the methods described in various embodiments of the present application.

[0210] The embodiments of the present application have been described above in conjunction with the accompanying drawings. However, the present application is not limited to the above specific implementation manners. The above specific implementation manners are merely illustrative rather than restrictive. Under the inspiration of the present application, those of ordinary skill in the art can also make many forms without departing from the purpose of the present application and the scope protected by the claims, and all of them belong to the protection scope of the present application.

Claims

1. An electronic device, characterized in that, It includes a signal input module and a signal synthesis network. The signal input module is used to input signals to the signal synthesis network. The signal synthesis network includes a first single-pole single-throw switch, a second single-pole single-throw switch, a delay line, and a single-pole double-throw switch. The first end of the first single-pole single-throw switch is connected to the signal input module, the second end of the first single-pole single-throw switch is connected to the stationary terminal of the single-pole double-throw switch, a connection point is provided between the first single-pole single-throw switch and the single-pole double-throw switch, the first moving terminal of the single-pole double-throw switch is connected to the connection point through the second single-pole single-throw switch, the second moving terminal of the single-pole double-throw switch is used to output signals, and the delay line is connected between the first moving terminal of the single-pole double-throw switch and the second end of the second single-pole single-throw switch. Before the first pulse among N adjacent pulses arrives at the first single-pole single-throw switch, control the first single-pole single-throw switch to close, the second single-pole single-throw switch to open, and the stationary terminal of the single-pole double-throw switch to be connected to the first moving terminal. When the first pulse among the N adjacent pulses arrives at the delay line, control the second single-pole single-throw switch to close. Among the N adjacent pulses, the Nth pulse is synthesized with the synthesized signal of the previous N - 1 pulses. When the penultimate pulse among the N adjacent pulses arrives at the delay line, control the stationary terminal of the single-pole double-throw switch to be connected to the second moving terminal. Output the target synthesized signal through the second moving terminal of the single-pole double-throw switch. The target synthesized signal is a signal synthesized by N in-phase pulses.

2. A signal synthesis method, characterized in that, Applied to the electronic device provided in claim 1, the method includes: By adjusting the first single-pole single-throw switch, the second single-pole single-throw switch, and the single-pole double-throw switch in the signal synthesis network, synthesize N adjacent pulses input from the signal input module to the signal synthesis network to obtain a target synthesized signal, where N is a positive integer greater than 1. The step of synthesizing N adjacent pulses input from the signal input module to the signal synthesis network by adjusting the first single-pole single-throw switch, the second single-pole single-throw switch, and the single-pole double-throw switch in the signal synthesis network to obtain a target synthesized signal includes: Before the first pulse among the N adjacent pulses arrives at the first single-pole single-throw switch, control the first single-pole single-throw switch to close, the second single-pole single-throw switch to open, and the stationary terminal of the single-pole double-throw switch to be connected to the first moving terminal. When the first pulse among the N adjacent pulses arrives at the delay line, control the second single-pole single-throw switch to close. Among the N adjacent pulses, the Nth pulse is synthesized with the synthesized signal of the previous N - 1 pulses. When the penultimate pulse among the N adjacent pulses arrives at the delay line, control the stationary terminal of the single-pole double-throw switch to be connected to the second moving terminal. Output the target synthesized signal through the second moving terminal of the single-pole double-throw switch. The target synthesized signal is a signal synthesized by N in-phase pulses.

3. The signal synthesis method according to claim 2, wherein Synthesizing the N adjacent pulses input by the signal input module into the signal synthesis network by adjusting the first single-pole single-throw switch, the second single-pole single-throw switch, and the single-pole double-throw switch in the signal synthesis network to obtain a target synthesized signal, including: When the distance between the electronic device and the communication peer is greater than the distance threshold, synthesizing the N adjacent pulses input by the signal input module into the signal synthesis network by adjusting the first single-pole single-throw switch, the second single-pole single-throw switch, and the single-pole double-throw switch in the signal synthesis network to obtain a target synthesized signal.

4. The signal synthesis method according to claim 2, wherein The method further includes: When the distance between the electronic device and the communication peer is less than or equal to the distance threshold, controlling the first single-pole single-throw switch to close, the second single-pole single-throw switch to open, and the fixed end of the single-pole double-throw switch to be connected to the second moving end.

5. The signal synthesis method according to claim 2, wherein Synthesizing the N adjacent pulses input by the signal input module into the signal synthesis network by adjusting the first single-pole single-throw switch, the second single-pole single-throw switch, and the single-pole double-throw switch in the signal synthesis network to obtain a target synthesized signal, including: Receiving a signal synthesis network start indication sent by the communication peer when a first condition is satisfied; Based on the signal synthesis network start indication, synthesizing the N adjacent pulses input by the signal input module into the signal synthesis network by adjusting the first single-pole single-throw switch, the second single-pole single-throw switch, and the single-pole double-throw switch in the signal synthesis network to obtain a target synthesized signal; The first condition includes at least one of the following: The first signal power is less than the power threshold corresponding to the receiving sensitivity of the communication peer; The first signal power continuously decreases; Wherein, the first signal power is the power of the signal received by the communication peer.

6. The signal synthesis method according to claim 2, wherein The method further includes: Receiving a signal sent by the communication peer and determining the second signal power of the received signal; Sending a signal synthesis network start indication to the communication peer when a second condition is satisfied; Wherein, the second condition includes at least one of the following: The second signal power is less than the power threshold corresponding to the receiving sensitivity of the electronic device; The second signal power continuously decreases.

7. A signal synthesis device, characterized in that, The device includes: A synthesis module, configured to synthesize the N adjacent pulses input by the signal input module into the signal synthesis network by adjusting the first single-pole single-throw switch, the second single-pole single-throw switch, and the single-pole double-throw switch in the signal synthesis network to obtain a target synthesized signal, where N is a positive integer greater than 1; A synthesis module, configured to control the first single-pole single-throw switch to be closed, the second single-pole single-throw switch to be opened, and the fixed terminal of the single-pole double-throw switch to be connected to the first moving terminal before the first pulse among the N adjacent pulses arrives at the first single-pole single-throw switch; to control the second single-pole single-throw switch to be closed when the first pulse among the N adjacent pulses arrives at the delay line; to synthesize the Nth pulse among the N adjacent pulses with the composite signal of the previous N - 1 pulses; to control the fixed terminal of the single-pole double-throw switch to be connected to the second moving terminal when the penultimate pulse among the N adjacent pulses arrives at the delay line; and to output the target composite signal through the second moving terminal of the single-pole double-throw switch, where the target composite signal is a signal synthesized by N in-phase pulses.

8. An electronic device, characterized in that, It includes a processor, a memory, and a program or instruction stored on the memory and executable on the processor. When the program or instruction is executed by the processor, it implements the steps of the signal synthesis method according to any one of claims 2 - 6.

9. A readable storage medium, characterized in that, A program or instruction is stored on the readable storage medium. When the program or instruction is executed by a processor, it implements the steps of the signal synthesis method according to any one of claims 2 - 6.

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