Display substrate and related device

Abstract

The present disclosure provides a display substrate and related device, which belong to the technical field of display. The display substrate comprises a plurality of first sub-pixels, a plurality of second sub-pixels and a plurality of third sub-pixels. In a first direction, the first sub-pixels and the third sub-pixels are alternately arranged to form a plurality of first sub-pixel rows, and the second sub-pixels form a plurality of second sub-pixel rows. The first sub-pixel rows and the second sub-pixel rows are alternately arranged in a second direction. The center connecting line of two first sub-pixels and two third sub-pixels distributed in two rows and two columns is a first virtual quadrilateral. The two first sub-pixels are located at two opposite top corners of the first virtual quadrilateral, and the second sub-pixel is located in the first virtual quadrilateral. The center connecting line of two second sub-pixels, one first sub-pixel and one third sub-pixel distributed in three rows and three columns is a virtual parallelogram. The technical scheme of the present disclosure can reduce the color mixing risk of the display substrate.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to the technical field of display, and in particular, to a display substrate and a display device. BACKGROUND

[0002] Organic Light Emitting Diode (OLED) display devices are one of the hotspots in the field of flat panel display research at present. Compared with liquid crystal displays, OLED display devices have the advantages of low energy consumption, low production cost, self-luminescence, wide viewing angle, and fast response speed, and have begun to replace traditional liquid crystal displays (LCDs) in the field of flat panel display.

[0003] The structure of an OLED display device mainly includes a substrate and pixels arranged in a matrix on the substrate. Each pixel is generally formed by using an organic material to form an organic electroluminescent structure on the corresponding pixel position on the array substrate through a high-precision metal mask and an evaporation film forming technology.

[0004] However, the current high-precision metal mask has the problems of difficulty in tensioning and uneven stress, which easily causes color mixing risk. SUMMARY

[0005] The technical problem to be solved by the present disclosure is to provide a display substrate and a display device, which can reduce the color mixing risk of the display substrate.

[0006] To solve the above technical problems, the embodiments of the present disclosure provide the technical solutions as follows:

[0007] In one aspect, a display substrate is provided, which includes a plurality of first sub-pixels, a plurality of second sub-pixels, and a plurality of third sub-pixels,

[0008] In the first direction, the first sub-pixels and the third sub-pixels are alternately arranged to form a plurality of first sub-pixel rows, and the second sub-pixels form a plurality of second sub-pixel rows. The first sub-pixel rows and the second sub-pixel rows are alternately arranged in the second direction. The center connecting line of two first sub-pixels and two third sub-pixels in adjacent two rows and two columns is a first virtual quadrilateral. The two first sub-pixels are located at two opposite corners of the first virtual quadrilateral, and the two third sub-pixels are located at the other two opposite corners of the first virtual quadrilateral. The second sub-pixel is located in the first virtual quadrilateral.

[0009] A center line of two second sub-pixels, one first sub-pixel and one third sub-pixel distributed in three adjacent rows and three adjacent columns is a virtual parallelogram, in the virtual parallelogram, the second sub-pixel A and the second sub-pixel B are located at two opposite vertices, the first sub-pixel and the third sub-pixel are located at two opposite vertices, a center line of the second sub-pixel A and the third sub-pixel is located on a first straight line, a distance between a normal projection point of the center of the first sub-pixel on the first straight line and the center of the second sub-pixel A is x, and a range of a value of an internal angle of the virtual parallelogram less than 90° is (h-10°, h+10°), and h is calculated according to the following formula:

[0010]

[0011] wherein P is half of a distance between centers of two most adjacent odd-numbered or even-numbered second sub-pixels in the row of second sub-pixels.

[0012] In some embodiments, the value of x is in a range of 3-5 um.

[0013] In some embodiments, the internal angle is greater than or equal to 70° and less than 90°.

[0014] In some embodiments,

[0015] A center line of adjacent first sub-pixels and third sub-pixels in the first direction and the first direction form an included angle d, a center line of adjacent first sub-pixels and third sub-pixels in the second direction and the second direction form an included angle e, the included angle d is greater than 0° and less than 30°, and the included angle e is greater than 0° and less than 30°.

[0016] In some embodiments, the first direction and the second direction are substantially perpendicular, the first direction is one of a row direction and a column direction, and the second direction is the other of the row direction and the column direction.

[0017] In some embodiments, four first virtual quadrilaterals arranged in two columns and two rows form a second virtual polygon in a manner of sharing edges, the second virtual polygon includes four second sub-pixels, five first sub-pixels and four third sub-pixels.

[0018] The four second sub-pixels are respectively located in the four first virtual quadrilaterals, one first sub-pixel is surrounded by the four second sub-pixels, and the other four first sub-pixels and the four third sub-pixels are respectively located at edges or vertices of the second virtual polygon and are alternately distributed along the edges or the vertices of the second virtual polygon in a clockwise and anticlockwise order.

[0019] The connecting line of the centers of the four first sub-pixels located at the edge or vertex position of the second virtual polygon is approximately a virtual parallelogram, and / or the connecting line of the centers of the four third sub-pixels located at the edge or vertex position of the second virtual polygon is approximately a virtual parallelogram.

[0020] In some embodiments, the connecting line of the centers of at least part of the first sub-pixels is approximately located on a third straight line, the connecting line of the centers of at least part of the third sub-pixels is approximately located on a fourth straight line, and the third straight line is approximately parallel to the fourth straight line.

[0021] In some embodiments, the third straight line and the fourth straight line do not coincide and are both approximately parallel to the first direction; or

[0022] The third straight line and the fourth straight line do not coincide and are both approximately parallel to the second direction.

[0023] In some embodiments, the connecting line of the centers of at least part of the second sub-pixels located in the same second pixel row is approximately located on a fifth straight line, and the fifth straight line is approximately parallel to the third straight line and the fourth straight line.

[0024] In some embodiments, there is an included angle f between the connecting line of the centers of adjacent second sub-pixels in the first direction and the first direction, and there is an included angle g between the connecting line of the centers of adjacent second sub-pixels in the second direction and the second direction, the included angle f is greater than 0° and less than 30°, and the included angle g is greater than 0° and less than 30°.

[0025] In some embodiments, there are four third sub-pixels adjacent to the first sub-pixel, and the distance from the center of the four third sub-pixels to the center of the first sub-pixel is not equal in at least two cases.

[0026] There are four first sub-pixels adjacent to the third sub-pixel, and the distance from the center of the four first sub-pixels to the center of the third sub-pixel is not equal in at least two cases.

[0027] In some embodiments, the display substrate comprises a plurality of pixel repeating units, one pixel repeating unit comprises two first sub-pixels and two third sub-pixels located in the same first virtual quadrilateral, and further comprises four second sub-pixels located in the same second virtual polygon and surrounding one of the two first sub-pixels.

[0028] In some embodiments, the shape of the second sub-pixel is an octagon.

[0029] In some embodiments,

[0030] The areas of the plurality of first sub-pixels are the same, and / or the areas of the plurality of third sub-pixels are the same, and / or the areas of the plurality of second sub-pixels are the same.

[0031] In some embodiments,

[0032] An area of one of the first sub-pixels is S, an area of one of the second sub-pixels is f*S, and an area of one of the third sub-pixels is g*S, wherein 0.5≤f≤0.8 and 1≤g≤2.2.

[0033] In some embodiments,

[0034] The shapes of the first sub-pixels are substantially identical; and / or

[0035] The shapes of the third sub-pixels are substantially identical; and / or

[0036] The shapes of the second sub-pixels are substantially identical.

[0037] In some embodiments, the shapes of the first sub-pixels and the third sub-pixels comprise any one of a polygon, a circle, or an ellipse.

[0038] In some embodiments, the shapes of the first sub-pixels and the third sub-pixels are selected from any one of a quadrilateral, a hexagon, an octagon, a quadrilateral with rounded corners, a hexagon with rounded corners, or an octagon with rounded corners, a circle, or an ellipse.

[0039] In some embodiments, the first sub-pixel is a red sub-pixel, the third sub-pixel is a blue sub-pixel, and the second sub-pixel is a green sub-pixel; or, the first sub-pixel is a blue sub-pixel, the third sub-pixel is a red sub-pixel, and the second sub-pixel is a green sub-pixel; or, the first sub-pixel is a green sub-pixel, the third sub-pixel is a red sub-pixel, and the second sub-pixel is a blue sub-pixel; or, the first sub-pixel is a green sub-pixel, the third sub-pixel is a blue sub-pixel, and the second sub-pixel is a red sub-pixel.

[0040] The display substrate as described above is also provided.

[0041] In some embodiments, a pixel definition layer is further included, the pixel definition layer comprises a plurality of pixel definition layer openings, the first sub-pixel, the second sub-pixel, and the third sub-pixel each correspond to one pixel definition layer opening, respectively, and the shapes of the first sub-pixel, the second sub-pixel, and the third sub-pixel are substantially identical to the shapes of the openings of the pixel definition layer corresponding thereto.

[0042] In some embodiments, the first sub-pixel comprises a multi-layer film layer, and the multi-layer film layer of the first sub-pixel at least partially covers the area outside the pixel defining layer opening; and / or, the second sub-pixel comprises a multi-layer film layer, and the multi-layer film layer of the second sub-pixel at least partially covers the area outside the pixel defining layer opening; and / or, the third sub-pixel comprises a multi-layer film layer, and the multi-layer film layer of the third sub-pixel at least partially covers the area outside the pixel defining layer opening.

[0043] In some embodiments, the pixel defining layer openings are different at least in part in shape or area.

[0044] In some embodiments, the pixel defining layer openings comprise second pixel defining layer openings corresponding to the second sub-pixels, and a distance between boundaries of at least some adjacent second pixel defining layer openings is greater than a preset threshold.

[0045] In some embodiments, further comprising: a spacer adjacent to two second sub-pixels, one first sub-pixel and one third sub-pixel, and a minimum distance between boundaries of the first sub-pixel and the third sub-pixel is greater than a minimum distance between boundaries of at least some adjacent first sub-pixels and third sub-pixels. BRIEF DESCRIPTION OF DRAWINGS

[0046] Figure 1 A schematic diagram of a cross-sectional structure of a display substrate according to an embodiment of the present disclosure;

[0047] Figure 2 、 Figure 3 、 Figure 6 A schematic diagram of a display substrate according to related art;

[0048] Figure 4 A schematic diagram of an opening of a high-precision metal mask plate according to related art;

[0049] Figure 5 、 Figure 7 、 Figure 8 and Figure 9 A schematic diagram of a display substrate according to an embodiment of the present disclosure;

[0050] Figure 10 A schematic diagram of a process of evaporation using a high-precision metal mask plate according to an embodiment of the present disclosure;

[0051] Figure 11 A schematic diagram of a display substrate according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0052] In order to make the technical problems to be solved, technical solutions and advantages of embodiments of the present disclosure clearer, specific embodiments will be described in detail below with reference to the accompanying drawings.

[0053] The display substrate and the display device can reduce the color mixing risk of the display substrate.

[0054] The display substrate includes a plurality of first sub-pixels, a plurality of second sub-pixels, and a plurality of third sub-pixels.

[0055] In the first direction, the first sub-pixels and the third sub-pixels are alternately arranged to form a plurality of first sub-pixel rows, and the second sub-pixels form a plurality of second sub-pixel rows. The first sub-pixel rows and the second sub-pixel rows are alternately arranged in the second direction. A center line of two first sub-pixels and two third sub-pixels distributed in two rows and two columns adjacent to each other is a first virtual quadrilateral. The two first sub-pixels are located at two opposite corners of the first virtual quadrilateral, and the two third sub-pixels are located at the other two opposite corners of the first virtual quadrilateral. The second sub-pixel is located in the first virtual quadrilateral.

[0056] A center line of two second sub-pixels, one first sub-pixel, and one third sub-pixel distributed in three rows and three columns adjacent to each other is a virtual parallelogram. In the virtual parallelogram, the second sub-pixel A and the second sub-pixel B are located at two opposite corners, and the first sub-pixel and the third sub-pixel are located at the other two opposite corners. A center line of the second sub-pixel A and the third sub-pixel is located on a first straight line. A distance between a center of the first sub-pixel and a projection point of the center of the first sub-pixel on the first straight line is x. A range of an internal angle smaller than 90° of the virtual parallelogram is (h-10°, h+10°), and h is calculated according to the following formula:

[0057]

[0058] P is half of a distance between centers of two second sub-pixels adjacent to each other in a second sub-pixel row.

[0059] P can also be a distance between two second sub-pixels whose centers are located on a straight line parallel to the row direction or the column direction, divided by k. K is a number of second sub-pixels between the two second sub-pixels in the same row or the same column plus 1.

[0060] P can be in a range of 60-100 um, and x can be in a range of 3-5 um.

[0061] The above formula is a substantially equal relationship, that is, the internal angle can have a certain deviation, for example, can be 10° up and down based on the calculation result h, or can be 5° up and down based on the calculation result h.

[0062] P can be the approximate distance between the centers of two adjacent second sub-pixels. The second sub-pixels in the second sub-pixel row can be uniformly distributed, that is, the distance between every two adjacent second sub-pixels is approximately equal, or can have a certain deviation, for example, the difference is less than 5 microns. Here, P can also be the average distance between the intervals of adjacent second sub-pixels in the same sub-pixel row. In addition, P is also approximately equal to the distance between the center of the first sub-pixel and the center of the adjacent third sub-pixel in the same row, for example, the difference is less than 5 microns. Alternatively, P is half the distance between the centers of two adjacent first sub-pixels in the same sub-pixel row; or alternatively, P is half the distance between the centers of two adjacent third sub-pixels in the same sub-pixel row.

[0063] In the above scheme, the display substrate provided by the embodiments of the present disclosure can increase the interval between the first sub-pixel and the third sub-pixel under the same process condition compared with the existing display substrate, and the second sub-pixels are staggered, so that the distance between the openings of the fine metal mask used to manufacture the first sub-pixel, the second sub-pixel and the third sub-pixel is increased under the same aperture ratio, the manufacturing margin of the fine metal mask is improved, and the risk of color mixing is reduced. In addition, by staggering the arrangement of the first sub-pixel, the second sub-pixel and the third sub-pixel, the distribution of the brightness center can be more uniform, and the display effect of the display device is improved.

[0064] In some embodiments, a first sub-pixel includes a first effective light-emitting region, a second sub-pixel includes a second effective light-emitting region, and a third sub-pixel includes a third effective light-emitting region. The area of the second effective light-emitting region is less than the area of the first effective light-emitting region, and the area of the third effective light-emitting region is greater than the area of the first effective light-emitting region. On the display substrate, the total area of all the third effective light-emitting regions included in the third sub-pixels is greater than the total area of all the second effective light-emitting regions included in the second sub-pixels, and the total area of all the first effective light-emitting regions included in the first sub-pixels is less than the total area of all the second effective light-emitting regions included in the second sub-pixels. In some embodiments, each of the first effective light-emitting regions, the second effective light-emitting regions, and the third effective light-emitting regions is separated. In some embodiments, each of the first effective light-emitting regions, the second effective light-emitting regions, and the third effective light-emitting regions is defined by a plurality of separated openings formed in a pixel defining layer. In some embodiments, each of the first effective light-emitting regions is defined by a light-emitting layer in the corresponding first sub-pixel, which is located between a pair of opposite anode and cathode electrodes in a direction perpendicular to the substrate, and is driven to emit light. In some embodiments, each of the second effective light-emitting regions is defined by a light-emitting layer in the corresponding second sub-pixel, which is located between a pair of opposite anode and cathode electrodes in a direction perpendicular to the substrate, and is driven to emit light. In some embodiments, each of the third effective light-emitting regions is defined by a light-emitting layer in the corresponding third sub-pixel, which is located between a pair of opposite anode and cathode electrodes in a direction perpendicular to the substrate, and is driven to emit light. In some embodiments, each of the first effective light-emitting regions, the second effective light-emitting regions, and the third effective light-emitting regions is defined by a corresponding light-emitting layer and an electrode (anode or cathode) or a portion of an electrode that has carrier (hole or electron) transport with the corresponding light-emitting layer. In some embodiments, each of the first effective light-emitting regions, the second effective light-emitting regions, and the third effective light-emitting regions is defined by at least a portion of a cathode electrode and at least a portion of an anode electrode that are overlapped by a normal projection of the light-emitting layer on the substrate, and the at least a portion of the cathode electrode and the at least a portion of the anode electrode are not overlapped by a normal projection of a first insulating layer on the substrate, the first insulating layer is located between the cathode electrode and the anode electrode in a direction perpendicular to the substrate. For example, the first insulating layer includes a pixel defining layer. In some embodiments, each of the first sub-pixel, the second sub-pixel, and the third sub-pixel includes a first electrode, a light-emitting layer located on a side of the first electrode away from the substrate, and a second electrode located on a side of the light-emitting layer away from the first electrode, a second insulating layer is further provided between the first electrode and the light-emitting layer and / or between the second electrode and the light-emitting layer in a direction perpendicular to the substrate, the second insulating layer is overlapped by a projection of the first electrode or the second electrode on the substrate, and the second insulating layer has an opening that can expose at least a portion of the first electrode or the second electrode on a side facing the light-emitting layer, so that the first electrode or the second electrode can contact the light-emitting layer or a functional layer for assisting light emission, and each of the first effective light-emitting regions, the second effective light-emitting regions, and the third effective light-emitting regions is defined by a portion of the first electrode or the second electrode that contacts the light-emitting layer or the functional layer for assisting light emission.In some embodiments, the second insulating layer comprises a pixel defining layer. In some embodiments, the functional layer for assisting light emission can be any one or more of a hole injection layer, a hole transport layer, an electron transport layer, a hole blocking layer, an electron blocking layer, an electron injection layer, an auxiliary light emitting layer, an interface improvement layer, a transmittance enhancement layer, etc. In some embodiments, the first electrode can be an anode, and the second electrode can be a cathode. In some embodiments, the first electrode can comprise indium tin oxide (ITO), at least two layers of silver (Ag), such as a three-layer stack of ITO, Ag, and ITO. In some embodiments, the second electrode can comprise any one or more of magnesium (Mg), Ag, ITO, and indium zinc oxide (IZO), such as a mixed layer or an alloy layer of Mg and Ag.

[0065] Each sub-pixel comprises a light emitting layer, each first sub-pixel comprises a first color light emitting layer located in the opening and on the pixel defining layer, each second sub-pixel comprises a second color light emitting layer located in the opening and on the pixel defining layer, and each third sub-pixel comprises a third color light emitting layer located in the opening and on the pixel defining layer.

[0066] In some example embodiments, the preparation process of the display substrate of the present embodiment can comprise the following steps (1) to (9). In the present example embodiment, the flexible display substrate with a top emission structure is taken as an example for illustration. Figure 1

[0067] (1) A substrate is prepared on a glass carrier plate.

[0068] ​In some example embodiments, the substrate 10 can be a flexible substrate, for example, comprising a first flexible material layer, a first inorganic material layer, a semiconductor layer, a second flexible material layer and a second inorganic material layer stacked on the glass carrier 1. The material of the first flexible material layer and the second flexible material layer can be polyimide (PI), polyethylene terephthalate (PET) or a surface-treated polymer soft film, etc. The material of the first inorganic material layer and the second inorganic material layer can be silicon nitride (SiNx) or silicon oxide (SiOx), etc., for improving the water and oxygen resistance of the substrate, and the first inorganic material layer and the second inorganic material layer are also called barrier layers. The material of the semiconductor layer can be amorphous silicon (a-si). In some example embodiments, taking the stacked structure of PI1 / Barrier1 / a-si / PI2 / Barrier2 as an example, the preparation process includes: first coating a layer of polyimide on the glass carrier 1, and forming the first flexible (PI1) layer after curing into a film; then depositing a layer of barrier film on the first flexible layer to form the first barrier (Barrier1) layer covering the first flexible layer; then depositing a layer of amorphous silicon film on the first barrier layer to form the amorphous silicon (a-si) layer covering the first barrier layer; then coating a layer of polyimide on the amorphous silicon layer, and forming the second flexible (PI2) layer after curing into a film; then depositing a layer of barrier film on the second flexible layer to form the second barrier (Barrier2) layer covering the second flexible layer, and completing the preparation of the substrate 10.

[0069] (2) Preparing a driving structure layer on the substrate. The driving structure layer comprises a plurality of driving circuits, each of which comprises a plurality of transistors and at least one storage capacitor, for example, a 2T1C, 3T1C or 7T1C design.

[0070] In some example embodiments, the preparation process of the driving structure layer can be referred to the following description. Taking the preparation process of the driving circuit of the first sub-pixel 21 as an example for description.

[0071] The first insulating film and the active layer film are sequentially deposited on the substrate 10, the active layer film is patterned by a patterning process, and the first insulating layer 11 covering the entire substrate 10 and the active layer pattern arranged on the first insulating layer 11 are formed. The active layer pattern at least comprises the first active layer.

[0072] Subsequently, the second insulating film and the first metal film are sequentially deposited, the first metal film is patterned by a patterning process, the second insulating layer 12 covering the active layer pattern and the first gate metal layer pattern arranged on the second insulating layer 12 are formed. The first gate metal layer pattern at least comprises the first gate electrode and the first capacitor electrode.

[0073] Subsequently, a third insulating thin film and a second metal thin film are deposited in sequence, the second metal thin film is patterned by a patterning process, a third insulating layer 13 covering the first gate metal layer and a second gate metal layer pattern arranged on the third insulating layer 13 are formed, and the second gate metal layer pattern at least includes a second capacitor electrode, the position of the second capacitor electrode corresponding to the position of the first capacitor electrode.

[0074] Subsequently, a fourth insulating thin film is deposited, the fourth insulating thin film is patterned by a patterning process, a fourth insulating layer 14 pattern covering the second gate metal layer is formed, and at least two first vias are formed on the fourth insulating layer 14, the fourth insulating layer 14, the third insulating layer 13 and the second insulating layer 12 in the two first vias are etched to expose the surface of the first active layer.

[0075] Subsequently, a third metal thin film is deposited, the third metal thin film is patterned by a patterning process, a source-drain metal layer pattern is formed on the fourth insulating layer 14, and the source-drain metal layer at least includes a first source electrode and a first drain electrode in the display area. The first source electrode and the first drain electrode can be connected to the first active layer through the first via, respectively.

[0076] In the driving circuit of the first sub-pixel 21 in the display area, the first active layer, the first gate electrode, the first source electrode and the first drain electrode can form a first transistor 210, and the first capacitor electrode and the second capacitor electrode can form a first storage capacitor 212. In the above preparation process, the driving circuit of the second sub-pixel 22 and the driving circuit of the third color sub-pixel 23 can be formed at the same time.

[0077] In some example embodiments, the first insulating layer 11, the second insulating layer 12, the third insulating layer 13 and the fourth insulating layer 14 are made of any one or more of silicon oxide (SiOx), silicon nitride (SiNx) and silicon oxynitride (SiON), which can be a single layer, multiple layers or a composite layer. The first insulating layer 11 is referred to as a buffer layer for improving the water-oxygen resistance of the substrate; the second insulating layer 12 and the third insulating layer 13 are referred to as gate insulator (GI) layers; and the fourth insulating layer 14 is referred to as an interlayer dielectric (ILD) layer. The first metal thin film, the second metal thin film and the third metal thin film are made of a metal material, such as any one or more of silver (Ag), copper (Cu), aluminum (Al), titanium (Ti) and molybdenum (Mo), or an alloy material of the above-mentioned metals, such as aluminum-neodymium alloy (AlNd) or molybdenum-niobium alloy (MoNb), which can be a single layer structure or a multi-layer composite structure, such as Ti / Al / Ti, etc. The active layer thin film is made of one or more materials, such as amorphous indium gallium zinc oxide (a-IGZO), zinc oxynitride (ZnON), indium zinc tin oxide (IZTO), amorphous silicon (a-Si), polycrystalline silicon (p-Si), hexathienyl and polythienyl, i.e., the present disclosure is applicable to transistors manufactured based on oxide technology, silicon technology and organic technology.

[0078] (3) Forming a planar layer on the substrate on which the aforementioned pattern is formed.

[0079] In some example embodiments, a planar thin film of an organic material is coated on the substrate 10 on which the aforementioned pattern is formed, a planar (PLN) layer 15 covering the entire substrate 10 is formed, and a plurality of second vias K2 are formed on the planar layer 15 in the display area through a mask, exposure and development process. The planar layer 15 in the plurality of second vias K2 is developed away, respectively exposing the surface of the first drain electrode of the first transistor 210 of the driving circuit of the first sub-pixel 21, the surface of the first drain electrode of the first transistor of the driving circuit of the second sub-pixel 22 and the surface of the first drain electrode of the first transistor of the driving circuit of the third color sub-pixel 23.

[0080] (4) Forming a first electrode pattern on the substrate on which the aforementioned pattern is formed. In some examples, the first electrode is a reflective anode.

[0081] In some example embodiments, a conductive thin film is deposited on the substrate 10 on which the aforementioned pattern is formed, and the conductive thin film is patterned by a patterning process to form a first electrode pattern. The first anode 213 of the first sub-pixel 21 is connected to the first drain electrode of the first transistor 210 through the second via hole K2, the second anode 223 of the second sub-pixel 22 is connected to the first drain electrode of the first transistor of the second sub-pixel 22 through the second via hole K2, and the third anode 233 of the third color sub-pixel 23 is connected to the first drain electrode of the first transistor of the third color sub-pixel 23 through the second via hole K2.

[0082] In some examples, the first electrode can adopt a metal material, such as any one or more of magnesium (Mg), silver (Ag), copper (Cu), aluminum (Al), titanium (Ti), and molybdenum (Mo), or an alloy material of the above-mentioned metals, such as aluminum-neodymium alloy (AlNd) or molybdenum-niobium alloy (MoNb), can be a single-layer structure, or a multi-layer composite structure such as Ti / Al / Ti, etc., or a stack structure formed by a metal and a transparent conductive material, such as ITO / Ag / ITO, Mo / AlNd / ITO, etc. reflective material.

[0083] (5) A pixel definition (PDL) layer pattern is formed on the substrate on which the aforementioned pattern is formed.

[0084] In some example embodiments, a pixel definition thin film is coated on the substrate 10 on which the aforementioned pattern is formed, and a pixel definition layer pattern is formed by a mask, exposure, and development process. The pixel definition layer 30 of the display area includes a plurality of sub-pixel definition portions 302, a plurality of pixel definition layer openings 301 are formed between adjacent sub-pixel definition portions 302, and the pixel definition layer 30 in the plurality of pixel definition layer openings 301 is developed away to respectively expose at least part of the surface of the first anode 213 of the first sub-pixel 21, at least part of the surface of the second anode 223 of the second sub-pixel 22, and at least part of the surface of the third anode 233 of the third color sub-pixel 23.

[0085] In some examples, the pixel definition layer 30 can adopt polyimide, acrylic, or polyethylene terephthalate, etc.

[0086] (6) A post spacer (PS) pattern is formed on the substrate on which the aforementioned pattern is formed.

[0087] In some example embodiments, a thin film of organic material is coated on the substrate 10 with the aforementioned pattern, and a spacer 34 pattern is formed by a mask, exposure, and development process. The spacer 34 can be configured as a support layer to support the FMM during an evaporation process. In some examples, along the arrangement direction of the rows of sub-pixels, one repeating unit is arranged between two adjacent spacers 34, for example, the spacer 34 can be located between the adjacent first sub-pixel 21 and the third color sub-pixel 23.

[0088] (7) An organic functional layer and a second electrode are sequentially formed on the substrate with the aforementioned pattern. In some examples, the second electrode is a transparent cathode. The light emitting element can emit light from the side away from the substrate 10 through the transparent cathode, achieving top emission. In some examples, the organic functional layer of the light emitting element includes a hole injection layer, a hole transport layer, a light emitting layer, and an electron transport layer.

[0089] In some example embodiments, an open mask is used to sequentially evaporate a hole injection layer 241 and a hole transport layer 242 on the substrate 10 with the aforementioned pattern, then an FMM is used to sequentially evaporate a blue light emitting layer 236, a green light emitting layer 216, and a red light emitting layer 226, and then an open mask is used to sequentially evaporate an electron transport layer 243, a cathode 244, and a light coupling layer 245. The hole injection layer 241, the hole transport layer 242, the electron transport layer 243, and the cathode 244 are common layers of multiple sub-pixels. In some examples, the organic functional layer can further include a microcavity adjustment layer between the hole transport layer and the light emitting layer. For example, after the hole transport layer is formed, an FMM is used to sequentially evaporate a blue microcavity adjustment layer, a blue light emitting layer, a green microcavity adjustment layer, a green light emitting layer, a red microcavity adjustment layer, and a red light emitting layer.

[0090] In some example embodiments, the organic functional layer is formed in the sub-pixel region to achieve connection of the organic functional layer with the anode. The cathode is formed on the pixel definition layer and connected with the organic functional layer.

[0091] In some example embodiments, the cathode can use any one or more of magnesium (Mg), silver (Ag), and aluminum (Al), or an alloy made of any one or more of the aforementioned metals, or a transparent conductive material, for example, indium tin oxide (ITO), or a multilayer composite structure of a metal and a transparent conductive material.

[0092] In some example embodiments, a light coupling layer can be formed on the side of the cathode 244 away from the substrate 10, and the light coupling layer can be a common layer for the plurality of sub-pixels. The light coupling layer can cooperate with the transparent cathode to increase light output. For example, the material of the light coupling layer can be a semiconductor material. However, the present embodiments are not limited thereto.

[0093] (8) Forming an encapsulation layer on the substrate 10 on which the pattern is formed.

[0094] In some example embodiments, an encapsulation layer is formed on the substrate 10 on which the pattern is formed, and the encapsulation layer can include a first encapsulation layer 41, a second encapsulation layer 42, and a third encapsulation layer 43 stacked. The first encapsulation layer 41 is made of an inorganic material and covers the cathode 244 in the display area. The second encapsulation layer 42 is made of an organic material. The third encapsulation layer 43 is made of an inorganic material and covers the first encapsulation layer 41 and the second encapsulation layer 42. However, the present embodiments are not limited thereto. In some examples, the encapsulation layer can have a five-layer structure of inorganic / organic / inorganic / organic / inorganic.

[0095] In some embodiments, x is in the range of 3-5um, such as 3um, 3.5um, 4um, 4.5um or 5um.

[0096] In some embodiments, the inner angle is greater than or equal to 70° and less than 90°, and further, the inner angle is greater than or equal to 75° and less than 90°.

[0097] In some embodiments, there is an included angle d between the center line of the adjacent first sub-pixel and third sub-pixel in the first direction and the first direction, and an included angle e between the center line of the adjacent first sub-pixel and third sub-pixel in the second direction and the second direction, the included angle d is greater than 0° and less than 90°, and the included angle e is greater than 0° and less than 90°.

[0098] Further, d can be in the range of 0°-30°, or d can be in the range of 0-20°, or d can be in the range of 0-10°, or d can be in the range of 0-5°, such as 1°, 2°, 3°, 4°, etc. e can be in the range of 0°-30°, or e can be in the range of 0-20°, or e can be in the range of 0-10°, or e can be in the range of 0-5°, such as 1°, 2°, 3°, 4°, etc.

[0099] In some embodiments, the first direction and the second direction are substantially perpendicular, the first direction is one of the row direction and the column direction, and the second direction is the other of the row direction and the column direction.

[0100] In some embodiments, the four first virtual quadrilaterals arranged in two columns and two rows form a second virtual polygon in a way that they share sides, the second virtual polygon comprising four second sub-pixels, five first sub-pixels, and four third sub-pixels.

[0101] The four second sub-pixels are respectively located in the four first virtual quadrilaterals, one of the first sub-pixels is surrounded by the four second sub-pixels, and the other four first sub-pixels and the four third sub-pixels are respectively located at the edges or vertices of the second virtual polygon, and the four first sub-pixels and the four third sub-pixels located at the edges or vertices of the second virtual polygon are alternately distributed in a clockwise and counterclockwise order along the edges of the second virtual polygon.

[0102] The center line of the four first sub-pixels located at the edges or vertices of the second virtual polygon is approximately a virtual parallelogram, and / or the center line of the four third sub-pixels located at the edges or vertices of the second virtual polygon is approximately a virtual parallelogram.

[0103] The second virtual polygon can be a concave polygon or a convex polygon. The first virtual quadrilaterals form the second virtual polygon in a way that they share sides, i.e., two adjacent first virtual quadrilaterals in the row direction share a side in the column direction, and two adjacent first virtual quadrilaterals in the column direction share a side in the row direction.

[0104] In some embodiments, the second virtual polygon can be a concave octagon, and the four first sub-pixels and the four third sub-pixels are respectively located at the eight vertices of the concave octagon.

[0105] In some embodiments, the center line of at least part of the first sub-pixels is approximately located on a third straight line, the center line of at least part of the third sub-pixels is approximately located on a fourth straight line, and the third straight line is approximately parallel to the fourth straight line.

[0106] In some embodiments, the third straight line and the fourth straight line do not coincide and are both approximately parallel to the first direction; or

[0107] The third straight line and the fourth straight line do not coincide and are both approximately parallel to the second direction.

[0108] In some embodiments, the center line of at least part of the second sub-pixels located in the same second pixel row is approximately located on a fifth straight line, and the fifth straight line is approximately parallel to the third straight line and the fourth straight line.

[0109] In some embodiments, an angle f exists between a line connecting the centers of two adjacent second sub-pixels in the first direction and the first direction, and an angle g exists between a line connecting the centers of two adjacent second sub-pixels in the second direction and the second direction, the angle f is greater than 0° and less than 30°, and the angle g is greater than 0° and less than 30°.

[0110] Further, the angle f can range from 0° to 30°, or the angle f can range from 0° to 20°, or the angle f can range from 0° to 10°, or the angle f can range from 0° to 5°, such as 1°, 2°, 3°, 4°, etc. The angle g can range from 0° to 30°, or the angle g can range from 0° to 20°, or the angle g can range from 0° to 10°, or the angle g can range from 0° to 5°, such as 1°, 2°, 3°, 4°, etc.

[0111] In some embodiments, there are four third sub-pixels adjacent to the first sub-pixel, and the distances from the centers of the four third sub-pixels to the center of the first sub-pixel are not equal in at least two of the distances.

[0112] There are four first sub-pixels adjacent to the third sub-pixel, and the distances from the centers of the four first sub-pixels to the center of the third sub-pixel are not equal in at least two of the distances.

[0113] In some embodiments, the display substrate includes a plurality of pixel repeating units, one pixel repeating unit includes two first sub-pixels and two third sub-pixels located in the same first virtual quadrilateral, and further includes four second sub-pixels located in the same second virtual polygon and surrounding one of the two first sub-pixels.

[0114] In addition, the structure of a pixel repeating unit located at the edge of the display substrate can be different from the structure of a pixel repeating unit located in the interior of the display substrate, and the pixel repeating unit located at the edge of the display substrate can be missing some sub-pixels.

[0115] In some embodiments, the second sub-pixel is in the shape of an octagon.

[0116] Optionally, in the display substrate provided in the embodiments of the present disclosure, the areas of the plurality of first sub-pixels are the same. Thus, the light emitting areas of the first sub-pixels in any light emitting pixel point composed of the first sub-pixels, the second sub-pixels and the third sub-pixels are the same.

[0117] Of course, in the display substrate provided in the embodiments of the present disclosure, the areas of at least two first sub-pixels can also be different, which is not limited herein.

[0118] Optionally, in the display substrate provided by the embodiments of the present disclosure, the areas of the plurality of second sub-pixels are the same. Thus, the light emitting areas of the second sub-pixels in any light emitting pixel point composed of the first sub-pixel, the second sub-pixel and the third sub-pixel are the same.

[0119] Of course, in the display substrate provided by the embodiments of the present disclosure, the areas of at least two second sub-pixels can also be different, which is not limited herein.

[0120] Optionally, in the display substrate provided by the embodiments of the present disclosure, the areas of the plurality of third sub-pixels are the same. Thus, the light emitting areas of the third sub-pixels in any light emitting pixel point composed of the first sub-pixel, the second sub-pixel and the third sub-pixel are the same.

[0121] Of course, in the display substrate provided by the embodiments of the present disclosure, the areas of at least two third sub-pixels can also be different, which is not limited herein.

[0122] In some embodiments, the area of one first sub-pixel is S, the area of one second sub-pixel is f*S, and the area of one third sub-pixel is g*S, wherein 0.5≤f≤0.8 and 1≤g≤2.2. In this way, the brightness center distribution of any light emitting pixel point composed of the first sub-pixel, the second sub-pixel and the third sub-pixel is more uniform, and the display effect is improved.

[0123] Further, since the light emitting efficiency of the blue sub-pixel is relatively low and the service life is short, optionally, in the display substrate provided by the embodiments of the present disclosure, the area of the blue sub-pixel can be designed to be larger than the areas of the red sub-pixel and the green sub-pixel.

[0124] Further, in the display substrate provided by the embodiments of the present disclosure, since the light emitting efficiency of the green sub-pixel is generally high, the area of the green sub-pixel can be set to be smaller than the area of the red sub-pixel. Of course, in the specific implementation, the area of the green sub-pixel can also be the same as the area of the red sub-pixel, which is not limited herein.

[0125] In order to ensure that, during preparation, the mask patterns for the same kind of pixel are consistent, thereby simplifying the patterning process, optionally, in the display substrate provided by the embodiments of the present disclosure, the shapes of the plurality of first sub-pixels are substantially the same.

[0126] Of course, in the display substrate provided by the embodiments of the present disclosure, the shapes of at least two first sub-pixels can also be different, which is not limited herein.

[0127] To ensure that the mask pattern is consistent for the same kind of pixel during preparation, thereby simplifying the patterning process, optionally, in the display substrate provided in the embodiments of the present disclosure, the shapes of the plurality of second sub-pixels are substantially consistent.

[0128] Of course, in specific implementation, in the display substrate provided in the embodiments of the present disclosure, the shapes of at least two second sub-pixels can also be inconsistent, which is not limited herein.

[0129] In addition, optionally, in the display substrate provided in the embodiments of the present disclosure, when the shapes of the four second sub-pixels are the same or similar in one second virtual parallelogram, the arrangement angles thereof can be the same or can be arbitrarily rotated, which is not limited herein.

[0130] To ensure that the mask pattern is consistent for the same kind of pixel during preparation, thereby simplifying the patterning process, optionally, in the display substrate provided in the embodiments of the present disclosure, the shapes of the plurality of third sub-pixels are substantially consistent.

[0131] Of course, in specific implementation, in the display substrate provided in the embodiments of the present disclosure, the shapes of at least two third sub-pixels can also be inconsistent, which is not limited herein.

[0132] Optionally, the specific shapes, positional relationships, parallel and angular relationships of the second sub-pixel, the first sub-pixel and the third sub-pixel can be designed as required. In actual process, due to the limitation of process conditions or other factors, there can be some deviations, therefore, as long as the shapes, positions and relative positional relationships of the sub-pixels substantially meet the above conditions, they all belong to the display substrate provided in the embodiments of the present disclosure.

[0133] It should be noted that the inconsistent shapes of the sub-pixels mentioned in the embodiments of the present disclosure refer to the inconsistent shapes of the sub-pixels, for example, one is circular and the other is rectangular. Conversely, the consistent shapes of the sub-pixels mentioned in the embodiments of the present disclosure refer to the similar or identical shapes of the sub-pixels, for example, the shapes of the two sub-pixels are both triangular, regardless of whether the areas are equal or not, then it is considered that the shapes of the two sub-pixels are consistent.

[0134] In some embodiments, the shapes of the first sub-pixel and the third sub-pixel include any one of a polygon, a circle or an ellipse.

[0135] In some embodiments, the shapes of the first sub-pixel and the third sub-pixel are selected from any one of a quadrilateral, a hexagon, an octagon, a quadrilateral with rounded corners, a hexagon with rounded corners or an octagon with rounded corners, a circle or an ellipse.

[0136] Optionally, in the display substrate provided in the embodiments of the present disclosure, the first sub-pixel is a red sub-pixel, the third sub-pixel is a blue sub-pixel, and the second sub-pixel is a green sub-pixel; or, the first sub-pixel is a blue sub-pixel, the third sub-pixel is a red sub-pixel, and the second sub-pixel is a green sub-pixel. In this way, the green sub-pixel located in the first virtual quadrilateral can form a light-emitting pixel point with the red sub-pixel and the blue sub-pixel located at any two adjacent corners of the first virtual quadrilateral.

[0137] In some embodiments, the first sub-pixel can be a green sub-pixel, the third sub-pixel can be a red sub-pixel, and the second sub-pixel can be a blue sub-pixel; or, the first sub-pixel can be a green sub-pixel, the third sub-pixel can be a blue sub-pixel, and the second sub-pixel can be a red sub-pixel.

[0138] It should be noted that, in the display substrate provided in the embodiments of the present disclosure, the sub-pixel mentioned as being located at a certain position refers to the position range of the sub-pixel, as long as the sub-pixel overlaps with the position. In specific implementation, the center of the sub-pixel can overlap with the position, or the center of the sub-pixel can be offset from the position, which is not limited herein. In addition, the center of the sub-pixel can be the geometric center of the sub-pixel pattern, or can be the center of the light-emitting color of the sub-pixel, which is not limited herein.

[0139] Optionally, in the display substrate provided in the embodiments of the present disclosure, in order to ensure that the sub-pixels are uniformly distributed, the centers of the sub-pixels are as close to the corresponding positions as possible.

[0140] As shown in FIG. 1, Figure 2 In the display substrate of the related art, the first sub-pixel 01 and the third sub-pixel 03 are alternately arranged to form a plurality of first sub-pixel rows, and the second sub-pixel 02 forms a plurality of second sub-pixel rows. The first sub-pixel rows and the second sub-pixel rows are alternately arranged in the column direction. The center lines of two first sub-pixels 01 and two third sub-pixels 03 distributed in two adjacent rows and two adjacent columns are a first virtual quadrilateral T (a small dashed box in FIG. 1). The two first sub-pixels 01 are located at two opposite corners of the first virtual quadrilateral T, the two third sub-pixels 03 are located at two opposite corners of the first virtual quadrilateral T, and one second sub-pixel 02 is located inside the first virtual quadrilateral T. The center of the second sub-pixel 02 can coincide with the center of the first virtual quadrilateral T, or can not coincide with the center of the first virtual quadrilateral T. Figure 2

[0141] As shown in FIG. 2, Figure 2 and Figure 3 ​As shown, in the first virtual quadrilateral T, the center connecting line of the first sub-pixel 01 and the third sub-pixel 03 adjacent in the column direction is parallel to the column direction, and the center connecting line of the first sub-pixel 01 and the third sub-pixel 03 adjacent in the row direction is parallel to the row direction. As shown in FIG. 2, the center connecting line of the first sub-pixel 01 and the third sub-pixel 03 adjacent in the column direction is parallel to the column direction, and the center connecting line of the first sub-pixel 01 and the third sub-pixel 03 adjacent in the row direction is parallel to the row direction. Figure 3 As shown, the center connecting line of two second sub-pixels, one first sub-pixel and one third sub-pixel distributed in three adjacent rows and three adjacent columns is a rectangle, for example, the center connecting line of the sub-pixels P2-P4-P7-P5 is a rectangle, the center connecting line of the sub-pixels P9-P6-P4-P7 is a rectangle, the center connecting line of the sub-pixels P10-P7-P5-P8 is a rectangle, the center connecting line of the sub-pixels P9-P7-P10-P12 is a rectangle, the center connecting line of the sub-pixels P2, P4, P6 is on a straight line, the center connecting line of the sub-pixels P3, P5, P7, P9, P11 is on a straight line, the center connecting line of the sub-pixels P8, P10, P12 is on a straight line, the center connecting line of the sub-pixels P2, P5, P8 is on a straight line, the center connecting line of the sub-pixels P1, P4, P7, P10, P13 is on a straight line, and the center connecting line of the sub-pixels P6, P9, P12 is on a straight line.

[0142] In the figure, 11 is an opening of the high-precision metal mask plate corresponding to the first sub-pixel 01, 12 is an opening of the high-precision metal mask plate corresponding to the second sub-pixel 02, and 13 is an opening of the high-precision metal mask plate corresponding to the third sub-pixel 03. Taking the third sub-pixel 03 as an example, the opening of the high-precision metal mask plate is shown as Figure 4 As shown in the figure, it can be seen that there is an intersection between the boundaries of adjacent openings (such as between A and B). When the high-precision metal mask plate is subjected to a longitudinal tensioning force, the high-precision metal mask plate can only transmit the tensioning force through the solid material at the broken line in the figure. This way of tensioning is uneven in stress, has a certain tensioning difficulty, and is prone to cause a large tensioning deviation, resulting in poor evaporation color mixing. Similarly, the same is true for the high-precision metal mask plate for manufacturing the first sub-pixel 01.

[0143] In this embodiment, in order to reduce the color mixing defect, the relative position relationship of the pixel arrangement is changed, as shown in FIG. 4. Figure 5As shown, the center line of the sub-pixels P2, P4 and P6 is the third direction, and a plurality of fourth sub-pixel columns are arranged in the third direction in sequence, for example, the sub-pixels P3, P5, P7, P9 and P11 are in a fourth sub-pixel column, the sub-pixels P2, P4 and P6 are in a fourth sub-pixel column, and the sub-pixels P8, P10 and P12 are in a fourth sub-pixel column. In the third direction, the centers of the sub-pixels in the same fourth sub-pixel column are located on the same straight line, and the fourth direction is perpendicular to the third direction. The centers of the corresponding sub-pixels in the adjacent two fourth sub-pixel columns are not aligned in the fourth direction, but are staggered by a certain distance, for example, the center of the sub-pixel P7 is staggered from the center of the sub-pixel P10 by a distance d1 in the fourth direction, the center of the sub-pixel P7 is staggered from the center of the sub-pixel P4 by a distance d1 in the fourth direction, the center of the sub-pixel P9 is staggered from the center of the sub-pixel P6 by a distance d2 in the fourth direction, and the center of the sub-pixel P9 is staggered from the center of the sub-pixel P12 by a distance d2 in the fourth direction, wherein the corresponding sub-pixels are approximately located on the same straight line in the third direction, the sub-pixel P9 corresponds to the sub-pixels P6 and P12, the sub-pixel P7 corresponds to the sub-pixels P4 and P10, and d1 and d2 can be the same. At the same time, the odd-numbered fourth sub-pixel columns, that is, the first fourth sub-pixel column, the third fourth sub-pixel column, the fifth fourth sub-pixel column, …, and the (2m+1)th fourth sub-pixel column, the centers of the corresponding sub-pixels are aligned in the fourth direction; the even-numbered fourth sub-pixel columns, that is, the second fourth sub-pixel column, the fourth fourth sub-pixel column, the sixth fourth sub-pixel column, …, and the (2m)th fourth sub-pixel column, the centers of the corresponding sub-pixels are aligned in the fourth direction, and m is a positive integer. That is, the center of the sub-pixel P7 is aligned with the centers of the sub-pixels P1 and P13 in the fourth direction, and the center of the sub-pixel P7 is located on the same straight line as the centers of the sub-pixels P1 and P13; the center of the sub-pixel P2 is aligned with the center of the sub-pixel P8 in the fourth direction, the center of the sub-pixel P6 is aligned with the center of the sub-pixel P12 in the fourth direction, the center of the sub-pixel P4 is aligned with the center of the sub-pixel P10 in the fourth direction, and so on.

[0144] In the fourth sub-pixel column, the center line of the four first sub-pixels P1, P3, P11 and P13 is a rectangle or a square, and the center line of the four third sub-pixels P2, P6, P12 and P8 is a rectangle or a square.

[0145] The center line of two second sub-pixels, one first sub-pixel and one third sub-pixel distributed in three adjacent rows and three adjacent columns is a virtual parallelogram, for example, the center line of sub-pixels P2-P4-P7-P5 is a virtual parallelogram, the center line of sub-pixels P9-P6-P4-P7 is a virtual parallelogram, the center line of sub-pixels P10-P7-P5-P8 is a virtual parallelogram, and the center line of sub-pixels P9-P7-P10-P12 is a virtual parallelogram.

[0146] In the virtual parallelogram composed of the center line of sub-pixels P9-P7-P10-P12, the center line between the sub-pixel P10 and the sub-pixel P12 is located on a first straight line, the first straight line is parallel to the third direction, the distance between the center of the sub-pixel P7 and the center of the sub-pixel P10 on the first straight line is d1, and the internal angle of the virtual parallelogram less than 90° is in the range of (h-10°, h+10°), and h is calculated according to the following formula:

[0147]

[0148] P is half of the distance between the centers of the two most adjacent odd-numbered or even-numbered second sub-pixels in the second sub-pixel row, or half of the distance between the centers of the two most adjacent even-numbered second sub-pixels in the second sub-pixel row, for example, half of the distance between the center of the first second sub-pixel and the center of the third second sub-pixel, half of the distance between the center of the sixth second sub-pixel and the center of the eighth second sub-pixel, and so on.

[0149] The above formula is a roughly equal relationship, that is, the internal angle can have a certain deviation, for example, it can be floated up and down by 10° based on the calculation result h, or it can be floated up and down by 5° based on the calculation result h.

[0150] Through the above arrangement, the relative position between the first sub-pixel 01 and the third sub-pixel 03 can be adjusted, so that the distance between the first sub-pixel 01 and the third sub-pixel 03 is appropriately increased, as shown in Figure 6 The arrangement shown in Figure 3 The distance between the sub-pixel P6 and the sub-pixel P11 is d3, and the distance between the sub-pixel P7 and the sub-pixel P12 is d4, d3 can be equal to d4, both of which are 24um; as shown in Figure 7 The arrangement shown in Figure 5In the arrangement shown, the distance between the sub-pixel P6 and the sub-pixel P11 is d5, the distance between the sub-pixel P7 and the sub-pixel P12 is d6, d5 is greater than d6, in the case where d1 and d2 are both 3 um, d5 can be increased to 27 um, d6 can still satisfy 24 um, in this way, the distance between part of the adjacent first sub-pixels and third sub-pixels can be increased, and the distance between at least part of the adjacent second sub-pixels can also be increased, which can increase the distance between the openings of the fine metal mask used to manufacture the first sub-pixels, increase the distance between the openings of the fine metal mask used to manufacture the second sub-pixels, increase the distance between the openings of the fine metal mask used to manufacture the third sub-pixels, improve the manufacturing margin of the fine metal mask, and reduce the risk of color mixing.

[0151] As Figure 8As shown, the center line of the sub-pixels P2, P4 and P6 is the third direction, and a plurality of fourth sub-pixel columns are arranged in the third direction in sequence, for example, the sub-pixels P3, P5, P7, P9 and P11 are in a fourth sub-pixel column, the sub-pixels P2, P4 and P6 are in a fourth sub-pixel column, and the sub-pixels P8, P10 and P12 are in a fourth sub-pixel column. In the third direction, the centers of the sub-pixels in the same fourth sub-pixel column are located on the same straight line, and the fourth direction is perpendicular to the third direction. The centers of the corresponding sub-pixels in the adjacent two fourth sub-pixel columns are not aligned in the fourth direction, but are staggered by a certain distance, for example, the center of the sub-pixel P7 is staggered from the center of the sub-pixel P10 by a distance d9 in the fourth direction, the center of the sub-pixel P7 is staggered from the center of the sub-pixel P4 by a distance d9 in the fourth direction, the center of the sub-pixel P9 is staggered from the center of the sub-pixel P6 by a distance d10 in the fourth direction, and the center of the sub-pixel P9 is staggered from the center of the sub-pixel P12 by a distance d10 in the fourth direction, wherein the corresponding sub-pixels are approximately located on the same straight line in the third direction, the sub-pixel P9 corresponds to the sub-pixels P6 and P12, the sub-pixel P7 corresponds to the sub-pixels P4 and P10, and d1 and d2 can be the same. At the same time, the odd-numbered fourth sub-pixel columns, that is, the first fourth sub-pixel column, the third fourth sub-pixel column, the fifth fourth sub-pixel column, …, and the (2m+1)th fourth sub-pixel column, the centers of the corresponding sub-pixels are aligned in the fourth direction; the even-numbered fourth sub-pixel columns, that is, the second fourth sub-pixel column, the fourth fourth sub-pixel column, the sixth fourth sub-pixel column, …, and the 2mth fourth sub-pixel column, the centers of the corresponding sub-pixels are aligned in the fourth direction, and m is a positive integer. That is, the center of the sub-pixel P7 is aligned with the centers of the sub-pixels P1 and P13 in the fourth direction, and the center of the sub-pixel P7 is located on the same straight line as the centers of the sub-pixels P1 and P13; the center of the sub-pixel P2 is aligned with the center of the sub-pixel P8 in the fourth direction, the center of the sub-pixel P6 is aligned with the center of the sub-pixel P12 in the fourth direction, the center of the sub-pixel P4 is aligned with the center of the sub-pixel P10 in the fourth direction, and so on.

[0152] In the fourth sub-pixel column, the center line of the sub-pixels P1, P3, P11 and P13 is a rectangle or a square, and the center line of the sub-pixels P2, P6, P12 and P8 is a rectangle or a square.

[0153] The center line connecting two second sub-pixels, one first sub-pixel, and one third sub-pixel located in adjacent rows and columns forms a virtual parallelogram. For example, the center line connecting sub-pixels P2-P4-P7-P5 is a virtual parallelogram, the center line connecting sub-pixels P9-P6-P4-P7 is a virtual parallelogram, the center line connecting sub-pixels P10-P7-P5-P8 is a virtual parallelogram, and the center line connecting sub-pixels P9-P7-P10-P12 is a virtual parallelogram.

[0154] In the virtual parallelogram formed by the center lines connecting sub-pixels P9-P7-P10-P12, the center line connecting sub-pixels P10 and P12 lies on a first straight line, which is parallel to a third direction. The distance between the orthographic projection of the center of sub-pixel P7 onto the first straight line and the center of sub-pixel P10 is d9. The range of interior angles of the virtual parallelogram less than 90° is (h-10°, h+10°), where h is calculated using the following formula:

[0155]

[0156] Where P is half the distance between the centers of the two adjacent odd-numbered or two even-numbered second sub-pixels in the second sub-pixel row, or half the distance between the centers of the two adjacent even-numbered second sub-pixels in the second sub-pixel row, such as half the distance between the centers of the 1st and 3rd second sub-pixels, half the distance between the centers of the 6th and 8th second sub-pixels, and so on.

[0157] The formula above represents a roughly equal relationship, meaning that the interior angle can have a certain deviation. For example, it can fluctuate by 10° above or below the calculated result h, or by 5° above or below the calculated result h.

[0158] By using the above arrangement, the relative positions between the first sub-pixel 01 and the third sub-pixel 03 can be adjusted, thereby appropriately increasing the distance between them. Figure 6 The following is an example of using Figure 3 In the arrangement shown, the distance between sub-pixels P6 and P11 is d3, and the distance between sub-pixels P7 and P12 is d4. d3 can be equal to d4, both being 24µm. Figure 9 The following is an example of using Figure 8In the arrangement shown, the distance between the sub-pixel P6 and the sub-pixel P11 is d7, the distance between the sub-pixel P7 and the sub-pixel P12 is d8, d7 is greater than d8, in the case where d9 and d10 are both 5 um, d7 can be increased to 29 um, d6 can be 23.8 um, slightly less than 24 um, so as to increase the distance between part of the adjacent first sub-pixels and third sub-pixels, and by the same reasoning, the distance between at least part of the adjacent second sub-pixels can also be increased, so as to increase the distance between the openings of the fine metal mask used to manufacture the first sub-pixels, increase the distance between the openings of the fine metal mask used to manufacture the second sub-pixels, increase the distance between the openings of the fine metal mask used to manufacture the third sub-pixels, improve the manufacturing margin of the fine metal mask, and reduce the risk of color mixing.

[0159] Wherein the sub-pixels P1-P13 form a second virtual polygon, the center line between the sub-pixel P1 and the sub-pixel P2 and the first direction form an angle d, the center line between the sub-pixel P1 and the sub-pixel P6 and the second direction form an angle e, the angle d is greater than 0° and less than 30°, and the angle e is greater than 0° and less than 30°.

[0160] The center line between the sub-pixel P4 and the sub-pixel P5 and the first direction form an angle f, the center line between the sub-pixel P4 and the sub-pixel P9 and the second direction form an angle g, the angle f is greater than 0° and less than 30°, and the angle g is greater than 0° and less than 30°.

[0161] In some embodiments, multiple fifth sub-pixel columns may be arranged sequentially along the fourth direction. For example, sub-pixels P1, P4, P7, P10, and P13 may be on one fifth sub-pixel column, sub-pixels P2, P5, and P8 may be on another, and sub-pixels P6, P9, and P12 may be on yet another. In the fourth direction, the centers of sub-pixels located within the same fifth sub-pixel column are aligned on the same straight line. The centers of the corresponding sub-pixels in two adjacent fifth sub-pixel columns are not aligned in the third direction but are offset by a certain distance. Furthermore, the centers of the corresponding sub-pixels in odd-numbered fifth sub-pixel columns (i.e., the 1st, 3rd, 5th, ..., 2m+1th fifth sub-pixel columns) are aligned in the third direction; the centers of the corresponding sub-pixels in even-numbered fifth sub-pixel columns (i.e., the 2nd, 4th, 6th, ..., 2mth fifth sub-pixel columns) are aligned in the fourth direction, where m is a positive integer. Similarly, the spacing between some adjacent first and third sub-pixels can be increased, and the distance between at least some adjacent second sub-pixels can also be increased. This increases the distance between the openings of the fine metal mask used to create the first sub-pixel, the distance between the openings of the fine metal mask used to create the second sub-pixel, and the distance between the openings of the fine metal mask used to create the third sub-pixel, thereby increasing the fabrication margin of the fine metal mask and reducing the risk of color mixing.

[0162] In addition, such as Figure 10 As shown, during the vapor deposition process, the high-precision metal mask 07 is adjacent to the display structure 05 on the substrate 04. The display structure 05 includes thin-film transistors and electrodes. To prevent the high-precision metal mask 07 from scratching the display structure 05 on the substrate 04 and causing defects, a spacer 06 is placed on the substrate 04 to support the high-precision metal mask 07 and thus protect the display structure 05. However, the placement of the spacer 06 is subject to certain requirements and must not affect the normal display effect of the device.

[0163] If the high-precision metal mask 07 scratches the display structure 05 during the vapor deposition process, it will cause the display structure 05 to aggregate, resulting in a display defect. In this embodiment of the disclosure, such as Figure 2 , Figure 3 , Figure 5 and Figure 8 As shown, the shape of the second sub-pixel 02 can be octagonal, such as... Figure 11As shown, a certain distance can be left between two second sub-pixels 02 adjacent in the first direction, and a certain distance can be left between two second sub-pixels 02 adjacent in the second direction, so that the spacer 06 can be placed in the area without affecting the display, and the high-precision metal mask plate 07 can be effectively supported, effectively solving the foreign matter problem. Of course, the shape of the second sub-pixel 02 is not limited to octagonal, but can also be other shapes, as long as a certain area can be left between adjacent second sub-pixels 02.

[0164] Based on the same disclosure concept, the present disclosure also provides an organic electroluminescent display panel, which can be any of the display substrates provided by the present disclosure. Adjacent first virtual quadrilaterals are arranged in a row direction and a column direction in a manner of sharing a side. That is, two adjacent display substrates share a first sub-pixel 01 and a third sub-pixel 03 located on the side of the adjacent first virtual quadrilaterals. Since the principle of solving the problem of the organic electroluminescent display panel is similar to that of the aforementioned display substrate, the implementation of the organic electroluminescent display panel can be referred to the implementation of the aforementioned pixel arrangement structure, and the repeated parts will not be described again.

[0165] Adjacent first virtual quadrilaterals are arranged in a row direction and a column direction in a manner of sharing a side. That is, two adjacent first virtual quadrilaterals in the row direction share a side in the column direction, and two adjacent first virtual quadrilaterals in the column direction share a side in the row direction.

[0166] In the above-mentioned arrangement structure, when adjacent first virtual quadrilaterals share a side, one side of two adjacent first virtual quadrilaterals can be the same, but the shapes of the two adjacent first virtual quadrilaterals can be different, such as different internal angles.

[0167] In some embodiments, the organic electroluminescent display panel further comprises a pixel definition layer, the pixel definition layer comprises a plurality of pixel definition layer openings, the first sub-pixel, the second sub-pixel, and the third sub-pixel each correspond to a pixel definition layer opening respectively, and the shapes of the first sub-pixel, the second sub-pixel, and the third sub-pixel are substantially the same as the opening shapes of the pixel definition layer corresponding thereto.

[0168] In some embodiments, the first sub-pixel comprises a plurality of film layers, and the plurality of film layers of the first sub-pixel at least partially cover the area outside the pixel definition layer opening; and / or, the second sub-pixel comprises a plurality of film layers, and the plurality of film layers of the second sub-pixel at least partially cover the area outside the pixel definition layer opening; and / or, the third sub-pixel comprises a plurality of film layers, and the plurality of film layers of the third sub-pixel at least partially cover the area outside the pixel definition layer opening.

[0169] In some embodiments, the pixel defining layer opening has at least one of a different shape or a different area.

[0170] In some embodiments, the pixel defining layer opening includes a second pixel defining layer opening corresponding to the second sub-pixel, and a distance between at least partially adjacent boundaries of the second pixel defining layer opening is greater than a preset threshold. In this way, a certain area between adjacent second sub-pixels is left empty to place a spacer, which is used to support a high-precision metal mask plate. The preset threshold can be in a range of 5-10 um, and can be 5 um, 6 um, 7 um, 8 um, 9 um, or 10 um.

[0171] In some embodiments, the organic electroluminescent display panel further includes a spacer adjacent to two second sub-pixels, one first sub-pixel, and one third sub-pixel, and a minimum distance between boundaries of the first sub-pixel and the third sub-pixel is greater than a minimum distance between boundaries of at least partially adjacent first sub-pixels and third sub-pixels, including a minimum distance between boundaries of adjacent first sub-pixels and third sub-pixels in a row direction and a minimum distance between boundaries of adjacent first sub-pixels and third sub-pixels in a column direction. As shown in FIG. 6, one spacer is adjacent to sub-pixel P7, sub-pixel P8, sub-pixel P5, and sub-pixel P10, and a minimum distance T between boundaries of sub-pixel P7 and P8 is greater than a minimum distance between boundaries of adjacent sub-pixels P2 and P3 in the same row or a minimum distance between boundaries of adjacent sub-pixels P8 and P13 in the same column. Figure 11

[0172] Based on the same disclosure concept, the embodiments of the present disclosure further provide a display device including any one of the above-mentioned organic electroluminescent display panels provided by the embodiments of the present disclosure. The display device can be any product or component with a display function, such as a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator, and the like. The implementation of the display device can refer to the implementation of the above-mentioned display panel, and the repeated parts will not be described herein.

[0173] Based on the same disclosure concept, the embodiments of the present disclosure further provide a high-precision metal mask plate for manufacturing any one of the above-mentioned display substrates provided by the embodiments of the present disclosure, and the high-precision metal mask plate includes a plurality of opening regions, which include a first opening region corresponding to a position of the first sub-pixel, or a second opening region corresponding to a position of the second sub-pixel, or a third opening region corresponding to a position of the third sub-pixel. Since the principle of solving problems of the high-precision metal mask plate is similar to that of the above-mentioned display substrate, the implementation of the high-precision metal mask plate can refer to the implementation of the above-mentioned display substrate, and the repeated parts will not be described herein.

[0174] ​In some embodiments, the first sub-pixel includes a plurality of film layers, the second sub-pixel includes a plurality of film layers, the third sub-pixel includes a plurality of film layers, a shape of the first opening region is substantially the same as a shape and distribution of at least one film layer in the first sub-pixel, a shape of the third opening region is substantially the same as a shape and distribution of at least one film layer in the third sub-pixel, and a shape and distribution of the second opening region is substantially the same as a shape and distribution of at least one film layer in the second sub-pixel.

[0175] Optionally, in the high-precision metal mask plate provided by the embodiments of the present disclosure, the distance between adjacent first opening regions is greater than or equal to a process limit distance, which can reduce color mixing defects.

[0176] Optionally, in the high-precision metal mask plate provided by the embodiments of the present disclosure, the distance between adjacent second opening regions is greater than or equal to a process limit distance, which can reduce color mixing defects.

[0177] Optionally, in the high-precision metal mask plate provided by the embodiments of the present disclosure, the distance between adjacent third opening regions is greater than or equal to a process limit distance, which can reduce color mixing defects.

[0178] It should be noted that each of the embodiments in the present specification is described in a progressive manner, and the same and similar parts of each of the embodiments can be referred to each other. Each of the embodiments focuses on the differences from other embodiments. In particular, for the embodiments, since they are basically similar to the product embodiments, the description is relatively simple, and the relevant parts can be referred to the part of the description of the product embodiments.

[0179] Unless otherwise defined, technical terms or scientific terms used in the present disclosure shall have the ordinary meaning understood by a person of ordinary skill in the art to which the present disclosure pertains. The terms "first", "second", and similar terms used in the present disclosure do not denote any order, quantity, or importance, but are used to distinguish different constituent parts. The terms "comprise", "include" or "contain" and similar terms mean that the elements or objects before the term encompass the elements or objects listed after the term and their equivalents, without excluding other elements or objects. The terms "connect" or "connected" and similar terms are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. The terms "upper", "lower", "left", "right", and the like are only used to represent relative positional relationships, and when the absolute positions of the described objects change, the relative positional relationships can also change accordingly.

[0180] It can be understood that when an element such as a layer, a film, a region, or a substrate is referred to as being "on" or "under" another element, the element can be "directly" on or under the other element, or there can be an intermediate element.

[0181] In the description of the above-mentioned embodiments, specific features, structures, materials or characteristics can be combined in any one or more embodiments or examples in a suitable manner.

[0182] The above description is merely illustrative of the disclosure, and the scope of the disclosure is not limited thereto. Any person skilled in the art can easily conceive changes or substitutions within the technical scope of the disclosure, and all such changes and substitutions should be encompassed within the scope of the disclosure. Therefore, the scope of the disclosure should be determined by the scope of the claims.

Claims

1. A display substrate, characterized in that, It includes multiple first sub-pixels, multiple second sub-pixels, and multiple third sub-pixels. In the first direction, the first sub-pixel and the third sub-pixel are alternately arranged to form multiple rows of first sub-pixels, and the second sub-pixel forms multiple rows of second sub-pixels. The first sub-pixel rows and the second sub-pixel rows are alternately arranged in the second direction. The center line connecting two first sub-pixels and two third sub-pixels distributed in two adjacent rows and two columns forms a first virtual quadrilateral. The two first sub-pixels are located at two opposite vertices of the first virtual quadrilateral, and the two third sub-pixels are located at the other two opposite vertices of the first virtual quadrilateral. The second sub-pixel is located inside the first virtual quadrilateral. The center line connecting two second sub-pixels, one first sub-pixel, and one third sub-pixel distributed in three adjacent rows and three columns forms a virtual parallelogram. In this virtual parallelogram, second sub-pixel A and second sub-pixel B are located at two opposite vertices, as are the first and third sub-pixels. The center line connecting second sub-pixel A and third sub-pixel A lies on a first straight line. The distance between the orthographic projection of the center of the first sub-pixel onto the first straight line and the center of second sub-pixel A is x. The interior angles of the virtual parallelogram less than 90° range from (h-10°, h+10°), where h is calculated using the following formula: ； The four first virtual quadrilaterals arranged in two columns and two rows share a common edge to form a second virtual polygon. The second virtual polygon includes four second sub-pixels, five first sub-pixels, and four third sub-pixels. These sub-pixels are sequentially labeled from left to right and top to bottom as the first to the thirteenth sub-pixel. The line connecting the centers of the second, fourth, and sixth sub-pixels forms a third direction. Multiple columns of fourth sub-pixels are arranged sequentially along this third direction. In this third direction, the centers of sub-pixels within the same fourth sub-pixel column are on the same straight line. The fourth direction is perpendicular to the third direction. The centers of the corresponding sub-pixels in two adjacent fourth sub-pixel columns are on the fourth direction. The pixels are not aligned upwards, but staggered by a certain distance. Specifically, the center of the seventh sub-pixel is staggered by a first distance from the center of the tenth sub-pixel in the fourth direction, the center of the seventh sub-pixel is staggered by a first distance from the center of the fourth sub-pixel in the fourth direction, the center of the ninth sub-pixel is staggered by a second distance from the center of the sixth sub-pixel in the fourth direction, and the center of the ninth sub-pixel is staggered by a second distance from the center of the twelfth sub-pixel in the fourth direction. The corresponding sub-pixels are roughly on the same straight line in the third direction upwards. The ninth sub-pixel corresponds to the sixth and twelfth sub-pixels, and the seventh sub-pixel corresponds to the fourth and tenth sub-pixels. The first and second distances are the same.

2. The display substrate according to claim 1, characterized in that, The value of x ranges from 3 to 5 μm.

3. The display substrate according to claim 1, characterized in that, The interior angle is greater than or equal to 70° and less than 90°.

4. The display substrate according to claim 1, characterized in that, There is an angle d between the center line connecting the first and third adjacent sub-pixels in the first direction and the first direction, and there is an angle e between the center line connecting the first and third adjacent sub-pixels in the second direction and the second direction. The angle d is greater than 0° and less than 30°, and the angle e is greater than 0° and less than 30°.

5. The display substrate according to any one of claims 1-4, characterized in that, The first direction and the second direction are approximately perpendicular, the first direction being one of the row direction and the column direction, and the second direction being the other of the row direction and the column direction.

6. The display substrate according to claim 1, characterized in that, The four second sub-pixels are located within the four first virtual quadrilaterals respectively. One of the first sub-pixels is surrounded by the four second sub-pixels. The other four first sub-pixels and four third sub-pixels are located on the edges or vertices of the second virtual polygons respectively. The four first sub-pixels and the four third sub-pixels located on the edges or vertices of the second virtual polygons are alternately distributed along the edges of the second virtual polygons in a clockwise and counterclockwise order. The center line connecting the four first sub-pixels located at the edge or vertex position of the second virtual polygon is approximately a virtual parallelogram, and / or the center line connecting the four third sub-pixels located at the edge or vertex position of the second virtual polygon is approximately a virtual parallelogram.

7. The display substrate according to claim 6, characterized in that, At least some of the center lines of the first sub-pixels are approximately located on the third straight line, and at least some of the center lines of the third sub-pixels are approximately located on the fourth straight line, which is approximately parallel to the fourth straight line.

8. The display substrate according to claim 7, characterized in that, The third and fourth straight lines do not coincide, and both are approximately parallel to the first direction; or The third and fourth straight lines do not coincide, and both are approximately parallel to the second direction.

9. The display substrate according to claim 6 or 7, characterized in that, The center line connecting at least a portion of the second sub-pixels located in the same second pixel row is approximately located on the fifth straight line, which is approximately parallel to the third and fourth straight lines.

10. The display substrate according to any one of claims 1-4, characterized in that, There is an angle f between the center line connecting adjacent second sub-pixels in the first direction and the first direction, and there is an angle g between the center line connecting adjacent second sub-pixels in the second direction and the second direction, wherein the angle f is greater than 0° and less than 30°, and the angle g is greater than 0° and less than 30°.

11. The display substrate according to any one of claims 1-4, characterized in that, There are four third sub-pixels adjacent to the first sub-pixel, and at least two of the distances from the center of the four third sub-pixels to the center of the first sub-pixel are not equal; There are four first sub-pixels adjacent to the third sub-pixel, and at least two of the distances from the center of the four first sub-pixels to the center of the third sub-pixel are not equal.

12. The display substrate according to claim 6, characterized in that, The display substrate includes multiple pixel repeating units. Each pixel repeating unit includes two first sub-pixels and two third sub-pixels located in the same first virtual quadrilateral, and also includes four second sub-pixels located in the same second virtual polygon as one of the two first sub-pixels and surrounding the first sub-pixel.

13. The display substrate according to any one of claims 1-4, characterized in that, The second sub-pixel has an octagonal shape.

14. The display substrate according to any one of claims 1-4, characterized in that, Multiple first sub-pixels have the same area, and / or multiple third sub-pixels have the same area, and / or multiple second sub-pixels have the same area.

15. The display substrate according to claim 14, characterized in that, The area of ​​the first sub-pixel is S, the area of ​​the second sub-pixel is f*S, and the area of ​​the third sub-pixel is g*S, where 0.5≤f≤0.8 and 1≤g≤2.

2.

16. The display substrate according to any one of claims 1-4, characterized in that, The shapes of the multiple first sub-pixels are substantially the same; and / or The shapes of the plurality of said third sub-pixels are substantially the same; and / or The shapes of the multiple second sub-pixels are roughly the same.

17. The display substrate according to any one of claims 1-4, characterized in that, The shapes of the first sub-pixel and the third sub-pixel include any one of polygon, circle or ellipse.

18. The display substrate according to claim 17, characterized in that, The shapes of the first sub-pixel and the third sub-pixel are selected from any one of quadrilateral, hexagon, octagon, quadrilateral with rounded corners, hexagon with rounded corners or octagon with rounded corners, circle or ellipse.

19. The display substrate according to any one of claims 1-4, characterized in that, The first sub-pixel is a red sub-pixel, the third sub-pixel is a blue sub-pixel, and the second sub-pixel is a green sub-pixel; or, the first sub-pixel is a blue sub-pixel, the third sub-pixel is a red sub-pixel, and the second sub-pixel is a green sub-pixel; or, the first sub-pixel is a green sub-pixel, the third sub-pixel is a red sub-pixel, and the second sub-pixel is a blue sub-pixel; or, the first sub-pixel is a green sub-pixel, the third sub-pixel is a blue sub-pixel, and the second sub-pixel is a red sub-pixel.

20. A display device, characterized in that, Includes the display substrate as described in any one of claims 1-19.

21. The display device according to claim 20, characterized in that, It also includes a pixel delimiting layer, which includes multiple pixel delimiting layer openings. The first sub-pixel, the second sub-pixel, and the third sub-pixel each correspond to a pixel delimiting layer opening. The shapes of the first sub-pixel, the second sub-pixel, and the third sub-pixel are approximately the same as the shapes of the openings of their corresponding pixel delimiting layers.

22. The display device according to claim 21, characterized in that, The first sub-pixel includes multiple film layers, and the multiple film layers of the first sub-pixel at least partially cover the area outside the pixel defining layer opening; and / or, the second sub-pixel includes multiple film layers, and the multiple film layers of the second sub-pixel at least partially cover the area outside the pixel defining layer opening; And / or, the third sub-pixel includes a multilayer film, and the multilayer film of the third sub-pixel at least partially covers the area outside the pixel defining layer opening.

23. The display device according to claim 21, characterized in that, The openings in the pixel-defining layer are at least partially different in shape or area.

24. The display device according to claim 21, characterized in that, The pixel delimiting layer opening includes a second pixel delimiting layer opening corresponding to the second sub-pixel, and the distance between the boundaries of at least some of the adjacent second pixel delimiting layer openings is greater than a preset threshold.

25. The display device according to claim 24, characterized in that, Also includes: A spacer, the spacer being adjacent to two second sub-pixels, a first sub-pixel, and a third sub-pixel, wherein the minimum distance between the boundaries of the first sub-pixel and the third sub-pixel is greater than the minimum distance between the boundaries of at least partially adjacent first sub-pixels and third sub-pixels.

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