A method for testing and evaluating short circuit resistance of a crimped packaged power device

Abstract

The present application relates to a kind of short-circuit resistance test and evaluation method of crimping package power device, belong to the technical field of power electronics device.The method includes: S1: build test platform;S2: obtain the voltage grade, pressure loading, environmental temperature and maximum junction temperature fluctuation range under actual application condition of the device to be measured;S3: respectively carry out short-circuit resistance test of crimping package device under different voltage, pressure, temperature grade, real-time monitoring the change of device short-circuit current, collector voltage and gate voltage, until power device short-circuit failure, corresponding to obtain the relationship of voltage and short-circuit critical energy and critical temperature, the relationship of pressure and short-circuit current, the relationship of temperature and short-circuit current;S4: according to test result, obtain the relationship of short-circuit resistance of crimping package device to be measured and voltage, pressure, temperature.The present application considers the special application condition of crimping package power device, improves the accuracy of short-circuit resistance test and evaluation of crimping package power device.

Description

Technical Field

[0001] This invention belongs to the field of power electronic device technology and relates to a method for testing and evaluating the short-circuit withstand capability of press-packed power devices. Background Technology

[0002] Short-circuit faults are among the most common failures in power electronic equipment. During a short circuit, power devices must withstand approximately 5 to 6 times their rated current for a very short time, causing a rapid rise in junction temperature. If the protection circuit fails to operate within the short-circuit withstand capability of the power device, the device will be permanently damaged, thus affecting the reliability of the entire system. Therefore, accurately assessing the short-circuit withstand capability of power devices is fundamental to determining protection circuit parameters and is crucial for system reliability.

[0003] Currently, soldering and press-fit packaging are the two mainstream packaging forms for power devices. Compared with soldered power devices, press-fit power devices have advantages such as short-circuit failure, double-sided heat dissipation, and low thermal resistance, which makes them more suitable for high-voltage and high-power-density applications. However, unlike soldered power devices, press-fit power devices have complex electro-thermal-mechanical coupling relationships, and pressure directly affects the device current and temperature.

[0004] However, due to the longer service life and wider application of soldered packaged power devices, most currently widely used evaluation methods, including short-circuit withstand capability assessment methods, are based on soldered packaged power devices. These methods only consider the internal electro-thermal relationship of soldered packaged power devices and do not account for the influence of pressure, leading to inaccurate evaluation results when applied to press-fit packaged power devices. Therefore, this invention provides a method for testing and evaluating the short-circuit withstand capability of press-fit packaged power devices. This is of great significance for accurately assessing the short-circuit withstand capability of press-fit packaged power devices, precisely setting protection circuit parameters, and improving system reliability. Summary of the Invention

[0005] In view of this, the purpose of the present invention is to provide a method for testing and evaluating the short-circuit withstand capability of press-packaged power devices, so as to solve the problem of inaccurate evaluation of the short-circuit withstand capability of press-packaged power devices by traditional evaluation methods, thereby improving the evaluation accuracy of the device under test.

[0006] To achieve the above objectives, the present invention provides the following technical solution:

[0007] A method for testing and evaluating the short-circuit withstand capability of press-fit packaged power devices, specifically including the following steps:

[0008] S1: Build a short-circuit withstand capability test platform suitable for press-packed power devices;

[0009] S2: Obtain the voltage level, pressure loading, ambient temperature, and maximum junction temperature fluctuation range of the press-fit packaged power device under actual application conditions;

[0010] S3: Customized short-circuit withstand capability testing solution, specifically including: conducting short-circuit withstand capability tests on press-fit packaged devices under different voltage, pressure, and temperature levels, and real-time monitoring of the device's short-circuit current I. S Collector-emitter voltage V CE and gate-emitter voltage V GE The change continues until the power device fails due to a short circuit, corresponding to the acquisition of the voltage and the short-circuit critical energy E. CR and critical temperature T CR The relationship between pressure and short-circuit current, and the relationship between temperature and short-circuit current;

[0011] S4: Based on the test results under different voltages, pressures, and temperatures, the relationship between the short-circuit withstand capability of the pressure-sealed packaged device under test and voltage, pressure, and temperature is obtained.

[0012] Furthermore, in step S1, the short-circuit withstand capability test platform includes: a short-circuit energy supply module, a control module, a measurement module, and an environmental control module;

[0013] The short-circuit energy supply module includes: a parallel high-voltage DC power supply and a capacitor bank, which provide impact energy for short-circuit endurance testing;

[0014] The control module includes a signal generator and a drive circuit connected in series to control the module under test to be turned on;

[0015] The measurement module includes a voltage probe and a current probe to monitor and acquire the short-circuit current I during the short-circuit endurance test. S Collector-emitter voltage V CE and gate-emitter voltage V GE Isomorphic parameters;

[0016] The environmental control module includes a high-voltage DC power supply, a pressure clamp, and a constant temperature test chamber to control changes in voltage, pressure, and temperature, respectively.

[0017] Furthermore, in step S2, the test voltage U is determined based on the actual application conditions of the press-fit packaged power device under test. i Pressure F i Temperature T i ,in:

[0018] Test voltage U iThe actual operating voltage U0 should be used as the reference, with a step size of ±10%. Tests should be conducted at least at five voltage levels: U0-20%, U0-10%, U0, U0+10%, and U0+20%. Alternatively, the voltage test range can be increased and the step size reduced depending on the specific application.

[0019] Test pressure F i The recommended pressure loading value F0 for press-fitted power devices under actual operating conditions should be used as the benchmark, and the maximum pressure loading value F should be... 0-max The upper limit is; under test pressure F i When the pressure is within the range (0, F0), testing should be conducted at least at 5 pressure levels, with at least 3 pressure levels within the range (0, F0 / 2); at the test pressure F i ∈(F0,F 0-max When testing within a certain range, at least two pressure levels should be tested. The number of pressure levels can be increased depending on the specific application.

[0020] Test temperature T i The lowest ambient temperature T in actual application should be used. EN_min The lower limit is the highest junction temperature T. j_max The upper limit; it must include the lowest value T of the junction temperature fluctuation under the application conditions. j_min The test should be conducted at least at four temperature levels. The number of test temperature levels can be increased and the test temperature range adjusted as needed, depending on the specific application.

[0021] Furthermore, in step S3, the short-circuit current I is monitored in real time during the short-circuit withstand capability test. S and collector-emitter voltage V CE When the short-circuit current I S The collector-emitter voltage V instantly rises to more than twice the initial value. CE When the voltage drops rapidly to approximately 0V, the power device can be determined to have failed due to a short circuit.

[0022] Furthermore, in step S3, short-circuit withstand capability tests are performed on press-fit packaged devices at different voltage levels. Specifically, this includes: conducting short-circuit withstand capability tests on power devices at selected voltage levels and monitoring the device short-circuit current I in real time. S Collector-emitter voltage V CE Gate-emitter voltage V GE Until the power device fails due to a short circuit;

[0023] 1) Based on short-circuit current I S and collector-emitter voltage V CE Calculate the short-circuit critical energy E of power devices CR :

[0024]

[0025] Among them, t SCWC This refers to the short-circuit withstand time of the power device, which is the duration from the start of the test to the short-circuit failure of the power device.

[0026] 2) Based on the test results at different voltage levels, fit the test voltage U. i With short-circuit critical energy E CR Relationship:

[0027] E CR =f E (U i )

[0028] Among them, f E (U i ) is the test voltage U i With short-circuit critical energy E CR The fitting relationship function between them;

[0029] 3) Obtain the test voltage U i With critical temperature T CR Relationship:

[0030]

[0031] Among them, K chip T refers to parameters related to the chip materials and structure used in press-fit power devices. EN The ambient temperature.

[0032] Furthermore, in step S3, short-circuit withstand capability tests are performed on the press-fit packaged devices under different pressure levels. Specifically, this includes: conducting short-circuit withstand capability tests on the power devices under selected pressure levels, and monitoring the device short-circuit current I in real time. S Collector-emitter voltage V CE Gate-emitter voltage V GE The changes in power devices can lead to short-circuit failure.

[0033] Based on test results at different pressure levels, the test pressure F is fitted. i With the device short-circuit current I S Relationship:

[0034] I S =f F (F i )

[0035] Among them, f F (F i ) is the test pressure F i With the device short-circuit current I S The fitting relationship function.

[0036] Furthermore, in step S3, short-circuit withstand capability tests are performed on the press-packaged devices at different temperature levels. Specifically, this includes: conducting short-circuit withstand capability tests on the power devices at selected temperature levels and monitoring the device short-circuit current I in real time. S Collector-emitter voltage V CE Gate-emitter voltage V GE The changes in power devices can lead to short-circuit failure.

[0037] Based on test results at different temperature levels, the fitted temperature T i With the device short-circuit current I S Relationship:

[0038] I S =T i k ·f F (F i )

[0039] Where k is a parameter related to the characteristics of the chip used in the press-fit packaged power device, and f F (F i ) is the test pressure F i With the device short-circuit current I S The fitting relationship function.

[0040] Furthermore, in step S4, the relationship between the short-circuit withstand capability of the pressure-sealed packaged device under test and voltage, pressure, and temperature is obtained as follows:

[0041]

[0042] Among them, K chip T refers to parameters related to the chip materials and structure used in press-fit power devices. CR U is the critical temperature. i For testing voltage, T i For testing temperature, k is a parameter related to the characteristics of the chip used in the press-fit packaged power device, and f F (F i ) is the test pressure F i With the device short-circuit current I S The fitting relationship function.

[0043] The beneficial effects of this invention are as follows:

[0044] (1) The short-circuit withstand capability test method provided by this invention fully considers the application conditions of press-packed power devices and comprehensively considers the influence of voltage, pressure, and temperature on the short-circuit withstand capability of power devices. Furthermore, based on the application conditions, the short-circuit withstand capability test scheme has been scientifically optimized, reducing the difficulty of short-circuit withstand capability testing and improving the test economy.

[0045] (2) The short-circuit withstand capability assessment method provided by the present invention fully considers the influence of "electricity-heat-force" on the short-circuit withstand capability of power devices, improves the accuracy of short-circuit withstand capability assessment of press-packed power devices, and is conducive to accurately setting protection circuit parameters and improving system reliability.

[0046] Other advantages, objectives, and features of the invention will be set forth in part in the description which follows, and in part will be apparent to those skilled in the art from the following examination, or may be learned from practice of the invention. The objectives and other advantages of the invention can be realized and obtained through the following description. Attached Figure Description

[0047] To make the objectives, technical solutions, and advantages of the present invention clearer, the preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings, wherein:

[0048] Figure 1 This is a flowchart of the short-circuit withstand capability test and evaluation method for press-packed power devices according to the present invention;

[0049] Figure 2 This is a schematic diagram of the short-circuit withstand capability test platform for press-packed power devices according to the present invention. Detailed Implementation

[0050] The following specific examples illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention. It should be noted that the illustrations provided in the following embodiments are only schematic representations of the basic concept of the present invention. Unless otherwise specified, the following embodiments and features can be combined with each other.

[0051] The accompanying drawings are for illustrative purposes only and are schematic diagrams, not actual pictures. They should not be construed as limiting the invention. To better illustrate the embodiments of the invention, some parts in the drawings may be omitted, enlarged, or reduced, and do not represent the actual product dimensions. It is understandable to those skilled in the art that some well-known structures and their descriptions may be omitted in the drawings.

[0052] In the accompanying drawings of the embodiments of the present invention, the same or similar reference numerals correspond to the same or similar components. In the description of the present invention, it should be understood that if terms such as "upper," "lower," "left," "right," "front," and "rear" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, they are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, the terms used to describe positional relationships in the drawings are only for illustrative purposes and should not be construed as limiting the present invention. For those skilled in the art, the specific meaning of the above terms can be understood according to the specific circumstances.

[0053] Please see Figures 1-2 ,like Figure 1 As shown, the short-circuit withstand capability testing and evaluation method for press-fit packaged power devices provided by the present invention includes the following steps:

[0054] 1) Establish a short-circuit withstand capability testing platform suitable for press-fit packaged power devices, such as... Figure 2 As shown, it includes a short-circuit energy supply module, a control module, a measurement module, and an environmental control module.

[0055] The short-circuit energy supply module includes: a high-voltage DC power supply and a capacitor bank, which provide impact energy for short-circuit endurance testing;

[0056] The control module includes a signal generator and a drive circuit to control the activation of the module under test.

[0057] The measurement module includes a voltage probe and a current probe to monitor and acquire the short-circuit current I during the short-circuit endurance test. S Collector-emitter voltage V CE Gate-emitter voltage V GE Isomorphic parameters;

[0058] The environmental control module includes a high-voltage DC power supply, pressure clamps, and a constant temperature test chamber to control changes in voltage, pressure, and temperature, respectively.

[0059] 2) Obtain the voltage level, pressure load, ambient temperature, and maximum junction temperature fluctuation range of the press-fit packaged power device under actual application conditions, customize a short-circuit withstand capability test plan, and determine the test voltage U. i Pressure F i Temperature T i .

[0060] Test voltage U iThe actual operating voltage U0 should be used as the reference, with a step size of ±10%, and testing should be conducted at least at five voltage levels: U0-20%, U0-10%, U0, U0+10%, and U0+20%. The voltage testing range can be increased and the step size decreased depending on the specific application. For example, power devices used at 1000V should be tested at at least at voltage levels of 800V, 900V, 1000V, 1100V, and 1200V.

[0061] Test pressure F i The recommended pressure loading value F0 for press-fitted power devices under actual operating conditions should be used as the benchmark, and the maximum pressure loading value F should be... 0-max The upper limit is set at the test pressure F. i When the pressure is within the range (0, F0), testing should be conducted at least at 5 pressure levels, with at least 3 pressure levels within the range (0, F0 / 2). At the test pressure F... i ∈(F0,F 0-max When testing within the specified range, at least two pressure levels should be used. The number of test pressure levels can be increased depending on the specific application. Taking the DG50N3300 press-fit IGBT device as an example, at test pressure F... i When the value is in the range (0, 1000), testing should be performed at pressure levels of at least 100N, 200N, 500N, 800N, and 1000N. At the test pressure F... i When the value is in the range (1000, 2000), the test should be conducted at a pressure level of at least 1500N or 2000N.

[0062] Test temperature T i The lowest ambient temperature T in actual application should be used. EN_min The lower limit is the highest junction temperature T. j_max This is the upper limit. It must include the lowest value T of the junction temperature fluctuation under the application conditions. j_min The test should be conducted at least at four temperature levels. The number of test temperature levels can be increased and the test temperature range adjusted accordingly, depending on the specific application. For example, at the lowest ambient temperature T... EN_min The highest junction temperature is 25℃, and the highest junction temperature is T. j_max The lowest junction temperature fluctuation value T is 100℃. j_min For applications operating at 75℃, tests should be conducted at temperatures of at least 25℃, 50℃, 75℃, and 100℃.

[0063] 3) Conduct short-circuit withstand capability tests on press-fit packaged devices at different voltage levels, and monitor the short-circuit current I of the devices in real time. S Collector-emitter voltage V CE Gate-emitter voltage V GE The change in current continues until the power device fails due to a short circuit. When the short-circuit current I... SThe collector-emitter voltage V instantly rises to more than twice the initial value. CE When the voltage drops rapidly to approximately 0V, the power device can be determined to have failed due to a short circuit.

[0064] Based on short-circuit current I S Collector-emitter voltage V CE Calculate the short-circuit critical energy E of power devices CR :

[0065]

[0066] Among them, t SCWC The short-circuit withstand time of the power device is the duration from the start of the test to the short-circuit failure of the power device. Based on the test results at different voltage levels, the test voltage U is fitted. i With short-circuit critical energy E CR Relationship:

[0067] E CR =f E (U i )

[0068] The test voltage U is obtained. i With critical temperature T CR Relationship:

[0069]

[0070] Among them, K chip T refers to parameters related to the chip materials and structure used in press-fit power devices. EN The ambient temperature.

[0071] 4) Conduct short-circuit withstand capability tests on press-fit packaged devices under different pressure levels, and monitor the short-circuit current I of the devices in real time. S Collector-emitter voltage V CE Gate-emitter voltage V GE The change in current continues until the power device fails due to a short circuit. When the short-circuit current I... S The collector-emitter voltage V instantly rises to more than twice the initial value. CE When the voltage drops rapidly to approximately 0V, the power device can be determined to have failed due to a short circuit.

[0072] Obtain test stress F i With the device short-circuit current I S Relationship:

[0073] I S =f F (F i )

[0074] 5) Conduct short-circuit withstand capability tests on press-packaged devices at different temperatures, and monitor the short-circuit current I of the devices in real time.S Collector-emitter voltage V CE Gate-emitter voltage V GE The change in current continues until the power device fails due to a short circuit. When the short-circuit current I... S The collector-emitter voltage V instantly rises to more than twice the initial value. CE When the voltage drops rapidly to approximately 0V, the power device can be determined to have failed due to a short circuit.

[0075] Obtain temperature T i With the device short-circuit current I S Relationship:

[0076] I S =T i k ·f F (F i )

[0077] Where k is a parameter related to the characteristics of the chip used in press-fit power devices.

[0078] 6) Combining test results under different voltages, pressures, and temperatures, a method for evaluating the short-circuit withstand capability of the press-fit packaged device under test is derived:

[0079]

[0080] As can be seen from the above, the short-circuit withstand capability testing and evaluation method for press-packed power devices provided by this invention comprehensively considers the application conditions of press-packed power devices, namely the effects of "electricity-heat-force". Compared with the widely used short-circuit withstand capability evaluation methods based on soldered power devices that only consider the effects of "electricity-heat", this method comprehensively considers the packaging structure and application conditions of press-packed devices, thus improving the accuracy of the evaluation.

[0081] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit it. Although the present invention has been described in detail with reference to preferred embodiments, those skilled in the art should understand that modifications or equivalent substitutions can be made to the technical solutions of the present invention without departing from the spirit and scope of the present invention, and all such modifications or substitutions should be covered within the scope of the claims of the present invention.

Claims

1. A method for testing and evaluating the short-circuit withstand capability of press-fit packaged power devices, characterized in that, The method specifically includes the following steps: S1: Build a short-circuit withstand capability test platform suitable for press-packed power devices; S2: Obtain the voltage level, pressure loading, ambient temperature, and maximum junction temperature fluctuation range of the press-fit packaged power device under actual application conditions; S3: Customized short-circuit withstand capability testing solution, specifically including: conducting short-circuit withstand capability tests on press-fit packaged devices under different voltage, pressure, and temperature levels, and monitoring the short-circuit current of the devices in real time. I S collector-emitter voltage V CE and gate-emitter voltage V GE The change continues until the power device fails due to a short circuit, corresponding to the acquisition of the voltage and the short-circuit critical energy. E CR and critical temperature T CR The relationship between pressure and short-circuit current, and the relationship between temperature and short-circuit current; Short-circuit withstand capability tests were conducted on press-fit packaged devices at different voltage levels. Specifically, this included: conducting short-circuit withstand capability tests on power devices at selected voltage levels and monitoring the short-circuit current of the devices in real time. I S collector-emitter voltage V CE Gate-emitter voltage V GE Until the power device fails due to a short circuit; 1) Based on short-circuit current I S and collector-emitter voltage V CE Calculate the short-circuit critical energy of power devices E CR : in, t SCWC This refers to the short-circuit withstand time of the power device, which is the duration from the start of the test to the short-circuit failure of the power device. 2) Based on the test results at different voltage levels, fit the test voltage. U i Short-circuit critical energy E CR Relationship: in, For testing voltage U i Short-circuit critical energy E CR The fitting relationship function between them; 3) Obtain the test voltage U i With critical temperature T CR Relationship: in, K chip These are parameters related to the chip materials and structure used in press-pack power devices. T EN The ambient temperature; Short-circuit withstand capability tests were conducted on press-fit packaged devices under different pressure levels. Specifically, this included: performing short-circuit withstand capability tests on power devices at selected pressure levels and monitoring the short-circuit current of the devices in real time. I S collector-emitter voltage V CE Gate-emitter voltage V GE The changes in power devices can lead to short-circuit failure. Based on test results at different pressure levels, the test pressure is fitted. F i With device short-circuit current I S Relationship: in, For testing stress F i With device short-circuit current I S The fitting relationship function; Short-circuit withstand capability tests were conducted on press-packaged devices at different temperature levels. Specifically, this included performing short-circuit withstand capability tests on power devices at selected temperature levels and monitoring the short-circuit current of the devices in real time. I S collector-emitter voltage V CE Gate-emitter voltage V GE The changes in power devices can lead to short-circuit failure. Based on test results at different temperature levels, the fitted temperature was determined. T i With device short-circuit current I S Relationship: in, k These are parameters related to the characteristics of the chips used in press-fit packaged power devices. For testing stress F i With device short-circuit current I S The fitting relationship function; S4: Based on the test results under different voltages, pressures, and temperatures, the relationship between the short-circuit withstand capability of the pressure-sealed packaged device under test and voltage, pressure, and temperature is obtained.

2. The method for testing and evaluating the short-circuit withstand capability of press-fit packaged power devices according to claim 1, characterized in that, In step S1, the short-circuit withstand capability test platform includes: a short-circuit energy supply module, a control module, a measurement module, and an environmental control module; The short-circuit energy supply module includes: a parallel high-voltage DC power supply and a capacitor bank, which provide impact energy for short-circuit endurance testing; The control module includes a signal generator and a drive circuit connected in series to control the module under test to be turned on; The measurement module includes a voltage probe and a current probe to monitor and acquire the short-circuit current during the short-circuit endurance test. I S collector-emitter voltage V CE and gate-emitter voltage V GE ; The environmental control module includes a high-voltage DC power supply, a pressure clamp, and a constant temperature test chamber to control changes in voltage, pressure, and temperature, respectively.

3. The method for testing and evaluating the short-circuit withstand capability of press-fit packaged power devices according to claim 1, characterized in that, In step S2, the test voltage is determined based on the actual application conditions of the press-fit packaged power device under test. U i ,pressure F i ,temperature T i ,in: Test voltage U i The actual operating voltage should be used. U With 0 as the reference and ±10% as the step size, testing should be conducted at least at 5 voltage levels. U 0 - 20%, U 0 - 10% U 0、 U 0 + 10%, U 0 + 20%; Test stress F i The recommended pressure loading value for press-fitted power devices under actual operating conditions should be used. F 0 is the baseline, and the maximum pressure loading value is... F 0-max The upper limit; under test pressure F i ∈(0, F When the pressure range is 0, testing should be conducted at least at 5 pressure levels, where (0, F [0 / 2] Testing should be conducted at least at three pressure levels within the range; at the test pressure F i ∈( F 0, F 0-max When testing within a certain range, at least two pressure levels should be tested. Test temperature T i The lowest ambient temperature in actual application should be used. T EN_min The lower limit is the highest junction temperature. T j_max The upper limit; it must include the lowest value of junction temperature fluctuation under the application conditions. T j_min And it should be tested at least at 4 temperature levels.

4. The method for testing and evaluating the short-circuit withstand capability of press-fit packaged power devices according to claim 1, characterized in that, In step S3, the short-circuit current is monitored in real time during the short-circuit withstand capability test. I S and collector-emitter voltage V CE When the short-circuit current I S The collector-emitter voltage instantly rises to more than twice the initial value. V CE When the voltage drops rapidly to approximately 0 V, the power device is considered to have failed due to a short circuit.

5. The method for testing and evaluating the short-circuit withstand capability of press-fit packaged power devices according to claim 1, characterized in that, In step S4, the relationship between the short-circuit withstand capability of the pressure-sealed packaged device under test and voltage, pressure, and temperature is obtained as follows: in, K chip These are parameters related to the chip materials and structure used in press-pack power devices. T CR The critical temperature. U i For testing voltage, T i To test the temperature, k These are parameters related to the characteristics of the chips used in press-fit packaged power devices. For testing stress F i With device short-circuit current I S The fitting relationship function.

Images