A write data cache acceleration method based on RAID
The cache management of DDR is solved through the Cache module, which solves the write amplification problem caused by small and medium-sized RAID data writing, improves write performance and extends the service life of the flash memory chip.
Patent Information
- Application Number
- CN202211305875.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-10-24
- Publication Date
- 2025-09-02
- Estimated Expiration
- 2042-10-24
AI Technical Summary
The write amplification problem caused by small data write operations in RAID technology affects write performance and accelerates the wear of flash chips.
The cache module is used to cache DDR, temporarily store write operation data and generate verification values when the threshold is reached, reducing the number of physical disk write operations, and using CacheLine as a unit to organize RAID physical disk write operations, merge the data and write them to the physical disk together.
Improves RAID write performance, maximizes the utilization of disk bandwidth, reduces write amplification, and extends the service life of flash memory chips.
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Figure CN115686366B_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the field of data transmission, and in particular relates to a write data cache acceleration method based on RAID. Background Art
[0002] With the advent of the big data era, more and more users are participating in the Internet, and the data on the Internet is growing at an exponential rate. Redundant Array of Independent Disks (RAID), also known as disk array, uses virtualized storage technology to combine multiple disks into one or more disk array groups to improve performance or data redundancy, or both. Simply put, RAID combines multiple disks into a single logical disk, so the operating system only sees it as a single physical disk. RAID utilizes the parallelism between multiple disks to greatly improve data read and write performance. It can also mirror or verify multiple disks to provide data redundancy or error correction capabilities. RAID is widely used in enterprise servers due to its high performance and good fault tolerance. Therefore, applying RAID technology to process massive data and server-side storage has great application prospects.
[0003] However, frequent small-volume write operations create a harsh environment for RAID. RAID often uses a parity check to provide strong data fault tolerance. However, each time data is updated, the parity check must be recalculated and written back to the RAID physical disk. The additional write overhead associated with updating the parity check significantly impacts the overall write performance of the RAID disk. Furthermore, when applying RAID technology to SSDs, the frequent write operations associated with updating the parity check can accelerate wear on the flash memory chips.
[0004] When discussing RAID performance, it's known that RAID 1 offers relatively good read and write performance. RAID 5, with its added redundancy feature, offers better read performance but poorer write performance. RAID 6 offers better data protection but even poorer write performance. The main reason for the poor write performance of RAID 5 and RAID 6 is the write amplification problem caused by small writes. The following example uses RAID 5 as an example to illustrate the write amplification problem in RAID environments with frequent small writes. Before this, let's first introduce the data organization hierarchy within a RAID system. The smallest unit a RAID system can operate on is the sector (or core sector). A sector is typically 512 bytes, but can also be 4 KB. RAID uses a continuous segment of equal length from each drive to form a stripe. The corresponding stripes on each member drive form a complete stripe. For example, stripe A in the figure below consists of four stripes: A1, A2, A3, and A4.
[0005] RAID 5 doesn't back up data. Instead, it stores data and its corresponding parity information on each disk that makes up the RAID 5. The parity information and the corresponding data are stored on different disks. If data on one disk in a RAID 5 becomes corrupted, the remaining data and the corresponding parity information can be used to recover the damaged data. The following figure shows a RAID 5 consisting of four disks (at least three of which are required). In this 3+1 stripe, three disks store data and one disk stores the parity bit.
[0006] During the RAID 5 write process, when updating related data, a new checksum needs to be calculated and written back to the device, which results in additional write amplification. Figure 2 As shown in the figure, when RAID 5 modifies B1, A2, and C3, it also needs to modify the corresponding stripe check values Ap, Bp, and Cp at the same time, so 6 write operations are required, which brings additional write amplification.
[0007] The present invention is based on the above background and aims to solve the write amplification problem caused by small data writes in RAID technology. It designs a hardware acceleration algorithm to reduce RAID write amplification, thereby improving RAID write performance and maximizing disk bandwidth utilization. Summary of the Invention
[0008] (1) Technical issues to be solved
[0009] The technical problem to be solved by the present invention is how to provide a RAID-based write data cache acceleration method to solve the write amplification problem caused by small data volume writes in RAID technology.
[0010] (2) Technical Solution
[0011] To solve the above technical problems, the present invention proposes a write data cache acceleration method based on RAID, and the method includes the following steps:
[0012] S1. After the CACHE_CAL module detects a new write operation from the host computer, it obtains the target address and the number of sectors accessed, and aligns and splits the write operation into several CacheLines according to the CacheLine size. Set the split CacheLine numbers as 1, 2... N, and let k = 1;
[0013] S2. The CACHE_CAL module calculates whether the address of the CacheLine numbered k exists in the current DDR. If it exists, directly operate on the existing CacheLine; if not, it needs to find and occupy an empty CacheLine in the DDR and operate on this CacheLine;
[0014] S3. The CACHE_CAL module copies the new data from the host computer into the CacheLine, disassembles the write operation into sector operations corresponding to the CacheLine, and writes all the sector flag positions corresponding to the new data as 1 in the NewDataRAM. Each written sector is represented by 1 bit;
[0015] S4. The CACHE_CAL module calculates the sector ratio of the data to be updated marked as 1 in the CacheLine in the NewDataRAM. If it reaches the threshold for writing back to the physical disk, perform step S5; otherwise, judge the value of k. If k = N, jump back to step S1. If k < N, let k = k + 1 and perform step S2;
[0016] S5. The SATA module reads the data of the CacheLine corresponding to the RAID physical disk;
[0017] S6. The MERGE module writes the data obtained in step S5 to the CacheLine in the DDR. During the writing process, query the sector status in the NewDataRAM. If the bit is "1", discard the write operation of this sector; otherwise, write;
[0018] S7. The CACHE_CAL module calculates the check value of the CacheLine and writes it to the check position of the CacheLine;
[0019] S8. The SATA module writes the data in the CacheLine to the RAID physical disk;
[0020] S9. The CACHE_CAL module sets the occupied CacheLine to the empty state and sets the corresponding sector flag in the NewDataRAM to 0;
[0021] S10. Determine the value of k. If k = N, jump back to step S1. If k < N, set k = k + 1 and proceed to step S2.
[0022] Further, this method is applied to the Cache module, which includes a CACHE_CAL module, a SATA module, a MERGE module, CacheLine, and NewDataRAM.
[0023] Further, the CACHE_CAL module completes the parsing of the host write operation, the allocation of CacheLine, the read-back control of RAID physical disk data, the merging and checksum calculation of CacheLine data, the write control of RAID physical disk data, and the calculation of key data.
[0024] Further, the SATA module is a SATA interface controller module that completes the data transfer from CacheLine to the RAID physical disk and the data transfer from the RAID physical disk to the SATA module.
[0025] Further, CacheLine is a DDR space containing multiple sector sizes.
[0026] Further, NewDataRAM is a data storage space that stores the new and old states of sector data.
[0027] Further, the MERGE module is used to write the data of the RAID physical disk obtained by the SATA module to the CacheLine of the DDR according to the state of the NewDataRAM.
[0028] Further, the minimum operation unit of the write operation is 1 sector.
[0029] Further, when the proportion of the number of sectors to be updated in the CacheLine reaches the write-back physical disk threshold, the old data in the physical disk is read back and written into the CacheLine, and the data to be updated cannot be overwritten. A checksum is generated based on the merged data, and then the merged data and the checksum are written back together to form the RAID physical disk.
[0030] Furthermore, when reading old data from the physical disk into the CacheLine, the sectors of the data to be updated are skipped; when reading old data, all old data of the CacheLine capacity on the physical disk are read into the CacheLine at one time. Before the old data on the physical disk is written into the CacheLine, all write operations to the sectors where the data to be updated is located are discarded.
[0031] (3) Beneficial effects
[0032] The present invention proposes a RAID-based write data cache acceleration method. The present invention solves the write amplification problem caused by small data volume writes in RAID technology and designs a hardware acceleration algorithm solution to reduce RAID write amplification, thereby improving RAID write performance and maximizing the use of disk bandwidth. BRIEF DESCRIPTION OF THE DRAWINGS
[0033] Figure 1 Schematic diagram of RAID5 (data striping with distributed parity check) in the prior art;
[0034] Figure 2 This is an example of a small amount of writes in RAID5 in the prior art;
[0035] Figure 3 is a flow chart of the method of the present invention;
[0036] Figure 4 This is a system block diagram of the present invention. DETAILED DESCRIPTION
[0037] In order to make the purpose, content and advantages of the present invention more clear, the specific implementation methods of the present invention are further described in detail below with reference to the accompanying drawings and examples.
[0038] The RAID cache acceleration method studied in this paper is implemented by a cache module. Because the read and write access speed of DDR (typically on the order of 10GB / s) is much faster than that of RAID physical disks (typically on the order of 100MB / s), the cache module reorganizes write operations to the RAID physical disks by managing the DDR cache, thereby increasing write speed by reducing the number of write operations to the RAID physical disks. The cache module manages DDR in units of "CacheLines." A "CacheLine" is a section of DDR storage space managed by the cache module, consisting of multiple sectors. The stored content includes a continuous segment of data and the corresponding checksum values, and its function corresponds to a stripe on the RAID physical disk.
[0039] When receiving a write operation from a host computer (a device or module using RAID for data storage), the cache module does not immediately write the new data to the physical disk. Instead, it copies the data to the CacheLine space for temporary storage. Typically, a write operation from the host computer does not fill the entire CacheLine at once. Therefore, the CacheLine needs to record which sectors have been written by the host computer and are "inconsistent" with the data on the physical disk. This inconsistent data is "pending update data" and will eventually be written to the physical disk.
[0040] During RAID 5 operation, the host computer's write operation data is temporarily stored in DDR. To reduce the load on DDR, the data checksum is not updated every time new data is received. Instead, it is generated all at once when the proportion of "data to be updated" sectors in the cache line reaches the write-back threshold for the physical disk.
[0041] After a period of time, the proportion of sectors with "data to be updated" in the CacheLine reaches the threshold for writing back to the physical disk. The old data in the physical disk needs to be read back and written to the CacheLine, but care must be taken not to overwrite the data to be updated. A checksum is generated based on the merged data, and then the merged data and the checksum are written back to the physical disks that make up the RAID.
[0042] When reading old data from the physical disk into the CacheLine, sectors containing "data to be updated" are skipped. Because the continuity and dispersion of the "data to be updated" are unknown, reading back only the old data outside the sectors containing the "data to be updated" would generate multiple read operations through the SATA interface. To improve SATA interface bandwidth utilization, the entire old data within the physical disk's CacheLine capacity is read into the CacheLine at once during the reading process. This reduces the number and time of SATA interface read operations, while also enabling each physical disk to efficiently transfer large data packets. Before writing the physical disk's old data into the CacheLine, all write operations to the sectors containing the "data to be updated" are discarded to achieve the desired data merging effect.
[0043] Figure 4 This is the block diagram of the method of the present invention. The Cache module studied in this paper includes CACHE_CAL module, SATA module, MERGE module, CacheLine and NewDataRAM.
[0044] The CACHE_CAL module completes the parsing of the host write operation, the allocation of CacheLine, the read-back control of RAID physical disk data, the merging and checksum calculation of CacheLine data, the write control of RAID physical disk data, and the calculation of key data;
[0045] The SATA module is a SATA interface controller module that completes the data transfer from CacheLine to the RAID physical disk and the data transfer from the RAID physical disk to the SATA module;
[0046] CacheLine is a DDR space containing multiple sector sizes;
[0047] NewDataRAM is a data storage space that stores the new and old states of sector data;
[0048] The MERGE module is used to write the data of the RAID physical disk obtained by the SATA module to the CacheLine of the DDR according to the status of NewDataRAM.
[0049] As Figure 3 shown, the method of the present invention includes the following steps:
[0050] S1. After the CACHE_CAL module detects a new host write operation, it obtains the target address and the number of sectors accessed, and aligns and splits the write operation into several CacheLines according to the CacheLine size. The CacheLine numbers after splitting are set as 1, 2... N, and let k = 1.
[0051] S2. The CACHE_CAL module calculates whether the address of CacheLine numbered k exists in the current DDR. If it exists, it directly operates on the existing CacheLine; if it does not exist, it needs to find and occupy an empty CacheLine in the DDR and operate on this CacheLine;
[0052] S3. The CACHE_CAL module copies the new data of the host to the CacheLine, disassembles the write operation into sector operations corresponding to the CacheLine, and writes 1 (default is 0) to all the sector flag positions corresponding to the new data in NewDataRAM. Each written sector is represented by 1 bit.
[0053] S4. The CACHE_CAL module calculates the sector ratio of the data to be updated marked as 1 in CacheLine in NewDataRAM. If the write-back physical disk threshold is reached, perform step S5; otherwise, judge the value of k. If k = N, jump back to step S1. If k < N, let k = k + 1 and perform step S2;
[0054] S5. The SATA module reads the data of the corresponding CacheLine of the RAID physical disk;
[0055] S6. The MERGE module writes the data obtained in step S5 into the CacheLine of the DDR. During the writing process, it queries the status of the corresponding sector in the NewDataRAM. If the bit is "1", the write operation of this sector is discarded; otherwise, it is written. The minimum operation unit of the physical disk for the write operation in this article is 1 sector, and one CacheLine contains multiple sector sizes. Figure 3 It describes the composition of the CacheLine rather than the composition of the sector.
[0056] S7. The CACHE_CAL module calculates the check value of the CacheLine and writes it into the check position of the CacheLine;
[0057] S8. The SATA module writes the data in the CacheLine into the RAID physical disk;
[0058] S9. The CACHE_CAL module sets the occupied CacheLine to the empty state and sets the corresponding sector mark in the NewDataRAM to 0;
[0059] S10. Judge the value of k. If k = N, jump back to step S1. If k < N, let k = k + 1 and perform step S2.
[0060] The present invention solves the write amplification problem caused by small data volume writes in the RAID technology, designs a hardware acceleration algorithm scheme to reduce the RAID write amplification, thereby improving the RAID write performance and maximizing the utilization of the disk bandwidth.
[0061] The above is only the preferred embodiment of the present invention. It should be noted that for those of ordinary skill in the art, without departing from the technical principle of the present invention, several improvements and deformations can be made, and these improvements and deformations should also be regarded as the protection scope of the present invention.
Claims
1. A write data cache acceleration method based on RAID, characterized in that: The method includes the following steps: S1. After the CACHE_CAL module detects a new write operation from the host computer, it obtains the target address and the number of sectors accessed, and aligns and splits the write operation into several Cache Lines according to the Cache Line size. Set the numbers of the split Cache Lines as 1, 2... N, and let k = 1; S2. The CACHE_CAL module calculates whether the address of the Cache Line numbered k is in the current DDR. If it exists, directly operate on the existing Cache Line; if it does not exist, it needs to find and occupy an empty Cache Line in the DDR and operate on this Cache Line; S3. The CACHE_CAL module copies the new data from the host computer into the Cache Line, disassembles the write operation into sector operations corresponding to the Cache Line, and writes all the sector mark positions corresponding to the new data as 1 in the NewData RAM, with each written sector represented by 1 bit; S4. The CACHE_CAL module calculates the sector ratio of the data to be updated with the mark of 1 in the Cache Line in the NewData RAM. If the threshold for writing back to the physical disk is reached, go to step S5; otherwise, judge the value of k. If k = N, jump back to step S1. If k < N, let k = k + 1 and go to step S2; S5. The SATA module reads the data of the Cache Line corresponding to the RAID physical disk; S6. The MERGE module writes the data obtained in step S5 to the Cache Line in the DDR. During the writing process, query the status of the corresponding sector in the NewData RAM. If the bit is "1", discard the write operation of this sector; otherwise, write; S7. The CACHE_CAL module calculates the check value of the Cache Line and writes it to the check position of the Cache Line; S8. The SATA module writes the data in the Cache Line to the RAID physical disk; S9. The CACHE_CAL module sets the occupied Cache Line to an empty state and sets the corresponding sector mark in the NewData RAM to 0; S10. Judge the value of k. If k = N, jump back to step S1. If k < N, let k = k + 1 and go to step S2; Wherein, When the proportion of the number of sectors of the data to be updated in the Cache Line reaches the threshold for writing back to the physical disk, read the old data from the physical disk and write it into the Cache Line, and the data to be updated cannot be overwritten. Generate a check value according to the merged data, and then write the merged data and the check value back to the RAID physical disk together; When reading old data from the physical disk into the cache line, the sectors containing the data to be updated are skipped. When reading old data, all old data up to the cache line capacity of the physical disk is read into the cache line at once. Before the old data on the physical disk is written into the cache line, all write operations to the sectors containing the data to be updated are discarded.
2. The RAID-based write data cache acceleration method according to claim 1, wherein: The method is applied to a cache module, which includes a CACHE_CAL module, a SATA module, a MERGE module, a cache line, and a NewDataRAM.
3. The RAID-based write data cache acceleration method according to claim 2, wherein: The CACHE_CAL module completes the analysis of the host computer's write operations, the allocation of cache lines, the read-back control of RAID physical disk data, the merging and check value calculation of cache line data, the writing control of RAID physical disk data, and the calculation of key data.
4. The RAID-based write data cache acceleration method according to claim 2, wherein: The SATA module is a SATA interface controller module that completes data transmission from the cache line to the RAID physical disk and from the RAID physical disk to the SATA module.
5. The RAID-based write data cache acceleration method according to claim 2, wherein: A cache line is a DDR space that contains multiple sectors.
6. The RAID-based write data cache acceleration method according to claim 2, wherein: NewData RAM is a data storage space that stores the new and old status of sector data.
7. The RAID-based write data cache acceleration method according to claim 2, wherein: The MERGE module is used to write the RAID physical disk data obtained by the SATA module to the DDR cache line according to the status of the NewData RAM.
8. The RAID-based write data cache acceleration method according to claim 1, wherein: The minimum unit of write operation is 1 sector.
Citation Information
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