A circuit for maintaining the on impedance of a power transistor constant in a load switch

Abstract

The application discloses a circuit for keeping the on-resistance of a power tube constant in a load switch, which comprises a voltage-controlled current source unit, a reference voltage generation unit, a charge pump unit and a power tube. The voltage-controlled current source unit is used for generating a voltage-controlled current of the reference voltage generation unit based on the load voltage of the power tube. The reference voltage generation unit is connected with the voltage-controlled current source unit and the charge pump unit respectively, and is used for receiving the voltage-controlled current input by the voltage-controlled current source unit, generating a control voltage based on the voltage-controlled current and inputting the control voltage into the charge pump unit. The charge pump unit is connected with the gate of the power tube, and is used for receiving the control voltage output by the reference voltage generation unit, pumping a switch voltage with a multiple of the control voltage to the gate of the power tube, so as to control the output voltage of the source of the power tube. The method has simple circuit structure, low cost and small cost, and can effectively ensure the constant of the on-resistance of the power tube under the premise of constant load.

Description

Technical Field

[0001] This invention relates to the field of integrated circuits, and more specifically, to a circuit in a load switch that maintains a constant on-resistance of a power transistor. Background Technology

[0002] In the prior art, the internal structure of load switching chips using dual power supplies typically includes a charge pump, which generates a higher gate voltage at the output of the power transistor to achieve a higher output voltage for use by the subsequent load.

[0003] However, due to the charge pump effect, the gate voltage of the power transistor doubles from the bias voltage. This causes the gate-source voltage difference of the power transistor to fluctuate within the linear operating range due to the influence of the load current and voltage of the subsequent stage. Furthermore, the gate-source voltage difference in turn causes the on-resistance of the power transistor to change, thus affecting the output stability of the power transistor.

[0004] Therefore, there is an urgent need for a new circuit that maintains a constant on-resistance of the power transistor in a load switch. Summary of the Invention

[0005] To address the shortcomings of existing technologies, the present invention aims to provide a circuit that maintains a constant on-resistance of the power transistor in a load switch. This circuit employs a voltage-controlled current source unit and a reference voltage generation unit to generate the input voltage of the charge pump. This input voltage cancels out the effects of the bias voltage and the load voltage, thereby ensuring that the switching voltage of the power transistor gate generated by the charge pump is constant and effective.

[0006] The present invention adopts the following technical solution.

[0007] A circuit for maintaining a constant on-resistance of a power transistor in a load switch, wherein the circuit includes a voltage-controlled current source unit, a reference voltage generation unit, a charge pump unit, and a power transistor; the voltage-controlled current source unit is connected to the reference voltage generation unit and is used to generate a voltage-controlled current for the reference voltage generation unit based on the load voltage of the power transistor; the reference voltage generation unit is connected to both the voltage-controlled current source unit and the charge pump unit, and is used to receive the voltage-controlled current input from the voltage-controlled current source unit, generate a control voltage based on the voltage-controlled current, and input the control voltage to the charge pump unit; the charge pump unit is connected to the gate of the power transistor and is used to receive the control voltage output from the reference voltage generation unit, and pump a switching voltage multiple of the control voltage to the gate of the power transistor to control the output voltage of the power transistor source.

[0008] Preferably, the voltage-controlled current source unit includes a first error amplifier EA1, an NMOS transistor Mn0, voltage divider resistors R1 and R2 at the non-inverting input terminal, and a voltage divider resistor R3 at the negative input terminal; wherein, the device power supply of the first error amplifier is connected to a bias voltage Vbias; the non-inverting input terminal of the first error amplifier EA1 is connected to one end of the non-inverting input voltage divider resistors R1 and R2 respectively, the other end of R1 is connected to the load voltage Vin, and the other end of R2 is grounded; the negative input terminal of the first error amplifier EA1 is connected to the source of the NMOS transistor Mn0 and one end of the negative input voltage divider resistor R3 respectively, and the other end of R3 is grounded; the output terminal of the first error amplifier EA1 is connected to the gate of the NMOS transistor Mn0, and the drain of the NMOS transistor Mn0 serves as the output terminal of the voltage-controlled current source unit.

[0009] Preferably, the first error amplifier is used to adjust the voltage at the non-inverting input terminal based on output feedback. With negative input voltage V 1- =I·R3 is set to be equal, and a voltage-controlled current is generated accordingly.

[0010] Preferably, when the resistance values ​​of the voltage divider resistors R1 and R2 at the non-inverting input terminal are equal, the voltage-controlled current...

[0011] Preferably, the reference voltage generation unit includes a second error amplifier EA2, an inverter, a PMOS transistor Mp0, and voltage divider resistors R4 and R5 at the non-inverting input terminal; wherein, the device power supply of the second error amplifier and the source of the PMOS transistor Mp0 are respectively connected to a bias voltage Vbias; the non-inverting input terminal of the second error amplifier is connected to the voltage divider resistors R4 and R5 at the non-inverting input terminal and the output terminal of the voltage-controlled current source unit, respectively; the other end of R4 is connected to the drain of the PMOS transistor Mp0, and the other end of R5 is grounded; the negative input terminal of the second error amplifier is connected to a reference voltage Vref, and the output terminal is connected to the gate of the PMOS transistor Mp0 through an inverter; the drain of the PMOS transistor Mp0 and the other end of resistor R4 serve as the output terminals of the reference voltage generation unit.

[0012] Preferably, the second error amplifier is used to convert the voltage at the non-inverting input terminal based on output feedback. With negative input voltage V 2- =V ref Set them to be equal, and generate the control voltage accordingly.

[0013] Preferably, the control voltage is

[0014] Preferably, when the resistance values ​​of the voltage divider resistor R3 at the negative input terminal of the first error amplifier are equal to those of the voltage divider resistor R4 at the positive input terminal of the second error amplifier, and the resistance values ​​of the voltage divider resistors R1 and R2 at the positive input terminals are equal, the generated control voltage...

[0015] Preferably, the method for selecting the resistance value in the circuit is as follows: It is equal to the reciprocal of the pumping power of the charge pump unit.

[0016] Preferably, the charge pump unit is a double voltage charge pump, which generates the control voltage V output by the reference voltage generation unit. pump Generates switching voltage V gate =2·V pump .

[0017] Preferably, when the power transistor operates in the linear range, the gate-source voltage difference of the power transistor is... Gate-source voltage difference V gs The value of is constant.

[0018] Preferably, the drain of the power transistor MnPWR is connected to the load voltage V. in The source generates the output voltage V. out .

[0019] The beneficial effect of this invention is that, compared with the prior art, the circuit in this invention that maintains a constant on-resistance of the power transistor in a load switch uses a voltage-controlled current source unit and a reference voltage generation unit to generate the input voltage of the charge pump. This input voltage cancels out the influence of the bias voltage and the load voltage, thereby ensuring that the switching voltage of the power transistor gate generated by the charge pump is constant and effective. The method of this invention has a simple circuit structure, low cost, and minimal impact, and can effectively guarantee the constant on-resistance of the power transistor under the premise of constant load.

[0020] The beneficial effects of the present invention also include:

[0021] 1. During circuit design, it is necessary to test the on-resistance of the power transistor to determine the relevant parameters of other components in the circuit. In existing technologies, the on-resistance of the power transistor is often significantly affected by bias voltage and load voltage, resulting in substantial changes. Therefore, even testing a single chip requires testing the on-resistance at multiple different voltage points, leading to high testing costs. The circuit in this invention maintains a constant on-resistance under constant load, thus effectively reducing testing costs.

[0022] 2. In existing technologies, to ensure relatively stable conduction impedance, the load voltage Vin of the subsequent circuit needs to be set to a relatively safe level. Additionally, the generation method of the bias voltage Vbias needs to be carefully planned to prevent the bias voltage and load voltage from affecting the power transistor. In this invention, because a reference voltage generation unit and a voltage-controlled current source unit are separately provided, the bias voltage and load voltage cancel each other out, thereby preventing the aforementioned two voltages from affecting the power transistor. Attached Figure Description

[0023] Figure 1 This is a schematic diagram of the output section of a load switch circuit in the prior art of the present invention;

[0024] Figure 2 This is a schematic diagram of the circuit structure in a load switch that maintains a constant on-resistance of the power transistor. Detailed Implementation

[0025] The present application will be further described below with reference to the accompanying drawings. The following embodiments are only used to more clearly illustrate the technical solutions of the present invention, and should not be construed as limiting the scope of protection of the present application.

[0026] Figure 1 This is a schematic diagram of the output section of a load switch circuit in the prior art of this invention. (See diagram below.) Figure 1 As shown, the output section of a load switch circuit uses a bias voltage Vbias input to a charge pump, which generates twice the bias voltage as the gate voltage of the power transistor. Combined with the load voltage Vin, this generates the output voltage Vout.

[0027] Understandably, in the circuit described above, when the power transistor operates in the linear range, the gate-source voltage difference Vgs is equal to the difference between its gate voltage and drain voltage, i.e., Vgs = 2 * Vbias - Vin. In this circuit, the gate-source voltage difference is significantly affected by the bias voltage and load voltage. However, typically within the linear range, the on-resistance of the power transistor is proportional to its overdrive voltage, resulting in a substantial change in the on-resistance as Vgs changes. This change will severely impact chip testing and design, as well as the accuracy of the output voltage during chip application.

[0028] Therefore, the present invention proposes a new design to solve the above-mentioned problems.

[0029] Figure 2 This is a schematic diagram of the circuit structure for maintaining a constant on-resistance of the power transistor in a load switch according to the present invention. Figure 2As shown, this invention discloses a circuit for maintaining a constant on-resistance of a power transistor in a load switch. The circuit includes a voltage-controlled current source unit, a reference voltage generation unit, a charge pump unit, and a power transistor. The voltage-controlled current source unit is connected to the reference voltage generation unit and is used to generate a voltage-controlled current for the reference voltage generation unit based on the load voltage of the power transistor. The reference voltage generation unit is connected to both the voltage-controlled current source unit and the charge pump unit, and is used to receive the voltage-controlled current input from the voltage-controlled current source unit, generate a control voltage based on the voltage-controlled current, and input the control voltage to the charge pump unit. The charge pump unit is connected to the gate of the power transistor and is used to receive the control voltage output from the reference voltage generation unit and pump a switching voltage multiple of the control voltage to the gate of the power transistor to control the output voltage of the power transistor's source.

[0030] Understandably, the voltage-controlled current source unit inputs the generated voltage-controlled current into the reference voltage generation unit. The reference voltage generation unit uses the voltage-controlled current source unit to calculate and obtain a control voltage with a certain degree of current limiting. After this control voltage is amplified by a charge pump, the generated switching voltage contains exactly the load voltage Vin component. This component, after being input to the power transistor, cancels out the load voltage at the power transistor's drain, thereby generating a gate-source voltage difference of the power transistor that is only related to the reference voltage Vref and the resistance values ​​of the voltage divider resistors R4 and R5. In this way, the present invention ensures the constantness of the power transistor's on-resistance.

[0031] Preferably, the voltage-controlled current source unit includes a first error amplifier EA1, an NMOS transistor Mn0, voltage divider resistors R1 and R2 at the non-inverting input terminal, and a voltage divider resistor R3 at the negative input terminal; wherein, the device power supply of the first error amplifier is connected to a bias voltage Vbias; the non-inverting input terminal of the first error amplifier EA1 is connected to one end of the non-inverting input voltage divider resistors R1 and R2 respectively, the other end of R1 is connected to the load voltage Vin, and the other end of R2 is grounded; the negative input terminal of the first error amplifier EA1 is connected to the source of the NMOS transistor Mn0 and one end of the negative input voltage divider resistor R3 respectively, and the other end of R2 is grounded; the output terminal of the first error amplifier EA1 is connected to the gate of the NMOS transistor Mn0, and the drain of the NMOS transistor Mn0 serves as the output terminal of the voltage-controlled current source unit.

[0032] In this invention, the positive input terminal of the error amplifier is connected to a voltage divider of the load voltage, and the negative input terminal is fed back to its output terminal through an NMOS transistor Mn0. In this way, after the error amplifier EA1 is turned on to a constant state, the voltages at the positive and negative input terminals are equal, thus ensuring the constant voltage of the error amplifier.

[0033] Preferably, the first error amplifier is used to adjust the voltage at the non-inverting input terminal based on output feedback. With negative input voltage V 1- =I·R3 is set to be equal, and a voltage-controlled current is generated accordingly.

[0034] It is understood that in this invention, when the voltages at the positive and negative input terminals are equal, the value of the current I can be obtained by converting the equations based on the voltages at the positive and negative input terminals. It is also understood that the current I in this invention is exactly the output current of the voltage-controlled current source unit in this invention, which is the voltage-controlled current mentioned above.

[0035] In this invention, to achieve the cancellation of the drain voltage of the power transistor, i.e., the load voltage Vin, by the voltage-controlled current, it is necessary to ensure that the product of the voltage division coefficient achieved by the multiple voltage divider resistors in the circuit and the pumping coefficient achieved by the charge pump is exactly equal to 1. That is to say, the proportional relationship of the resistance values ​​of each resistor in the circuit can be determined according to the pumping coefficient of the charge pump, which will be described in detail later.

[0036] Preferably, when the resistance values ​​of the voltage divider resistors R1 and R2 at the non-inverting input terminal are equal, the voltage-controlled current...

[0037] In this invention, after the first error amplifier enters a stable operating state, the voltage at its positive input terminal and the voltage at its negative input terminal will be set to be equal, that is... By deriving this formula, we can obtain the value of the voltage-controlled current I. Therefore, when the resistance values ​​of the voltage divider resistors R1 and R2 are equal, the voltage-controlled current can be obtained by substituting them into the formula. Preferably, the reference voltage generation unit includes a second error amplifier EA2, an inverter, a PMOS transistor Mp0, and voltage divider resistors R4 and R5 at the non-inverting input terminal; wherein, the device power supply of the second error amplifier is connected to the bias voltage Vbias, and the source of the PMOS transistor Mp0 is connected to the bias voltage Vbias; the non-inverting input terminal of the second error amplifier is connected to the voltage divider resistors R4 and R5 at the non-inverting input terminal and the output terminal of the voltage-controlled current source unit, respectively; the other end of R4 is connected to the drain of the PMOS transistor Mp0, and the other end of R5 is grounded; the negative input terminal of the second error amplifier is connected to the reference voltage Vref, and the output terminal is connected to the gate of the PMOS transistor Mp0 through the inverter; the drain of the PMOS transistor Mp0 and the other end of the resistor R4 serve as the output terminals of the reference voltage generation unit.

[0038] It is understood that in this invention, a second error amplifier is used to simultaneously acquire the reference voltage Vref and the voltage-controlled current I, thereby generating a control voltage. Similar to the function of the first error amplifier, the second error amplifier in this invention can also maintain a constant state after being turned on for a certain period of time. In the constant state, the voltages at the positive and negative input terminals of the error amplifier EA2 are equal.

[0039] Preferably, the second error amplifier is used to convert the voltage at the non-inverting input terminal based on output feedback. With negative input voltage V 2- =V ref Set them to be equal, and generate the control voltage accordingly.

[0040] It is understood that the negative input terminal of the second error amplifier is connected to the reference voltage Vref, while the voltage at its positive input terminal is connected to the output terminal through the PMOS transistor Mp0, thus achieving feedback. In this process of the present invention, R4 and R5, as well as the output terminal of the voltage-controlled current source unit, can be used as three branches to calculate the voltage at the point on the reference voltage generation unit connected to the output terminal of the voltage-controlled current source unit, which is the voltage at the positive input terminal of the second error amplifier EA2.

[0041] Specifically, the voltage at this point should be equal to the difference between the control voltage and the voltage across resistor R4. The current through resistor R1 is the sum of current I and the current flowing through resistor R5. Based on this principle, the voltage at this point should be equal to... Furthermore, based on the fact that the positive and negative phase voltages of this error amplifier are equal, the equation can be obtained. V in the offset formula 2+ Then we can deduce V pump The value of is determined.

[0042] Preferably, the control voltage is

[0043] The above formula Simplify and use the voltage-controlled current calculated above. Substituting the original calculation formula into the simplified formula, we can obtain the value of the control voltage. It is evident that the value of the control voltage is related to the values ​​of each resistor in the circuit, the reference voltage, and the input voltage. It is independent of other parameters. In other words, once the reference voltage V of the circuit is determined... ref and the input voltage V of the power transistor in Then, you only need to adjust the values ​​of each resistor or the proportional relationship between each resistor to obtain the required control voltage.

[0044] Preferably, when the resistance values ​​of the voltage divider resistor R3 at the negative input terminal of the first error amplifier are equal to those of the voltage divider resistor R4 at the positive input terminal of the second error amplifier, and the resistance values ​​of the voltage divider resistors R1 and R2 at the positive input terminals are equal, the generated control voltage...

[0045] It is understood that in this invention, the resistance values ​​of R3 and R4 can be set to be equal, and the resistance values ​​of R1 and R2 can be set to be equal, thereby further determining the value of the control voltage.

[0046] Preferably, the method for selecting the resistance value in the circuit is as follows: It is equal to the reciprocal of the pumping power of the charge pump unit.

[0047] To ensure that the output voltage value in this invention is compatible with the load input voltage V in Completely unrelated, the final selection of the resistor can be based on the charge pump's amplification factor. For example, when the charge pump's factor is 2, The value of can be 1 / 2, so that the load voltage V in the generated output voltage will be... in The amount can be completely offset.

[0048] Preferably, the charge pump unit is a double charge pump, and the control voltage V output by the unit is generated based on the reference voltage. pump Generates switching voltage V gate =2*V pump .

[0049] In this invention, to simplify the circuit, the charge pump can be set to the most commonly used and simplest double charge pump in the prior art. Preferably, when the power transistor operates in the linear range, the gate-source voltage difference of the power transistor is... Gate-source voltage difference V gs The value of is constant.

[0050] It is understood that in this invention, when the power transistor operates within the linear range, the gate-source voltage difference of the power transistor is no longer affected by the load voltage Vin, but only changes according to the reference voltage Vref. Since the value of the reference voltage Vref can remain relatively constant during circuit operation, the value of the gate-source voltage difference Vgs remains essentially unchanged.

[0051] Preferably, the drain of the power transistor MnPWR is connected to the load voltage V. in The source generates the output voltage V. out .

[0052] Similar to power transistors in the prior art, the source output voltage of the power transistor is controlled by the gate voltage to supply the power to the subsequent circuitry.

[0053] The beneficial effect of this invention is that, compared with the prior art, the circuit in this invention that maintains a constant on-resistance of the power transistor in a load switch uses a voltage-controlled current source unit and a reference voltage generation unit to generate the input voltage of the charge pump. This input voltage cancels out the influence of the bias voltage and the load voltage, thereby ensuring that the switching voltage of the power transistor gate generated by the charge pump is constant and effective. The method of this invention has a simple circuit structure, low cost, and minimal impact, and can effectively guarantee the constant on-resistance of the power transistor under the premise of constant load.

[0054] The applicant of this invention has provided a detailed description of the embodiments of the invention in conjunction with the accompanying drawings. However, those skilled in the art should understand that the above embodiments are merely preferred embodiments of the invention. The detailed description is only intended to help readers better understand the spirit of the invention and is not intended to limit the scope of protection of the invention. On the contrary, any improvements or modifications made based on the inventive spirit of the invention should fall within the scope of protection of the invention.

Claims

1. A circuit for maintaining a constant on-resistance of a power transistor in a load switch, characterized in that: The circuit includes a voltage-controlled current source unit, a reference voltage generation unit, a charge pump unit, and a power transistor; wherein... The voltage-controlled current source unit is connected to the reference voltage generation unit and is used to generate the voltage-controlled current of the reference voltage generation unit based on the load voltage of the power transistor. The voltage-controlled current source unit includes a first error amplifier EA1, an NMOS transistor Mn0, voltage divider resistors R1 and R2 at the positive input terminal, and a voltage divider resistor R3 at the negative input terminal; wherein... The device power supply of the first error amplifier EA1 is connected to the bias voltage Vbias. The non-inverting input terminal of the first error amplifier EA1 is connected to one end of the non-inverting input voltage divider resistors R1 and R2 respectively, the other end of R1 is connected to the load voltage, and the other end of R2 is grounded; The negative input terminal of the first error amplifier EA1 is connected to the source of the NMOS transistor Mn0 and one end of the voltage divider resistor R3 at the negative input terminal, respectively, and the other end of R3 is grounded. The output terminal of the first error amplifier EA1 is connected to the gate of the NMOS transistor Mn0, and the drain of the NMOS transistor Mn0 serves as the output terminal of the voltage-controlled current source unit. The reference voltage generating unit is connected to the voltage-controlled current source unit and the charge pump unit respectively, and is used to receive the voltage-controlled current input by the voltage-controlled current source unit, generate a control voltage based on the voltage-controlled current, and input the control voltage to the charge pump unit; The charge pump unit is connected to the gate of the power transistor and is used to receive the control voltage output from the reference voltage generation unit and pump a switching voltage multiple of the control voltage to the gate of the power transistor to control the output voltage of the power transistor source.

2. The circuit for maintaining a constant on-resistance of the power transistor in a load switch according to claim 1, characterized in that: The first error amplifier EA1 is used to adjust the voltage at the non-inverting input terminal based on output feedback. With negative input voltage Set them to be equal, and generate voltage-controlled current accordingly.

3. The circuit for maintaining a constant on-resistance of the power transistor in a load switch according to claim 2, characterized in that: When the resistance values ​​of the voltage divider resistors R1 and R2 at the non-inverting input terminal are equal, the voltage-controlled current... .

4. The circuit for maintaining a constant on-resistance of the power transistor in a load switch according to claim 2, characterized in that: The reference voltage generation unit includes a second error amplifier EA2, an inverter, a PMOS transistor Mp0, and voltage divider resistors R4 and R5 at the non-inverting input; wherein... The device power supply of the second error amplifier EA2 and the source of the PMOS transistor Mp0 are respectively connected to a bias voltage Vbias; The non-inverting input terminal of the second error amplifier EA2 is connected to the voltage divider resistors R4 and R5 and the output terminal of the voltage-controlled current source unit, respectively. The other end of R4 is connected to the drain of the PMOS transistor Mp0, and the other end of R5 is grounded. The negative input terminal of the second error amplifier EA2 is connected to the reference voltage Vref, and the output terminal is connected to the gate of the PMOS transistor Mp0 through an inverter; The drain of the PMOS transistor Mp0 and the other end of the resistor R4 serve as the output terminals of the reference voltage generation unit, respectively.

5. The circuit for maintaining a constant on-resistance of the power transistor in a load switch according to claim 4, characterized in that: The second error amplifier EA2 is used to adjust the voltage at the non-inverting input terminal based on output feedback. With negative input voltage Set them to be equal, and generate the control voltage accordingly.

6. The circuit for maintaining a constant on-resistance of a power transistor in a load switch according to claim 5, characterized in that: The control voltage is .

7. The circuit for maintaining a constant on-resistance of a power transistor in a load switch according to claim 6, characterized in that: When the voltage divider resistor R3 at the negative input terminal of the first error amplifier EA1 is equal to the voltage divider resistor R4 at the positive input terminal of the second error amplifier EA2, and when the voltage divider resistors R1 and R2 at the positive input terminal of the first error amplifier EA1 are equal, the generated control voltage... .

8. The circuit for maintaining a constant on-resistance of a power transistor in a load switch according to claim 7, characterized in that: The method for selecting the resistance value in the circuit is as follows: It is equal to the reciprocal of the pumping factor of the charge pump unit.

9. The circuit for maintaining a constant on-resistance of a power transistor in a load switch according to claim 8, characterized in that: When the power transistor operates in the linear range, the gate-source voltage difference of the power transistor... The gate-source voltage difference The value of is constant.

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