Techniques for rendering a signed distance function

Abstract

The present disclosure relates to techniques for rendering a signed distance function. One embodiment of a method for rendering one or more graphics images includes tracing one or more rays in a graphics scene, computing one or more surface normals associated with intersections of the one or more rays and one or more surfaces, wherein computing each surface normal includes computing a plurality of intermediate surface normals associated with a plurality of neighboring voxels of a mesh and interpolating the plurality of intermediate surface normals, and rendering one or more graphics images based on the one or more surface normals.

Description

[0001] Cross Reference to Related Applications

[0002] This application claims the benefit of U.S. Provisional Patent Application Serial No. 63 / 241,472, filed September 7, 2021, entitled “TECHNIQUES FOR FAST SDF GRID INTERSECTION AND NORMAL COMPUTATIONS,” and also claims the benefit of U.S. Provisional Patent Application Serial No. 63 / 240,317, filed September 2, 2021, entitled “TECHNIQUES FOR FAST SDF GRID INTERSECTION AND NORMAL COMPUTATIONS.” The subject matter of these related applications is hereby incorporated by reference herein. TECHNICAL FIELD

[0003] Embodiments of the present disclosure generally relate to computer science and computer graphics, and more specifically to techniques for rendering signed distance functions. BACKGROUND

[0004] In three-dimensional (3D) computer graphics, signed distance functions (SDFs) are often used to represent virtual 3D geometry of objects. An SDF specifies a distance from one or more points in space to a surface of one or more objects in a 3D graphics scene. From a given point in space, a positive distance indicates that the point is outside the object, and a negative distance indicates that the point is inside the object. While very useful, SDFs present multiple challenges when used to render 3D graphics images.

[0005] First, conventional methods for rendering SDFs involve tracing a sphere from a viewer of a 3D scene to an intersection with a surface of a geometry represented by an SDF within the 3D scene. Successive spheres are traced in steps that do not penetrate the surface until an intersection with the surface is reached. However, tracing spheres that are close to or far from the surface can be a very slow process.

[0006] When tracing a sphere toward a surface represented by an SDF, the intersection between the sphere and the surface can be found by solving for a root of a cubic function that represents the distance to the surface. In general, the cubic function can be derived from the SDF by computing coefficients of the cubic function. However, conventional techniques for computing the coefficients of the cubic function require repeating many of the same computations, which is computationally inefficient.

[0007] Further, rendering operations for determining shadows and reflections within an image require computation of normals to surfaces represented by SDFs. However, surface normals computed according to conventional techniques are discontinuous across voxels of a grid used to store values of the SDF. In particular, surface normals computed according to conventional techniques can change direction abruptly. As a result, images rendered using conventional techniques to compute surface normals can include abrupt changes in lighting on surfaces of objects that appear to be sharp edges, even though those surfaces should appear smooth in appearance. These types of artifacts can degrade overall image quality.

[0008] As previously described, there is a need in the art for more efficient techniques for rendering SDFs in computer graphics applications. SUMMARY

[0009] One embodiment of the present disclosure sets forth a computer-implemented method for rendering one or more graphics images. The method includes tracing one or more rays in a graphics scene. The method also includes computing one or more surface normals associated with intersections of the one or more rays with one or more surfaces, where computing each surface normal includes computing a plurality of intermediate surface normals associated with a plurality of neighboring voxels of a grid and interpolating the plurality of intermediate surface normals. Further, the method includes rendering the one or more graphics images based on the one or more surface normals.

[0010] Another embodiment of the present disclosure sets forth a computer-implemented method for computing a pixel color. The method includes tracing a ray in a graphics scene to a hit point at which the ray intersects a geometry surface. The method also includes computing a plurality of intermediate surface normals based on a plurality of geometry surfaces associated with a plurality of corresponding voxels of a grid. The method further includes performing one or more interpolation operations based on the plurality of intermediate surface normals to compute a surface normal at the hit point. Further, the method includes computing a first pixel color based on the surface normal.

[0011] Another embodiment of the present disclosure sets forth a computer-implemented method for computing a pixel color. The method includes tracing a ray in a graphics scene to an intersection point of the ray with a voxel of a grid. The method also includes computing one or more values of one or more coefficients of a cubic function associated with the voxel based on a factorization formula for the one or more coefficients. The method further includes computing an intersection of the ray with a geometry surface within the voxel based on the cubic function. Further, the method includes computing a first pixel color based on the intersection of the ray with the geometry surface.

[0012] Another embodiment of the present disclosure sets forth a computer-implemented method for computing a pixel color. The method includes tracing a shadow ray in a graphics scene. The method also includes determining one or more turning points of a cubic function, where the cubic function represents a plurality of distances to one or more surfaces of a geometric body within a grid voxel. The method further includes determining, based on the one or more turning points, a plurality of values of the cubic function at a plurality of boundaries of one or more sub-intervals of an interval associated with the voxel. The method also includes determining, based on the plurality of values, whether a hit point at which another ray intersects another surface of the geometric body is located within the shadow. Moreover, the method includes computing the first pixel color based on whether the hit point is located within the shadow.

[0013] Other embodiments of the present disclosure include, without limitation, one or more computer-readable media comprising instructions for performing one or more aspects of the disclosed technology and one or more computing systems for performing one or more aspects of the disclosed technology.

[0014] At least one technical advantage of the disclosed technology over the prior art is that the disclosed technology requires fewer operations to compute coefficients of a cubic function when determining an intersection point of a ray with a surface of a 3D object represented by an SDF. Moreover, the disclosed technology does not always require computing an exact intersection point between a shadow ray and a surface during a shadow ray test, which is computationally more efficient over conventional techniques that require computing such an intersection point. Furthermore, images rendered using surface normals computed according to the disclosed technology include smoother lighting variations than those found in images rendered using conventional techniques, which improves overall image quality over what can be achieved with conventional techniques. These technical advantages represent one or more technical improvements over prior art methods. BRIEF DESCRIPTION OF DRAWINGS

[0015] In order to enable a detailed understanding of the above-mentioned features of the various embodiments, a more particular description of the inventive concepts briefly summarized above can be had by reference to the various embodiments, some of which are illustrated in the appended drawings. It is noted, however, that the drawings are for illustration purposes only and should not be considered as limiting in any way the scope of the present inventive concepts, as other equally effective embodiments can be utilized.

[0016] Figure 1 is a block diagram illustrating a computer system configured to implement one or more aspects of the present embodiments;

[0017] Figure 2 is a block diagram of a parallel processing unit included in a parallel processing subsystem of Figure 1

[0018] Figure 3 is a block diagram of a parallel processing unit included in a parallel processing subsystem of Figure 2 ​a block diagram of a general processing cluster included in a parallel processing unit of the GPU of FIG. 1;

[0019] Figure 4 is a block diagram illustrating an exemplary cloud computing system in accordance with various embodiments;

[0020] Figure 5 illustrates exemplary rays traced in a virtual three-dimensional scene in accordance with various embodiments;

[0021] Figure 6 illustrates an exemplary shadow ray test using turning points of a cubic function in accordance with various embodiments;

[0022] Figure 7A -B illustrates a method for interpolating analytic normals in accordance with various embodiments;

[0023] Figure 8A illustrates exemplary images rendered using analytic normal interpolation in accordance with various embodiments;

[0024] Figure 8B illustrates exemplary images rendered using analytic normal interpolation in accordance with various embodiments;

[0025] Figure 9 is a flowchart of method steps for tracing a ray to a surface of a geometric body represented by a signed distance function in accordance with various embodiments;

[0026] Figure 10 is a flowchart of method steps for a shadow ray test in accordance with various embodiments; and

[0027] Figure 11 is a flowchart of method steps for determining a pixel color based on analytic normal interpolation in accordance with various embodiments. DETAILED DESCRIPTION

[0028] In the following description, numerous specific details are set forth to provide a more thorough understanding of the various embodiments. However, it will be apparent to one skilled in the art that the present inventive concepts can be practiced without one or more of these specific details.

[0029] OVERALL SUMMARY

[0030] Embodiments of the present disclosure provide improved techniques for rendering SDFs. The improved techniques for rendering SDFs have many practical applications, including video games, production quality rendering for movies, architectural and design applications, and any other application that can render images using ray tracing. In the improved techniques for rendering SDFs, a factorization formula for coefficients is used to determine a cubic function to find an intersection point of a traced ray with a surface of a geometry represented by an SDF. When the traced ray is a shadow ray, a turning point of the cubic function is used to determine whether the shadow ray intersects the surface. Further, after a hit point of the ray with the surface is determined, a surface normal is computed by interpolating the surface normal from neighboring voxels of a mesh.

[0031] The techniques for rendering SDFs of the present disclosure have many practical applications. For example, the techniques for rendering SDFs can be used to efficiently render images and / or frames in a video game. As one particular example, the techniques for rendering SDFs can be performed by a cloud-based graphics processing platform, such as a cloud-based gaming platform that executes a video game and streams video of a game session to client devices. The disclosed techniques for rendering SDFs are computationally more efficient than traditional techniques for rendering SDFs. The rendered images and / or frames can also appear more realistic with fewer artifacts than images and / or frames rendered using some other traditional rendering techniques.

[0032] As another example, the techniques for rendering SDFs can be used for production quality rendering of movies. The production of animated movies, as well as special effects and computer generated images (CGI) in live action movies, often requires high quality rendering of frames of these movies. The disclosed techniques for rendering SDFs can be used to render frames of movies more efficiently and / or more accurately than some other traditional rendering techniques.

[0033] As yet another example, the disclosed techniques for rendering SDFs can be used to render designs of architectural structures and other objects. Architectural and design applications often provide renderings to show how a particular design would appear in real life. The disclosed techniques for rendering SDFs can be used to render design images more efficiently and / or more accurately than some other conventional rendering techniques.

[0034] The above examples are not intended to be limiting in any way. As will be appreciated by those skilled in the art, as a general matter, the techniques for rendering SDFs described herein can be implemented in any application that currently employs conventional ray tracing and / or techniques for rendering SDFs.

[0035] System Overview

[0036] Figure 1is a block diagram illustrating a computer system 100 configured to implement one or more aspects of the various embodiments. As those skilled in the art will appreciate, the computer system 100 can be any type of technologically feasible computer system, including but not limited to a server machine, a server platform, a desktop, a laptop, a handheld / mobile device, or a wearable device. In some embodiments, the computer system 100 is a server machine operating in a data center or a cloud computing environment that provides scalable computing resources as a service over a network.

[0037] In various embodiments, the computer system 100 includes, but is not limited to, a central processing unit (CPU) 102 and system memory 104 coupled to a parallel processing subsystem 112 via a memory bridge 105 and a communication path 113. The memory bridge 105 is further coupled to an I / O (input / output) bridge 107 via a communication path 106, and the I / O bridge 107 is in turn coupled to a switch 116.

[0038] In one embodiment, the I / O bridge 107 is configured to receive user input information from an optional input device 108, such as a keyboard or a mouse, and to forward the input information to the CPU 102 via the communication path 106 and the memory bridge 105 for processing. In some embodiments, the computer system 100 can be a server machine in a cloud computing environment. In these embodiments, the computer system 100 can not have an input device 108. Instead, the computer system 100 can receive equivalent input information by receiving commands in the form of messages transmitted over a network and received via a network adapter 118. In one embodiment, the switch 116 is configured to provide connectivity between the I / O bridge 107 and other components of the computer system 100, such as the network adapter 118 and various plug-in cards 120 and 121.

[0039] In one embodiment, the I / O bridge 107 is coupled to a system disk 114, which can be configured to store content, applications, and data for use by the CPU 102 and the parallel processing subsystem 112. In one embodiment, the system disk 114 provides non-volatile storage of applications and data, and can include a fixed or removable hard disk drive, flash memory device, and a CD-ROM (compact disk read-only memory), DVD-ROM (digital versatile disk-ROM), Blu-ray, HD-DVD (high definition DVD), or other magnetic, optical, or solid-state storage devices. In various embodiments, other components such as universal serial bus or other port connections, optical disk drives, digital versatile disk drives, tape storage devices, etc. can also be connected to the I / O bridge 107.

[0040] In various embodiments, memory bridge 105 may be a Northbridge chip, and I / O bridge 107 may be a Southbridge chip. Furthermore, communication paths 106 and 113, as well as other communication paths within computer system 100, may be implemented using any technically suitable protocol, including but not limited to AGP (Accelerated Graphics Port), HyperTransport, or any other bus or point-to-point communication protocol known in the art.

[0041] In some embodiments, the parallel processing subsystem 112 includes a graphics subsystem that transmits pixels to an optional display device 110, which may be any conventional cathode ray tube, liquid crystal display, light-emitting diode display, etc. In these embodiments, the parallel processing subsystem 112 incorporates circuitry optimized for graphics and video processing, including, for example, video output circuitry. As follows... Figures 2-3 As described in more detail herein, such circuitry can be combined across one or more parallel processing units (PPUs) (also referred to herein as parallel processors) included within the parallel processing subsystem 112. In other embodiments, the parallel processing subsystem 112 includes circuitry optimized for general and / or computational processing. Again, such circuitry can be combined across one or more PPUs included within the parallel processing subsystem 112, configured to perform such general and / or computational operations. In yet another embodiment, one or more PPUs included within the parallel processing subsystem 112 may be configured to perform graphics processing, general processing, and computational processing operations. System memory 104 includes at least one device driver configured to manage the processing operations of one or more PPUs within the parallel processing subsystem 112. Furthermore, system memory 104 includes a rendering application 130. Rendering application 130 can be any technically feasible application that renders a virtual 3D scene, and rendering the scene can include rendering an SDF according to the techniques disclosed herein. For example, rendering application 130 can be a game application or a rendering application used in filmmaking. Although this document is primarily described with respect to rendering application 130, the techniques disclosed herein can also be implemented, in whole or in part, in other software and / or hardware, such as in parallel processing subsystem 112.

[0042] In various embodiments, the parallel processing subsystem 112 can be coupled with... Figure 1 One or more other components can be integrated to form a single system. For example, the parallel processing subsystem 112 can be integrated with the CPU 102 and other interconnect circuitry on a single chip to form a system-on-a-chip (SoC).

[0043] In one embodiment, CPU 102 is the main processor of computer system 100, used to control and coordinate the operation of other system components. In one embodiment, CPU 102 issues commands to control the operation of PPUs. In some embodiments, as known in the art, communication path 113 is a PCI Express link in which a dedicated channel is allocated to each PPU. Other communication paths may also be used. The PPU advantageously implements a highly parallel processing architecture. The PPU can be equipped with any number of local parallel processing memories (PP memories).

[0044] It should be understood that the system illustrated herein is illustrative and can be changed and modified. The connection topology can be modified as needed, including the number and arrangement of bridges, the number of CPUs 102, and the number of parallel processing subsystems 112. For example, in some embodiments, system memory 104 may be directly connected to CPU 102 instead of via memory bridge 105, and other devices will communicate with system memory 104 via memory bridge 105 and CPU 102. In other embodiments, parallel processing subsystems 112 may be connected to I / O bridge 107 or directly to CPU 102 instead of via memory bridge 105. In other embodiments, I / O bridge 107 and memory bridge 105 may be integrated into a single chip rather than existing as one or more discrete devices. In some embodiments, they may not exist. Figure 1 One or more components are shown. For example, switch 116 can be removed, and network adapter 118 and plug-in cards 120, 121 can be directly connected to I / O bridge 107. Finally, in some embodiments, Figure 1 One or more components shown can be implemented as virtualized resources in a virtual computing environment, such as a cloud computing environment. Specifically, in some embodiments, the parallel processing subsystem 112 can be implemented as a virtualized parallel processing subsystem. For example, the parallel processing subsystem 112 can be implemented as a virtual graphics processing unit (GPU) that renders graphics on a virtual machine (VM) that executes on a server machine whose GPU and other physical resources are shared across multiple VMs.

[0045] Figure 2 According to various embodiments Figure 1 A block diagram of the parallel processing unit (PPU) 202 included in the parallel processing subsystem 112. Although Figure 2A PPU 202 is depicted, but as described above, the parallel processing subsystem 112 may include any number of PPUs 202. As shown, the PPU 202 is coupled to a local parallel processing (PP) memory 204. The PPU 202 and PP memory 204 may be implemented using one or more integrated circuit devices (such as programmable processors, application-specific integrated circuits (ASICs), or storage devices), or in any other technically feasible manner.

[0046] In some embodiments, PPU 202 includes a GPU configured to implement a graphics rendering pipeline to perform various operations related to generating pixel data based on graphics data provided by CPU 102 and / or system memory 104. When processing graphics data, PPU 204 can be used as graphics memory, storing one or more regular frame buffers and (if needed) one or more other rendering targets. Among other things, PPU 204 can be used to store and update pixel data and transmit the final pixel data or display frame to optional display device 110 for display. In some embodiments, PPU 202 can also be configured for general processing and computational operations. In some embodiments, computer system 100 can be a server machine in a cloud computing environment. In these embodiments, computer system 100 may not have display device 110. Instead, computer system 100 can generate equivalent output information by sending commands in the form of messages over a network via network adapter 118.

[0047] In some embodiments, CPU 102 is the main processor of computer system 100, controlling and coordinating the operation of other system components. In one embodiment, CPU 102 issues commands to control the operation of PPU 202. In some embodiments, CPU 102 writes the command stream for PPU 202 into a data structure ( Figure 1 or Figure 2 (Not explicitly shown herein), the data structure may reside in system memory 104, PP memory 204, or another storage location accessible to both CPU 102 and PPU 202. A pointer to the data structure is written to a command queue, also referred to herein as a push buffer, to initiate processing of the command stream in the data structure. In one embodiment, PPU 202 reads the command stream from the command queue and then executes the commands asynchronously relative to the operation of CPU 102. In embodiments that generate multiple push buffers, the application may specify an execution priority for each push buffer via a device driver to control the scheduling of different push buffers.

[0048] In one embodiment, PPU 202 includes an I / O (input / output) unit 205 that communicates with the remainder of computer system 100 via communication path 113 and memory bridge 105. In one embodiment, I / O unit 205 generates packets (or other signals) for transmission on communication path 113 and also receives all incoming packets (or other signals) from communication path 113, directing the incoming packets to the appropriate components of PPU 202. For example, commands related to processing tasks may be directed to host interface 206, while commands related to memory operations (e.g., reading from or writing to PP memory 204) may be directed to crossbar switch unit 210. In one embodiment, host interface 206 reads each command queue and sends the command stream stored in the command queue to front end 212.

[0049] As mentioned above Figure 1 The connection between the PPU 202 and the rest of the computer system 100 can be varied. In some embodiments, the parallel processing subsystem 112, including at least one PPU 202, is implemented as a plug-in card that can be inserted into an expansion slot of the computer system 100. In other embodiments, the PPU 202 can be integrated on a single chip with a bus bridge, such as a memory bridge 105 or an I / O bridge 107. Similarly, in other embodiments, some or all of the components of the PPU 202 can be included together with the CPU 102 in a single integrated circuit or system-on-a-chip (SoC).

[0050] In one embodiment, front-end 212 sends processing tasks received from host interface 206 to a work allocation unit (not shown) within task / work unit 207. In one embodiment, the work allocation unit receives pointers to processing tasks, which are encoded as Task Metadata (TMDs) and stored in memory. Pointers to TMDs are included in a command stream, stored as a command queue and received by front-end unit 212 from host interface 206. Processing tasks that can be encoded as TMDs include an index associated with the data to be processed, as well as state parameters and commands defining how the data is processed. For example, state parameters and commands can define a program to be executed on the data. Furthermore, for example, a TMD can specify the number and configuration of CTA sets. Typically, each TMD corresponds to one task. Task / work unit 207 receives tasks from front-end 212 and ensures that GPC 208 is configured to a valid state before initiating the processing task specified by each TMD. Priorities can be assigned to each TMD used to schedule the execution of processing tasks. Processing tasks can also be received from processing cluster array 230. Optionally, the TMD may include a parameter that controls whether the TMD is added to the head or tail of the list of processing tasks (or a list of pointers to processing tasks), thus providing another level of control over execution priority.

[0051] In one embodiment, PPU 202 implements a highly parallel processing architecture based on a processing cluster array 230 comprising a set of C general-purpose processing clusters (GPCs) 208, where C ≥ 1. Each GPC 208 is capable of executing a large number (e.g., hundreds or thousands) of threads simultaneously, where each thread is an instance of a program. In various applications, different GPCs 208 can be allocated to handle different types of programs or perform different types of computations. The allocation of GPCs 208 can vary depending on the workload generated by each type of program or computation.

[0052] In one embodiment, the memory interface 214 includes a set of D partition units 215, where D ≤ 1. Each partition unit 215 is coupled to one or more dynamic random access memories (DRAMs) 220 residing within the PPM memory 204. In some embodiments, the number of partition units 215 is equal to the number of DRAMs 220, and each partition unit 215 is coupled to a different DRAM 220. In other embodiments, the number of partition units 215 may differ from the number of DRAMs 220. Those skilled in the art will understand that the DRAMs 220 can be replaced by any other technically suitable storage device. In operation, various rendering targets, such as texture maps and framebuffers, can be stored across the DRAMs 220, thereby allowing the partition units 215 to write portions of each rendering target in parallel to efficiently utilize the available bandwidth of the PPM memory 204.

[0053] In one embodiment, a given GPC 208 can process data to be written to any DRAM 220 within the PP memory 204. In one embodiment, the crossbar switch unit 210 is configured to route the output of each GPC 208 to the input of any partition unit 215, or to any other GPC 208 for further processing. The GPC 208 communicates with the memory interface 214 via the crossbar switch unit 210 to read or write data from the various DRAMs 220. In some embodiments, the crossbar switch unit 210 has a connection to I / O unit 205, and also a connection to the PP memory 204 via the memory interface 214, thereby enabling processing cores within different GPCs 208 to communicate with system memory 104 or other memory not native to the PPU 202. Figure 2 In some embodiments, the crossbar switch unit 210 is directly connected to the I / O unit 205. In various embodiments, the crossbar switch unit 210 may use a virtual channel to separate the traffic flow between the GPC 208 and the partition unit 215.

[0054] In one embodiment, GPC 208 can be programmed to perform processing tasks relevant to a variety of applications, including but not limited to linear and nonlinear data transformations, filtering of video and / or audio data, modeling operations (e.g., applying physical laws to determine the position, velocity, and other properties of an object), image rendering operations (e.g., tessellation shaders, vertex shaders, geometry shaders, and / or pixel / fragment shader programs), general computational operations, etc. In operation, PPU 202 is configured to transfer data from system memory 104 and / or PP memory 204 to one or more on-chip memory units, process the data, and write the resulting data back to system memory 104 and / or PP memory 204. The resulting data can then be accessed by other system components, including CPU 102, another PPU 202 within parallel processing subsystem 112, or another parallel processing subsystem 112 within computer system 100.

[0055] In one embodiment, the parallel processing subsystem 112 may include any number of PPUs 202. For example, multiple PPUs 202 may be provided on a single plug-in card, or multiple plug-in cards may be connected to the communication path 113, or one or more PPUs 202 may be integrated into a bridge chip. The PPUs 202 in a multi-PPU system may be the same or different from each other. For example, different PPUs 202 may have different numbers of processing cores and / or different numbers of PP memories 204. In embodiments with multiple PPUs 202, these PPUs can operate in parallel to process data at a higher throughput than a single PPU 202 might. Systems containing one or more PPUs 202 can be implemented in various configurations and form factors, including but not limited to desktops, laptops, handheld personal computers or other handheld devices, wearable devices, servers, workstations, game consoles, embedded systems, etc.

[0056] Figure 3 According to various embodiments Figure 2 A block diagram of the General Processing Cluster (GPC) 208 included in the Parallel Processing Unit (PPU) 202 is shown. As shown, the GPC 208 includes, but is not limited to, a pipeline manager 305, one or more texture units 315, a preROP unit 325, a work assignment crossbar switch 330, and an L1.5 cache 335.

[0057] In one embodiment, the GPC 208 can be configured to execute a large number of threads in parallel to perform graphics, general processing, and / or computational operations. As used herein, a "thread" refers to an instance of a specific program that executes on a particular set of input data. In some embodiments, Single Instruction Multiple Data (SIMD) instruction issuing techniques are used to support the parallel execution of a large number of threads without providing multiple independent instruction units. In other embodiments, Single Instruction Multiple Threading (SIMT) techniques are used to support the parallel execution of a large number of generally synchronous threads, which uses a common instruction unit configured to issue instructions to a set of processing engines within the GPC 208. Unlike SIMD execution mechanisms, where all processing engines typically execute the same instructions, SIMT execution allows different threads to more easily follow different execution paths through a given program. Those skilled in the art will understand that SIMD processing mechanisms represent a subset of the functionality of SIMT processing mechanisms.

[0058] In one embodiment, the operation of GPC 208 is controlled via pipeline manager 305, which distributes processing tasks received from work assignment units (not shown) within task / work unit 207 to one or more streaming multiprocessors (SMs) 310. Pipeline manager 305 can also be configured to control work assignment crossbar switch 330 by specifying the destination of processing data output by SM 310.

[0059] In various embodiments, GPC 208 includes a set of M SMs 310, where M ≥ 1. Furthermore, each SM 310 includes a set of functional execution units (not shown), such as execution units and load-memory units. Processing operations specific to any functional execution unit can be pipelined, allowing new instructions to be issued for execution before the previous instruction has completed. Any combination of functional execution units within a given SM 310 can be provided. In various embodiments, functional execution units can be configured to support a variety of different operations, including integer and floating-point operations (e.g., addition and multiplication), comparison operations, Boolean operations (AND, OR, XOR), bit shifting, and computation of various algebraic functions (e.g., plane interpolation and trigonometric functions, exponential and logarithmic functions, etc.). Advantageously, the same functional execution unit can be configured to perform different operations.

[0060] In one embodiment, each SM 310 is configured to process one or more thread groups. As used herein, a "thread group" or "thread bundle" refers to a group of threads that execute the same program simultaneously on different input data, with one thread in the group assigned to a different execution unit within the SM 310. A thread group may include fewer threads than the number of execution units within the SM 310, in which case some executions may be idle during the cycle in which the thread group is being processed. A thread group may also include more threads than the number of execution units within the SM 310, in which case processing may occur in consecutive clock cycles. Since each SM 310 can support up to G thread groups simultaneously, up to G*M thread groups can be executed in the GPC 208 at any given time.

[0061] Furthermore, in one embodiment, multiple related thread groups can be active simultaneously within the SM 310 (at different execution phases). This collection of thread groups is referred to herein as a “cooperative thread array” (“CTA”) or “thread array”. The size of a particular CTA is equal to m*k, where k is the number of threads executing concurrently in the thread group, which is typically an integer multiple of the number of execution units within the SM 310, and m is the number of thread groups active concurrently within the SM 310. In some embodiments, a single SM 310 can support multiple CTAs simultaneously, where such CTAs are at the granularity of work being assigned to the SM 310.

[0062] In one embodiment, each SM 310 includes a Level 1 (L1) cache or uses space in a corresponding L1 cache external to the SM 310 to support load and store operations, etc., performed by the execution unit. Each SM 310 may also access a Level 2 (L2) cache (not shown), which is shared among all GPCs 208 in the PPU 202. The L2 cache can be used to transfer data between threads. Finally, the SM 310 may also access off-chip “global” memory, which may include PP memory 204 and / or system memory 104. It should be understood that any memory external to the PPU 202 can be used as global memory. Furthermore, as Figure 3 As shown, a Level 1.5 (L1.5) cache 335 may be included within the GPC 208 and configured to receive and store data requested from memory by the SM 310 via the memory interface 214. Such data may include, but is not limited to, instructions, uniform data, and constant data. In embodiments where the GPC 208 has multiple SMs 310, the SMs 310 may advantageously share common instructions and data cached in the L1.5 cache 335.

[0063] In one embodiment, each GPC 208 may have an associated memory management unit (MMU) 320 configured to map virtual addresses to physical addresses. In various embodiments, the MMU 320 may reside within the GPC 208 or within the memory interface 214. The MMU 320 includes a set of page table entries (PTEs) for mapping virtual addresses to physical addresses of blocks or memory pages, and optionally cache line indexes. The MMU 320 may include an address translation back buffer (TLB) or cache, which may reside within the SM 310, one or more L1 caches, or within the GPC 208.

[0064] In one embodiment, in a graphics and computing application, the GPC 208 can be configured such that each SM310 is coupled to a texture unit 315 for performing texture mapping operations, such as determining texture sample locations, reading texture data, and filtering texture data.

[0065] In one embodiment, each SM 310 sends processed tasks to the job assignment crossbar switch 330 to provide the processed tasks to another GPC 208 for further processing, or stores the processed tasks in an L2 cache (not shown), parallel processing memory 204, or system memory 104 via the crossbar switch unit 210. Furthermore, the pre-raster operation (preROP) unit 325 is configured to receive data from the SM 310, direct the data to one or more raster operation (ROP) units within the partition unit 215, perform color blending optimization, organize pixel color data, and perform address translation.

[0066] It should be understood that the architecture described herein is illustrative and is subject to change and modification. Among other things, any number of processing units (such as SM 310, texture unit 315, or preROP unit 325) may be included within the GPC 208. Furthermore, as described above... Figure 2 The PPU 202 may include any number of GPCs 208, which are configured to be functionally similar to each other so that their performance is independent of which GPC 208 receives a particular processing task. Furthermore, each GPC 208 operates independently of the other GPCs 208 in the PPU 202 to perform tasks for one or more applications.

[0067] Figure 4 This is a block diagram illustrating an exemplary cloud computing system according to various embodiments. As shown, computing system 400 includes one or more servers 402 communicating with client devices 404 via network 406. Each server 402 may include components as described above. Figures 1-3The example computer system 100 may contain components, features, and / or functions similar to those of the computer system 100. Each server 402 may be any technically feasible type of computer system, including but not limited to server machines or server platforms. Each client device 402 may also include components, features, and / or functions similar to those of the computer system 100, except that each client device 402 executes client application 422 instead of rendering application 130. Each client device 402 may be any technically feasible type of computer system, including but not limited to desktop computers, laptop computers, handheld / mobile devices, and / or wearable devices. In some embodiments, one or more of the server 402 and / or client devices 404 may be replaced by one or more virtualization processing environments, such as one or more virtualization processing environments provided by one or more VMs and / or containers running on one or more underlying hardware systems. One or more networks 406 may include one or more networks of any type, such as one or more local area networks (LANs) and / or wide area networks (WANs) (e.g., the Internet).

[0068] In some embodiments, one or more servers 400 may be included in a cloud computing system, such as a public cloud, private cloud, or hybrid cloud and / or distributed system. For example, one or more servers 400 may implement a cloud-based gaming platform that provides game streaming services, sometimes referred to as “cloud gaming,” “on-demand gaming,” or “games as a service.” In this case, the game stored and executed on one or more servers 400 is streamed as video to client device 402 via a client application 422 running on client device 402. During a game session, the client application 422 processes user input and sends that input to server 400 for in-game execution. Although the cloud-based gaming platform is described herein as a reference example, those skilled in the art will understand that, in general, one or more servers 400 can execute any technically feasible type of application, such as the application designed above.

[0069] As shown in the figure, each of one or more client devices 404 includes one or more input devices 426, a client application 422, a communication interface 420, and a display 424. One or more input devices 426 may include one or more devices of any type for receiving user input, such as a keyboard, mouse, joystick, and / or game controller. The client application 422 receives input data in response to user input at one or more input devices 426, transmits the input data to one or more servers 402 via the communication interface 420 (e.g., a network interface controller) and through one or more networks 406 (e.g., the Internet), receives encoded display data from the server 402, and decodes and displays the data on the display 424 (e.g., a cathode ray tube, liquid crystal display, light-emitting diode display, etc.). Therefore, computationally intensive computation and processing can be offloaded to one or more servers 402. For example, a game session can be streamed from one or more servers 402 to one or more client devices 404, thereby reducing the graphics processing and rendering requirements of one or more client devices 404.

[0070] As shown in the figure, each of one or more servers 402 includes a communication interface 418, one or more CPUs 408, a parallel processing subsystem 410, a rendering component 412, a rendering capture component 414, and an encoder 416. Input data sent from a client device 404 to one of the one or more servers 402 is received via the communication interface 418 (e.g., a network interface controller) and processed via one or more CPUs 408 and / or parallel processing subsystems 410 included in that server 402, which respectively correspond to the above-described combination. Figures 1-3 The described computer system 100 includes a CPU 102 and a parallel processing subsystem 112. In some embodiments, one or more CPUs 408 may receive input data, process the input data, and send the data to the parallel processing subsystem 410. In turn, the parallel processing subsystem 410 renders one or more independent images and / or image frames, such as frames in a video game, based on the transmitted data.

[0071] For example, rendering component 412 employs parallel processing subsystem 112 to render the results of processing input data, and rendering capture component 414 captures the rendering as display data (e.g., as image data capturing individual images and / or image frames). The rendering performed by rendering component 412 may include ray or path tracing lighting and / or shadow effects computed using one or more parallel processing units of server 402 (such as GPUs, which may further utilize one or more dedicated hardware accelerators or processing cores to perform ray or path tracing techniques). In some embodiments, rendering component 412 performs rendering using rendering SDF techniques disclosed herein. Subsequently, encoder 416 encodes the captured rendering display data to generate encoded display data, which is transmitted via communication interface 418 through one or more networks 406 to one or more client devices 422 for display to one or more users. In some embodiments, rendering component 412, rendering capture component 414, and encoder 416 may be included in rendering application 130, as described above. Figure 1 As stated above.

[0072] Returning to the cloud gaming example, during a game session, input data received by one of one or more servers 402 can represent a user character's movement, weapon firing, reloading, passing, vehicle turning, etc., within the game. In this case, rendering component 412 can generate a render of the game session representing the results of the input data, and rendering capture component 414 can capture the render of the game session as display data (e.g., as image data of the captured render frames of the game session). Parallel processing (e.g., GPU) resources can be dedicated to each game session, or resource scheduling techniques can be employed to share parallel processing resources across multiple game sessions. Furthermore, the rendering SDF techniques disclosed herein can be used to render the game session. The rendered game session can then be encoded by encoder 416 to generate encoded display data, which is transmitted via one or more networks 406 to one or more client devices 404 for decoding and output via the display 424 of that client device 404.

[0073] It should be understood that the architecture described in this article is illustrative and is subject to change and modification. Among other things, any number of processing units, such as those described above... Figure 3 The SM 310, texture unit 315, or preROP unit 325 may be included within the GPC 208.

[0074] Rendering symbolic distance function

[0075] Figure 5Example rays are shown being traced in a virtual 3D scene according to various embodiments. As shown, rays 520 and 522 are traced from observer 504 through pixels (not shown) in screen space into a scene comprising two objects 506 and 508. In some embodiments, the geometry of objects 506 and 508 is specified using one or more signed distance functions (SDFs). As described above, an SDF specifies the distance from a point in space to the boundary of one or more objects. At a given point, a positive distance indicates that the point is outside the object, and a negative distance indicates that the point is inside the object.

[0076] In some embodiments, the data structure used to represent SDF includes n x ×n y ×n z A 3D mesh with locations, each storing a signed distance value. This data structure is also referred to herein as an "SDF mesh," or simply a "mesh." As used herein, a voxel of the mesh is a cell of the mesh in 3D space, with a 2×2×2 signed distance value specified at the corner of the cell. For example, in some embodiments, SDF primitives and operators are sampled onto the mesh, and each voxel corner stores a signed distance value from the sample.

[0077] like Figure 5 As shown, the positive values ​​at each corner 502-2 and 502-3 of voxel 500 represent the distance from corner 502-2 or 502-3 to the surface of the nearest object outside corner 502-2 or 502-3. Conversely, the negative values ​​at each corner 502-1 and 502-4 represent the distance from corner 502-1 or 502-4 to the surface of the nearest object inside corner 502-1 or 502-4.

[0078] When tracing rays in a graphics scene, the intersection points of the rays with the object surface can be determined. Illustratively, ray 520 intersects the surface of object 508 at hit point 530, and ray 522 intersects the surface of object 508 at hit point 532. In some embodiments, the parallel processing subsystem 112 may include dedicated hardware that performs one or more of the rendering techniques disclosed herein, including operations for determining the intersection points of rays with the object surface. For example, in some embodiments, the dedicated hardware may be a ray tracing unit in one or more PPUs 202. In some other embodiments, one or more of the techniques disclosed herein may be implemented in software. For example, in some embodiments, rendering application 130 (or other software) may implement the rendering techniques disclosed herein. In this case, computations during rendering may be performed on the parallel processing subsystem 112 and / or elsewhere (e.g., CPU 102). In some other embodiments, one or more of the techniques disclosed herein may be implemented in any technically feasible combination of hardware and / or software.

[0079] In some embodiments, trilinear interpolation can be used to determine the surface of an object within each voxel of the SDF mesh. This surface is defined by the zero-level set of the SDF within the voxel. Given a 2×2×2 signed distance value s... ijk Where i, k, k∈[0,1], the trilinear interpolation equation in a single voxel is:

[0080]

[0081] Where x, y, z ∈ [0, 1]. In equation (1), the surface within a voxel is defined by f(x, y, z) = 0.

[0082] and

[0083]

[0084] It is a rational bilinear patch. In equation (2), the constant k i It is the distance s ijk Functions:

[0085]

[0086] Where a = s 101 -s 001 Equation (2) can be rewritten as:

[0087] f(x,y,z)=z(k4+k5x+k6y+k7xy)-(k0+k1x+k2y+k3xy)=0, (4)

[0088] This is a cubic polynomial, or a cubic function, because the highest-order term is xyz.

[0089] A ray (e.g., ray 520 or 522) can be defined by the following formula:

[0090] r(t)=o+td, (5)

[0091] Where o = (o x o y o z The same applies to d. The intersection point between the surface given by equations (1) and (4) and the ray given by equation (5) can be found by substituting x, y, and z with the components of the ray. For example, in equation (4), r x (t)=o x +td x It can replace x, etc. Such a substitution would result in:

[0092] (o z +td z(k4+k5(o)) x +td x )+k6(o y +td y )+k7(o x +td x (o) y +td y ))-(k0+k1(o x +td x )+k2(o y +td y )+k3(o x +td x (o) y +td y ))=0 (6)

[0093] Equation (6) can be rewritten as:

[0094] c3t 3 +c2t 2 +c1t+c0=0, 7)

[0095] in

[0096]

[0097] and

[0098]

[0099] The cubic function in equation (7) represents the distance along the traced ray to one or more surfaces of the object. Notably, calculating the coefficients of equation (7) according to equations (8)-(9) requires only 37 operations, which is more than four times fewer than the conventional technique that may require 161 operations. The factorization in equations (8)-(9) reduces the number of operations, thereby avoiding the execution of repetitive operations. In particular, the constants m0, m1, m2, m3, m4, and m5 are factored out and can be pre-calculated once, so that no repetitive operations are performed when the coefficients c0, c1, and c2 of equation (7) are calculated. In contrast, when calculating the coefficients of equation (7) according to the conventional technique, many of the same operations performed to calculate c0 are repeated to calculate c1 and c2. The reduced number of operations in the factorization of equations (8)-(9) can be performed much faster than the conventional technique used to calculate the coefficients of cubic functions. Furthermore, in some embodiments, the reduced number of operations can be implemented in hardware using very few instructions and / or less silicon.

[0100] In some embodiments, to make a ray intersect a surface inside a voxel, PPU 202 first determines the intersection point between the ray and the voxel, and then PPU 202 calculates the intersection point between the ray and the surface using equation (7). The intersection point between the ray and the voxel can be determined in any technically feasible manner, for example by providing the voxels of the mesh to dedicated hardware in PPU 202 that performs the Sparse Voxel Set (SVS) technique, or by tracing the ray to the voxel using Mesh Sphere Tracking (GST), Sparse Brick Set (SBS), or Sparse Voxel Octree (SVO) techniques. Assuming that the ray does not originate inside the voxel, in some embodiments, when calculating the intersection point between the surface inside the voxel and the ray, the intersection point between the ray and the voxel is used as the new origin point of the ray. Furthermore, the new origin point can be transformed to a canonical voxel space, i.e., [0, 1]. 3 This also derives the surface function of equation (7). The distance from the new origin to the exit point of the ray on the voxel is denoted by t. far express.

[0101] As described, after determining the intersection point between the ray and the voxel, PPU 202 can calculate the distance t between the ray and the intersection point of the object defined within the voxel using equation (7) and the constants in equations (3) and (8)-(9). Assuming the object is solid (i.e., not translucent, nor a volumetric object like a cloud), the only solution needed is the first real root of the cubic function of equation (7) within the voxel, i.e., t∈[0, t... far The first real root of the cubic function. In some embodiments, the first real root of the cubic function can be found in any technically feasible manner. For example, an analytic cubic polynomial solver can be used to solve the cubic function. As another example, the cubic function can be solved using numerical methods. In some embodiments, the following numerical method can be used to solve the cubic function. First, the PPU 202 can calculate the inflection point of the cubic function, where the derivative of the cubic function is equal to 0, i.e., g′. (t) =3c3t 2 +2c2t+c1=0. The inflection point can be used to associate the interval [0, t] with the voxel. far Divide into sub-intervals [t] start , t end ], where t start It can be 0 or a turning point, t end It can be a turning point or t far Then, PPU 202 can process the data from t=0 to t=t. far [0, t] far The subintervals of ] are used to identify the initial value g(t) of the cubic function. start ) has the terminal value g(t) of the cubic function end Subintervals [t] with different symbolsstart , t end ], that is, g(t start )g(t end If a subinterval is identified, then the root of the cubic function g(t) will exist within that subinterval. In this case, the PPU 202 can use a numerical solver to find the root in the subinterval. For example, repeated linear interpolation can be applied to find the root. As another example, the current distance t can be refined to... It can be used as an initial guess in the Newton-Raphson technique to find the root. In some embodiments, an additional test to solidify the voxel surface can be applied before using the cubic solver. In such a case, when the ray origin is located on the voxel surface, the PPU 202 can evaluate equation (4) once at the ray origin. If f(o x o y o z If the value is less than 0, it is considered that the light has hit one side of the voxel, and PPU 202 returns a hit there. One advantage of this additional test is that, due to, for example, floating-point inaccuracies, light between the surfaces of two adjacent voxels may hit the voxel face immediately and return a hit, which avoids visible cracks in the rendered image.

[0102] In some embodiments, the boundary points [0, t] defined by the cubic function with different signs can be found. far The PPU202 optimizes shadow ray testing by defining sub-intervals of the target area. Shadow rays are used to test whether the point of impact where another ray (e.g., an eye ray) intersects the object surface is in shadow. The PPU202 directs the shadow ray from the point of impact toward the light source and determines whether the shadow ray intersects any object before reaching the light source. If the shadow ray intersects the object before reaching the light source, the point of impact is in shadow because the object blocks the light from reaching the point of impact. In some embodiments, once t is identified... start and t end Subintervals [t] with different signs start , t end If the light source is not within that sub-interval (i.e., t), end ≤t farThe shadow ray test can then be terminated because the shadow ray will intersect the object within that subinterval. It's important to note that the subintervals are defined such that the cubic function g(t) is monotonically increasing or decreasing within each subinterval; therefore, when the cubic function has different signs at the boundaries of the subintervals, an intersection with the object can be determined. Additionally, it's important to note that the exact point of contact between the shadow ray and the object is not calculated, thus saving computational resources. Furthermore, the sign comparison operation used to determine whether the cubic function has different signs at the boundaries of the subintervals is computationally inexpensive. However, if the light source is within the subinterval, this corresponds to t... far >t end In such cases, the first real cubic root of the cubic function can be calculated analytically or numerically to determine the intersection point between the shadow ray and the object.

[0103] Illustratively, a shadow ray 540 is traced from the point of impact 530 towards the light source 510, and a shadow ray 542 is traced from the point of impact 540 towards the light source 510. Shadow ray 540 can reach the light source 510, meaning that the point of impact 530 is not in shadow. In contrast, object 506 blocks shadow ray 542 from reaching the light source 510, meaning that the point of impact 532 is in shadow. The fact that the point of impact (e.g., point of impact 530 or 532) is in shadow can be determined using the effective shadow ray testing technique described above.

[0104] Figure 6 An exemplary shadow ray test using inflection points of a cubic function according to various embodiments is shown. As shown, the cubic function g(t), 602, which represents the distance along the traced ray to the surface of the geometry, has inflection points 604 and 606. As described, the PPU 202 can determine the inflection points 604 and 606 by solving for the zeros of the derivative of the cubic function 602, which is computationally inexpensive. Exemplarily, this corresponds to the voxel interval [0, t] far [It can be divided into three categories: between 0 and the inflection point 604, between inflection points 604 and 606, and between inflection point 606 and t.] farThe subintervals 610, 612, and 614 are located between point 608. To determine whether a shadow ray hits the object's surface within each subinterval 610, 612, and 614, the PPU 202 determines the values ​​of a cubic function 602 at 0 and at points 604, 606, and 608; these values ​​are computationally inexpensive. The cubic function 602 will have a root within a subinterval if the sign of the cubic function value at the boundary points of the subintervals differs, meaning the shadow ray will intersect the object's surface within that subinterval. For example, the cubic function 602 is positive at both inflection points 604 and 606, therefore it has no root within subinterval 612. Generally, when the cubic function 602 is positive at both boundary points of a subinterval or negative at both boundary points and the light source is not within that subinterval, the shadow ray will not intersect the object's surface within that subinterval. Conversely, the cubic function 602 is positive at inflection point 606 and negative at inflection point 608, therefore the cubic function 602 has a root in subinterval 614. In this case, PPU 202 can determine that if the light source is more than t far Further away, the point of impact is obscured, eliminating the need to calculate the precise intersection of the shadow ray and the object within subinterval 614, thus saving computational resources. It should be noted that when the cubic function 602 has different signs at the boundary points of the subinterval, the light source may be located within the subinterval in some cases. In this case, it is necessary to calculate the intersection of the shadow ray and the object within that subinterval.

[0105] Figure 7A -B illustrates methods for interpolating analytical normals according to various embodiments. After determining that the ray intersects the object surface within the mesh voxel at the point of impact, as described above... Figure 5 As described, the PPU 202 can determine a vector perpendicular to the surface at the point of impact. This normal vector is also referred to herein as a "surface normal" or simply a "normal". Surface normals can be used for shading, reflection, and / or other rendering operations to determine the color of pixels in an image. However, conventional techniques used to determine surface normals for SDF meshes do not compute normals that are continuous across voxels. Images rendered using such surface normals may include abrupt changes in lighting on an object's surface, which can appear as sharp edges that make the surface look faceted, where the surface should be smooth in appearance. These abrupt changes in lighting are particularly noticeable when an observer approaches the voxel.

[0106] In some embodiments, PPU 202 interpolates the normals of adjacent voxel surfaces, which are analytically calculated within the voxel and are also referred to herein as "analytical normals". Although analytical normals calculated in a particular manner as a reference example are described herein, in some embodiments, intermediate surface normals may be calculated and interpolated in any technically feasible manner according to the techniques disclosed herein. Figure 7AAs shown, in some embodiments, the dual voxel 704 can be used to interpolate analytical normals from adjacent voxels. It should be noted that, although... Figure 7A -B shows a two-dimensional example for illustrative purposes, but in some embodiments, analytical normals can be interpolated in three dimensions for 3D graphics. A double voxel 704 is a voxel whose position is offset by half its voxel size. Any hit point will fall within a single double voxel that overlaps with 2×2×2 voxels in three dimensions. Illustratively, hit point 706 falls within double voxel 704, which overlaps with voxels 702-2, 702-4, 702-6, and 702-8. In three dimensions, the double voxels will overlap eight (2×2×2) voxels. In some embodiments, PPU 202 evaluates the analytical normals in each of the eight voxels at hit point 706 and interpolates the results using trilinear interpolation. By interpolating the normals of analytically computed adjacent voxel surfaces, PPU 202 can generate (interpolated) normals that are continuous across the voxels. Such normals can then be used to render images with lighting that varies relatively smoothly across the object's surface.

[0107] To analytically compute surface normals, the normal vector n can be calculated as the gradient of the implicit function f defining the object's surface within the voxel, i.e. The differential of equation (1) with respect to x is given by:

[0108]

[0109] Equation (10) is the bilinear interpolation of the distance difference in the x-direction, which can be rewritten as:

[0110]

[0111] Where lerp(u, a, b) = a + u(ba) is a linear interpolation in a FMA-friendly form. Similarly, and It can be calculated as follows:

[0112]

[0113]

[0114] Using equations (11)-(13), the analytical normal to the inner surface of the voxel can be calculated as follows: The above method for calculating surface normals requires approximately 30 operations (without normalization), while some previous techniques for calculating surface normals required 54 operations.

[0115] As described, PPU 202 interpolates the surface normals of adjacent voxels, which are analytically calculated to generate continuous surface normals on the voxels. Figure 7B An example of how the normals 720 and 722 of surfaces 710 and 712 of adjacent voxels 702-2 and 702-4 can be interpolated is shown. As shown, each voxel 702-2 and 702-4 is associated with its own surfaces 710 and 712, which are defined by signed distance values ​​at the corners of voxels 702-2 and 702-4, respectively. For hit point 706, PPU 202 (1) calculates the analytical surface normal of each of the eight voxels that overlap with the bivoxel 704 into which hit point 706 falls, and (2) interpolates the surface normal using weights based on the position of hit point 706 within the bivoxel 704. Illustratively, the surface normals 720 and 722 at the hit point 706 can be calculated for voxels 702-2 and 702-4 respectively, based on implicit functions defined by the signed distance values ​​at the corners of voxels 702-2 and 702-4. For example, normals 720 and 722 can be calculated analytically according to equations (11)-(13), as described above. Figure 7A As described. Then, interpolation can be performed on normals 720 and 722 (and normals of other voxels overlapping with the dual voxel 704) to determine interpolated normals (not shown). In the interpolation, normals 720 and 722 (and other normals) are weighted based on the position of the hit point 706 within the dual voxel 704. Figure 7B In the example, the x-component of the hit point 706 can be used for weighting, and normal 722 will receive a greater weight than normal 720 because the hit point 702 is closer to the right boundary of the double voxel 704 than to the left boundary of the double voxel 704.

[0116] More formally, PPU 202 evaluates the analytical normal n at the hit point 706 in each voxel overlapping with the two voxels 704. ijk Then, PPU 202 uses the triplet weights (u, v, w) ∈ [0, 1] to represent the hit point 706 position using two voxels 704. 3 To analyze the normal n within the two voxels 704 ijk Interpolation is performed. In some embodiments, the interpolation normal n can be calculated as follows:

[0117]

[0118] The subscript index indicates which voxel the normal is calculated from. Equation (14) can be rewritten in a more efficient form, similar to Equation (1). The interpolation in Equation (14) differs from traditional trilinear interpolation in that the normal is not calculated at the corner of the two voxels 704. Instead, the analytical normal (possibly normalized) is calculated at the hit point 706 using Equations (11)-(13). It is noteworthy that in seven of the eight cases, the normal is calculated outside the voxel's usual domain and only within the voxel containing the hit point 706. For example, normal 720 is not calculated on surface 710 but at the hit point 706 on surface 712.

[0119] Figure 8A Example images rendered using analytical normals according to various embodiments are shown. As shown, image 802 rendered using analytical normals includes abrupt changes in lighting that appear as sharp edges on an object's surface. As mentioned above, abrupt changes in lighting can be due to discontinuous surface normals calculated across voxels of the SDF mesh, which may result in different lighting being applied to portions of the surface corresponding to these voxels. As a result, in images such as image 802, the surface may appear multifaceted. Furthermore, the abrupt changes in lighting are particularly noticeable when the observer approaches voxels of the SDF mesh.

[0120] Figure 8B Example images rendered using analytical normal interpolation according to various embodiments are shown. As illustrated above, [the image is combined with...] Figure 7A The image 804 rendered using analytical normal interpolation as described in -B includes a smoother lighting transition than image 802. This smoother lighting transition improves the quality of image 804 relative to image 802 and is particularly noticeable when the viewer is closer to the voxels of the SDF mesh. Furthermore, the smoother lighting transition does not cause the blurring that some conventional techniques produce. In some embodiments, analytical normal interpolation can be performed using techniques with low computational cost, such as those where the viewer is within a threshold distance of the voxels of the SDF mesh. Figure 8A The analytical normal calculation can be performed when the observer is further away.

[0121] Figure 9 This is a flowchart of method steps for tracing light rays to a geometric surface represented by a symbolic distance function, according to various embodiments. Although combined... Figures 1-4 The system described herein is for tracing a single ray; however, those skilled in the art will understand that any system configured to perform the method steps in any order falls within the scope of this embodiment. Although described in relation to tracing a single ray, in some embodiments, the method steps may be repeated to trace multiple rays while rendering an image.

[0122] As shown in the figure, method 900 begins at step 902, where rendering application 130 causes rays to be traced in the scene until the rays intersect with voxels of a mesh having SDF values ​​specified at the corners of the voxels. Mesh and voxels can be created in any technically feasible manner, including at runtime or beforehand using well-known techniques. In some embodiments, PPU 202 determines the intersection points between rays and voxels in any technically feasible manner, such as via SVS, GTS, SBS, or SVO techniques, as combined above. Figure 5 As described.

[0123] At step 904, PPU 202 determines a cubic function using factorization of its coefficients, which can be used to find the intersection of the geometric surface represented by SDF within a voxel with the light rays. In some embodiments, PPU 202 determines the cubic function of equation (7) by calculating the coefficients of the cubic function according to equations (8)-(9), as described above. Figure 5 As described above, the factorization in equations (8)-(9) allows for the computation of coefficients using fewer operations than the conventional techniques required to determine cubic functions.

[0124] At step 908, PPU 202 uses a cubic function to determine the intersection point of the ray with the object surface within the voxel. That is, PPU 202 uses a cubic function to perform an intersection test between the trilinear interpolation SDF surface within the voxel and the ray to determine the intersection point with the object surface. Any technically feasible intersection test can be used. In some embodiments, analytical cubic root calculation techniques can be used to find the first real root of the cubic function corresponding to the intersection point of the ray and the object surface. In some embodiments, numerical techniques can be used to find this first real root of the cubic function. In these cases, the inflection point of the cubic function can be determined by calculating the zero point of the derivative of the cubic function. Numerical root-finding techniques can be used to find the first real root of the cubic function corresponding to the intersection point of the ray and the object surface within a subinterval between the boundary of the voxel-related interval and the inflection point of the cubic function, or within a subinterval between two inflection points of the cubic function, where the cubic function has a different sign at the boundary of the subinterval. In some embodiments, the numerical root-finding technique can be a repeated linear interpolation technique or a Newton-Raphson technique, as described above. Figure 5 As stated above.

[0125] Figure 10 This is a flowchart of method steps for testing shadow lighting according to various embodiments. Although combined... Figures 1-4The system described herein outlines the method steps, but those skilled in the art will understand that any system configured to perform the method steps in any order falls within the scope of this embodiment. Although described in relation to tracking a single shadow ray, in some embodiments, the method steps may be repeated during image rendering to track multiple shadow rays.

[0126] As shown in the figure, method 1000 begins at step 1002, where PPU 202 uses a factorial formula for the coefficients of a cubic function to determine the cubic function, which can be used to find the intersection of the geometric surface represented by SDF within the voxel with the shadow ray. Step 1002 is similar to the combination described above. Figure 9 Step 904 is described.

[0127] At step 1004, PPU 202 determines the inflection point of the cubic function. In some embodiments, PPU 202 determines the inflection point by calculating the zeros of the derivative of the cubic function.

[0128] At step 1006, PPU 202 selects a sub-interval of the interval associated with the voxel. In some embodiments, the sub-interval may be between the boundary of the interval associated with the voxel and the inflection point of the cubic function, or between two inflection points of the cubic function, as described above. Figures 5-6 As described.

[0129] At step 1008, if the values ​​of the cubic functions at the boundaries of the sub-intervals have the same sign, method 1000 continues to step 1010. At step 1010, if there are more sub-intervals to consider, method 1000 returns to step 1006, where PPU 202 selects another sub-interval. On the other hand, if there are no more sub-intervals to consider, method 1000 continues to step 1012, where PPU 202 determines that the hit point from which the shadow ray is traced is not in the shadow.

[0130] On the other hand, if the value of the cubic function at the boundary of the sub-interval has a different sign at step 1008, method 1000 continues to step 1014, where PPU 202 determines whether the light source is within the sub-interval. In some embodiments, PPU 202 determines whether t end ≤t far This is used to determine whether the distance to the light exceeds the endpoint of the sub-interval.

[0131] If the light source is not within the sub-interval, then at step 1016, PPU 202 determines that the hit point (i.e., the origin of the shadow ray) from which it traces the shadow ray is in the shadow. It is worth noting that it is not necessary to calculate the exact hit point.

[0132] On the other hand, if the light source is within the sub-interval (i.e., t)end >t far In step 1018, the PPU uses a cubic function to determine the intersection point of the shadow ray and the object surface. Step 1018 is similar to the combination described above. Figure 9 Step 906 of the described method 900.

[0133] At step 1020, PPU 202 determines whether the intersection of the shadow ray determined at step 1018 and the object surface is less than voxel t. far The distance to the exit point of the upper shadow ray. If the intersecting distance is not less than the distance to the exit point, then at step 1022, PPU 202 determines that the hit point of the shadow ray being tracked from it is not in the shadow. On the other hand, if the intersecting distance is less than the distance to the exit point, then at step 1024, PPU 202 determines that the hit point of the shadow ray being tracked from it is in the shadow.

[0134] Figure 11 This is a flowchart of method steps for determining pixel color based on analytical normal interpolation, according to various embodiments. Although combined... Figures 1-4 The system described herein outlines the method steps, but those skilled in the art will understand that any system configured to perform the method steps in any order falls within the scope of this embodiment. Although described in relation to tracking a single ray, in some embodiments, the method steps may be repeated during image rendering to track multiple rays.

[0135] As shown in the figure, method 1100 begins at step 1102, where PPU 202 determines the analytical normal at the point of impact between the ray and the object surface for a voxel associated with the two voxels where the hit point is located. In some embodiments, PPU 202 can be based on the above combination Figure 7A The analytical normals are calculated using the equations (10)-(13) described or in any other technically feasible manner.

[0136] In step 1104, PPU 202 determines the surface normal at the hit point based on the interpolation of the analytical normal, where the analytical normal is weighted based on the position of the hit point within the two voxels. In some embodiments, PPU 202 can be based on the above combined with... Figure 7B The equation (14) described interpolates the analytical normal.

[0137] In step 1106, PPU 202 determines the pixel color based on the surface normal. In some embodiments, PPU 202 may use the surface normal to perform any technically feasible rendering operation to determine the pixel color. For example, in some embodiments, PPU 202 may use the surface normal to perform one or more shading operations, reflection operations, etc.

[0138] In summary, techniques for rendering SDF are disclosed. In some embodiments, PPU 202 uses a factorization formula to calculate the coefficients of a cubic function to find the intersection points of rays and the surface of the geometry represented by the SDF within voxels of the SDF mesh. When the traced ray is a shadow ray, PPU 202 calculates the inflection points of the cubic function and determines that the hit point is in shadow when the value of the cubic function at the boundary of a sub-interval of an interval associated with a voxel has a different sign. Furthermore, after determining the hit point of the ray and the surface, PPU 202 can calculate the surface normal at the hit point by interpolating the normals from neighboring voxels using a weighted average of the position of the hit point within a two-voxel overlap based on the overlap of adjacent voxels.

[0139] At least one technical advantage of the disclosed technique over existing techniques is that it requires fewer operations to calculate the coefficients of the cubic function when determining the intersection of light rays with the surface of a 3D object represented by SDF. Furthermore, the disclosed technique does not always require calculating the precise intersection between shadow rays and the surface during shadow ray testing, making it computationally more efficient compared to conventional techniques that do require such calculations. Additionally, images rendered using surface normals calculated according to the disclosed technique typically exhibit smoother lighting variations than those found in images rendered using conventional techniques, resulting in improved overall image quality achievable using conventional techniques. These technical advantages represent one or more technical improvements over existing methods.

[0140] 1. In some embodiments, a computer-implemented method for calculating pixel color includes: tracing a ray in a graphics scene to the intersection of the ray with a mesh voxel; calculating one or more values ​​of one or more coefficients of a cubic function associated with the voxel based on a factorization formula of the one or more coefficients; calculating the intersection of the ray with a surface of geometry within the voxel based on the cubic function; and calculating a first pixel color based on the intersection of the ray with the surface of geometry.

[0141] 2. The computer-implemented method according to Clause 1, wherein calculating the one or more values ​​of the one or more coefficients of the cubic function comprises: calculating one or more parameters, and calculating a value of each coefficient included in the one or more coefficients based on the one or more parameters.

[0142] 3. The computer-implemented method according to Clause 1 or 2, wherein calculating the intersection point of the ray and the surface of the geometry comprises calculating the first real root of the cubic function within the voxel.

[0143] 4. The computer-implemented method according to any one of clauses 1-3, wherein calculating the first real root of the cubic function comprises performing one or more analytic root calculation operations or one or more numerical root calculation operations.

[0144] 5. The computer-implemented method according to any one of clauses 1-4, wherein computing the first real root of the cubic function comprises performing one or more linear interpolation operations or one or more Newton-Raphson operations.

[0145] 6. The computer-implemented method according to any one of clauses 1-5 further includes performing one or more sparse voxel set (SVS) operations, one or more mesh sphere tracking (GST) operations, one or more sparse brick set (SBS) operations, or one or more sparse voxel octree (SVO) operations to calculate the intersection point of the ray with the voxel.

[0146] 7. The computer-implemented method according to any one of clauses 1-6 further comprises: setting the origin of the ray based on the intersection of the ray and the voxel, and converting the origin into a canonical space associated with the voxel.

[0147] 8. The computer-implemented method according to any one of clauses 1-7, wherein the surface is defined within the voxel based on a plurality of signed distance values ​​at a plurality of corners of the voxel.

[0148] 9. The computer-implemented method according to any one of claims 1-8, further comprising: calculating a plurality of intermediate surface normals based on a plurality of geometric surfaces associated with a plurality of corresponding voxels of the mesh, and performing one or more interpolation operations based on the plurality of intermediate surface normals to calculate a surface normal at the hit point, wherein the first pixel color is further calculated based on the surface normals.

[0149] 10. The computer-implemented method according to any one of claims 1-9, further comprising: tracing a shadow ray in the graphics scene starting from the hit point; tracing the shadow ray in the graphics scene; determining one or more inflection points of another cubic function representing a plurality of distances to one or more other geometric surfaces; based on the one or more inflection points, determining a plurality of values ​​of another cubic function at a plurality of boundaries of one or more sub-intervals of an interval associated with another voxel of the mesh; and determining, based on the plurality of values, whether the intersection of the ray with the surface lies within the shadow.

[0150] 11. In some embodiments, one or more non-transitory computer-readable media store program instructions that, when executed by at least one processor, cause the at least one processor to perform the following steps: tracing a ray in a graphics scene to the intersection of the ray with a mesh voxel; calculating one or more values ​​of one or more coefficients of a cubic function associated with the voxel based on a factorization formula of the one or more coefficients; calculating the intersection of the ray with the surface of geometry within the voxel based on the cubic function; and calculating a first pixel color based on the intersection of the ray with the surface of geometry.

[0151] 12. One or more non-transitory computer-readable media as described in Clause 11, wherein calculating the one or more values ​​of the one or more coefficients of the cubic function comprises: calculating one or more parameters, and calculating a value of each coefficient included in the one or more coefficients based on the one or more parameters.

[0152] 13. One or more non-transitory computer-readable media according to clause 11 or 12, wherein calculating the intersection point of the ray with the surface of the geometry includes calculating a first real root of the cubic function within the voxel.

[0153] 14. One or more non-transitory computer-readable media according to any one of clauses 11-13, wherein computing the first real root of the cubic function comprises performing one or more analytic root computing operations or one or more numerical root computing operations.

[0154] 15. One or more non-transitory computer-readable media according to any one of clauses 11-14, wherein computing the first real root of the cubic function comprises performing one or more linear interpolation operations or one or more Newton-Raphson operations.

[0155] 16. One or more non-transitory computer-readable media according to any one of clauses 11-15, wherein the instructions, when executed by the at least one processor, further cause the at least one processor to perform the following steps: performing one or more sparse voxel set (SVS) operations, one or more mesh sphere tracking (GST) operations, one or more sparse brick set (SBS) operations, or one or more sparse voxel octree (SVO) operations to calculate the intersection point of the ray with the voxel.

[0156] 17. One or more non-transitory computer-readable media according to any one of clauses 11-16, wherein the surface is defined within the voxel based on a plurality of signed distance values ​​at a plurality of corners of the voxel.

[0157] 18. In some embodiments, a system includes: one or more memories storing instructions, and one or more processors coupled to the one or more memories, wherein, when executing the instructions, the processor is configured to: trace a ray in a graphics scene to the intersection of the ray with a mesh voxel; calculate one or more values ​​of the coefficients of the one or more cubic functions associated with the voxel based on a factorization formula of one or more coefficients; calculate the intersection of the ray with a surface of geometry within the voxel based on the cubic function; and calculate a first pixel color based on the intersection of the ray with the surface of the geometry.

[0158] 19. The system according to Clause 18, wherein calculating the one or more values ​​of the one or more coefficients of the cubic function comprises: calculating one or more parameters, and calculating a value of each coefficient included in the one or more coefficients based on the one or more parameters.

[0159] 20. The system according to Clause 18 or 19, wherein calculating the intersection point of the ray with the surface of the geometry includes calculating the first real root of the cubic function within the voxel.

[0160] 21. In some embodiments, a computer-implemented method for calculating pixel color includes: tracing shadow rays in a graphics scene; determining one or more inflection points of a cubic function, wherein the cubic function represents multiple distances to one or more geometric surfaces within a mesh voxel; determining multiple values ​​of the cubic function at multiple boundaries of one or more sub-intervals of an interval associated with the voxel based on the one or more inflection points; determining, based on the multiple values, whether a hit point where another ray intersects another surface of the geometry is located within the shadow; and calculating a first pixel color based on whether the hit point is located within the shadow.

[0161] 22. The computer-implemented method according to Clause 21, wherein the hit point is located within the shaded area when at least a first pair of values ​​of the cubic function at a pair of boundaries of the subintervals included in the one or more subintervals have different signs.

[0162] 23. The computer-implemented method according to clause 21 or 22, wherein the hit point is not located within the shaded area when each pair of values ​​of the cubic function at each pair of boundaries of each of the one or more subintervals has the same sign.

[0163] 24. The computer-implemented method according to any one of clauses 21-23, wherein the cubic function is monotonically increasing or monotonically decreasing in each of the one or more subintervals.

[0164] 25. The computer-implemented method according to any one of clauses 21-24, further comprising: determining that the light source to which the shadow ray is directed is located within a sub-interval included in the one or more sub-intervals; and calculating the intersection point of the shadow ray with a surface included in the one or more surfaces within the sub-intervals.

[0165] 26. The computer-implemented method according to any one of clauses 21-25 further includes determining that the light source to which the shadow ray is directed is not located within the voxel.

[0166] 27. The computer-implemented method according to any one of clauses 21-26, wherein one or more surfaces are defined within the voxel based on a plurality of signed distance values ​​at a plurality of corners of the voxel.

[0167] 28. The computer-implemented method according to any one of clauses 21-27, further comprising: determining one or more values ​​of one or more coefficients of a cubic function based on a factorization formula of one or more coefficients, the cubic function representing a plurality of distances to the surface of the geometry; and determining the hit point based on the cubic function.

[0168] 29. The computer-implemented method according to any one of clauses 21-28, further comprising: calculating a plurality of intermediate surface normals based on a plurality of geometric surfaces associated with a plurality of corresponding voxels of the mesh; and performing one or more interpolation operations based on the plurality of intermediate surface normals to calculate a surface normal at the hit point, wherein the first pixel color is further calculated based on the surface normals.

[0169] 30. In some embodiments, a non-transitory computer-readable medium storing program instructions, which, when executed by at least one processor, cause the at least one processor to perform the following steps: tracing shadow rays in a graphics scene; determining one or more inflection points of a cubic function, wherein the cubic function represents multiple distances to one or more geometric surfaces within a mesh voxel; determining multiple values ​​of the cubic function at multiple boundaries of one or more sub-intervals of an interval associated with the voxel, based on the one or more inflection points; determining, based on the multiple values, whether a hit point where another ray intersects another geometric surface is located within the shadow; and calculating a first pixel color based on whether the hit point is located within the shadow.

[0170] 31. One or more non-transitory computer-readable media as described in Clause 30, wherein the hit point is located in shaded area when at least a first pair of values ​​of the cubic function have different signs at a pair of boundaries of a subinterval included in one or more subintervals.

[0171] 32. One or more non-transitory computer-readable media as described in clause 30 or 31, wherein the hit point is not located in the shaded area when each pair of values ​​of the cubic function at each pair of boundaries of each of the one or more subintervals has the same sign.

[0172] 33. One or more non-transitory computer-readable media according to any one of clauses 30-32, wherein the cubic function is monotonically increasing or monotonically decreasing in each of the one or more sub-intervals.

[0173] 34. One or more non-transitory computer-readable media according to any one of clauses 30-33, wherein the instructions, when executed by the at least one processor, further cause the at least one processor to perform the steps of: determining that the light source to which the shadow ray is directed is located within a sub-interval included in the one or more sub-intervals; and calculating the intersection point of the shadow ray with a surface included in the one or more surfaces within the sub-interval.

[0174] 35. One or more non-transitory computer-readable media according to any one of clauses 30-34, wherein the instructions, when executed by the at least one processor, further cause the at least one processor to perform the step of determining that the light source to which the shadow ray is directed is not located within the voxel.

[0175] 36. One or more non-transitory computer-readable media according to any one of clauses 30-35, wherein the one or more surfaces are defined within the voxel based on a plurality of signed distance values ​​at a plurality of corners of the voxel.

[0176] 37. One or more non-transitory computer-readable media according to any one of clauses 30-36, wherein the instructions, when executed by the at least one processor, further cause the at least one processor to perform the steps of: determining one or more values ​​of one or more coefficients of a cubic function based on a factorization formula of the one or more coefficients, the cubic function representing a plurality of distances to the surface of the geometry; and determining the hit point based on the cubic function.

[0177] 38. One or more non-transitory computer-readable media according to any one of clauses 30-37, wherein the instructions, when executed by the at least one processor, further cause the at least one processor to perform the following steps: calculating a plurality of intermediate surface normals based on a plurality of geometric surfaces associated with a plurality of corresponding voxels of the mesh; and performing one or more interpolation operations based on the plurality of intermediate surface normals to calculate a surface normal at the hit point, wherein the first pixel color is further calculated based on the surface normals.

[0178] 39. In some embodiments, a system includes: one or more memories storing instructions; and one or more processors coupled to the one or more memories, wherein, upon execution of the instructions, the one or more processors are configured to: trace shadow rays in a graphics scene; determine one or more inflection points of a cubic function, wherein the cubic function represents multiple distances to one or more geometric surfaces within a mesh voxel; based on the one or more inflection points, determine multiple values ​​of the cubic function at multiple boundaries of one or more sub-intervals of an interval associated with the voxel; based on the multiple values, determine whether a hit point where another ray intersects another geometric surface is located within a shadow; and calculate a first pixel color based on whether the hit point is located within a shadow.

[0179] 40. The system according to Clause 39, wherein the hit point is located within the shaded area when at least a first pair of values ​​of the cubic function at a pair of boundaries of the subintervals included in the one or more subintervals have different signs.

[0180] Any element of any claim recited in any claim and / or any combination of any element described in this application falls within the scope of this disclosure and protection in any way.

[0181] For illustrative purposes, various embodiments have been described, but are not intended to be exhaustive or limited to the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the described embodiments.

[0182] Various aspects of this embodiment can be implemented as a system, method, or computer program product. Therefore, aspects of this disclosure can take the form of a completely hardware embodiment, a completely software embodiment (including firmware, resident software, microcode, etc.), or an embodiment combining software and hardware aspects, which are generally referred to herein as “modules” or “systems.” Furthermore, aspects of this disclosure can take the form of a computer program product contained in one or more computer-readable media having computer-readable program code contained thereon.

[0183] Any combination of one or more computer-readable media may be used. A computer-readable medium can be a computer-readable signal medium or a computer-readable storage medium. A computer-readable storage medium can be, for example, but not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatuses, or devices, or any suitable combination thereof. More specific examples (not an exhaustive list) of computer-readable storage media will include the following: an electrical connection having one or more wires, a portable computer floppy disk, a hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable optical disc read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof. In the context of this document, a computer-readable storage medium can be any tangible medium that can contain or store programs for use by or associated with an instruction execution system, apparatus, or device.

[0184] The foregoing description, with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this disclosure, has described various aspects of this disclosure. It should be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing apparatus to produce a machine. When executed by the processor of a computer or other programmable data processing apparatus, the instructions enable the implementation of the functions / actions specified in the flowchart illustration and / or block diagram blocks or blocks. Such processors can be, but are not limited to, general-purpose processors, special-purpose processors, special-purpose processors, or field-programmable gate arrays.

[0185] The flowcharts and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of the present disclosure. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code, comprising one or more executable instructions for implementing a specified logical function. It should also be noted that in some alternative implementations, the functions labeled in the blocks may not appear in the order indicated in the figures. For example, depending on the functions involved, two blocks shown consecutively may actually be executed substantially simultaneously, or sometimes these blocks may be executed in reverse order. It will also be noted that each block shown in the block diagrams and / or flowcharts, and combinations of blocks shown in the block diagrams and / or flowcharts, may be implemented by a system based on dedicated hardware or a combination of dedicated hardware and computer instructions that performs the specified function or action.

[0186] While the foregoing describes embodiments of this disclosure, other and further embodiments of this disclosure may be devised without departing from its essential scope, the scope of which is determined by the following claims.

Claims

1. A computer-implemented method for rendering one or more graphics images, the method comprising: tracing one or more rays in a graphics scene; computing one or more surface normals associated with intersections of the one or more rays and one or more surfaces, wherein computing each surface normal comprises: computing a plurality of intermediate surface normals associated with a plurality of neighboring voxels of a grid, and interpolating the plurality of intermediate surface normals to compute the surface normal; and rendering one or more graphics images based on the one or more surface normals.

2. The computer-implemented method of claim 1, further comprising: determining one or more values of one or more coefficients of a cubic function based on a factorization formula for the one or more coefficients of the cubic function, the cubic function representing a plurality of distances to a first surface included in the one or more surfaces; and determining an intersection of a ray included in the one or more rays and a surface included in the one or more surfaces based on the cubic function. tracing a shadow ray in the graphics scene, wherein tracing the shadow ray comprises:

3. The computer-implemented method of claim 1, further comprising: determining one or more turning points of a cubic function representing a plurality of distances to a first surface included in the one or more surfaces; determining a plurality of values of the cubic function within an interval associated with a voxel of a grid based on the one or more turning points; and determining whether a hit point at which a first ray intersects the first surface is located within a shadow based on the plurality of values.

4. The computer-implemented method of claim 1, wherein the one or more graphics images are associated with a video game, a movie, or an architectural or design application.

5. A computer-implemented method for computing a pixel color, the method comprising: tracing a ray in a graphics scene to a hit point at which the ray intersects a geometry surface; computing a plurality of intermediate surface normals based on a plurality of geometry surfaces associated with a plurality of corresponding voxels of a grid; performing one or more interpolation operations based on the plurality of intermediate surface normals to compute a surface normal at the hit point; and computing a first pixel color based on the surface normal.

6. The computer-implemented method of claim 5, wherein the plurality of corresponding voxels are associated with another voxel and the hit point is located in the other voxel.

7. The computer-implemented method of claim 6, wherein the one or more interpolation operations are weighted based on a location of the hit point within the other voxel.

8. The computer-implemented method of claim 6, wherein the other voxel overlaps at least one voxel included in the plurality of corresponding voxels.

9. The computer-implemented method of claim 5, wherein the plurality of surfaces comprises eight surfaces.

10. The computer-implemented method of claim 5, wherein the plurality of surfaces is defined based on signed distance values at a plurality of corners of the plurality of corresponding voxels. ​ ​ 11. The computer-implemented method of claim 5, wherein computing includes, for each of the plurality of intermediate surface normals: computing a gradient of a function that defines a geometry surface included in the plurality of geometry surfaces.

12. The computer-implemented method of claim 5, wherein computing the first pixel color includes performing at least one of a shading operation or a reflection operation based on the surface normal.

13. The computer-implemented method of claim 5, further comprising: determining one or more values of one or more coefficients of a cubic function representing a plurality of distances to the geometry surface based on a factorization formula of the one or more coefficients of the cubic function; and determining the hit point based on the cubic function.

14. The computer-implemented method of claim 5, further comprising: tracing a shadow ray in the graphics scene from the hit point; determining one or more turning points of a cubic function representing a plurality of distances to one or more other geometry surfaces; determining a plurality of values of the cubic function at a plurality of boundaries of one or more sub-intervals of an interval associated with another voxel of the mesh based on the one or more turning points; and determining whether the hit point is inside a shadow based on the plurality of values.

15. One or more non-transitory computer-readable media storing program instructions that, when executed by at least one processor, cause the at least one processor to perform the steps of: tracing a ray in a graphics scene to a hit point at which the ray intersects a geometry surface; computing a plurality of intermediate surface normals based on a plurality of geometry surfaces associated with a plurality of corresponding voxels of a mesh; performing one or more interpolation operations based on the plurality of intermediate surface normals to compute a surface normal at the hit point; and computing a pixel color based on the surface normal.

16. The one or more non-transitory computer-readable media of claim 15, wherein the plurality of corresponding voxels are associated with another voxel, and the hit point is located in the other voxel.

17. The one or more non-transitory computer-readable media of claim 16, wherein the one or more interpolation operations are weighted based on a location of the hit point within the other voxel.

18. The one or more non-transitory computer-readable media of claim 16, wherein the other voxel overlaps at least one voxel included in the plurality of corresponding voxels.

19. The one or more non-transitory computer-readable media of claim 15, wherein the plurality of surfaces are defined based on signed distance values at a plurality of corners of the plurality of corresponding voxels.

20. The one or more non-transitory computer-readable media of claim 15, wherein computing includes, for each of the plurality of intermediate surface normals: computing a gradient of a function that defines a geometry surface included in the plurality of geometry surfaces. ​ ​ 21. The one or more non-transitory computer-readable media of claim 15, wherein computing the pixel color comprises performing at least one of a shading operation or a reflection operation based on the surface normal.

22. A system comprising: one or more memories storing instructions; and one or more processors coupled to the one or more memories and when executing the instructions, the one or more processors are configured to: trace a ray in a graphics scene to a hit point where the ray intersects a geometry surface, compute a plurality of intermediate surface normals based on a plurality of geometry surfaces associated with a plurality of corresponding voxels of a mesh, perform one or more interpolation operations based on the plurality of intermediate surface normals to compute a surface normal at the hit point, and compute a pixel color based on the surface normal.

23. The system of claim 22, wherein the plurality of corresponding voxels are associated with another voxel and the one or more interpolation operations are weighted based on a location of the hit point within the other voxel.

Images