Direct current-direct current converter

Abstract

The application provides a DC-DC converter, which comprises a DC-DC conversion unit, a voltage adjustment acceleration unit, an error detection circuit, a first inverter, a voltage up circuit and a voltage down circuit; the voltage up circuit is connected with a voltage output end and a power voltage input end respectively and is used for up-regulating the output voltage of the voltage output end; the voltage down circuit is connected with the voltage output end and a ground end respectively and is used for down-regulating the output voltage of the voltage output end; the voltage adjustment acceleration unit is added at the output end of the DC-DC conversion unit, so that the setting time is no longer limited by the filter inductance and the filter capacitance, thereby reducing the setting time of the output voltage under the premise of maintaining the efficiency of the DC-DC converter.

Description

Technical Field

[0001] This invention relates to the field of communication technology, and in particular to a DC-DC converter. Background Technology

[0002] like Figure 1 As shown, a traditional DC-DC converter consists of a controller, a pulse width modulator, a driver, an inductor, and a capacitor. Some applications require the DC-DC converter to dynamically adjust the output voltage and complete this adjustment within a certain time. The settling time of the output voltage in a traditional DC-DC converter is affected by the inductor and capacitor. To shorten the settling time, the inductor and capacitor must be reduced, and the switching frequency must be increased accordingly to suppress output voltage ripple. However, increasing the switching frequency increases the dynamic losses of the driver and reduces the efficiency of the DC-DC converter.

[0003] like Figure 2 As shown, when the target voltage of the DC-DC converter is adjusted from a low voltage to a high voltage, the output voltage follows the target voltage adjustment with a certain delay. In the first stage of output voltage adjustment, the driver outputs a continuous supply voltage, while the inductor current gradually increases due to the voltage difference between the supply voltage and the output voltage. The increased inductor current charges the capacitor, thereby raising the output voltage. In the second stage of output voltage adjustment, the driver outputs a constant zero voltage to reduce the inductor current, allowing the capacitor to charge and reach the specified target voltage value. In summary, charging the capacitor, i.e., adjusting the output voltage, must be accomplished through the inductor. However, the characteristic that the inductor current is the integral of the inductor voltage means that the inductor cannot instantaneously generate the current required to charge the capacitor, ultimately leading to a hysteresis between the target voltage and the output voltage. Summary of the Invention

[0004] The purpose of this invention is to provide a DC-DC converter to solve the problem that in traditional DC-DC converters, the hysteresis from the target voltage to the output voltage is limited by the filter inductor and filter capacitor, resulting in a long output voltage settling time.

[0005] To address the above problems, embodiments of the present invention provide a DC-DC converter, comprising:

[0006] A DC-DC conversion unit; the DC-DC conversion unit includes: a target voltage input terminal, a power supply voltage input terminal, and a voltage output terminal; the DC-DC conversion unit generates the output voltage of the voltage output terminal based on the target voltage of the target voltage input terminal and the power supply voltage of the power supply voltage input terminal;

[0007] A voltage adjustment acceleration unit, comprising: an error detection circuit, a first inverter, a voltage boosting circuit, and a voltage pull-down circuit;

[0008] The input terminal of the error detection circuit is connected to the target voltage input terminal and the voltage output terminal, and is used to calculate the error between the target voltage and the output voltage and output the error signal.

[0009] The error signal is connected to the voltage up-up circuit and the first inverter, respectively, and the inverted error signal output by the first inverter is connected to the voltage down-down circuit.

[0010] The voltage boosting circuit is connected to both the voltage output terminal and the power supply voltage input terminal to boost the output voltage of the voltage output terminal; the voltage pull-down circuit is connected to both the voltage output terminal and the ground terminal to pull down the output voltage of the voltage output terminal.

[0011] The voltage boosting circuit includes:

[0012] A first hysteresis comparator and a first switch; the input terminal of the first hysteresis comparator is connected to the error signal, the output terminal of the first hysteresis comparator is connected to the control terminal of the first switch, the first terminal of the first switch is connected to the power supply voltage input terminal, and the second terminal of the first switch is connected to the voltage output terminal;

[0013] When the error signal is greater than the trigger threshold, the first hysteresis comparator outputs a first logic level to drive the first switch to close. The power supply voltage input terminal is connected to the voltage output terminal, and the power supply voltage raises the output voltage.

[0014] When the error signal is less than the release threshold, the first hysteresis comparator outputs a second logic level to drive the first switch to open.

[0015] The voltage pull-down circuit includes:

[0016] A second hysteresis comparator and a second switch; the input terminal of the second hysteresis comparator is connected to the inverting error signal, the output terminal of the second hysteresis comparator is connected to the control terminal of the second switch, the first terminal of the second switch is connected to the voltage output terminal, and the second terminal of the second switch is connected to the ground terminal.

[0017] When the inverting error signal is greater than the pull-down trigger threshold, the second hysteresis comparator outputs a third logic level to drive the second switch to close, and the voltage output terminal is connected to the ground terminal to pull down the output voltage.

[0018] When the inverted error signal is less than the pull-down release threshold, the second hysteresis comparator outputs a fourth logic level to drive the second switch to open.

[0019] The error detection circuit includes:

[0020] A first linear amplifier, a second linear amplifier, and a first addition / subtraction operation circuit;

[0021] The input terminal of the first linear amplifier is connected to the target voltage input terminal, the input terminal of the second linear amplifier is connected to the voltage output terminal, the output terminals of the first linear amplifier and the second linear amplifier are connected to the input terminal of the first adder, and the first addition / subtraction circuit is used to calculate the error between the target voltage and the output voltage and output an error signal.

[0022] The DC-DC conversion unit includes:

[0023] Control circuit, pulse width modulation circuit, drive circuit, filter inductor, filter capacitor and detection resistor;

[0024] The control circuit is used to output a control signal based on the target voltage, power supply voltage, output voltage, and probe voltage; the probe voltage is the voltage of the filter capacitor.

[0025] The pulse width modulation circuit is used to compare the control signal with the triangular wave signal generated inside the pulse width modulation circuit to obtain a pulse width modulation signal with a preset duty cycle.

[0026] The driving circuit is used to convert the power supply voltage into a switching driving signal according to the preset duty cycle of the pulse width modulation signal;

[0027] The filter inductor and the filter capacitor are used to perform low-pass filtering on the switch drive signal to obtain the output voltage;

[0028] The filter capacitor is grounded through the sensing resistor, which is used to measure the displacement current passing through the filter capacitor.

[0029] The control circuit includes:

[0030] The third linear amplifier, the fourth linear amplifier, the fifth linear amplifier, the sixth linear amplifier, and the second addition and subtraction operation circuit;

[0031] The input terminal of the third linear amplifier is connected to the target voltage input terminal, the input terminal of the fourth linear amplifier is connected to the voltage output terminal, the input terminal of the fifth linear amplifier is connected to the connection terminal of the filter capacitor and the sensing resistor, and the input terminal of the sixth linear amplifier is connected to the power supply voltage input terminal.

[0032] The input terminals of the second addition and subtraction operation circuit are respectively connected to the output terminals of the third linear amplifier, the fourth linear amplifier, the fifth linear amplifier, and the sixth linear amplifier. The second addition and subtraction operation circuit is used to add or subtract the target voltage, the power supply voltage, the output voltage, and the detection voltage to obtain the control signal.

[0033] The pulse width modulation circuit includes:

[0034] Triangle wave generator, comparator, and noise suppressor;

[0035] The triangular wave generator is used to generate a triangular wave signal and an uplink period indication signal according to the power supply voltage. The triangular wave signal and the control signal are input to the input terminal of the comparator. The comparator compares the control signal with the triangular wave signal to obtain a comparator signal and outputs it to the noise suppressor.

[0036] The noise suppressor performs noise suppression processing on the comparator signal according to the uplink indication signal to obtain the pulse width modulation signal.

[0037] The triangular wave generator includes:

[0038] The seventh linear amplifier, the second inverter, the third switch, the fourth switch, the first logic inverter, the first resistor, the first capacitor, the first operational amplifier, the upper limit comparator, the lower limit comparator, the second logic inverter, the first NOR gate, and the second NOR gate.

[0039] The power supply voltage is input to the seventh linear amplifier, and the output of the seventh linear amplifier is output to the first input of the upper limit comparator on one hand and to the second inverter on the other hand. The output of the second inverter is output to the first input of the lower limit comparator.

[0040] The output terminal of the seventh linear amplifier is connected to the first terminal of the third switch, the second terminal of the third switch is connected to the first terminal of the first resistor, the second terminal of the first resistor is connected to the inverting input terminal of the first operational amplifier, the non-inverting input terminal of the first operational amplifier is grounded, and the output terminal of the first operational amplifier outputs the triangular wave signal; the two terminals of the first capacitor are respectively connected to the inverting input terminal and the output terminal of the first operational amplifier.

[0041] The output terminal of the second inverter is connected to the first terminal of the fourth switch, and the second terminal of the fourth switch is connected to the first terminal of the first resistor; the input terminal of the first logic inverter is connected to the control terminal of the fourth switch, and the output terminal of the first logic inverter is connected to the control terminal of the third switch.

[0042] The output of the first operational amplifier is connected to the second input of the upper limit comparator and the second input of the lower limit comparator, respectively. The output of the upper limit comparator is connected to the first input of the first NOR gate. The output of the lower limit comparator is connected to the input of the second logic inverter. The output of the second logic inverter is connected to the first input of the second NOR gate. The second input of the first NOR gate is connected to the output of the second NOR gate. The second input of the second NOR gate is connected to the output of the first NOR gate. The output of the first NOR gate outputs the uplink indication signal. The output of the first NOR gate is connected to the input of the first logic inverter.

[0043] The noise suppressor includes:

[0044] Third logic inverter, fourth logic inverter, first AND gate, second AND gate, third NOR gate and fourth NOR gate;

[0045] The comparator signal is input to the first input of the first AND gate and the input of the third logic inverter, and the output of the third logic inverter is connected to the first input of the second AND gate; the uplink indication signal is input to the second input of the second AND gate and the input of the fourth logic inverter, and the output of the fourth logic inverter is connected to the second input of the first AND gate.

[0046] The output of the first AND gate is connected to the first input of the third NOR gate, the output of the second AND gate is connected to the first input of the fourth NOR gate, the second input of the third NOR gate is connected to the output of the fourth NOR gate, the second input of the fourth NOR gate is connected to the output of the third NOR gate, and the output of the fourth NOR gate outputs the pulse width modulation signal.

[0047] The driving circuit includes:

[0048] Anti-reclosing circuit, fifth switch and sixth switch;

[0049] The pulse width modulation signal is input to the anti-reclosing circuit. The first output terminal of the anti-reclosing circuit is connected to the control terminal of the fifth switch. The second output terminal of the anti-reclosing circuit is connected to the control terminal of the sixth switch. The first terminal of the fifth switch is connected to the power supply voltage input terminal. The second terminal of the fifth switch is connected to the first terminal of the sixth switch. The second terminal of the sixth switch is grounded. The connection terminal of the fifth switch and the sixth switch outputs the switch drive signal.

[0050] The above-described technical solution of the present invention has at least the following beneficial effects:

[0051] In the DC-DC converter of this invention, a voltage adjustment acceleration unit is added to the output terminal of the DC-DC conversion unit, so that the settling time is no longer limited by the filter inductor and filter capacitor, thereby reducing the settling time of the output voltage while maintaining the efficiency of the DC-DC converter. Attached Figure Description

[0052] Figure 1 A circuit diagram illustrating a DC-DC converter in the prior art;

[0053] Figure 2 A schematic diagram illustrating the effect of adjusting the target voltage on the output voltage in the prior art;

[0054] Figure 3 A circuit diagram illustrating the DC-DC converter provided in an embodiment of the present invention;

[0055] Figure 4 This diagram illustrates the circuit of the triangular wave generator in the DC-DC converter provided in this embodiment of the invention.

[0056] Figure 5 This diagram illustrates the signal waveform of the triangular wave generator in the DC-DC converter provided in this embodiment of the invention.

[0057] Figure 6 This diagram illustrates the circuit diagram of the noise suppressor in the DC-DC converter provided in an embodiment of the present invention.

[0058] Figure 7 This is a schematic diagram of the signal waveform of the noise suppressor in the DC-DC converter provided in an embodiment of the present invention. Detailed Implementation

[0059] To make the technical problems, technical solutions and advantages of the present invention clearer, a detailed description will be given below in conjunction with the accompanying drawings and specific embodiments.

[0060] like Figure 3 As shown, an embodiment of the present invention provides a DC-DC converter, comprising:

[0061] A DC-DC conversion unit 100 includes a target voltage input terminal, a power supply voltage input terminal, and a voltage output terminal. The DC-DC conversion unit generates an output voltage at the voltage output terminal based on the target voltage at the target voltage input terminal and the power supply voltage at the power supply voltage input terminal.

[0062] The voltage adjustment acceleration unit 200 includes: an error detection circuit, a first inverter, a voltage boosting circuit, and a voltage pull-down circuit.

[0063] The input terminal of the error detection circuit is connected to the target voltage input terminal and the voltage output terminal, and is used to calculate the error between the target voltage and the output voltage and output the error signal.

[0064] The error signal is connected to the voltage up-up circuit and the first inverter, respectively, and the inverted error signal output by the first inverter is connected to the voltage down-down circuit.

[0065] The voltage boosting circuit is connected to both the voltage output terminal and the power supply voltage input terminal to boost the output voltage of the voltage output terminal; the voltage pull-down circuit is connected to both the voltage output terminal and the ground terminal to pull down the output voltage of the voltage output terminal.

[0066] In this embodiment of the invention, the voltage adjustment acceleration unit can reduce the voltage adjustment time (including the pull-up time and pull-down time), thereby enabling the DC-DC converter to use inductors with larger inductance values ​​and capacitors with larger capacitance values ​​as much as possible to suppress switching noise and reduce the switching frequency to improve efficiency.

[0067] The aforementioned voltage adjustment acceleration unit consists of an error detection circuit, a first inverter, a voltage boosting circuit, and a voltage pull-down circuit. The voltage adjustment acceleration unit assists the DC-DC converter in accelerating voltage adjustment. When the target voltage is being adjusted, the output voltage cannot be adjusted in time due to the bandwidth limitations of the DC-DC converter. The error detection circuit calculates the error between the target voltage and the output voltage. During the target voltage change from low to high, when the error signal meets the corresponding trigger condition, the voltage boosting circuit controls the output voltage to rise rapidly; during the target voltage change from high to low, when the inverting error signal meets the corresponding trigger condition, the voltage pull-down circuit controls the output voltage to fall rapidly.

[0068] In at least one alternative embodiment of the present invention, such as Figure 3 The voltage boosting circuit shown includes:

[0069] A first hysteresis comparator and a first switch; the input terminal of the first hysteresis comparator is connected to the error signal, the output terminal of the first hysteresis comparator is connected to the control terminal of the first switch, the first terminal of the first switch is connected to the power supply voltage input terminal, and the second terminal of the first switch is connected to the voltage output terminal;

[0070] When the error signal is greater than the trigger threshold, the first hysteresis comparator outputs a first logic level to drive the first switch to close. The power supply voltage input terminal is connected to the voltage output terminal, and the power supply voltage raises the output voltage.

[0071] When the error signal is less than the release threshold, the first hysteresis comparator outputs a second logic level to drive the first switch to open.

[0072] Optionally, during the process of the target voltage changing from low to high: when the error signal is greater than the trigger threshold, the first hysteresis comparator outputs a logic high level and drives the first switch to close, thereby raising the output voltage. When the error signal is less than the release threshold, the first hysteresis comparator outputs a logic low level and drives the first switch to open.

[0073] In at least one alternative embodiment of the present invention, such as Figure 3 The voltage pull-down circuit shown includes:

[0074] A second hysteresis comparator and a second switch; the input terminal of the second hysteresis comparator is connected to the inverting error signal, the output terminal of the second hysteresis comparator is connected to the control terminal of the second switch, the first terminal of the second switch is connected to the voltage output terminal, and the second terminal of the second switch is connected to the ground terminal.

[0075] When the inverting error signal is greater than the pull-down trigger threshold, the second hysteresis comparator outputs a third logic level to drive the second switch to close, and the voltage output terminal is connected to the ground terminal to pull down the output voltage.

[0076] When the inverted error signal is less than the pull-down release threshold, the second hysteresis comparator outputs a fourth logic level to drive the second switch to open.

[0077] Optionally, during the process of the target voltage changing from high to low: when the inverting error signal is greater than the pull-down trigger threshold, the second hysteresis comparator outputs a logic high level and drives the second switch to close, thereby pulling down the output voltage. When the inverting error signal is less than the pull-down release threshold, the second hysteresis comparator outputs a logic low level and drives the second switch to open.

[0078] As an optional embodiment, such as Figure 3 The error detection circuit shown includes:

[0079] A first linear amplifier, a second linear amplifier, and a first addition / subtraction operation circuit;

[0080] The input terminal of the first linear amplifier is connected to the target voltage input terminal, the input terminal of the second linear amplifier is connected to the voltage output terminal, the output terminals of the first linear amplifier and the second linear amplifier are connected to the input terminal of the first adder, and the first addition / subtraction circuit is used to calculate the error between the target voltage and the output voltage and output an error signal.

[0081] The first and second linear amplifiers are used to adapt the ratio between the target voltage and the output voltage.

[0082] As another optional embodiment of the present invention, such as Figure 3 As shown, the DC-DC conversion unit 100 includes:

[0083] Control circuit, pulse width modulation circuit, drive circuit, filter inductor, filter capacitor and detection resistor;

[0084] The control circuit is used to output a control signal based on the target voltage, power supply voltage, output voltage, and probe voltage; the probe voltage is the voltage of the filter capacitor.

[0085] The pulse width modulation circuit is used to compare the control signal with the triangular wave signal generated inside the pulse width modulation circuit to obtain a pulse width modulation signal with a preset duty cycle.

[0086] The driving circuit is used to convert the power supply voltage into a switching driving signal according to the preset duty cycle of the pulse width modulation signal;

[0087] The filter inductor and the filter capacitor are used to perform low-pass filtering on the switch drive signal to obtain the output voltage;

[0088] The filter capacitor is grounded through the sensing resistor, which is used to measure the displacement current passing through the filter capacitor.

[0089] In this embodiment of the invention, the DC-DC conversion unit is responsible for converting the power supply voltage into the output voltage. The control circuit amplifies and adds the four input signals (target voltage, output voltage, power supply voltage, and probe voltage) to obtain the control signal. The pulse width modulation circuit compares the control signal with its internally generated triangular wave signal and processes it through a noise suppressor to obtain the pulse width modulation signal. The pulse width modulation signal is processed by the anti-reclosing circuit to drive the third and fourth switches to obtain the switch drive signal. The switch drive signal is filtered by a filter inductor and a filter capacitor to obtain the output voltage. The filter capacitor is grounded through a sensing resistor. The sensing resistor measures the displacement current through the filter capacitor. The voltage and current of the filter capacitor are fed back to the controller. In this embodiment of the invention, the current of the filter capacitor is directly detected by the sensing resistor. The current detection is accurate, resulting in faster output voltage adjustment and lower noise.

[0090] As an optional embodiment, the control circuit includes:

[0091] The third linear amplifier, the fourth linear amplifier, the fifth linear amplifier, the sixth linear amplifier, and the second addition and subtraction operation circuit;

[0092] The input terminal of the third linear amplifier is connected to the target voltage input terminal, the input terminal of the fourth linear amplifier is connected to the voltage output terminal, the input terminal of the fifth linear amplifier is connected to the connection terminal of the filter capacitor and the sensing resistor, and the input terminal of the sixth linear amplifier is connected to the power supply voltage input terminal.

[0093] The input terminals of the second addition and subtraction operation circuit are respectively connected to the output terminals of the third linear amplifier, the fourth linear amplifier, the fifth linear amplifier, and the sixth linear amplifier. The second addition and subtraction operation circuit is used to add or subtract the target voltage, the power supply voltage, the output voltage, and the detection voltage to obtain the control signal.

[0094] In this embodiment of the invention, since the voltage and current of the filter capacitor are state variables of the second-order system composed of the filter inductor and the filter capacitor, the bandwidth of the transfer function of the basic DC-DC converter from the target voltage to the output voltage can be adjusted by changing the gain of the fourth linear amplifier, and the damping coefficient of the transfer function of the DC-DC converter from the target voltage to the output voltage can be adjusted by changing the gain of the fifth linear amplifier. The influence of the power supply voltage on the output voltage can be adjusted and counteracted by changing the gain of the sixth linear amplifier. The ratio between the target voltage and the output voltage can be adjusted by adjusting the gain of the third linear amplifier.

[0095] In at least one alternative embodiment of the present invention, such as Figure 3 The pulse width modulation circuit shown includes:

[0096] Triangle wave generator, comparator, and noise suppressor;

[0097] The triangular wave generator is used to generate a triangular wave signal and an uplink period indication signal according to the power supply voltage. The triangular wave signal and the control signal are input to the input terminal of the comparator. The comparator compares the control signal with the triangular wave signal to obtain a comparator signal and outputs it to the noise suppressor.

[0098] The noise suppressor performs noise suppression processing on the comparator signal according to the uplink indication signal to obtain the pulse width modulation signal.

[0099] As an optional embodiment, such as Figure 4 As shown, the triangular wave generator includes:

[0100] The seventh linear amplifier, the second inverter, the third switch, the fourth switch, the first logic inverter, the first resistor, the first capacitor, the first operational amplifier, the upper limit comparator, the lower limit comparator, the second logic inverter, the first NOR gate, and the second NOR gate.

[0101] The power supply voltage is input to the seventh linear amplifier, and the output of the seventh linear amplifier is output to the first input of the upper limit comparator on one hand and to the second inverter on the other hand. The output of the second inverter is output to the first input of the lower limit comparator.

[0102] The output terminal of the seventh linear amplifier is connected to the first terminal of the third switch, the second terminal of the third switch is connected to the first terminal of the first resistor, the second terminal of the first resistor is connected to the inverting input terminal of the first operational amplifier, the non-inverting input terminal of the first operational amplifier is grounded, and the output terminal of the first operational amplifier outputs the triangular wave signal; the two terminals of the first capacitor are respectively connected to the inverting input terminal and the output terminal of the first operational amplifier.

[0103] The output terminal of the second inverter is connected to the first terminal of the fourth switch, and the second terminal of the fourth switch is connected to the first terminal of the first resistor; the input terminal of the first logic inverter is connected to the control terminal of the fourth switch, and the output terminal of the first logic inverter is connected to the control terminal of the third switch.

[0104] The output of the first operational amplifier is connected to the second input of the upper limit comparator and the second input of the lower limit comparator, respectively. The output of the upper limit comparator is connected to the first input of the first NOR gate. The output of the lower limit comparator is connected to the input of the second logic inverter. The output of the second logic inverter is connected to the first input of the second NOR gate. The second input of the first NOR gate is connected to the output of the second NOR gate. The second input of the second NOR gate is connected to the output of the first NOR gate. The output of the first NOR gate outputs the uplink indication signal. The output of the first NOR gate is connected to the input of the first logic inverter.

[0105] In this embodiment of the invention, the power supply voltage is processed by a seventh linear amplifier to generate a triangular wave amplitude upper limit signal. Figure 5The signal waveform of the triangular wave signal generator is displayed. The upper limit of the triangular wave amplitude is processed by the second inverter to generate the lower limit signal of the triangular wave amplitude. When the triangular wave signal is greater than the upper limit signal, the upper limit comparator outputs a logic high level, causing the first NOR gate to output a logic low level, driving the third switch to close and the fourth switch to open. This allows current to flow through the third switch into the resistor to the virtual ground of the first operational amplifier, causing the current to integrate across the capacitor and causing the triangular wave signal to begin its downward movement. When the triangular wave signal is less than the lower limit signal, the lower limit comparator outputs a logic low level, causing the second logic inverter to output a high level, and the second NOR gate to output a logic low level. Since the upward peak signal is at a logic low level at this time, the first NOR gate outputs a logic high level, driving the fourth switch to close and the third switch to open. This allows current to flow through the fourth switch out of the resistor, causing the current to integrate across the capacitor and causing the triangular wave signal to begin its upward movement.

[0106] like Figure 6 As shown, in at least one optional embodiment of the present invention, the noise suppressor includes:

[0107] Third logic inverter, fourth logic inverter, first AND gate, second AND gate, third NOR gate and fourth NOR gate;

[0108] The comparator signal is input to the first input of the first AND gate and the input of the third logic inverter, and the output of the third logic inverter is connected to the first input of the second AND gate; the uplink indication signal is input to the second input of the second AND gate and the input of the fourth logic inverter, and the output of the fourth logic inverter is connected to the second input of the first AND gate.

[0109] The output of the first AND gate is connected to the first input of the third NOR gate, the output of the second AND gate is connected to the first input of the fourth NOR gate, the second input of the third NOR gate is connected to the output of the fourth NOR gate, the second input of the fourth NOR gate is connected to the output of the third NOR gate, and the output of the fourth NOR gate outputs the pulse width modulation signal.

[0110] Figure 7 The figure shown is a waveform diagram of the internal signal of the noise suppressor.

[0111] When the triangular wave signal is in its uplink phase, the uplink indicator signal remains at a logic high level, and the fourth logic inverter outputs a logic low level. The inverted signal of the comparator signal can be applied to the fourth NOR gate through the second AND gate, and the first AND gate outputs a logic low level. Therefore, when the comparator signal changes from a logic high level to a logic low level, the second AND gate outputs a logic high level, causing the fourth NOR gate to output a logic low level, and the third NOR gate to output a logic high level. During the uplink phase of the triangular wave signal, the first AND gate outputs a logic low level, so the state of the fourth NOR gate can only change from a logic high level to a logic low level. Therefore, noise in the comparator signal will not change the pulse width modulation signal.

[0112] When the triangular wave signal is in its downtrend, the uptrend indicator signal remains at a logic low level. The fourth logic inverter outputs a logic high level. The comparator signal can be applied to the third NOR gate through the first AND gate, and the second AND gate outputs a logic low level. Therefore, when the comparator signal changes from a logic low level to a logic high level, the first AND gate outputs a logic high level, causing the third NOR gate to output a logic low level, and the fourth NOR gate to output a logic high level. During the downtrend of the triangular wave signal, the second AND gate outputs a logic low level, so the state of the fourth NOR gate can only change from a logic low level to a logic high level. Therefore, noise in the comparator signal will not change the pulse width modulation signal.

[0113] In at least one embodiment of the present invention, such as Figure 3 The driving circuit shown includes:

[0114] Anti-reclosing circuit, fifth switch and sixth switch;

[0115] The pulse width modulation signal is input to the anti-reclosing circuit. The first output terminal of the anti-reclosing circuit is connected to the control terminal of the fifth switch. The second output terminal of the anti-reclosing circuit is connected to the control terminal of the sixth switch. The first terminal of the fifth switch is connected to the power supply voltage input terminal. The second terminal of the fifth switch is connected to the first terminal of the sixth switch. The second terminal of the sixth switch is grounded. The connection terminal of the fifth switch and the sixth switch outputs the switch drive signal.

[0116] This invention adds a voltage adjustment acceleration unit to the output of the DC-DC converter, so that the settling time is no longer limited by the filter inductor and filter capacitor, thereby reducing the output voltage settling time while maintaining the efficiency of the DC-DC converter. The voltage adjustment acceleration unit can reduce the voltage adjustment time (including the pull-up and pull-down times), allowing the DC-DC converter to use inductors with larger inductance values ​​and capacitors with larger capacitance values ​​to suppress switching noise and reduce the switching frequency to improve efficiency.

[0117] Those skilled in the art will understand that embodiments of this application can be provided as methods, systems, or computer program products. Therefore, this application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this application can take the form of a computer program product embodied on one or more computer-readable storage media (including, but not limited to, disk storage and optical storage) containing computer-usable program code.

[0118] This application is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this application. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart... Figure 1 A device for one or more processes and / or the functions specified in one or more boxes.

[0119] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce a paper article including an instruction means, the instruction means being implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0120] These computer program instructions can also be loaded onto a computer or other programmable data processing equipment, causing the computer or other programmable equipment to perform a series of operational steps to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0121] The above description represents the preferred embodiments of the present invention. It should be noted that those skilled in the art can make various improvements and modifications without departing from the principles of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention.

Claims

1. A dc-dc converter, characterized by include: DC-DC conversion unit; The DC-DC conversion unit includes a target voltage input terminal, a power supply voltage input terminal, and a voltage output terminal; the DC-DC conversion unit generates the output voltage of the voltage output terminal based on the target voltage of the target voltage input terminal and the power supply voltage of the power supply voltage input terminal. A voltage adjustment acceleration unit, comprising: an error detection circuit, a first inverter, a voltage boosting circuit, and a voltage pull-down circuit; The input terminal of the error detection circuit is connected to the target voltage input terminal and the voltage output terminal, and is used to calculate the error between the target voltage and the output voltage and output the error signal. The error signal is connected to the voltage up-up circuit and the first inverter, respectively, and the inverted error signal output by the first inverter is connected to the voltage down-down circuit. The voltage boosting circuit is connected to both the voltage output terminal and the power supply voltage input terminal to boost the output voltage of the voltage output terminal; the voltage pull-down circuit is connected to both the voltage output terminal and the ground terminal to pull down the output voltage of the voltage output terminal.

2. The dc-dc converter of claim 1, wherein, The voltage boosting circuit includes: A first hysteresis comparator and a first switch; the input terminal of the first hysteresis comparator is connected to the error signal, the output terminal of the first hysteresis comparator is connected to the control terminal of the first switch, the first terminal of the first switch is connected to the power supply voltage input terminal, and the second terminal of the first switch is connected to the voltage output terminal; When the error signal is greater than the trigger threshold, the first hysteresis comparator outputs a first logic level to drive the first switch to close. The power supply voltage input terminal is connected to the voltage output terminal, and the power supply voltage raises the output voltage. When the error signal is less than the release threshold, the first hysteresis comparator outputs a second logic level to drive the first switch to open.

3. The dc-dc converter of claim 2, wherein, The voltage pull-down circuit includes: A second hysteresis comparator and a second switch; the input terminal of the second hysteresis comparator is connected to the inverting error signal, the output terminal of the second hysteresis comparator is connected to the control terminal of the second switch, the first terminal of the second switch is connected to the voltage output terminal, and the second terminal of the second switch is connected to the ground terminal. When the inverting error signal is greater than the pull-down trigger threshold, the second hysteresis comparator outputs a third logic level to drive the second switch to close, and the voltage output terminal is connected to the ground terminal to pull down the output voltage. When the inverted error signal is less than the pull-down release threshold, the second hysteresis comparator outputs a fourth logic level to drive the second switch to open.

4. The dc-dc converter of claim 1, wherein, The error detection circuit includes: A first linear amplifier, a second linear amplifier, and a first addition / subtraction operation circuit; The input terminal of the first linear amplifier is connected to the target voltage input terminal, the input terminal of the second linear amplifier is connected to the voltage output terminal, and the output terminals of the first and second linear amplifiers are connected to the input terminal of the first addition and subtraction operation circuit. The first addition and subtraction operation circuit is used to calculate the error between the target voltage and the output voltage and output an error signal.

5. The dc-dc converter of claim 1, wherein, The DC-DC conversion unit includes: Control circuit, pulse width modulation circuit, drive circuit, filter inductor, filter capacitor and detection resistor; The control circuit is used to output control signals based on the target voltage, power supply voltage, output voltage, and detection voltage; the detection voltage is the voltage of the detection resistor. The pulse width modulation circuit is used to compare the control signal with the triangular wave signal generated inside the pulse width modulation circuit to obtain a pulse width modulation signal with a preset duty cycle. The driving circuit is used to convert the power supply voltage into a switching driving signal according to the preset duty cycle of the pulse width modulation signal; The filter inductor and the filter capacitor are used to perform low-pass filtering on the switch drive signal to obtain the output voltage; The filter capacitor is grounded through the sensing resistor, which is used to measure the displacement current passing through the filter capacitor.

6. The dc-dc converter of claim 5, wherein, The control circuit includes: The third linear amplifier, the fourth linear amplifier, the fifth linear amplifier, the sixth linear amplifier, and the second addition and subtraction operation circuit; The input terminal of the third linear amplifier is connected to the target voltage input terminal, the input terminal of the fourth linear amplifier is connected to the voltage output terminal, the input terminal of the fifth linear amplifier is connected to the connection terminal of the filter capacitor and the sensing resistor, and the input terminal of the sixth linear amplifier is connected to the power supply voltage input terminal. The input terminals of the second addition and subtraction operation circuit are respectively connected to the output terminals of the third linear amplifier, the fourth linear amplifier, the fifth linear amplifier, and the sixth linear amplifier. The second addition and subtraction operation circuit is used to add or subtract the target voltage, the power supply voltage, the output voltage, and the detection voltage to obtain the control signal.

7. The DC-DC converter according to claim 5, characterized in that, The pulse width modulation circuit includes: Triangle wave generator, comparator, and noise suppressor; The triangular wave generator is used to generate a triangular wave signal and an uplink period indication signal according to the power supply voltage. The triangular wave signal and the control signal are input to the input terminal of the comparator. The comparator compares the control signal with the triangular wave signal to obtain a comparator signal and outputs it to the noise suppressor. The noise suppressor performs noise suppression processing on the comparator signal according to the uplink indication signal to obtain the pulse width modulation signal.

8. The DC-DC converter according to claim 7, characterized in that, The triangular wave generator includes: The seventh linear amplifier, the second inverter, the third switch, the fourth switch, the first logic inverter, the first resistor, the first capacitor, the first operational amplifier, the upper limit comparator, the lower limit comparator, the second logic inverter, the first NOR gate, and the second NOR gate. The power supply voltage is input to the seventh linear amplifier, and the output of the seventh linear amplifier is output to the first input of the upper limit comparator on one hand and to the second inverter on the other hand. The output of the second inverter is output to the first input of the lower limit comparator. The output terminal of the seventh linear amplifier is connected to the first terminal of the third switch, the second terminal of the third switch is connected to the first terminal of the first resistor, the second terminal of the first resistor is connected to the inverting input terminal of the first operational amplifier, the non-inverting input terminal of the first operational amplifier is grounded, and the output terminal of the first operational amplifier outputs the triangular wave signal; the two terminals of the first capacitor are respectively connected to the inverting input terminal and the output terminal of the first operational amplifier. The output terminal of the second inverter is connected to the first terminal of the fourth switch, and the second terminal of the fourth switch is connected to the first terminal of the first resistor; the input terminal of the first logic inverter is connected to the control terminal of the fourth switch, and the output terminal of the first logic inverter is connected to the control terminal of the third switch. The output of the first operational amplifier is connected to the second input of the upper limit comparator and the second input of the lower limit comparator, respectively. The output of the upper limit comparator is connected to the first input of the first NOR gate. The output of the lower limit comparator is connected to the input of the second logic inverter. The output of the second logic inverter is connected to the first input of the second NOR gate. The second input of the first NOR gate is connected to the output of the second NOR gate. The second input of the second NOR gate is connected to the output of the first NOR gate. The output of the first NOR gate outputs the uplink indication signal. The output of the first NOR gate is connected to the input of the first logic inverter.

9. The DC-DC converter according to claim 7, characterized in that, The noise suppressor includes: Third logic inverter, fourth logic inverter, first AND gate, second AND gate, third NOR gate and fourth NOR gate; The comparator signal is input to the first input of the first AND gate and the input of the third logic inverter, and the output of the third logic inverter is connected to the first input of the second AND gate; the uplink indication signal is input to the second input of the second AND gate and the input of the fourth logic inverter, and the output of the fourth logic inverter is connected to the second input of the first AND gate. The output of the first AND gate is connected to the first input of the third NOR gate, the output of the second AND gate is connected to the first input of the fourth NOR gate, the second input of the third NOR gate is connected to the output of the fourth NOR gate, the second input of the fourth NOR gate is connected to the output of the third NOR gate, and the output of the fourth NOR gate outputs the pulse width modulation signal.

10. The DC-DC converter according to claim 5, characterized in that, The driving circuit includes: Anti-reclosing circuit, fifth switch and sixth switch; The pulse width modulation signal is input to the anti-reclosing circuit. The first output terminal of the anti-reclosing circuit is connected to the control terminal of the fifth switch. The second output terminal of the anti-reclosing circuit is connected to the control terminal of the sixth switch. The first terminal of the fifth switch is connected to the power supply voltage input terminal. The second terminal of the fifth switch is connected to the first terminal of the sixth switch. The second terminal of the sixth switch is grounded. The connection terminal of the fifth switch and the sixth switch outputs the switch drive signal.

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