A dual-channel synchronous radar frequency source and its working method

Abstract

The present invention discloses a dual-channel synchronous radar frequency source and its working method, which includes a crystal oscillator module, a direct digital frequency synthesis (DDS) module, a local oscillator module, and an excitation frequency conversion module. The crystal oscillator module is connected to the local oscillator module to provide a high-precision reference source for the local oscillator module. The local oscillator module receives the reference source from the crystal oscillator module, outputs a reference clock to the direct digital frequency synthesis (DDS) module, and outputs two signals to the excitation frequency conversion module. The direct digital frequency synthesis (DDS) module generates four signals, two of which are output to the local oscillator module for mixing to generate two local oscillator signals and output to the excitation frequency conversion module; the other two are directly output to the excitation frequency conversion module. The excitation frequency conversion module receives the four local oscillator signals and two intermediate frequency waveform signals, and after mixing, generates two radio frequency signals. The present invention shortens the frequency switching time, improves the anti-interference ability of the radar, reduces the radar detection blind area, synchronization delay, and the volume of the frequency source, and reduces the power consumption and heat dissipation of the equipment.

Description

Technical Field

[0001] The present invention relates to the technical field of radio frequency signal sources, and in particular to a dual-channel synchronous radar frequency source and its working method. Background Art

[0002] With the development of science and technology, the electromagnetic environment has become increasingly complex. At present, the requirements for the functions and performance of radars are getting higher and higher. Phased array radars are no longer limited to the previous single function design, and the function design tends to be diversified. Designing a phased array system radar with multiple functions has become an important direction for the development of phased array radars.

[0003] As an important part of the radar system, the frequency source provides signal sources such as radio frequency signals, local oscillator signals, and coherent clocks required for the operation of the radar system, and its performance directly affects the radar operation performance. For a multi-functional phased array radar, due to the increase in radar functions, higher requirements are put forward for parameters such as the number of channels, synchronization performance, and waveform patterns of radio frequency signals. Summary of the Invention

[0004] The purpose of the present invention is to provide a dual-channel synchronous radar frequency source and its working method with short frequency switching time, strong anti-interference ability, small detection blind area, low synchronization delay, and small volume, low power consumption, and low heat dissipation.

[0005] The technical solution to achieve the purpose of the present invention is: a dual-channel synchronous radar frequency source, including a crystal oscillator module, a direct digital frequency synthesis (DDS) module, a local oscillator module, and an excitation frequency conversion module. The local oscillator module includes a comb spectrum generator, a filter, and an amplifier. The direct digital frequency synthesis (DDS) module includes a frequency multiplier, a switched filter bank, and a mixer;

[0006] The crystal oscillator module is connected to the local oscillator module through a radio frequency cable to provide a high-precision reference source for the local oscillator module;

[0007] The local oscillator module receives the reference source from the crystal oscillator module, and outputs a reference clock REF-CLK, a third local oscillator signal LO2-A, and a fourth local oscillator signal LO2-B after passing through the comb spectrum generator, the filter, and the amplifier. The reference clock REF-CLK is output to the direct digital frequency synthesis (DDS) module, and the third local oscillator signal LO2-A and the fourth local oscillator signal LO2-B are output to the excitation frequency conversion module;

[0008] The direct digital frequency synthesis (DDS) module receives the reference clock REF-CLK from the local oscillator module. Under the control of the host computer, the DDS module generates the first CW signal OUT1, the second CW signal OUT2, the first intermediate frequency waveform signal OUT3, and the second intermediate frequency waveform signal OUT4. The first CW signal OUT1 and the second CW signal OUT2 are output to the local oscillator module, mixed with the signal generated by the comb spectrum generator, and the first local oscillator signal LO1-A and the second local oscillator signal LO1-B are generated and output to the excitation frequency conversion module; the first intermediate frequency waveform signal OUT3 and the second intermediate frequency waveform signal OUT4 are directly output to the excitation frequency conversion module.

[0009] The excitation frequency conversion module receives the first local oscillator signal LO1-A, the second local oscillator signal LO1-B, the third local oscillator signal LO2-A, the fourth local oscillator signal LO2-B, the first intermediate frequency waveform signal OUT3, and the second intermediate frequency waveform signal OUT4, mixes the first local oscillator signal LO1-A, the third local oscillator signal LO2-A, and the first intermediate frequency waveform signal OUT3 to generate the first radio frequency signal RF-A; mixes the second local oscillator signal LO1-B, the fourth local oscillator signal LO2-B, and the second intermediate frequency waveform signal OUT4 to generate the second radio frequency signal RF-B.

[0010] Further, the dual-channel synchronous radar frequency source further includes a host computer, and the host computer communicates with the DDS module through an SPI serial port, sends control instructions to the DDS module, and controls the operation of the local oscillator module and the excitation frequency conversion module.

[0011] Further, the DDS module and the local oscillator module adopt a combination of direct frequency synthesis and direct digital frequency synthesis, and generate the broadband first local oscillator signal LO1-A and the second local oscillator signal LO1-B through a comb spectrum generator, a frequency multiplier, a switched filter bank, and a mixer.

[0012] Further, the DDS controls the fine-step frequency hopping points, and the frequency hopping accuracy is 0.1 Hz. Both direct frequency synthesis and direct digital frequency synthesis can ensure the phase consistency between channels, and realize the fine-step frequency hopping of the first local oscillator signal LO1-A and the second local oscillator signal LO1-B and the radio frequency synchronization.

[0013] Further, the DDS module includes an FPGA chip and a four-channel DDS chip; the FPGA chip uses the XC4VLX25-10SFG363I type FPGA of XILINX company, communicates with the host computer through an SPI serial port, and configures the four-channel DDS to generate four independent output signals; the model of the four-channel DDS chip is GM4943A.

[0014] Furthermore, the four-channel DDS chip is simultaneously used for fine-stepping frequency hopping of the frequency source and intermediate frequency generation. It realizes the phase difference control between the four channels in an on-chip synchronization manner, which is used to calibrate the phase difference caused by hardware between the channels. At the same time, by adjusting the timing relationship of the two trigger pulses, the synchronous / asynchronous operation of the two RF signals is achieved.

[0015] Furthermore, the four-channel DDS chip has four independent DDS chips. Each independent DDS chip has independently controllable phase, frequency, and amplitude control words, and supports a sampling clock of up to 2.5 GHz. The four-channel DDS chip supports multi-chip synchronization, linear scanning, non-linear scanning, frequency keying, phase keying, amplitude control, and RAM scanning functions.

[0016] Furthermore, the direct digital frequency synthesis DDS module communicates with the host computer through the SPI serial port, receives and parses the control instructions from the host computer, controls the switch filter banks of the local oscillator module and the excitation frequency conversion module, configures the registers of the direct digital frequency synthesis DDS module. After receiving the working instruction, the direct digital frequency synthesis DDS module starts to work with REF-CLK as the sampling clock, and outputs the first CW signal OUT1, the second CW signal OUT2, the first intermediate frequency waveform signal OUT3, and the second intermediate frequency waveform signal OUT4 according to the requirements of the whole machine.

[0017] Furthermore, the excitation frequency conversion module receives the first local oscillator signal LO1-A, the third local oscillator signal LO2-A, and the first intermediate frequency waveform signal OUT3, and outputs the first RF signal RF-A after mixing, filtering, and amplification; it receives the second local oscillator signal LO1-B, the fourth local oscillator signal LO2-B, and the second intermediate frequency waveform signal OUT4, and outputs the second RF signal RF-B after mixing, filtering, and amplification; the first local oscillator signal LO1-A and the second local oscillator signal LO1-B are phase-synchronized, and the phase of the first intermediate frequency waveform signal OUT3 and the second intermediate frequency waveform signal OUT4 is controllable, so as to achieve RF synchronization of the first RF signal RF-A and the second RF signal RF-B.

[0018] A working method of a dual-channel synchronous radar frequency source, which is based on the above-mentioned dual-channel synchronous radar frequency source, specifically includes the following steps:

[0019] Step 1: The host computer sends relevant frequency information to the FPGA of the direct digital frequency synthesis DDS module in a predefined format through the SPI communication method. This information includes the frequency points, code patterns, amplitudes, and initial phases of the two channels.

[0020] Step 2: The FPGA of the direct digital frequency synthesis DDS module parses the received control instructions.

[0021] Step 3: After the parsing is completed, the FPGA sends out a parallel communication signal according to the parsing result to control the switched filter banks in the local oscillator module and the excitation frequency conversion module to work;

[0022] Step 4: The FPGA of the direct digital frequency synthesis DDS module communicates with the four-channel DDS chip to perform corresponding configuration on the registers of the four-channel DDS chip. The time for configuring the registers is much longer than the parallel communication time;

[0023] Step 5: After the configuration is completed, the four-channel DDS chip is in a waiting state. When the four-channel DDS chip receives the corresponding channel trigger pulse sent from the host computer, the four-channel DDS chip generates a corresponding signal. Set the pulse generation interval time corresponding to the channels of the four-channel DDS chip according to specific requirements to achieve the synchronization of the first radio frequency signal RF-A and the second radio frequency signal RF-B.

[0024] Compared with the prior art, the remarkable advantages of the present invention are as follows: (1) The present invention adopts a combination of direct frequency synthesis and direct digital frequency synthesis, uses a high-precision temperature-controlled crystal oscillator as the reference source, generates broadband radio frequency signals through frequency multiplication, frequency mixing, etc., and uses a DDS chip to generate two independent and controlled broadband arbitrary waveform radio frequency signals, and can realize functions such as amplitude modulation, phase shift, and dual-channel synchronization through the built-in FPGA; (2) Use DDS to generate single-point continuous signals, cooperate with the switched filter bank to achieve fast frequency point switching, effectively shorten the frequency switching time, and can control the frequency switching time within 250 ns, which is beneficial to adding signals such as cover pulses and blind filling pulses during the operation of the pulsed radar, improving the anti-interference ability of the radar and reducing the radar detection blind area; (3) Use a four-channel DDS chip as the fine-step frequency hopping source and waveform signal generation source, adopt the in-chip synchronization method, reduce the influence of external interference and signals between printed circuit boards on synchronization, reduce the synchronization delay, realize the free switching between synchronous / asynchronous modes of the two channels of the frequency source, and at the same time reduce the volume of the frequency source, and reduce the power consumption and heat dissipation of the equipment. Description of the Drawings

[0025] Figure 1 is the structural block diagram of a dual-channel synchronous radar frequency source of the present invention.

[0026] Figure 2 is the design schematic diagram of the local oscillator module in the embodiment of the present invention.

[0027] Figure 3 is the structural schematic diagram of the GM4943A four-channel DDS in the embodiment of the present invention.

[0028] Figure 4 is the design schematic diagram of the direct digital frequency synthesis DDS module in the embodiment of the present invention.

[0029] Figure 5It is the design schematic diagram of the excitation frequency conversion module in the embodiments of the present invention.

[0030] Figure 6 It is the design diagram of the working timing of the frequency source in the embodiments of the present invention. Specific embodiments

[0031] The present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0032] As Figure 1 shown, a dual-channel synchronous radar frequency source of the present invention includes a crystal oscillator module, a direct digital frequency synthesis (DDS) module, a local oscillator module, and an excitation frequency conversion module. The local oscillator module includes a comb spectrum generator, a filter, and an amplifier. The direct digital frequency synthesis (DDS) module includes a frequency multiplier, a switched filter bank, and a mixer.

[0033] The crystal oscillator module is connected to the local oscillator module through a radio frequency cable to provide a high-precision reference source for the local oscillator module.

[0034] The local oscillator module receives the reference source from the crystal oscillator module, and outputs a reference clock REF-CLK, a third local oscillator signal LO2-A, and a fourth local oscillator signal LO2-B after passing through the comb spectrum generator, the filter, and the amplifier. The reference clock REF-CLK is output to the direct digital frequency synthesis (DDS) module, and the third local oscillator signal LO2-A and the fourth local oscillator signal LO2-B are output to the excitation frequency conversion module.

[0035] The direct digital frequency synthesis (DDS) module receives the reference clock REF-CLK from the local oscillator module. Under the control of the upper computer, the direct digital frequency synthesis (DDS) module generates a first channel CW signal OUT1, a second channel CW signal OUT2, a first intermediate frequency waveform signal OUT3, and a second intermediate frequency waveform signal OUT4. The first channel CW signal OUT1 and the second channel CW signal OUT2 are output to the local oscillator module and mixed with the signal generated by the comb spectrum generator to generate a first local oscillator signal LO1-A and a second local oscillator signal LO1-B, which are output to the excitation frequency conversion module. The first intermediate frequency waveform signal OUT3 and the second intermediate frequency waveform signal OUT4 are directly output to the excitation frequency conversion module.

[0036] The excitation frequency conversion module receives the first local oscillator signal LO1-A, the second local oscillator signal LO1-B, the third local oscillator signal LO2-A, the fourth local oscillator signal LO2-B, the first intermediate frequency waveform signal OUT3, and the second intermediate frequency waveform signal OUT4, mixes the first local oscillator signal LO1-A, the third local oscillator signal LO2-A, and the first intermediate frequency waveform signal OUT3 to generate a first radio frequency signal RF-A; mixes the second local oscillator signal LO1-B, the fourth local oscillator signal LO2-B, and the second intermediate frequency waveform signal OUT4 to generate a second radio frequency signal RF-B.

[0037] Further, the dual-channel synchronous radar frequency source further includes a host computer, which communicates with the direct digital frequency synthesis (DDS) module through an SPI serial port, and issues control instructions to the DDS module to control the operation of the local oscillator module and the excitation frequency conversion module.

[0038] Further, the DDS module and the local oscillator module adopt a combination of direct frequency synthesis and direct digital frequency synthesis to generate a broadband first local oscillator signal LO1-A and a second local oscillator signal LO1-B through a comb spectrum generator, a frequency multiplier, a switched filter bank, and a mixer.

[0039] Further, the DDS controls the fine-step frequency hopping points with a frequency hopping accuracy of 0.1 Hz. Both direct frequency synthesis and direct digital frequency synthesis can ensure the phase consistency between channels. Therefore, the first local oscillator signal LO1-A and the second local oscillator signal LO1-B can achieve fine-step frequency hopping and RF synchronization.

[0040] Further, the DDS module includes an FPGA chip and a four-channel DDS chip; the FPGA chip uses the XC4VLX25-10SFG363I type FPGA of XILINX Corporation, communicates with the host computer through an SPI serial port, and configures the four-channel DDS to generate four independent output signals; the model of the four-channel DDS chip is GM4943A.

[0041] Further, the four-channel DDS chip is simultaneously used for the fine-step frequency hopping of the frequency source and the generation of the intermediate frequency. It uses an in-chip synchronization method to control the phase difference between the four channels, which is used to calibrate the phase difference caused by hardware between channels; at the same time, by adjusting the timing relationship of two trigger pulses, the synchronization / asynchronization operation of two RF signals is realized.

[0042] Further, the four-channel DDS chip has four independent DDS chips. Each independent DDS chip has independently controlled phase, frequency, and amplitude control words, and supports a sampling clock of up to 2.5 GHz; the four-channel DDS chip supports multi-chip synchronization, linear scanning, non-linear scanning, frequency keying, phase keying, amplitude control, and RAM scanning functions.

[0043] Further, the direct digital frequency synthesis (DDS) module communicates with the host computer through the SPI serial port, receives and parses the control instructions from the host computer, controls the switched filter banks of the local oscillator module and the excitation frequency conversion module, configures the registers of the direct digital frequency synthesis (DDS) module. After receiving the working instruction, the direct digital frequency synthesis (DDS) module starts to work with REF-CLK as the sampling clock and outputs the first frequency continuous wave OUT1, the second frequency continuous wave OUT2, the first intermediate frequency waveform signal OUT3, and the second intermediate frequency waveform signal OUT4 according to the requirements of the whole machine.

[0044] Further, the excitation frequency conversion module receives the first local oscillator signal LO1-A, the third local oscillator signal LO2-A, and the first intermediate frequency waveform signal OUT3, and outputs the first radio frequency signal RF-A after mixing, filtering, and amplification; it receives the second local oscillator signal LO1-B, the fourth local oscillator signal LO2-B, and the second intermediate frequency waveform signal OUT4, and outputs the second radio frequency signal RF-B after mixing, filtering, and amplification; the first local oscillator signal LO1-A and the second local oscillator signal LO1-B are phase-synchronized, and the first intermediate frequency waveform signal OUT3 and the second intermediate frequency waveform signal OUT4 are phase-controllable. Therefore, the first radio frequency signal RF-A and the second radio frequency signal RF-B can achieve radio frequency synchronization.

[0045] The present invention also provides a working method for a dual-channel synchronous radar frequency source, which specifically includes the following steps:

[0046] Step 1: The host computer sends relevant frequency information to the FPGA of the direct digital frequency synthesis (DDS) module in a predefined format through the SPI communication method. This information includes the frequency points, code patterns, amplitudes, and initial phases of the two channels.

[0047] Step 2: The FPGA of the direct digital frequency synthesis (DDS) module parses the received control instructions.

[0048] Step 3: After the parsing is completed, the FPGA issues a parallel communication signal according to the parsing result to control the switched filter banks in the local oscillator module and the excitation frequency conversion module to work.

[0049] Step 4: The FPGA of the direct digital frequency synthesis (DDS) module communicates with the four-channel DDS chip to perform corresponding configuration on the registers of the four-channel DDS chip. The time for configuring the registers is much longer than the parallel communication time.

[0050] Step 5: After the configuration is completed, the four-channel DDS chip is in a waiting state. When the four-channel DDS chip receives the corresponding channel trigger pulse sent from the host computer, the four-channel DDS chip generates a corresponding signal, and sets the pulse generation interval time corresponding to the channels of the four-channel DDS chip according to specific requirements to achieve the synchronization of the first radio frequency signal RF-A and the second radio frequency signal RF-B.

[0051] Embodiment 1

[0052] A synchronous dual-channel radar frequency source provided in this embodiment includes a crystal oscillator module, a direct digital frequency synthesis DDS module, a local oscillator module, and an excitation frequency conversion module. The local oscillator module includes a comb spectrum generator, a filter, and an amplifier. The direct digital frequency synthesis DDS module includes a frequency multiplier, a switched filter bank, and a mixer.

[0053] The crystal oscillator module is connected to the local oscillator module through a radio frequency cable to provide a high-precision reference source for the local oscillator module.

[0054] The local oscillator module receives the reference source from the crystal oscillator module, and outputs a reference clock REF-CLK, a third local oscillator signal LO2-A, and a fourth local oscillator signal LO2-B after passing through the comb spectrum generator, the filter, and the amplifier. The reference clock REF-CLK is output to the direct digital frequency synthesis DDS module, and the third local oscillator signal LO2-A and the fourth local oscillator signal LO2-B are output to the excitation frequency conversion module.

[0055] The direct digital frequency synthesis DDS module receives the reference clock REF-CLK from the local oscillator module. Under the control of the host computer, the direct digital frequency synthesis DDS module generates a first channel fixed-frequency continuous wave OUT1, a second channel fixed-frequency continuous wave OUT2, a first intermediate frequency waveform signal OUT3, and a second intermediate frequency waveform signal OUT4. The first channel fixed-frequency continuous wave OUT1 and the second channel fixed-frequency continuous wave OUT2 are output to the local oscillator module and mixed with the signal generated by the comb spectrum generator to generate a first local oscillator signal LO1-A and a second local oscillator signal LO1-B, which are output to the excitation frequency conversion module. The first intermediate frequency waveform signal OUT3 and the second intermediate frequency waveform signal OUT4 are directly output to the excitation frequency conversion module.

[0056] The excitation frequency conversion module receives the first local oscillator signal LO1-A, the second local oscillator signal LO1-B, the third local oscillator signal LO2-A, the fourth local oscillator signal LO2-B, the first intermediate frequency waveform signal OUT3, and the second intermediate frequency waveform signal OUT4, mixes the first local oscillator signal LO1-A, the third local oscillator signal LO2-A, and the first intermediate frequency waveform signal OUT3 to generate a first radio frequency signal RF-A; mixes the second local oscillator signal LO1-B, the fourth local oscillator signal LO2-B, and the second intermediate frequency waveform signal OUT4 to generate a second radio frequency signal RF-B.

[0057] Figure 2 Figure 1 is the schematic diagram of the local oscillator module. The local oscillator module receives an externally input high-precision reference source. In this example, a 120 MHz crystal oscillator of PF0C8-0110 is used as the reference source. After passing through the comb spectrum generator, REF-CLK is generated, which is output to the direct digital synthesis module as the DDS sampling clock after filtering. In this example, the frequency of REF-CLK is 2.4 GHz; the 120 MHz reference source is frequency-multiplied to generate a high-frequency signal, which is output after filtering, power splitting, and amplification, serving as the third local oscillator signal LO2-A and the fourth local oscillator signal LO2-B; the 120 MHz signal passes through the comb spectrum generator and the switched filter bank to generate high-frequency signals Nf0, (N+a)f0, (N+2a)f0, (N+3a)f0, where N and a are positive integers and f0 is the crystal oscillator frequency, which is 120 MHz in this example. When the switched filter bank selects channel 1, the output signal Nf0 is mixed with the first path of point frequency continuous wave OUT1 output by the DDS channel. OUT1 serves as the fine step hopping frequency point, with an accuracy of up to 0.1 Hz, and the output bandwidth of OUT1 is af0. In this example, a = 3. Therefore, the signal range generated by mixing is f1~f1+360 MHz (f1 is the minimum value after mixing the Nf0 and OUT1 signals); when the switched filter bank selects channel 2, the signal range generated by mixing is f2~f2+360 MHz; when the switched filter bank selects channel 3, the signal range generated by mixing is f3~f3+360 MHz; when the switched filter bank selects channel 4, the signal range generated by mixing is f4~f4+360 MHz. According to the above definition, f2 = f1+360 MHz, f3 = f2+360 MHz, f4 = f3+360 MHz. Finally, the output range of the frequency points after mixing is f1~f1+1440 MHz. This signal is amplified and output as the first local oscillator signal LO1-A and the second local oscillator signal LO1-B. The working modes of channel A and channel B are the same.

[0058] Figure 3 Figure 2 is the structure diagram of the four-channel DDS used in the example. This DDS has four independent DDSs, each with independently controlled phase, frequency, and amplitude control words, and supports a maximum sampling clock of 2.5 GHz. The chip supports multi-chip synchronization and functions such as linear scanning, non-linear scanning, frequency keying, phase keying, amplitude control, and RAM scanning. In the present invention, the characteristics of this chip, namely four-channel independent adjustment, controllable phase, frequency points, and amplitude, are fully utilized and applied to the frequency source of the multi-functional phased array radar, improving the integration of the frequency source, effectively reducing power consumption, and realizing the synchronous / asynchronous switching function between two channels.

[0059] Figure 4It is a schematic diagram of the direct digital synthesis module structure. This module communicates with the host computer through the SPI serial port, receives control instructions from the host computer, parses them, controls the switched filter banks of the local oscillator module and the excitation frequency conversion module, configures the DDS register. After receiving the working instruction, the DDS starts to work with REF-CLK as the sampling clock and outputs the first channel of point frequency continuous wave OUT1, the second channel of point frequency continuous wave OUT2, the first intermediate frequency waveform signal OUT3, and the second intermediate frequency waveform signal OUT4 according to the overall machine requirements.

[0060] Figure 5 It is a schematic diagram of the excitation frequency conversion module structure. This module receives LO1, LO2 and the intermediate frequency signal. Taking channel A as an example, first mix the first local oscillator signal LO2-A with the first intermediate frequency waveform signal OUT3, after filtering, then mix the generated signal with the first local oscillator signal LO1-A, and output after filtering and amplification, which is the first radio frequency signal RF-A signal. Channel B is exactly the same as channel A.

[0061] Figure 6It is the working timing design of the frequency source in the example. Through this working timing, the synchronous / asynchronous working switching between channels A and B of the frequency source can be realized. The horizontal axis is the time period, and the vertical axis is the trigger timing of each signal. When the frequency source works, the host computer sends relevant frequency information to the FPGA in a predefined format through SPI communication. This information includes the frequency points, code patterns, amplitudes, initial phases, etc. of the two channels. After the transmission is completed, the FPGA starts to parse, and the parsing duration is t1. In this example, the FPGA uses a 100 MHz working clock, and t1 is 20 clock cycles, approximately 0.2 μs. After parsing is completed, the FPGA issues a parallel communication signal according to the parsing result to control the switched capacitor filters in the local oscillator module and the excitation frequency conversion module. At the same time, the FPGA communicates with the DDS and configures the DDS registers accordingly. The configuration time is t1. The time to configure the registers is much longer than the parallel communication. In this example, t1 is 100 clock cycles, approximately 1 μs. After the configuration is completed, the DDS is in a waiting state. When the DDS receives the trigger pulse of the corresponding channel sent by the host computer, the DDS generates the corresponding signal. As shown in the figure, the pulse generation interval times corresponding to DDS channels 1, 2, 3, and 4 are t3, t4, t5, and t6. The values of t3, t4, t5, and t6 can be set according to specific requirements. When in the synchronous working state, set t3 = t4 and t5 = t6. Since the analog signal part adopts a completely symmetric design and shares the reference source, the analog signal part is always in a synchronous state. When t3 = t4, LO1-A and LO1-B are synchronous. When t5 = t6, OUT3 and OUT4 are synchronous, and thus RF-A and RF-B can be made synchronous. During actual use, there will be a phase difference between the two links. The initial phase of the frequency point generated by the DDS can be adjusted, and the compensation for this error is solidified in the program to ultimately achieve complete synchronization between the two channels. In the asynchronous working state, the trigger timing can be set arbitrarily according to actual working requirements.

[0062] The above are only the preferred embodiments of the present invention. For those of ordinary skill in the art, without departing from the technical principles of the present invention, several improvements and modifications can be made, and these improvements and modifications should also be regarded as the protection scope of the present invention.

Claims

1. A dual-channel synchronous radar frequency source, characterized in that It includes a crystal oscillator module, a direct digital frequency synthesis (DDS) module, a local oscillator module, and an excitation frequency conversion module. The local oscillator module includes a comb spectrum generator, a filter, and an amplifier. The direct digital frequency synthesis (DDS) module includes a frequency multiplier, a switched filter bank, and a mixer; The crystal oscillator module is connected to the local oscillator module through a radio frequency cable to provide a high-precision reference source for the local oscillator module; The local oscillator module receives the reference source from the crystal oscillator module and outputs a reference clock REF-CLK, a third local oscillator signal LO2-A, and a fourth local oscillator signal LO2-B after passing through the comb spectrum generator, the filter, and the amplifier. The reference clock REF-CLK is output to the direct digital frequency synthesis (DDS) module, and the third local oscillator signal LO2-A and the fourth local oscillator signal LO2-B are output to the excitation frequency conversion module; The direct digital frequency synthesis (DDS) module receives the reference clock REF-CLK from the local oscillator module. Under the control of the host computer, the direct digital frequency synthesis (DDS) module generates a first channel point frequency continuous wave OUT1, a second channel point frequency continuous wave OUT2, a first intermediate frequency waveform signal OUT3, and a second intermediate frequency waveform signal OUT4. The first channel point frequency continuous wave OUT1 and the second channel point frequency continuous wave OUT2 are output to the local oscillator module and mixed with the signal generated by the comb spectrum generator to generate a first local oscillator signal LO1-A and a second local oscillator signal LO1-B, which are output to the excitation frequency conversion module; The first intermediate frequency waveform signal OUT3 and the second intermediate frequency waveform signal OUT4 are directly output to the excitation frequency conversion module; The excitation frequency conversion module receives the first local oscillator signal LO1-A, the second local oscillator signal LO1-B, the third local oscillator signal LO2-A, the fourth local oscillator signal LO2-B, the first intermediate frequency waveform signal OUT3, and the second intermediate frequency waveform signal OUT4, mixes the first local oscillator signal LO1-A, the third local oscillator signal LO2-A, and the first intermediate frequency waveform signal OUT3 to generate a first radio frequency signal RF-A; mixes the second local oscillator signal LO1-B, the fourth local oscillator signal LO2-B, and the second intermediate frequency waveform signal OUT4 to generate a second radio frequency signal RF-B.

2. The dual-channel synchronous radar frequency source according to claim 1, wherein The dual-channel synchronous radar frequency source further includes a host computer. The host computer communicates with the direct digital frequency synthesis (DDS) module through an SPI serial port, sends control instructions to the direct digital frequency synthesis (DDS) module, and controls the operation of the local oscillator module and the excitation frequency conversion module.

3. The dual-channel synchronous radar frequency source according to claim 1, wherein The direct digital frequency synthesis (DDS) module and the local oscillator module adopt a combination of direct frequency synthesis and direct digital frequency synthesis to generate broadband first local oscillator signal LO1-A and second local oscillator signal LO1-B through a comb spectrum generator, a frequency multiplier, a switched filter bank, and a mixer.

4. The dual-channel synchronous radar frequency source according to claim 3, wherein The direct digital frequency synthesis (DDS) controls the fine-step frequency hopping points, and the frequency hopping accuracy is 0.1 Hz. Both direct frequency synthesis and direct digital frequency synthesis ensure the phase consistency between channels, realizing the fine-step frequency hopping and radio frequency synchronization of the first local oscillator signal LO1-A and the second local oscillator signal LO1-B.

5. The dual-channel synchronous radar frequency source according to claim 1, characterized in that, The direct digital frequency synthesis (DDS) module includes an FPGA chip and a four-channel DDS chip. The FPGA chip is the XC4VLX25-10SFG363I type FPGA from XILINX, communicates with the host computer through an SPI serial port, and configures the four-channel DDS to generate four independent output signals. The model of the four-channel DDS chip is GM4943A.

6. The dual-channel synchronous radar frequency source according to claim 5, wherein, The four-channel DDS chip is also used for fine-stepped frequency hopping of the frequency source and intermediate frequency generation. It uses an in-chip synchronization method to control the phase difference between the four channels, which is used to calibrate the phase difference caused by hardware between the channels. At the same time, by adjusting the timing relationship of two trigger pulses, synchronous / asynchronous operation of two radio frequency signals is achieved.

7. The dual-channel synchronous radar frequency source according to claim 6, characterized in that, The four-channel DDS chip has four independent DDS chips. Each independent DDS chip has independently controllable phase, frequency, and amplitude control words, and supports a sampling clock of up to 2.5 GHz. The four-channel DDS chip supports multi-chip synchronization, linear scanning, non-linear scanning, frequency keying, phase keying, amplitude control, and RAM scanning functions.

8. The dual-channel synchronous radar frequency source according to claim 1, characterized in that, The direct digital frequency synthesis (DDS) module communicates with the host computer through an SPI serial port, receives and parses the control instructions from the host computer, controls the switched capacitor filters of the local oscillator module and the excitation frequency conversion module, configures the registers of the direct digital frequency synthesis (DDS) module. After receiving the working instruction, the direct digital frequency synthesis (DDS) module starts to work with REF-CLK as the sampling clock, and outputs the first CW signal OUT1, the second CW signal OUT2, the first intermediate frequency waveform signal OUT3, and the second intermediate frequency waveform signal OUT4 according to the requirements of the whole machine.

9. The dual-channel synchronous radar frequency source according to claim 1, wherein The excitation frequency conversion module receives the first local oscillator signal LO1-A, the third local oscillator signal LO2-A, and the first intermediate frequency waveform signal OUT3, and outputs the first radio frequency signal RF-A after mixing, filtering, and amplification. It receives the second local oscillator signal LO1-B, the fourth local oscillator signal LO2-B, and the second intermediate frequency waveform signal OUT4, and outputs the second radio frequency signal RF-B after mixing, filtering, and amplification. The first local oscillator signal LO1-A and the second local oscillator signal LO1-B are phase-synchronized, and the phase of the first intermediate frequency waveform signal OUT3 and the second intermediate frequency waveform signal OUT4 is controllable, so as to achieve radio frequency synchronization of the first radio frequency signal RF-A and the second radio frequency signal RF-B.

10. A working method of a dual-channel synchronous radar frequency source, characterized in that, This method is based on the dual-channel synchronous radar frequency source described in any one of claims 1 to 9, and specifically includes the following steps: Step 1: The host computer sends relevant frequency information to the FPGA of the direct digital frequency synthesis (DDS) module in a predefined format through SPI communication. This information includes the frequency points, code patterns, amplitudes, and initial phases of the two channels. Step 2: The FPGA of the direct digital frequency synthesis (DDS) module parses the received control instructions. Step 3: After the parsing is completed, the FPGA sends a parallel communication signal according to the parsing result to control the operation of the switched capacitor filters in the local oscillator module and the excitation frequency conversion module. Step 4: The FPGA of the direct digital frequency synthesis (DDS) module communicates with the four-channel DDS chip, and performs corresponding configuration on the registers of the four-channel DDS chip. The time for configuring the registers is much longer than the parallel communication time; Step 5: After the configuration is completed, the four-channel DDS chip is in a waiting state. When the four-channel DDS chip receives the corresponding channel trigger pulse sent from the host computer, the four-channel DDS chip generates a corresponding signal. Set the pulse generation interval time corresponding to the channels of the four-channel DDS chip according to specific requirements to achieve synchronization between the first radio frequency signal RF-A and the second radio frequency signal RF-B.

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