A storage extension pooling device and system
By introducing storage expansion pooling devices into servers and utilizing CDFP interfaces and I/O Fabric to achieve interaction and expansion of PCIe resources, the problem of limited local storage quantity is solved, enabling independent expansion of storage resources and sharing across multiple hosts, thus adapting to the modularization and resource pooling requirements of servers.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- INSPUR SUZHOU INTELLIGENT TECH CO LTD
- Filing Date
- 2022-10-24
- Publication Date
- 2026-04-17
AI Technical Summary
Existing server equipment has limited local storage capacity due to CPU PCIe resources and chassis space constraints, which cannot meet the ever-increasing demand for data storage.
It adopts storage expansion pooling devices, and through the combination of motherboard and Retimer card, NVMe SSD hard drive and hard drive backplane, it uses CDFP interface, CDFP cable and I/O Fabric to realize the interaction and expansion of PCIe resources, and supports sharing by multiple hosts.
It enables independent expansion of storage resources, reduces the design complexity of the host side, conforms to the trend of server modularization and resource pooling, and improves the flexibility and efficiency of storage expansion.
Smart Images

Figure CN115757236B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of server equipment, and in particular to a storage expansion pooling device and system. Background Technology
[0002] With the digital transformation of various internet companies and other enterprises worldwide, and the rapid development of digital and intelligent devices, data will show an exponential growth trend; the development of emerging technologies such as artificial intelligence, big data, cloud computing, and 5G communication demonstrates an unprecedented high demand for computing power and storage capabilities.
[0003] In existing server equipment, within the same chassis, the PCIe resources issued by the CPU are connected to the hard drive backplane via slimline cables, thereby connecting to storage devices such as NVMe SSDs and EDSFFs. However, due to limitations in CPU PCIe resources and chassis space, the amount of local storage in a server is finite, unable to meet the ever-increasing data storage demands. Therefore, how to expand storage resources beyond local storage is an urgent problem to be solved. Summary of the Invention
[0004] In view of the above problems, embodiments of this application provide a storage expansion pooling device and system to overcome or at least partially solve the above problems.
[0005] A first aspect of this application discloses a storage expansion pooling device, the storage expansion pooling device comprising: a motherboard, multiple Retimer cards with CDFP interfaces, multiple NVMe SSDs, and multiple hard drive backplanes, wherein multiple first MCIO connectors and multiple second MCIO connectors are deployed on the motherboard;
[0006] The motherboard establishes connections with the multiple Retimer cards through the multiple first MCIO connectors, and the multiple Retimer cards establish communication connections with multiple host devices through CDFP interfaces, multiple CDFP cables, and I / O Fabric, so as to realize PCIe resource interaction between the motherboard and the multiple host devices;
[0007] The motherboard establishes a communication connection with the multiple NVMe SSDs through the multiple second MCIO connectors, multiple Slimline cables and multiple hard drive backplanes to realize PCIe resource interaction between the motherboard and the multiple NVMe SSDs.
[0008] Optionally, each of the multiple Retimer cards is further equipped with a multiple Retimer chip, which is used to restore the PCIe resources transmitted by the multiple hosts through CDFP cables.
[0009] Optionally, the storage expansion pooling device supports 24 x8 NVMe SSD hard drive expansions, including:
[0010] The motherboard establishes 12 communication connections with the host, and divides each communication connection into 2 to obtain 24 communication connections. The 24 communication connections are then connected to X8 NVMe SSDs to achieve the expansion of 24 X8 NVMe SSDs.
[0011] Optionally, the storage expansion pooling device supports 48 x4 NVMe SSD hard drive expansions, including:
[0012] The motherboard establishes 12 communication connections with the host, and divides each communication connection into 4 connections to obtain 48 communication connections. The 48 communication connections are then connected to X4 NVMe SSDs to achieve an expansion of 48 X4 NVMe SSDs.
[0013] Optionally, the motherboard is also equipped with a CPLD chip and a BMC chip, and the storage expansion pooling device is also provided with at least one of the following components: an LED light, a power button, a reset button, and a UID button;
[0014] The CPLD chip is used to control the LED light;
[0015] The CPLD chip is connected to the BMC chip via the UART0 interface, and feeds back the status of the power button, the reset button and the UID button to the BMC chip so that the BMC chip can perform the corresponding control.
[0016] Optionally, the storage expansion pooling device further includes a fan board; a BMC chip is also deployed on the motherboard;
[0017] The BMC chip is connected to the listening diagnostic module of the fan board via a USB interface to obtain the working status of the fan.
[0018] Optionally, the storage expansion pooling device also includes multiple fans; a BMC chip is also deployed on the motherboard;
[0019] The BMC chip is connected to the plurality of fans respectively through the PWM / TACH interface. The BMC chip sends PWM signals to control the speed of the plurality of fans respectively, and receives TACH signals sent by the plurality of fans respectively.
[0020] Optionally, the storage expansion pooling device is further equipped with a BMC chip, a PSU interface, a VGA interface, sensors, FRU devices, a fan board, and mounting brackets; multiple FRU devices and multiple sensors are deployed on the multiple Retimer cards respectively, and sensors are deployed on the mounting brackets;
[0021] The BMC chip is connected to the fan board, the VGA interface, the FRU device and sensor on the plug-in card, the sensor on the motherboard, the PSU interface, the FRU device on the motherboard, and the sensor on the earpiece via seven I2C interfaces.
[0022] Optionally, the storage expansion pooling device is also equipped with a MicroUSB interface and a BMC chip;
[0023] The BMC chip is connected to a conversion chip via a UART1 interface. The conversion chip converts the UART signal emitted by the BMC chip into a USB signal and connects it to a MicroUSB interface. The MicroUSB interface is used for serial port debugging of the BMC chip.
[0024] Optionally, the storage expansion pooling device is also equipped with an RJ45 network management interface and a BMC chip;
[0025] The BMC chip is connected to the RJ45 network management interface via the RGMI interface. The RJ45 network management interface is used to establish a connection with an external system so that the external system can manage the storage expansion pooling device through the RJ45 network management interface.
[0026] A second aspect of this application discloses a storage expansion pooling system, the storage expansion pooling system comprising: the storage expansion pooling device described in the first aspect of this application and multiple host terminals;
[0027] The storage expansion pooling device establishes a communication connection with the multiple host terminals through CDFP cables and I / O Fabric;
[0028] The multiple host terminals send PCIe resources to the storage expansion pooling device, so that the storage expansion pooling device stores the PCIe resources. The multiple host terminals access the storage expansion pooling device to obtain the stored PCIe resources in the storage expansion pooling device, so as to realize the sharing of the storage expansion pooling device pool by multiple host terminals.
[0029] The embodiments of this application have the following advantages:
[0030] In this embodiment, a storage expansion pooling device is provided based on a resource pooling expansion convergence framework. The motherboard in the storage expansion pooling device establishes connections with multiple Retimer cards via multiple first MCIO connectors. The multiple Retimer cards establish communication connections with multiple host devices via CDFP interfaces, multiple CDFP cables, and I / O Fabric to achieve PCIe resource interaction between the motherboard and the multiple host devices. The motherboard also establishes communication connections with multiple NVMe SSDs via multiple second MCIO connectors, multiple Slimline cables, and the multiple hard drive backplanes to achieve PCIe resource interaction between the motherboard and the multiple NVMe SSDs.
[0031] This storage expansion pooling device utilizes CDFP interfaces and CDFP cables to connect with I / O Fabric, establishing communication connections with multiple host devices. These hosts then access the storage expansion pooling device pool through I / O Fabric, enabling multi-host sharing of the storage expansion pooling device pool. This storage expansion pooling device decouples storage resources from the host-side design, pooling them for independent expansion. This independent expansion capability aligns with the current trend of modularity and resource pooling in servers, reducing host-side design complexity and facilitating the independent expansion and upgrading of server compute nodes and storage resources. It allows for rapid market deployment and more flexible applications. Attached Figure Description
[0032] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the description of the embodiments of this application will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0033] Figure 1 This is a schematic diagram of a resource pool expansion based on a converged architecture provided in an embodiment of this application;
[0034] Figure 2 This is a structural block diagram of a storage expansion pooling device provided in an embodiment of this application;
[0035] Figure 3 This is a schematic diagram of a storage expansion pooling device that supports 24 x8 NVMe SSD hard drives, as provided in an embodiment of this application.
[0036] Figure 4 This is a front view illustration of a storage expansion pooling device that supports 24 x8 NVMe SSD hard drives, as provided in an embodiment of this application.
[0037] Figure 5 This is a diagram of the back window of a storage expansion pooling device that supports 24 x8 NVMe SSD hard drives, as provided in an embodiment of this application.
[0038] Figure 6 This is a schematic diagram of the control signal hardware link design of a storage expansion pooling device provided in an embodiment of this application;
[0039] Figure 7 This is a schematic diagram of the structure of a storage expansion pooling system provided in an embodiment of this application. Detailed Implementation
[0040] To make the above-mentioned objectives, features, and advantages of this application more apparent and understandable, the technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.
[0041] In related technologies, the development of servers involves decoupling computing, storage, memory, acceleration, and other units, forming independent devices, i.e., resource pooling. Then, interconnection technology is used to connect the various resources, thereby enabling independent expansion of computing, storage, memory, acceleration, and other resources, as well as sharing these resources among multiple hosts. Figure 1 This is a diagram illustrating the expansion of a resource pool based on a converged architecture, such as... Figure 1 As shown, the PCIe resources in the compute resource pool are interconnected via I / O Fabric, and then these PCIe resources are distributed to the GPU resource pool, storage resource pool, heterogeneous acceleration resource pool, etc., through I / O Fabric, thereby achieving resource expansion and pooling. At the same time, multiple hosts in the compute resource pool can access these resources through I / O Fabric, thereby enabling resource sharing across multiple hosts.
[0042] Based on the above-described resource pooling and expansion convergence architecture, this application embodiment provides a storage expansion pooling device, such as... Figure 2 As shown, Figure 2The present application provides a structural block diagram of a storage expansion pooling device, which includes: a motherboard, multiple Retimer cards with CDFP interfaces, multiple NVMe SSDs, and multiple hard drive backplanes. The motherboard is equipped with multiple first MCIO connectors and multiple second MCIO connectors.
[0043] The motherboard establishes connections with the multiple Retimer cards through the multiple first MCIO connectors, and the multiple Retimer cards establish communication connections with multiple host devices through CDFP interfaces, multiple CDFP cables, and I / O Fabric, so as to realize PCIe resource interaction between the motherboard and the multiple host devices;
[0044] The motherboard establishes a communication connection with the multiple NVMe SSDs through the multiple second MCIO connectors, multiple Slimline cables and multiple hard drive backplanes to realize PCIe resource interaction between the motherboard and the multiple NVMe SSDs.
[0045] In this embodiment, the Retimer card with a CDFP interface is used to connect to the first MCIO connector on the motherboard and to the host via a CDFP cable with the CDFP interface. The NVMe SSD fully utilizes the low latency and parallelism of the PCIe interface channel, offering better performance and faster transfer speeds compared to other ordinary hard drives. The NVMe SSD is used to store PCIe resources transferred from the host and to enable the host to read PCIe resources from the NVMe SSD. A hard drive backplane is used to mount the NVMe SSD; specifically, the NVMe SSD is typically connected to the hard drive backplane as a card, and multiple NVMe SSDs can be placed on each hard drive backplane. Furthermore, the first MCIO connector deployed on the motherboard refers to an x16 MCIO connector, used to connect the Retimer card; the second MCIO connector refers to an x8 or x4 MCIO connector, used to connect to the NVMe SSD.
[0046] In this embodiment, the motherboard is used to manage and control the entire storage expansion pooling device and to establish communication connections with multiple host devices and multiple NVMe SSDs, thereby achieving communication connections between the entire storage expansion pooling device and multiple host devices. Specifically, the communication connection with the host devices includes: the motherboard on the storage expansion pooling device is connected to a Retimer card via a first MCIO connector; the CDFP interface and CDFP cable on the Retimer card are connected to the I / O Fabric, thus establishing a communication connection between the storage expansion pooling device and the host devices. Multiple host devices can then access the storage expansion pooling device through this connection to achieve PCIe resource interaction. Inside the storage expansion pooling device, the motherboard connects to the NVMe SSDs via a second MCIO connector and a Slimline cable, transferring PCIe resources from the host devices to the NVMe SSDs and enabling the host devices to access the PCIe resources within the NVMe SSDs. The PCIe resource interaction process includes: the host sends PCIe resources in the I / O Fabric, and then the PCIe resources are transmitted to the storage expansion pooling device through the I / O Fabric and CDFP cable. The storage expansion pooling device stores the received PCIe resources, and then the host can read the PCIe resources in the storage expansion pooling device through the CDFP cable, thereby realizing the PCIe resource interaction between the host and the storage expansion pooling device. It should be noted that this application proposes a storage expansion pooling device, and the implementation of the host and I / O Fabric is not within the scope of this application. The implementation of the host and I / O Fabric is based on existing technical solutions and is not limited here.
[0047] In this embodiment, a storage expansion pooling device is provided based on a resource pooling expansion convergence framework. It utilizes a CDFP interface and CDFP cable to connect to I / O Fabric, establishing communication connections with multiple host devices. These hosts then access the storage expansion pooling device pool through I / O Fabric, enabling multi-host sharing of the storage expansion pooling device pool. This storage expansion pooling device decouples storage resources from the host-side design, pooling them for independent expansion. This storage expansion pooling device, capable of independent storage resource expansion, aligns better with the current trend of modularity and resource pooling in servers, reducing host-side design complexity. It facilitates the independent expansion and upgrading of server compute nodes and storage resources, allowing for rapid market deployment and more flexible applications.
[0048] In one optional embodiment, each of the plurality of Retimer cards is further equipped with a plurality of Retimer chips, which are used to restore the PCIe resources transmitted by the plurality of hosts through CDFP cables.
[0049] A Retimer chip is a chip with an internal data clock recovery function. When the signal from the previous stage passes through the Retimer chip, the signal is reconstructed by the internal clock, which increases the signal transmission energy and thus achieves data recovery. After the data recovery is achieved, the recovered data is sent out.
[0050] In this embodiment, a single CDFP cable contains 16 channels with a single channel rate of 25G, thus achieving a data transmission rate of 400Gbps. However, PCIe resources experience losses after passing through the CDFP cable. To address this loss issue, a Retimer chip is deployed on each Retimer card of the storage expansion pooling device. The Retimer chip is used to recover the PCIe resources transmitted through each CDFP cable, thereby reducing the loss caused by the CDFP cable and ensuring the accuracy and reliability of PCIe resource transmission.
[0051] In one optional embodiment, the storage expansion pooling device supports 24 x8 NVMe SSD hard drive expansions, including:
[0052] The motherboard establishes 12 communication connections with the host, and divides each communication connection into 2 to obtain 24 communication connections. The 24 communication connections are then connected to X8 NVMe SSDs to achieve the expansion of 24 X8 NVMe SSDs.
[0053] In this embodiment, the storage expansion pooling device uses a standard 19-inch chassis and supports the expansion of 24 x8 NVMe SSDs. Specifically, the motherboard connects to 12 Retimer cards via 12 x16 MCIO connectors. These 12 Retimer cards then connect to the host via CDFP interfaces, 12 CDFP cables, and I / O Fabric, thus establishing 12 communication connections between the storage expansion pooling device and the host. Each communication connection is then split into two, resulting in 24 communication connections. These 24 connections are then connected to the 24 x8 NVMe SSDs via 24 x8 MCIO connectors and Slimline cables, thereby achieving the expansion of 24 x8 NVMe SSDs. The 24 x8 NVMe SSDs are evenly distributed across three drive backplanes using the form of expansion cards, with eight x8 NVMe SSDs on each drive backplane.
[0054] Since the X8 NVMe SSDs are connected to the backplane via plug-in cards, the storage expansion pooling device can flexibly determine the number of X8 NVMe SSDs according to actual needs during use. The number of X8 NVMe SSDs can be increased or decreased simply by plugging and unplugging them. Therefore, the storage expansion pooling device can easily and quickly expand storage resources, and it has strong scalability and more flexible applications.
[0055] In one optional embodiment, the storage expansion pooling device supports 48 x4 NVMe SSD hard drive expansions, including:
[0056] The motherboard establishes 12 communication connections with the host, and divides each communication connection into 4 connections to obtain 48 communication connections. The 48 communication connections are then connected to X4 NVMe SSDs to achieve an expansion of 48 X4 NVMe SSDs.
[0057] In this embodiment, the storage expansion pooling device uses a standard 19-inch chassis and supports the expansion of 48 x4 NVMe SSDs. Specifically, the motherboard connects to 12 Retimer cards via 12 x16 MCIO connectors. These 12 Retimer cards then connect to the host computer via CDFP interfaces and 12 CDFP cables, establishing 12 communication connections between the storage expansion pooling device and the host computer. Each communication connection is then divided into four paths, resulting in 48 communication connections. These 48 connections are then connected to the 48 x4 NVMe SSDs via 48 x8 MCIO connectors and Slimline cables, thus achieving the expansion of 48 x4 NVMe SSDs. The 48 x4 NVMe SSDs are evenly distributed across three drive backplanes using the form of expansion cards, with eight x4 NVMe SSDs on each drive backplane.
[0058] Since the X4 NVMe SSDs are connected to the hard drive backplane via plug-in cards, the storage expansion pooling device can flexibly determine the number of X4 NVMe SSDs according to actual needs during use. The number of X4 NVMe SSDs can be increased or decreased simply by plugging and unplugging them. Therefore, the storage expansion pooling device can easily and quickly expand storage resources, and it has strong scalability and more flexible application.
[0059] In this embodiment, the storage expansion pooling devices are all based on standard 19-inch chassis and can support expansion of 24 x8 NVMe SSDs or 48 x4 NVMe SSDs. During use, the expansion method is selected according to actual needs. Expanding using different NVMe SSDs only requires changing the backplane, the model of the MCIO connector, and the number of MCIO connectors. It does not affect the communication connection between the storage expansion pooling device and the host, the overall size of the storage expansion pooling device, or the control method of the storage expansion pooling device. Therefore, this demonstrates the strong scalability and versatility of the storage expansion pooling device. Furthermore, this storage expansion pooling device is a separate storage resource pool. When the server has high storage resource requirements, multiple storage expansion pooling devices can be used simultaneously in the server to expand the server's storage resources. This further overcomes the problem of limited local storage in the server, which cannot meet data storage needs.
[0060] In one optional embodiment, the motherboard is further equipped with a CPLD chip and a BMC chip, and the storage expansion pooling device is further provided with at least one of the following components: an LED light, a power button, a reset button, and a UID button;
[0061] The CPLD chip is used to control the LED light;
[0062] The CPLD chip is connected to the BMC chip via the UART0 interface, and feeds back the status of the power button, the reset button and the UID button to the BMC chip so that the BMC chip can perform the corresponding control.
[0063] In this embodiment, the CPLD chip and BMC chip deployed on the motherboard are used for the control and management of the entire storage expansion pooling device. The CPLD chip stands for Complex Programmable Logic Device, which allows users to program pre-compiled CPLD programs into the chip using a dedicated CPLD programmer, thereby realizing the designed digital logic functions. The BMC chip stands for Baseboard Management Controller, a small, independent operating system primarily used for the remote deployment and management of the storage expansion pooling device, independent of other hardware. Additionally, LEDs and a UID button are used to identify the storage device, a power button is used to power on and off the storage expansion pooling device control system, and a reset button is used to reset and power on / off the storage expansion pooling device.
[0064] During application, the CPLD chip of the storage expansion pooling device controls the LED lights to turn on or off via the IO3 interface. The LED light status indicates the working status of the storage expansion pooling device; when the LED light is on, it indicates that the storage expansion pooling device is working, and when the LED light is off, it indicates that the storage expansion pooling device is not working. In addition, the CPLD chip transmits the status of the power button, reset button, and UID button to the BMC chip, allowing the BMC chip to take corresponding actions based on the button status. For example, when the reset button is pressed, the CPLD chip detects the downward press of the reset button and feeds this status back to the BMC chip. The BMC chip then controls the entire control system to reset based on the received reset button status.
[0065] In one alternative embodiment, the storage expansion pooling device further includes a fan board; a BMC chip is also deployed on the motherboard;
[0066] The BMC chip is connected to the listening diagnostic module of the fan board via a USB interface to obtain the working status of the fan.
[0067] In this embodiment, the fan board is used to control the fan and provide feedback on its operating status. An audio diagnostic module is deployed on the fan board to determine the fan's operating status. The fan's operating status includes at least a stopped state and a running state, which can include low-speed and high-speed operation. During application, the BMC chip connects to the audio diagnostic module on the fan board via a USB interface. It obtains the fan's operating status through the signals fed back by the audio diagnostic module, enabling the BMC chip to perform further control based on the actual operating status of the fan.
[0068] In one alternative embodiment, the storage expansion pooling device further includes multiple fans; a BMC chip is also deployed on the motherboard;
[0069] The BMC chip is connected to the plurality of fans respectively through the PWM / TACH interface. The BMC chip sends PWM signals to control the speed of the plurality of fans respectively, and receives TACH signals sent by the plurality of fans respectively.
[0070] In this embodiment, fans are used for heat dissipation of the storage expansion pooling device. Six 6056 fans are deployed in this device to cool the entire storage expansion pooling device. During application, the BMC chip emits a PWM signal to control the fan speed. Specifically, the fan speed changes linearly proportionally to the duty cycle of the PWM signal. Adjusting the duty cycle of the PWM signal changes the fan speed; increasing the duty cycle increases the fan speed, and decreasing it decreases the fan speed. Furthermore, the fan emits a TACH signal reflecting its actual speed. The fan feeds back the TACH signal to the BMC chip, allowing the BMC chip to determine the actual operating speed. The BMC chip can then adjust the speed based on the error between the actual operating speed and the target speed, thereby achieving precise control of the fan speed.
[0071] In one optional embodiment, the storage expansion pooling device is further equipped with a BMC chip, two PSU interfaces, a VGA interface, sensors, FRU devices, a fan board, and mounting brackets; multiple FRU devices and multiple sensors are deployed on the multiple Retimer cards respectively, and sensors are deployed on the mounting brackets.
[0072] The BMC chip is connected to the fan board, the VGA interface, the FRU device and sensor on the plug-in card, the sensor on the motherboard, the PSU interface, the FRU device on the motherboard, and the sensor on the earpiece via seven I2C interfaces.
[0073] In this embodiment, the PSU interface is used to connect the power supply. Two PSU interfaces are deployed in the storage expansion pooling device, one for normal use and one as a backup, thus achieving a redundant power supply design and ensuring the reliability of the power supply to the storage expansion pooling device. The VGA (Video Graphics Array) interface is used to connect an external display screen, that is, to display the parameters of the storage expansion pooling device through the VGA, and to debug the storage expansion pooling device based on the displayed content. The FRU (Field Replaceable Unit) devices on the storage expansion pooling device refer to field-replaceable components in the storage system, such as circuit boards and connectors. When an FRU device is damaged, it does not require repair and can be directly replaced. Generally, during the design or production of the storage expansion pooling device, the FRU information of each FRU device is written into the control system to facilitate monitoring of the FRU device status. The FRU devices on the Retimer card refer to field-replaceable components on the Retimer card, such as CDFP interfaces. The mounting ears are components used to house some components in the storage expansion pooling device. This particular storage expansion pooling device has two mounting ears (left and right) on its rear window. Above the left mounting ear is the power switch for user control of the device's power on and off, and below it are a UID button and LEDs for identifying the storage expansion pooling device. The right mounting ear houses one VGA port and two USB ports. Sensors on the storage expansion pooling device monitor the overall temperature of the device; sensors on the motherboard monitor the motherboard temperature, and sensors on the mounting ears monitor the temperature of the mounting ears themselves.
[0074] In this embodiment, the BMC chip is connected to the fan board, VGA interface, FRU device and sensor on the Retimer card, sensor on the motherboard, PSU interface, FRU device on the motherboard and sensor on the mounting ears through 7 I2C interfaces, thereby realizing the monitoring and management of the working status of each part of the storage expansion device.
[0075] In one alternative embodiment, the storage expansion pooling device is further equipped with a MicroUSB interface and a BMC chip.
[0076] The BMC chip is connected to a conversion chip via a UART1 interface. The conversion chip converts the UART signal emitted by the BMC chip into a USB signal and connects it to a MicroUSB interface. The MicroUSB interface is used for serial port debugging of the BMC chip.
[0077] In this embodiment, the MicroUSB interface is smaller and saves space than standard USB and Mini-USB interfaces, boasting a high insertion / removal lifespan and strength of up to 10,000 cycles, and a blind-mating structure design. The MicroUSB standard supports USB OTG functionality, meaning data transfer can be directly achieved through portable devices even without a host (e.g., a computer), making it more convenient and flexible. Before or after expanding the storage expansion pooling device, debugging is required. Therefore, a MicroUSB interface is deployed in the storage expansion pooling device for BMC chip serial port debugging. Specifically, the BMC chip is connected to the MicroUSB interface via a UART1 interface and a conversion chip, thus obtaining the MicroUSB interface for BMC chip serial port debugging.
[0078] In one optional embodiment, the storage expansion pooling device is further equipped with an RJ45 network management interface and a BMC chip.
[0079] The BMC chip is connected to the RJ45 network management interface via the RGMI interface. The RJ45 network management interface is used to establish a connection with an external system so that the external system can manage the storage expansion pooling device through the RJ45 network management interface.
[0080] In this embodiment, the RJ45 (Registered Jack-45) network management interface is a standardized interface primarily used for network data transmission, enabling the storage expansion pooling device to connect to a local area network (LAN). An RJ45 network management interface is configured in the storage expansion pooling device to establish a LAN connection with an external system. This external system can be a server, computer, or similar device. The external system can then access the storage expansion pooling device via the LAN connection to view its detailed information and perform external management and control.
[0081] For example, Figure 3 A physical image of a storage expansion pooling device supporting 24 x8 NVMe SSD hard drive expansions provided in this application embodiment is shown below. Figure 3As shown, the storage device is 850mm long and 435mm wide, and can be placed in a standard 19-inch chassis. The storage expansion pooling device comprises: a motherboard (with a BMC chip, CPLD chip, etc.), 12 Retimer cards with CDFP interfaces, a fan board, 6 6056 fans, 3 hard drive backplates, 2 PSU interfaces, 24 NVMe SSDs, and 2 mounting brackets, among other components.
[0082] The 24 x8 NVMe SSDs are connected to three backplanes via expansion cards, with eight NVMe SSDs connected to each backplane. Figure 4 As shown, the front window of the storage expansion pool device displays 24 NVMe SSDs and a mounting bracket on each side. Above the left bracket is the power switch for user control of the device's power on / off, and below it are a UID button and LEDs for identification. The right bracket features one VGA port and two USB ports. The VGA port is used to connect an external monitor for system display and debugging, while the USB ports are used to connect other devices (e.g., mouse, keyboard, etc.). Figure 5 As shown, the rear window of the storage expansion pooling device displays 12 vertically inserted Retimer cards with CDFP cable interfaces, 2 PSU interfaces (i.e., power interfaces, 1 in normal use and 1 as a spare), 2 buttons (Power Button and Reset Button, where the Power Button is used to control the system to power on and off, and the Reset Button is used to reset), 1 MicroUSB (for serial port debugging of the BMC chip), and 1 RJ45 network management interface (used to establish a connection with external systems, allowing external systems to access the storage expansion pooling device via a local area network to view detailed information about the storage expansion pooling device and to perform external management and control of the storage expansion pooling device).
[0083] Specifically, the motherboard of the storage expansion pool device connects to 12 Retimer cards via 12 x16 MCIO connectors. These 12 Retimer cards then connect to multiple host devices via CDFP interfaces and 12 CDFP cables, establishing 12 communication connections between the storage expansion pool device and the host devices. Each communication connection is then split into two, resulting in 24 communication connections. These 24 connections are then connected to 24 x8 NVMe SSDs via 24 x8 MCIO connectors and Slimline cables, thus enabling the expansion of 24 x8 NVMe SSDs. Furthermore, to address the PCIe resource transmission loss caused by CDFP cables, a Retimer chip is deployed on each Retimer card in the storage expansion pool device. This Retimer chip is used to recover PCIe resources transmitted via CDFP cables, ensuring accurate PCIe resource transmission.
[0084] In addition, the motherboard of this storage expansion pooling device also deploys a BMC chip and a CPLD chip for the control and management of the entire storage expansion pooling device. Figure 6 The following is a schematic diagram of the control signal hardware link design for the storage expansion device. Figure 6As shown, the CPLD chip controls the lighting and extinguishing of LEDs, etc. The CPLD chip connects to the BMC chip via the UART0 interface and transmits the status of the Power Button, Reset Button, and UID button to the BMC, allowing the BMC chip to perform corresponding actions. The BMC chip connects to the audio diagnostic module on the fan board via a USB interface to obtain the fan's operating status. The BMC chip sends PWM signals via the PWM / TACH interface to the six 6056 fans, adjusting the duty cycle of the PWM signals to control the 6056 fan speed. The fans send TACH signals to the BMC chip, allowing the BMC chip to obtain the actual fan speed and further control the fans accordingly. The BMC chip sends seven I2C signals to connect to the fan board, VGA interface, FRU devices and sensors on the Retimer card, sensors on the motherboard, PSU interface, FRU devices on the motherboard, and sensors on the mounting ears, enabling monitoring and management of the operating status of various components of the storage expansion pool device. The BMC chip also sends a UART signal to the conversion chip, which converts the UART signal into a USB signal and connects it to the MicroUSB interface on the back of the device as an external debug interface for serial port debugging of the BMC chip; there is also an RGMI signal connected to the RJ45 network management interface, so that external systems can manage the storage expansion pooling device through the RJ45 network management interface.
[0085] In this embodiment, a storage expansion pooling device is provided based on a resource pooling expansion convergence framework. This storage expansion pooling device utilizes a CDFP interface and CDFP cable to connect to I / O Fabric, establishing communication connections with multiple host terminals. Multiple hosts then access the storage expansion pooling device pool through I / O Fabric, enabling multi-host sharing of the storage expansion pooling device pool. This storage expansion pooling device decouples storage resources from the host-side design, pools storage resources, and thus enables independent expansion of storage resources. This storage expansion pooling device, capable of independent storage resource expansion, aligns better with the current trend of modularity and resource pooling in servers, reduces the design complexity of the host side, and facilitates the independent expansion and upgrading of server compute nodes and storage resources. It can be quickly launched to the market and offers more flexible applications. Furthermore, using a standard 19-inch chassis, this storage expansion pool device supports 24x8 or 48x4 NVMe SSD expansion, thus offering strong scalability and portability. The device utilizes BMC and CPLD chips for overall control and management, and provides external debugging and network management interfaces for debugging and remote management via external systems.
[0086] This application also provides a storage expansion pooling system, such as... Figure 7 As shown, Figure 7 This is a schematic diagram of a storage expansion pooling system provided in this application. The system includes the storage expansion pooling device provided in any of the foregoing embodiments and multiple host terminals;
[0087] The storage expansion pooling device establishes a communication connection with the multiple host terminals through CDFP cables and I / O Fabric;
[0088] The multiple host terminals send PCIe resources to the storage expansion pooling device, so that the storage expansion pooling device stores the PCIe resources. The multiple host terminals access the storage expansion pooling device to obtain the stored PCIe resources in the storage expansion pooling device, so as to realize the sharing of the storage expansion pooling device pool by multiple host terminals.
[0089] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other.
[0090] Although preferred embodiments of the present application have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments as well as all changes and modifications falling within the scope of the embodiments of the present application.
[0091] Finally, it should be noted that in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or terminal device that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or terminal device. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or terminal device that includes said element.
[0092] The above provides a detailed description of a storage expansion pooling device and system provided in this application. Specific examples have been used to illustrate the principles and implementation methods of this application. The description of the above embodiments is only for the purpose of helping to understand the method and core ideas of this application. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of this application. Therefore, the content of this specification should not be construed as a limitation of this application.
Claims
1. A memory extended pooling device, characterized by, include: The motherboard includes multiple Retimer cards with CDFP interfaces, multiple NVMe SSDs, and multiple hard drive backplanes. The motherboard is equipped with multiple first MCIO connectors and multiple second MCIO connectors. The motherboard establishes connections with the multiple Retimer cards through the multiple first MCIO connectors, and the multiple Retimer cards establish communication connections with multiple host devices through CDFP interfaces, multiple CDFP cables, and I / O Fabric, so as to realize PCIe resource interaction between the motherboard and the multiple host devices; The motherboard establishes a communication connection with the multiple NVMe SSDs through the multiple second MCIO connectors, multiple Slimline cables and multiple hard drive backplanes to realize PCIe resource interaction between the motherboard and the multiple NVMe SSDs.
2. The storage extension pooling device of claim 1, wherein, Each of the multiple Retimer cards is also equipped with a multiple Retimer chip, which is used to restore the PCIe resources transmitted by the multiple hosts through CDFP cables.
3. The storage extension pooling device of claim 1, wherein, The storage expansion pooling device supports 24 x8 NVMe SSD hard drive expansions, including: The motherboard establishes 12 communication connections with the host, and divides each communication connection into 2 connections to obtain 24 communication connections. The 24 communication connections are then connected to X8 NVMe SSDs to achieve the expansion of 24 X8 NVMe SSDs.
4. The storage extension pooling device of claim 1, wherein, The storage expansion pooling device supports 48 x4 NVMe SSD hard drive expansions, including: The motherboard establishes 12 communication connections with the host, and divides each communication connection into 4 connections to obtain 48 communication connections. The 48 communication connections are then connected to X4 NVMe SSDs to achieve the expansion of 48 X4 NVMe SSDs.
5. The storage extension pooling device of claim 1, wherein, The motherboard is also equipped with a CPLD chip and a BMC chip, and the storage expansion pooling device is also equipped with at least one of the following components: LED light, power button, reset button, and UID button; The CPLD chip is used to control the LED light; The CPLD chip is connected to the BMC chip via the UART0 interface, and feeds back the status of the power button, the reset button and the UID button to the BMC chip so that the BMC chip can perform the corresponding control.
6. The storage extension pooling device of claim 1, wherein, The storage expansion pooling device also includes a fan board; the motherboard also has a BMC chip deployed on it; The BMC chip is connected to the listening diagnostic module of the fan board via a USB interface to obtain the working status of the fan.
7. The storage extension pooling device of claim 6, wherein, The storage expansion pooling device also includes multiple fans; a BMC chip is also deployed on the motherboard; The BMC chip is connected to the plurality of fans respectively through the PWM / TACH interface. The BMC chip sends PWM signals to control the speed of the plurality of fans respectively, and receives TACH signals sent by the plurality of fans respectively.
8. The storage extension pooling device of claim 1, wherein, The storage expansion pooling device is also equipped with a BMC chip, a PSU interface, a VGA interface, sensors, FRU devices, a fan board, and mounting brackets; multiple FRU devices and multiple sensors are deployed on the multiple Retimer cards respectively, and sensors are deployed on the mounting brackets; The BMC chip is connected to the fan board, the VGA interface, the FRU device and sensor on the plug-in card, the sensor on the motherboard, the PSU interface, the FRU device on the motherboard, and the sensor on the earpiece via seven I2C interfaces.
9. The storage extension pooling device of claim 1, wherein, The storage expansion pooling device is also equipped with a MicroUSB interface and a BMC chip; The BMC chip is connected to a conversion chip via a UART1 interface. The conversion chip converts the UART signal emitted by the BMC chip into a USB signal and connects it to a MicroUSB interface. The MicroUSB interface is used for serial port debugging of the BMC chip.
10. The storage extension pooling device of claim 1, wherein, The storage expansion pooling device is also equipped with an RJ45 network management interface and a BMC chip; The BMC chip is connected to the RJ45 network management interface via the RGMI interface. The RJ45 network management interface is used to establish a connection with an external system so that the external system can manage the storage expansion pooling device through the RJ45 network management interface.
11. A storage extended pooling system, characterized by, The storage expansion pooling system includes: a storage expansion pooling device as described in any one of claims 1 to 10 and a plurality of host terminals; The storage expansion pooling device establishes a communication connection with the multiple host terminals through CDFP cables and I / O Fabric; The multiple host terminals send PCIe resources to the storage expansion pooling device, so that the storage expansion pooling device stores the PCIe resources. The multiple host terminals access the storage expansion pooling device to obtain the stored PCIe resources in the storage expansion pooling device, so as to realize the sharing of the storage expansion pooling device pool by multiple host terminals.
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