Broadcast frame communication method based on VPX backplane IPMI interface

Abstract

The invention discloses a broadcast frame communication method based on a VPX backplane IPMI interface, which belongs to the field of communication and includes the steps of: based on a communication mode of a broadcast frame, a bus monitoring and a retransmission mechanism for arbitration failure are added to ensure that when a main control board queries information of other slot boards, it is not necessary to send query requests to other slots respectively, but only needs to send a broadcast request to the bus, and after receiving the broadcast, the boards in the chassis reply to corresponding status information in sequence. The invention can update board information faster, obtain slot changes more quickly, has stronger robustness, and is more stable and reliable.

Description

Technical Field

[0001] The present invention relates to the field of communications, and more specifically, to a broadcast frame communication method based on a VPX backplane IPMI interface. Background Art

[0002] The communication mode of the VPX backplane IPMI interface is generally in the form of I2C communication. The I2C bus is a two-wire bus developed by PHLIPS for connecting microcontrollers and peripheral devices. Its main advantages are convenience and support for multi-master communication. Because it supports multi-master communication, multiple devices mounted on the same bus can apply for control of the bus, so that multiple devices can be mounted on one bus and communicate at the same time. At the same time, each device also has a unique address code to ensure that the master device can establish communication with any device mounted on the bus through the unique address code.

[0003] IPMI stands for Intelligent Platform Management Interface. It was jointly proposed by Intel, DELL, HP and NEC in 1998 and has been supported by more than 170 suppliers. Through this specification, users use the IPMI protocol to monitor the physical health characteristics of the server, such as temperature, voltage, fan working status, power status, etc.

[0004] In the VPX chassis, the unique address code of the I2C device is determined by the corresponding IO level code on its backplane. The level code varies according to the specific slot, so as to ensure that the microcontroller in each slot has a unique address code, that is, the I2C device in each slot has an independent and unique address code. However, the prior art has technical problems such as slow board update, poor robustness, poor stability and reliability. Summary of the invention

[0005] The purpose of the present invention is to overcome the deficiencies of the prior art and provide a broadcast frame communication method based on the VPX backplane IPMI interface, which can update board information faster, obtain slot changes more quickly, and has stronger robustness, stability and reliability.

[0006] The object of the present invention is achieved through the following solutions:

[0007] A broadcast frame communication method based on a VPX backplane IPMI interface comprises the following steps:

[0008] The communication method is based on broadcast frames, with bus monitoring and arbitration failure retransmission mechanism to ensure that when the main control board queries the information of boards in other slots, it does not need to send query requests to other slots respectively. It only needs to send a broadcast request to the bus. After receiving the broadcast, the boards in the chassis will reply with corresponding status information in turn.

[0009] Furthermore, the bus monitoring includes the following steps: when each I2C device sends an I2C message, the software first obtains the bus status, and if the bus is busy, waits for a period of time before applying for bus control.

[0010] Furthermore, the arbitration failure retransmission mechanism comprises the following steps: after each message is sent, the sending status is determined; if the sending status is arbitration failure, the message is stored in a buffer and waits for the next sending.

[0011] Furthermore, the communication method based on broadcast frames, combined with bus monitoring and arbitration failure retransmission mechanism, specifically includes the following steps:

[0012] Step 1: The master sends a START signal;

[0013] Step 2: The master sends the broadcast address and write operation bit;

[0014] Step 3: Any slot replies ACK;

[0015] Step 4: The master sends data;

[0016] Step 5: Any slot replies ack;

[0017] Step 6: Repeat steps 5-6 until all data is sent;

[0018] Step 7: The master sends a STOP signal;

[0019] Step 8: Slot 1 sends a START signal;

[0020] Step 9: Slot 1 sends the master address + write operation bit 0;

[0021] Step 10: The master responds with ACK;

[0022] Step 11: Slot 1 sends data;

[0023] Step 12: The master responds with ACK;

[0024] Step 13: Repeat steps 11 and 12 until all data is sent;

[0025] Step 14: Slot 1 sends a STOP signal;

[0026] Step 15: Repeat steps 8 to 14, and the boards in other slots continue to send data.

[0027] Furthermore, in step 2, the master control sends a broadcast address of 7 bits, and the write operation bit is write 0, which is 1 bit.

[0028] Furthermore, in step 4, the master sends 8 bits of data.

[0029] Further, in step 9, the master control address sent by slot 1 is 7 bits, and the write operation bit is write 0, which is 1 bit.

[0030] Further, in step 11, the data sent by slot 1 is 8 bits.

[0031] Furthermore, it includes a main control software, which sends a message frame with a broadcast address according to steps 1 to 15. If it is sent successfully, there is no need to wait here. The microcontroller continues to execute other operations and receives the messages replied by other boards through interrupts and puts them back into the buffer accordingly. It can be directly obtained from the buffer when needed.

[0032] Furthermore, it includes slot board software, which uses the address of the master control when replying, and does not use the broadcast address; when the bus is busy, the slot board software program randomly delays for a period of time and detects the bus status again, and repeats this cycle n times, where n is an integer. If they are all busy, the message is stored in the buffer and tried to be sent again in the next sending cycle. This process is tried m times, where m is an integer; the values ​​of m and n are determined according to the number of boards and the bus conditions.

[0033] The beneficial effects of the present invention include:

[0034] The broadcast frame communication method based on the VPX backplane IPMI interface provided by the present invention can update board information more quickly and obtain slot changes (such as hot plugging) more quickly without changing the hardware design and communication protocol. At the same time, the communication method avoids the main control from querying the vacant slot board, and has stronger robustness. The communication method has been guaranteed by long-term experiments and is still short in time, stable and reliable even under conditions of high temperature, high humidity, bus failure and recovery. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0036] Figure 1 This is a schematic diagram of the VPX chassis;

[0037] Figure 2 This is a flowchart of the main control method steps of an embodiment of the present invention;

[0038] Figure 3 The present invention is a flow chart of the slot board communication steps according to an embodiment of the present invention. DETAILED DESCRIPTION

[0039] The invention is further described below in conjunction with the accompanying drawings and embodiments. All features disclosed in all embodiments in this specification, or steps in all methods or processes disclosed implicitly, except for mutually exclusive features and / or steps, can be combined and / or expanded or replaced in any manner.

[0040] The inventors of the present invention have discovered the following technical problems:

[0041] like Figure 1 The following is a schematic diagram of a VPX chassis. Assume that the chassis has 16 card slots, which are numbered 1-16. Assume that slot 14 is the master control slot, then the master control needs to query the information of the cards in slots 1-13, 14, and 16 through I2C. The communication process of the VPX chassis is as follows:

[0042] 1. The master sends a START signal;

[0043] 2. The master sends slot 1 address (7 bits) + write operation bit 0 (1 bit);

[0044] 3. Slot 1 replies ACK;

[0045] 4. The master sends data (8 bits);

[0046] 5. Slot 1 replies ack;

[0047] 6. Repeat steps 5-6 until all data is sent;

[0048] 7. The master controller sends a STOP signal;

[0049] 8. Slot 1 sends a START signal;

[0050] 9. Slot 1 sends the master address (7 bits) + write operation bit 0 (1 bit);

[0051] 10. The master responds with ACK;

[0052] 11. Slot 1 sends data (8 bits);

[0053] 12. The master responds with ACK;

[0054] 13. Repeat steps 11-12 until all data is sent;

[0055] 14. Slot 1 sends a STOP signal;

[0056] 15. Repeat steps 1 to 14 to query the boards in other slots.

[0057] So far, the master controller has completed a status reading for slot 1. According to the number of states obtained by the communication protocol, this process may be repeated n times. Repeat the above process for the next slot card. According to the number of VPX chassis cards, the communication process can be repeated m times. It can be seen that this communication method is time-consuming and has a long communication cycle. In addition, since the VPX chassis is not fully plugged in, that is, some slots are vacant, it is impossible to wait for the arrival of ACK on time when sending the slot address in step 2, which may easily cause the host I2C reset or other abnormal conditions (such as I2C deadlock, CPU occupancy is too high). In view of the above situation, there is an urgent need for a method to solve the problems brought about by the above traditional communication methods.

[0058] In the technical concept of the embodiment of the present invention, a communication method based on broadcast frames is combined with bus monitoring and a retransmission mechanism for arbitration failure to ensure that when the main control board queries the information of the boards in other slots, it does not need to send query requests to other slots respectively. It only needs to send a broadcast request to the bus. After receiving the broadcast, the boards in the chassis can reply with corresponding status information in sequence.

[0059] Among them, bus monitoring: when each I2C device sends an I2C message, the software first obtains the bus status. If the bus is busy, it waits for a while before applying for bus control.

[0060] Among them, the retransmission mechanism for arbitration failure: due to the I2C bus arbitrator, there is a situation where message arbitration fails. After each message is sent by the software, it is necessary to judge the sending status. If the sending status is arbitration failure, the message will be stored in the buffer and wait for the next transmission.

[0061] In a further inventive concept, the specific communication process is as follows:

[0062] Step 1: The master sends a START signal;

[0063] Step 2: The master sends the broadcast address (7 bits) + write operation bit 0 (1 bit);

[0064] Step 3: Any slot replies ACK;

[0065] Step 4: The master sends data (8 bits);

[0066] Step 5: Any slot replies ack;

[0067] Step 6: Repeat steps 5-6 until all data is sent;

[0068] Step 7: The master sends a STOP signal;

[0069] Step 8: Slot 1 sends a START signal;

[0070] Step 9: Slot 1 sends the master address (7 bits) + write operation bit 0 (1 bit);

[0071] Step 10: The master responds with ACK;

[0072] Step 11: Slot 1 sends data (8 bits);

[0073] Step 12: The master responds with ACK;

[0074] Step 13: Repeat steps 11-12 until all data is sent;

[0075] Step 14: Slot 1 sends a STOP signal;

[0076] Step 15: Repeat steps 8-14, and the boards in other slots continue to send data.

[0077] It can be seen that the technical solution of the present invention eliminates the need for the master to poll each slot separately and the waiting time in between, while avoiding I2C reset or other abnormal situations caused by slot vacancy, greatly reducing the polling cycle and program reliability.

[0078] The method of the present invention can also provide a main control software running on an electronic carrier. The main control software flow chart is as follows: Figure 2 As shown, the main control software sends a message frame with a broadcast address according to the above process. If it is sent successfully, there is no need to wait here. The microcontroller can continue to perform other operations and receive the messages replied by other boards through interrupts and put them back into the buffer accordingly. It can be directly obtained from the buffer when needed.

[0079] The method of the present invention can also provide a software for the remaining slot boards. The flow chart of the software for the remaining slot boards is as follows: Figure 3As described above, the software of the other slots uses the address of the master control when replying, and does not use the broadcast address, so as to avoid other boards from entering the receive interrupt unnecessarily, resulting in high CPU utilization. When the bus is busy, the program can randomly delay for a period of time and detect the bus status again. This cycle is repeated n times. If they are all busy, the message is stored in the buffer and tried to be sent again in the next sending cycle. This process can be tried m times. The values ​​of m and n are determined according to the number of boards and the bus conditions. For example, if there are 16 boards in total, m can take any value greater than 16 to ensure that the message can be successfully sent in the worst case (that is, each arbitration fails).

[0080] In summary, the broadcast frame communication method based on the VPX backplane IPMI interface provided by the solution of the present invention can update the board information faster and obtain slot changes (such as hot plugging) more quickly without changing the hardware design and communication protocol. At the same time, this communication method avoids the main control from querying the vacant slot board, and has stronger robustness. This communication method has been guaranteed by long-term experiments, and it is still short in time, stable and reliable even under conditions of high temperature, high humidity, bus failure and recovery.

[0081] Example 1

[0082] A broadcast frame communication method based on a VPX backplane IPMI interface comprises the following steps:

[0083] The communication method is based on broadcast frames, with bus monitoring and arbitration failure retransmission mechanism to ensure that when the main control board queries the information of boards in other slots, it does not need to send query requests to other slots respectively. It only needs to send a broadcast request to the bus. After receiving the broadcast, the boards in the chassis will reply with corresponding status information in turn.

[0084] Example 2

[0085] Based on the embodiment 1, the bus monitoring includes the following steps: when each I2C device sends an I2C message, the software first obtains the bus status, and if the bus is busy, waits for a period of time before applying for bus control.

[0086] Example 3

[0087] Based on the embodiment 1, the arbitration failed retransmission mechanism comprises the following steps: after each message is sent, the sending status is determined; if the sending status is arbitration failed, the message is stored in a buffer and waits for the next sending.

[0088] Example 4

[0089] On the basis of Embodiments 1 to 3, the communication method based on broadcast frames, coupled with bus monitoring and arbitration failure retransmission mechanism, specifically includes the following steps:

[0090] Step 1: The master sends a START signal;

[0091] Step 2: The master sends the broadcast address and write operation bit;

[0092] Step 3: Any slot replies ACK;

[0093] Step 4: The master sends data;

[0094] Step 5: Any slot replies ack;

[0095] Step 6: Repeat steps 5-6 until all data is sent;

[0096] Step 7: The master sends a STOP signal;

[0097] Step 8: Slot 1 sends a START signal;

[0098] Step 9: Slot 1 sends the master address + write operation bit 0;

[0099] Step 10: The master responds with ACK;

[0100] Step 11: Slot 1 sends data;

[0101] Step 12: The master responds with ACK;

[0102] Step 13: Repeat steps 11 and 12 until all data is sent;

[0103] Step 14: Slot 1 sends a STOP signal;

[0104] Step 15: Repeat steps 8 to 14, and the boards in other slots continue to send data.

[0105] Example 5

[0106] On the basis of Embodiment 4, in step 2, the master control sends a broadcast address of 7 bits, and the write operation bit is write 0, which is 1 bit.

[0107] Example 6

[0108] Based on Embodiment 4, in step 4, the master sends 8 bits of data.

[0109] Example 7

[0110] On the basis of Embodiment 4, in step 9, the master control address sent by slot 1 is 7 bits, and the write operation bit is write 0, which is 1 bit.

[0111] Example 8

[0112] Based on Example 4, in step 11, the data sent by slot 1 is 8 bits.

[0113] Example 9

[0114] On the basis of Example 4, it includes a main control software. The main control software sends a message frame with a broadcast address according to steps 1 to 15. If it is sent successfully, there is no need to wait here. The microcontroller continues to execute other operations and receives the messages replied by other boards through interrupts and puts them back into the buffer accordingly. It can be directly obtained from the buffer when needed.

[0115] Example 10

[0116] On the basis of Example 4, it includes slot board software. When the slot software uses the address of the master control when replying, it does not use the broadcast address to avoid other boards from entering the receive interrupt unnecessarily, resulting in high CPU utilization; when the bus is busy, the slot board software program randomly delays for a period of time and detects the bus status again. This cycle is repeated n times, where n is an integer. If they are all busy, the message is stored in the buffer and tried to be sent again in the next sending cycle. This process is tried m times, where m is an integer; the values ​​of m and n are determined according to the number of boards and the bus conditions.

[0117] The units involved in the embodiments of the present invention may be implemented by software or hardware, and the units described may also be arranged in a processor. The names of these units do not, in some cases, limit the units themselves.

[0118] According to one aspect of the present application, a computer program product or a computer program is provided, the computer program product or the computer program comprising computer instructions, the computer instructions being stored in a computer-readable storage medium. A processor of a computer device reads the computer instructions from the computer-readable storage medium, and the processor executes the computer instructions, so that the computer device executes the methods provided in the above-mentioned various optional implementations.

[0119] As another aspect, the present application also provides a computer-readable medium, which may be included in the electronic device described in the above embodiment; or may exist independently without being assembled into the electronic device. The above computer-readable medium carries one or more programs, and when the above one or more programs are executed by an electronic device, the electronic device implements the method described in the above embodiment.

[0120] The parts not involved in the present invention are the same as the prior art or can be implemented by using the prior art.

[0121] The above technical solution is only one implementation mode of the present invention. For those skilled in the art, it is easy to make various types of improvements or modifications based on the application methods and principles disclosed in the present invention, and it is not limited to the method described in the above specific implementation mode of the present invention. Therefore, the method described above is only preferred and does not have a restrictive meaning.

[0122] In addition to the above examples, those skilled in the art may obtain other embodiments based on the above disclosure or by using the knowledge or technology in the relevant field to make changes. The features of each embodiment may be interchangeable or replaced. The changes and modifications made by those skilled in the art do not depart from the spirit and scope of the present invention and should be within the scope of protection of the claims attached to the present invention.

Claims

1. A broadcast frame communication method based on VPX backplane IPMI interface, characterized in that: The following steps are involved: The communication method based on broadcast frames is combined with bus monitoring and arbitration failure retransmission mechanism to ensure that when the main control board queries the information of the boards in other slots, it does not need to send query requests to other slots separately. It only needs to send a broadcast request to the bus. After receiving the broadcast, the boards in the chassis reply with corresponding status information in turn. The bus monitoring comprises the following steps: when each I2C device sends an I2C message, the software first obtains the bus status, and if the bus is busy, waits for a period of time before applying for bus control; The arbitration failure retransmission mechanism comprises the steps of: after each message is sent, determining the sending status, if the sending status is arbitration failure, storing the message in a buffer and waiting for the next sending; The communication method based on broadcast frames, combined with bus monitoring and arbitration failure retransmission mechanism, specifically includes the following steps: Step 1: The master sends a START signal; Step 2: The master sends the broadcast address and write operation bit; Step 3: Any slot replies ACK; Step 4: The master sends data; Step 5: Any slot replies ack; Step 6: Repeat steps 5-6 until all data is sent; Step 7: The master sends a STOP signal; Step 8: Slot 1 sends a START signal; Step 9: Slot 1 sends the master address + write operation bit 0; Step 10: The master responds with ACK; Step 11: Slot 1 sends data; Step 12: The master responds with ACK; Step 13: Repeat steps 11 and 12 until all data is sent; Step 14: Slot 1 sends a STOP signal; Step 15: Repeat steps 8 to 14, and the boards in other slots continue to send data; Including the main control software, the main control software sends a message frame with a broadcast address according to steps 1 to 15. If it is successfully sent, there is no need to wait here. The microcontroller continues to perform other operations and receives the message replied by other boards through interrupts and puts it back into the buffer accordingly. It can be directly obtained from the buffer when needed; Including slot board software, when the slot software uses the address of the master control in reply, it does not use the broadcast address; when the bus is busy, the slot board software program randomly delays for a period of time and detects the bus status again, and repeats this cycle n times, where n is an integer. If they are all busy, the message is stored in the buffer and tries to send again in the next sending cycle. This process tries m times, where m is an integer; the values ​​of m and n are determined according to the number of boards and the bus conditions.

2. The broadcast frame communication method based on the VPX backplane IPMI interface according to claim 1, characterized in that: In step 2, the master sends a broadcast address of 7 bits, and the write operation bit is write 0, which is 1 bit.

3. The broadcast frame communication method based on the VPX backplane IPMI interface according to claim 1, characterized in that: In step 4, the master sends 8 bits of data.

4. The broadcast frame communication method based on the VPX backplane IPMI interface according to claim 1, characterized in that: In step 9, the master control address sent by slot 1 is 7 bits, and the write operation bit is write 0, which is 1 bit.

5. The broadcast frame communication method based on the VPX backplane IPMI interface according to claim 4, characterized in that: In step 11, the slot 1 sends 8 bits of data.

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