Interconnection structure of PCB board and chip, preparation method of interconnection structure and optical module

Abstract

The application discloses a kind of interconnection structure of PCB and chip, the preparation method of interconnection structure and optical module, the interconnection structure of PCB and chip, including PCB and multiple chips on PCB, PCB is by first layer copper foil layer, second layer dielectric layer, third layer copper foil layer, high-speed wire located in third layer, fourth layer dielectric layer and fifth layer copper foil layer sequentially stacked and constitutes, the first layer copper foil layer and the second layer dielectric layer under the chip high-speed pin of DSP chip and driver chip on PCB are all hollowed out, and form hollowed-out groove;The pad on the third layer high-speed wire is exposed at the bottom of hollowed-out groove, and the pad of chip high-speed pin is connected with the third layer high-speed wire.Optical module: electromagnetic shielding effect is good, crosstalk suppression ability is strong, and high-speed radio frequency signal degradation caused by via is avoided simultaneously.

Description

Technical Field

[0001] This invention relates to the field of high-speed PCB design technology, specifically to an interconnection structure between a PCB board and a chip and its fabrication method. Background Technology

[0002] As is well known, the core PCB board of an optical module is a high-speed radio frequency (RF) board. Currently, optical modules are undergoing rapid development. With the increasing single-channel transmission rate, ensuring that the high-speed RF signal of the optical module reduces electromagnetic radiation and crosstalk between high-speed channels over a certain transmission distance has become a key factor for successful design. Due to structural limitations in device layout, high-speed RF traces are inevitably used for interconnection between the DSP chip and the RF driver chip, and between the RF driver chip and the RF modulator chip. Therefore, good electromagnetic shielding is an essential component of optical module structural design. Since crosstalk between the internal transmit and receive channels, between multiple transmit channels, and between multiple receive channels severely interferes with the RF performance of the current channel, good crosstalk suppression is also an indispensable part of optical module PCB design.

[0003] Currently, in the PCB design of optical modules, to ensure impedance continuity for high-speed RF signals, surface-level routing is typically used for critical high-speed RF traces. This design suffers from the inability to effectively control electromagnetic radiation and difficulty in suppressing multi-channel crosstalk.

[0004] Currently, some optical module PCB designs utilize vias to route high-speed traces to the inner layers of the PCB. This design can suppress electromagnetic radiation, but the parasitic parameters and impedance discontinuities introduced by vias drastically degrade insertion loss and reflection in high-speed signal channels. Therefore, the use of vias should be avoided as much as possible for high-speed RF traces. Summary of the Invention

[0005] The first objective of this invention is to provide an interconnection structure between a PCB board and a chip, which solves the problems of electromagnetic radiation and severe crosstalk between multiple channels caused by running high-speed traces on the surface layer in the PCB design of optical modules in the prior art. The second objective is to solve the technical problems of parasitic parameter effects and impedance discontinuities caused by using via structures to run high-speed traces on the inner layer in the prior art.

[0006] To solve the above-mentioned technical problems, the technical solution adopted by the present invention is as follows:

[0007] An interconnection structure between a PCB board and chips includes a PCB board and multiple chips mounted on the PCB board. The PCB board is composed of a first copper foil layer, a second dielectric layer, a third copper foil layer, high-speed traces located on the third layer, a fourth dielectric layer, and a fifth copper foil layer stacked sequentially. The first copper foil layer and the second dielectric layer located directly below the high-speed pins of the DSP chip and the driver chip are completely hollowed out on the PCB board to form a hollowed-out groove. The bottom of the hollowed-out groove exposes the pads on the high-speed traces of the third layer, and the high-speed pins of the chips are connected to the pads of the high-speed traces of the third layer.

[0008] The interconnect structure of this invention, by designing high-speed pads and high-speed RF traces on the third layer of the PCB, and then covering the high-speed RF trace area with copper foil layers on the first and fifth layers of the PCB, can shield the external radiation of signals on the high-speed RF traces, effectively improving the electromagnetic shielding performance of the optical module. When multiple RF traces are nearly parallel, it effectively suppresses crosstalk between multiple high-speed RF traces. Simultaneously, this interconnect technology reduces parasitic parameters of the high-speed link, improves signal integrity, and avoids high-speed RF signal degradation caused by vias.

[0009] As a further improvement of the present invention, the high-speed trace of the third layer is a strip line.

[0010] As a further improvement of the present invention, copper foil is provided on the walls of the hollowed-out grooves. The electroplated copper foil interconnects the first and third copper foil layers of the PCB board, thereby suppressing electromagnetic radiation.

[0011] As a further improvement of the present invention, the pad is located directly below the high-speed pin of the chip.

[0012] As a further improvement of the present invention, a solder connection is made between the high-speed pins of the chip and the pads.

[0013] Another objective of this invention is to provide a method for fabricating an interconnect structure between a PCB board and a chip, from PCB manufacturing to chip mounting, so as to achieve interconnection between the PCB and the chip.

[0014] To solve the above-mentioned technical problems, the technical solution adopted by the present invention is as follows:

[0015] A method for fabricating an interconnect structure between a PCB board and a chip includes the following steps:

[0016] S1. The layers of the PCB are stacked and pressed together in sequence. After pressing, the PCB is hollowed out, and the bottom of the hollowed-out groove exposes the pads on the third high-speed trace.

[0017] S2. Electroplating copper foil on the wall of the hollowed-out groove, the electroplating of copper foil realizes the interconnection between the first copper foil layer and the third copper foil layer;

[0018] S3, Solder is applied to the pads on the PCB board;

[0019] S4. The PCB board is heated, the chip is placed, and the high-speed pins of the chip are connected to the solder.

[0020] As a further improvement of the present invention, in S1, the cutout positions on the PCB board are marked, and the marked positions on the PCB board are cut out using a laser drill bit or a mechanical drill bit. The cutout depth is equal to the sum of the thicknesses of the first copper foil layer and the second dielectric layer.

[0021] As a further improvement of the present invention, in S3, a first solder is placed on the pads of the high-speed trace of the third layer. The first solder is higher than the first copper foil layer, and the upper surface of the first solder on all pads is in the same plane. A second solder is placed on the other pads on the upper surface of the first copper foil layer. The upper surface of the second solder is in the same plane as the upper surface of the first solder placed on the pads of the high-speed trace of the third layer.

[0022] The third objective of this invention is to provide an optical module that solves the problems of crosstalk between multiple channels within an optical module and the degradation of high-speed signal quality caused by high-speed vias in the prior art.

[0023] To solve the above-mentioned technical problems, the technical solution adopted by the present invention is as follows:

[0024] An optical module includes a PCB board, a DSP chip, and a driver chip. The DSP chip and the driver chip, which are mounted on the PCB board, are electrically connected using the interconnection structure described above.

[0025] As a further improvement of the present invention, the optical module also includes at least one optical transmitting sub-module and at least one optical receiving sub-module arranged in parallel. The optical transmitting sub-module has a BOX package structure and is electrically connected to the PCB board via a flexible strip. The optical receiving sub-module has a BOX package structure and is electrically connected to the PCB board via a flexible strip.

[0026] The optical module mentioned in the technical solution of this invention is a known technology in this field, and is known to those skilled in the art.

[0027] In summary, the beneficial effects of this invention are: good electromagnetic shielding effect, strong crosstalk suppression capability, and avoidance of high-speed radio frequency signal degradation caused by vias. Attached Figure Description

[0028] Figure 1 This is a front view of the interconnection structure between the PCB board and the chip.

[0029] Figure 2 yes Figure 1 AA section view.

[0030] Figure 3 This is a side view of the interconnection structure between the PCB board and the chip.

[0031] Figure 4 yes Figure 2 Side view.

[0032] Figure 5 yes Figure 4 BB section view.

[0033] Figure 6 This is an exploded view of the optical module in Example 3. Detailed Implementation

[0034] To make the objectives, technical solutions, and advantages of this invention clearer, the following description is provided in conjunction with the appendix. Figure 1-6 The present invention will be further described in detail below with reference to embodiments. It should be understood that the specific embodiments described herein are for illustrative purposes only and are not intended to limit the scope of the invention. Example 1

[0035] This embodiment describes an interconnection structure between a PCB board and a chip, including a PCB board 2, two chips, and high-speed pins of the chips, such as... Figure 1 and Figure 2 As shown, the PCB board 2 is composed of a first copper foil layer 201, a second dielectric layer 202, a third copper foil layer 203, a high-speed trace 4 located on the third layer, a fourth dielectric layer 204, and a fifth copper foil layer 205 stacked sequentially.

[0036] In this embodiment, the two chips are DSP chip 1 and driver chip 3, as follows: Figure 1 As shown, DSP chip 1 and driver chip 3 are arranged at intervals on both sides of PCB board 2.

[0037] like Figure 2 As shown, the high-speed pins of DSP chip 1 are connected to pads 7 on the third-layer high-speed trace 4 via the first solder 6, and the high-speed pins of driver chip 3 are also connected to pads 7 on the third-layer high-speed trace 4 via the first solder 6; together with the third-layer high-speed trace 4 of PCB board 2, they form a channel for high-speed radio frequency signal transmission. Figure 5 As shown, the pad 7, which is connected to the high-speed pins of the DSP chip 1 and the driver chip 3, is arranged at the end of the trace of the third-layer high-speed trace 4.

[0038] In this embodiment, the DSP chip 1 and the driver chip 3 are connected to the PCB board 2 via GND pins, which are connected by solder to provide a return path for high-speed signals.

[0039] In this embodiment, the cutout area is located directly below the high-speed pins of the DSP chip 1 and the driver chip 3. The cutout area includes the first copper foil layer 201 and the second dielectric layer 202 of the PCB board 2. The depth of the cutout is equal to the sum of the thicknesses of the first copper foil layer 201 and the second dielectric layer 202 of the PCB board 2.

[0040] like Figure 2 and Figure 5 As shown, copper foil is electroplated on the wall of the hollowed-out groove. The copper foil interconnects the first copper foil layer 201 and the third copper foil layer 203 of the PCB board 2, forming a semi-closed sidewall shielding structure to suppress electromagnetic radiation.

[0041] In this embodiment, the high-speed trace 4 on the third layer is a stripline. The high-speed trace on the PCB board 2 is located on the third layer of the PCB board 2. The trace ends with pads 7. At the same time, the extended area of ​​the trace is covered by the first copper foil layer 201 and the fifth copper foil layer 205 to form a waveguide structure, which further suppresses electromagnetic radiation.

[0042] In this embodiment, the interconnection structure between the PCB board and the chip, and the high-speed RF traces are all located in the inner layer of the PCB board 2. Therefore, in the parallel design of multi-channel high-speed RF signals, the occurrence of crosstalk can be effectively reduced. Example 2

[0043] This embodiment describes a method for fabricating an interconnect structure between a PCB board and a chip, comprising the following steps:

[0044] S1, the layers of PCB board 2 are stacked and pressed in sequence. After pressing, the PCB board is hollowed out, and the bottom of the hollowed-out groove exposes the pads 7 on the third high-speed trace 4.

[0045] S2. Electroplating copper foil on the wall of the hollowed-out groove, the electroplating of copper foil realizes the interconnection between the first copper foil layer 201 and the third copper foil layer 203.

[0046] S3, Solder is applied to the pads on the PCB board;

[0047] S4. The PCB board is heated, the chip is placed, and the high-speed pins of the chip are connected to the solder.

[0048] In S1, the cutout positions on the PCB board are marked, and the marked positions on the PCB board are cut out using a laser drill bit or a mechanical drill bit. The cutout depth is equal to the sum of the thicknesses of the first copper foil layer 201 and the second dielectric layer 202.

[0049] In S3, the first solder 6 is placed on the pads. The first solder 6 is higher than the first copper foil layer 201. The upper surfaces of the first solder 6 on all pads are in the same plane. The second solder 9 is placed on the other pads on the upper surface of the first copper foil layer 201. The upper surface of the second solder 9 is in the same plane as the upper surface of the first solder 6 placed on the high-speed trace pads of the third layer. Example 3

[0050] like Figure 6 As shown, this embodiment is a 400G high-speed optical module using this interconnect structure. The optical module includes at least one optical transmitting sub-module 10 and at least one optical receiving sub-module 11 arranged in parallel. The optical transmitting sub-module 10 has a BOX package structure and is electrically connected to the PCB board 2 via a flexible tape. The optical receiving sub-module 11 has a BOX package structure and is electrically connected to the PCB board 2 via a flexible tape.

[0051] The 400G high-speed optical module described in this embodiment also includes a PCB board 2 located within the module. A DSP chip 1 and a driver chip 3 are disposed on the PCB board 2. The DSP chip 1 and the driver chip 3 are electrically connected through the interconnection structure of this embodiment.

[0052] In this embodiment, DSP chip 1 is a 400G chip with four transmit and four receive channels, and a single channel rate of 100Gbps. Driver chip 3 is a four-channel 400G driver chip with a single channel rate of 100Gbps. The cutout structure is located directly below the high-speed signal output pins of each channel of DSP chip 1 and directly below the high-speed signal input pins of each channel of driver chip 3 on PCB board 2. The high-speed pins are connected to the corresponding pads on the third layer of PCB board 2 via solder, and the high-speed traces are located on the third layer of PCB board 2, thereby realizing high-speed interconnection between DSP chip 1 and driver chip 3.

[0053] The 400G high-speed optical module of this embodiment also includes an upper housing 13 and a lower housing 12, with the PCB board 2 disposed between the upper housing 13 and the lower housing 12.

[0054] The 400G high-speed optical module in this embodiment has good electromagnetic shielding and strong crosstalk suppression capabilities.

[0055] The above embodiments are merely illustrative of the technical concept of the present invention and should not be construed as limiting the scope of protection of the present invention. Any modifications made to the technical solutions based on the technical concept proposed in this invention shall fall within the scope of protection of this invention.

Claims

1. An interconnection structure between a PCB board and chips, comprising a PCB board (2) and a plurality of chips mounted on the PCB board, characterized in that: The PCB board (2) is composed of a first copper foil layer (201), a second dielectric layer (202), a third copper foil layer (203), a high-speed trace (4) located on the third layer, a fourth dielectric layer (204), and a fifth copper foil layer (205) stacked in sequence. The first copper foil layer (201) and the second dielectric layer (202) located directly below the high-speed pins of the DSP chip (1) and the driver chip (3) are completely hollowed out to form a hollowed-out groove. The bottom of the hollowed-out groove exposes the pads on the third high-speed trace (4). The high-speed pins of the chip are connected to the pads of the third high-speed trace (4). The pads are located directly below the high-speed pins of the chip. The high-speed trace (4) of the third layer is provided at the end of the pads. The high-speed pins are connected to the corresponding pads on the third layer of the PCB board (2) through solder. The high-speed traces are located on the third layer of the PCB board (2), thereby realizing the high-speed interconnection between the DSP chip (1) and the driver chip (3). The hollow area includes the first copper foil layer (201) and the second dielectric layer (202) of the PCB board (2). The depth of the hollow groove is equal to the sum of the thicknesses of the first copper foil layer (201) and the second dielectric layer (202) of the PCB board (2). Copper foil is electroplated on the wall of the hollow groove. Copper foil is provided on the wall of the hollow groove. The copper foil realizes the vertical interconnection between the first copper foil layer (201) and the third copper foil layer (203) of the PCB board (2) to form a semi-closed sidewall shielding structure.

2. The interconnection structure between the PCB board and the chip according to claim 1, characterized in that: The high-speed routing (4) of the third layer is a strip.

3. The method for fabricating the interconnection structure between the PCB board and the chip according to any one of claims 1-2, characterized in that, Includes the following steps: S1. The layers of the PCB are stacked and pressed in sequence. After pressing, the PCB is hollowed out, and the bottom of the hollowed-out groove exposes the pads on the third high-speed trace (4). S2. Copper foil is electroplated on the wall of the hollowed-out groove, and the electroplated copper foil realizes the interconnection between the first copper foil layer (201) and the third copper foil layer (203); S3, Solder is applied to the pads on the PCB board; S4. The PCB board is heated, the chip is placed, and the high-speed pins of the chip are connected to the solder.

4. The preparation method according to claim 3, characterized in that: In S1, the cutout positions on the PCB board are marked, and the marked positions on the PCB board (2) are cut out using a laser drill bit or a mechanical drill bit. The cutout depth is equal to the sum of the thicknesses of the first copper foil layer (201) and the second dielectric layer (202).

5. The preparation method according to claim 3, characterized in that: In S3, the first solder is placed on the pad of the high-speed trace (4) of the third layer. The first solder is higher than the first copper foil layer (201). The upper surface of the first solder on all pads is in the same plane. The second solder is placed on the other pads on the upper surface of the first copper foil layer (201). The upper surface of the second solder is in the same plane as the upper surface of the first solder placed on the pad of the high-speed trace of the third layer.

6. An optical module, comprising a PCB board, a DSP chip, and a driver chip, characterized in that: The DSP chip and driver chip mounted on the PCB are electrically connected using the interconnection structure described in any one of claims 1-2.

7. The optical module according to claim 6, characterized in that: It also includes at least one optical transmitting sub-module and at least one optical receiving sub-module arranged in parallel. The optical transmitting sub-module has a BOX package structure and is electrically connected to the PCB board via a flexible tape. The optical receiving sub-module has a BOX package structure and is electrically connected to the PCB board via a flexible tape.

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