Display substrate and display device

Abstract

The display substrate and the display device are provided, the display substrate has a light-transmitting display area, and the display substrate comprises a substrate substrate, a driving circuit layer arranged on the substrate substrate, a planarization layer arranged on a side of the driving circuit layer away from the substrate substrate, a first via hole arranged on the planarization layer, the first via hole being located in the light-transmitting display area, a pixel definition layer located on a side of the planarization layer away from the planarization layer, a first pixel opening arranged on the pixel definition layer, and a first light-emitting piece, at least part of the first light-emitting piece being located in the first pixel opening, and a first electrode of the first light-emitting piece being electrically connected with the driving circuit layer through the first via hole, wherein a bottom projection of the first pixel opening on the substrate substrate falls within a bottom projection range of the first via hole on the substrate substrate.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to the field of display, and in particular, to a display substrate and a display device. BACKGROUND

[0002] With the popularity of full screen, the full display with camera (FDC) gradually becomes mainstream, wherein a light emitting member can be arranged in the area corresponding to the full display with camera, so that the area can realize display and also can transmit external ambient light. SUMMARY

[0003] The present disclosure provides a display substrate with a light-transmitting display area, the display substrate comprising:

[0004] a substrate substrate;

[0005] a driving circuit layer arranged on the substrate substrate;

[0006] a planarization layer arranged on a side of the driving circuit layer away from the substrate substrate; a first via hole is arranged on the planarization layer, and the first via hole is located in the light-transmitting display area;

[0007] a pixel definition layer located on a side of the planarization layer away from the substrate substrate, and a first pixel opening is arranged on the pixel definition layer;

[0008] a first light emitting member, at least part of the first light emitting member is located in the first pixel opening, and a first electrode of the first light emitting member is electrically connected with the driving circuit layer through the first via hole;

[0009] wherein a bottom of the first pixel opening on the substrate substrate falls within a range of a bottom of the first via hole on the substrate substrate.

[0010] In some embodiments, a projection of the bottom of the first pixel opening on the substrate substrate is a first projection, a projection of the bottom of the first via hole on the substrate substrate is a second projection, and a distance between an edge of the first projection and an edge of the second projection is 0-3 μm.

[0011] In some embodiments, a projection of the bottom of the first pixel opening on the substrate substrate is a first projection, a projection of the first electrode of the first light emitting member on the substrate substrate is a third projection, and an edge of the third projection surrounds an edge of the first projection.

[0012] In some embodiments, a distance between the edge of the third projection and the edge of the first projection is greater than 0 and less than 3 μm.

[0013] In some embodiments, a projection of the bottom of the first via on the substrate substrate is a second projection, a front projection of the first electrode of the first light emitting piece on the substrate substrate is a third projection, and the second projection is located within the third projection.

[0014] In some embodiments, a distance between an edge of the third projection and an edge of the second projection is 0-3 μm.

[0015] In some embodiments, a cross section of the first via gradually decreases in a direction close to the substrate substrate, and a slope angle of a sidewall of the first via is in a range of 20°-30°.

[0016] In some embodiments, the driving circuit layer comprises: a first pixel circuit and a second pixel circuit located in the regular display area, and the first electrode of the first light emitting piece is connected with a transfer line through the first via, and the transfer line is connected with the first pixel circuit.

[0017] The display substrate further comprises a second light emitting piece, and a first electrode of the second light emitting piece is connected with the second pixel circuit through the second via.

[0018] In some embodiments, the transfer line comprises: a connecting portion and a transmission portion, the transmission portion is connected between the connecting portion and the first pixel circuit, and the first via exposes a part of the connecting portion.

[0019] In some embodiments, a material of the transfer line comprises a transparent conductive material.

[0020] In some embodiments, the first pixel circuit and the second pixel circuit are arranged in the same layer.

[0021] The second light emitting piece is connected with a corresponding second pixel circuit through a transfer electrode, and the transfer electrode is arranged in the same layer as the transfer line.

[0022] In some embodiments, the regular display area comprises: a first sub-area and a second sub-area located between the first sub-area and the light-transmitting display area, and the first sub-area and the second sub-area are each provided with: a plurality of second light emitting pieces and a plurality of second pixel circuits, and the second light emitting pieces and the second pixel circuits are connected in one-to-one correspondence.

[0023] The number of the first pixel circuits and the number of the first light emitting pieces are both plural, and the first light emitting pieces and the first pixel circuits are connected in one-to-one correspondence, and the plurality of first pixel circuits are arranged in the second sub-area.

[0024] In some embodiments, the distribution density of the second light emitting pieces in the first sub-area and the second sub-area is the same.

[0025] The display device also includes a photosensitive element disposed on a side of the display substrate away from the display surface, a projection of the photosensitive element on the display substrate being located within the light-transmissive display region. BRIEF DESCRIPTION OF DRAWINGS

[0026] The accompanying drawings are included to provide a further understanding of the present disclosure and are incorporated in and constitute a part of this specification, illustrate embodiments of the present disclosure and serve to explain the principles of the present disclosure, but are not intended to limit the present disclosure. In the drawings:

[0027] Figure 1a is a plan view of a display substrate provided in some embodiments.

[0028] Figure 1b is a schematic view of a display substrate provided in some embodiments.

[0029] Figure 1c is a plan view of a display substrate provided in some embodiments. Figure 1b is a top view of a pixel opening, a via, and an anode provided in the display panel shown.

[0030] Figure 2a is a schematic view of another display substrate provided in some embodiments.

[0031] Figure 2b is a top view of a pixel opening, a via, and an anode provided in the display panel shown. Figure 2a

[0032] Figure 3 is a plan view of a display substrate provided in some embodiments.

[0033] Figure 4 is a top view of a first pixel opening, a first via, and an anode of a first light-emitting element provided in some embodiments of the present disclosure.

[0034] Figure 5a is a cross-sectional view along line A-A' in Figure 4

[0035] Figure 5b is another cross-sectional view along line A-A' in Figure 4

[0036] Figure 6 is a schematic view of a display substrate provided in an embodiment of the present disclosure.

[0037] Figure 7 is a schematic view of another display substrate provided in an embodiment of the present disclosure.

[0038] Figure 8 ​​​A schematic diagram of an arrangement of first light emitting pieces of a light-transmissive display region provided in some embodiments of the present disclosure.

[0039] Figure 9 A plot of the encircled energy of a light-transmissive display region of a display substrate in embodiments and comparative examples of the present disclosure.

[0040] Figure 10 A simulation curve of MTF (optical modulation transfer function test) of a light-transmissive display region of a display substrate in embodiments and comparative examples of the present disclosure. DETAILED DESCRIPTION

[0041] The specific embodiments of the present disclosure will be described below in detail with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are merely intended to illustrate and explain the present disclosure, and are not intended to limit the present disclosure.

[0042] In the present specification, words indicating the positional or locational relationship such as "middle", "upper", "lower", "front", "rear", "vertical", "horizontal", "top", "bottom", "inner", "outer", and the like are used to describe the positional relationship of the components with reference to the accompanying drawings, and are merely intended to facilitate the description of the present specification and simplify the description, and do not indicate or imply that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as limiting the present disclosure. The positional relationship of the components can be appropriately changed according to the direction in which each component is described. Therefore, it is not limited to the words described in the specification, and can be appropriately changed according to the situation.

[0043] Unless otherwise defined, technical terms or scientific terms used in the embodiments of the present disclosure shall have the ordinary meaning understood by a person of ordinary skill in the art to which the present disclosure pertains. The terms "first", "second", and the like used in the present disclosure do not indicate any order, number, or importance, but are used to distinguish different components. Similarly, the terms "include", "comprise", and the like mean that the elements or objects before the terms encompass the elements or objects listed after the terms and their equivalents, and do not exclude other elements or objects. The terms "mount", "connect", and "connect" should be interpreted broadly. For example, it can be fixedly connected, or detachably connected, or integrally connected; it can be mechanically connected, or connected; it can be directly connected, or indirectly connected through an intermediate, or communication between two elements. For those skilled in the art, the specific meaning of the above terms in the present disclosure can be understood according to the specific circumstances.

[0044] Figure 1a A plan view of a display substrate provided in some embodiments, such as Figure 1aAs shown, the display substrate includes a regular display area AA and a light-transmissive display area SA, wherein the side of the display substrate away from the display surface is provided with a light-sensing element (for example, a camera), and the light-transmissive display area SA refers to the area on the display substrate corresponding to the light-sensing element. The light-emitting element is arranged on the light-transmissive display area SA and the regular display area AA, so that the regular display area AA and the light-transmissive display area SA can both realize picture display.

[0045] Figure 1b A schematic view of the display substrate provided in some embodiments, Figure 1c A schematic view of the display substrate provided in some embodiments, Figure 1b A top view of the pixel opening, via hole and anode provided in the display panel shown, Figure 1b A top view of the pixel opening, via hole and anode provided in the display panel shown, 1c As shown, the display substrate includes a driving circuit layer, a planarization layer 86, a pixel definition layer 87 and a plurality of light-emitting elements 3 which are sequentially stacked on the substrate 7. The driving circuit layer includes a plurality of pixel driving circuits, and each pixel driving circuit includes a plurality of thin film transistors 6, Figure 1b Only one thin film transistor 6 is shown in FIG. 6, and the thin film transistor 6 includes a gate 62, an active layer 61, a source 63 and a drain 64. The active layer 61 is provided with a buffer layer 81 between the substrate 7, and the active layer 61 is provided with a first gate insulating layer 82 between the gate 62. The gate 62 is provided with a second gate insulating layer 83 and an interlayer insulating layer 84 away from the substrate 7. The source 63 and the drain 64 are provided on the side of the interlayer insulating layer 84 away from the substrate 7.

[0046] The planarization layer 86 is provided on the side of the driving circuit layer away from the substrate 7, and the planarization layer 86 is provided with a plurality of via holes V. The pixel definition layer 87 is provided on the side of the planarization layer 86 away from the substrate 7, and the pixel definition layer 87 is provided with a plurality of pixel openings 1. At least part of the light-emitting element is located in the pixel opening 1, and the electrode of the light-emitting element is electrically connected to the driving circuit layer through the via hole V. The light-emitting element 3 includes a first electrode, a second electrode and an organic light-emitting layer 302 between the first electrode and the second electrode. One of the first electrode and the second electrode is an anode 301, and the other is a cathode 303. In the embodiments of the present disclosure, the first electrode is taken as the anode 301, and the second electrode is taken as the cathode 303 as an example.

[0047] The anode 301 can be a reflective electrode, and the cathode 303 can be a transparent electrode made of a transparent conductive material (for example, indium tin oxide). The organic light-emitting layer 302 includes, in sequence, a hole injection layer, a hole transport layer, an electron transport layer, and an electron injection layer. The anode 301 is located between the pixel defining layer 87 and the planarization layer 86, and a portion of the anode 301 is exposed by the pixel opening 1. The anode 301 of the light-emitting element 3 is electrically connected to the driving circuit layer through the via hole V penetrating through the planarization layer 86, and the cathodes 303 of the plurality of light-emitting elements 3 can be formed in an integrated structure.

[0048] In some embodiments, the light-emitting element 3 is provided in both the regular display area AA and the see-through display area SA, and the connection mode of the light-emitting element 3 in the regular display area AA and the see-through display area SA is the same. In one example, the connection mode of the light-emitting element 3 in the regular display area AA and the see-through display area SA is the same as shown in Figure 1b In the display substrate shown in Figure 1b The via hole V has a normal projection on the substrate 7 outside the normal projection of the pixel opening 1 on the substrate 7, and the anode 301 includes an electrode main body part corresponding to the pixel opening 1 and an electrode connecting part corresponding to the via hole V.

[0049] In the display substrate shown in

[0050] Figure 2a In some embodiments, the display substrate provided in another structure is shown in Figure 2b In Figure 2a The top view of the pixel opening, the via hole, and the anode provided in the embodiments is shown in Figure 2a and Figure 2b The display substrate shown in Figure 1b has the same film layer structure as the display substrate shown in

[0051] By this arrangement, the via hole V is arranged in the lower area of the pixel opening 1, so that the anode 301 can be formed in a regular shape as a whole, thereby ensuring uniform diffraction at each position. However, the flatness of part of the anode 301 is reduced due to the influence of the via hole V, thereby affecting the light-emitting uniformity of the light-emitting element 3.

[0052] Figure 3 The plan view of the display substrate provided in some embodiments of the present disclosure is shown inFigure 3 As shown, the display substrate has a light-transmissive display region SA and a regular display region AA, the regular display region AA is located around the light-transmissive display region SA, and the regular display region AA and the light-transmissive display region SA are both provided with light emitting pieces 3.

[0053] Figure 4 A top view of the first pixel opening, the first via, and the anode of the first light emitting piece provided in some embodiments of the present disclosure, Figure 5a A sectional view along line A-A' in Figure 4 Figure 5b Another sectional view along line A-A' in Figure 4 Figure 4 to Figure 5b As shown, the display substrate, similar to the display substrate shown in Figure 1b and Figure 2a The display substrate shown in the present embodiment is similar to the display substrate shown in the prior embodiment, and includes a driving circuit layer, a planarization layer 86, a pixel defining layer 87, and first light emitting pieces 3a.

[0054] The driving circuit layer is arranged on the substrate 7, and is configured to provide driving current for each light emitting piece 3 of the display substrate.

[0055] The planarization layer 86 is arranged on the side of the driving circuit layer away from the substrate 7, and the planarization layer 86 is provided with first vias Va, and the first vias Va are located in the light-transmissive display region SA.

[0056] The pixel defining layer 87 is arranged on the side of the planarization layer 86 away from the substrate 7, and the pixel defining layer 87 is provided with first pixel openings 1a. At least part of the first light emitting pieces 3a is located in the first pixel openings 1a. Specifically, the first light emitting pieces 3a include a first electrode, a light emitting layer 302a, and a second electrode. The light emitting layer 302a is located in the first pixel openings 1a, and at least part of the first electrode is exposed by the first pixel openings 1a. The present embodiment takes the first electrode as the anode 301 and the second electrode as the cathode 303 as an example for illustration. The anode 301a of the first light emitting piece 3a is electrically connected to the driving circuit layer through the first via Va. It should be noted that the number of the first vias Va, the first pixel openings 1a, and the first light emitting pieces 3a can all be multiple, and each first light emitting piece 3a corresponds to one first pixel opening 1a and one first via Va, and the anode 301a of the first light emitting piece 3a is electrically connected to the driving circuit layer through the corresponding first via Va.

[0057] In some embodiments, the orthographic projection of the anode 301a of the first light emitting piece 3a on the substrate 7 can be circular, elliptical, drop-shaped, or the like.

[0058] Unlike the display substrate shown in Figure 1b and Figure 2a The display substrate shown in the present embodiment is similar to the display substrate shown in the prior embodiment, and includes a driving circuit layer, a planarization layer 86, a pixel defining layer 87, and first light emitting pieces 3a. Figure 4 to Figure 5b ​​In some embodiments, the bottom of the first pixel opening 1a is projected on the substrate 7 as a first projection, and the bottom of the first via Va is projected on the substrate 7 as a second projection. The edge of the second projection surrounds the edge of the first projection, and the spacing d1 between the edge of the first projection and the edge of the second projection is 0-3 μm. Thus, the part of the anode 301a of the first light emitting component 3a exposed by the first pixel opening 1a is a flat part of the anode 301a, so as to ensure the uniformity of the light emitted by the first light emitting component 3a.

[0059] In some embodiments, the bottom of the first pixel opening 1a is projected on the substrate 7 as a first projection, and the bottom of the first via Va is projected on the substrate 7 as a second projection. The edge of the second projection surrounds the edge of the first projection, and the spacing d1 between the edge of the first projection and the edge of the second projection is 0-3 μm. Thus, the part of the anode 301a of the first light emitting component 3a exposed by the first pixel opening 1a is a flat part of the anode 301a, so as to ensure the uniformity of the light emitted by the first light emitting component 3a.

[0060] In some embodiments, the anode 301a can include two transparent conductive layers and a reflective metal layer between the two transparent conductive layers. The transparent conductive layer can be an indium tin oxide layer, and the reflective metal layer can be a silver metal layer.

[0061] In some embodiments, the anode 301a can be electrically connected to the driving circuit layer through a jumper 4a. The jumper 4a can be made of a transparent conductive material (e.g., indium tin oxide).

[0062] In some embodiments, as shown in FIG. 1, the bottom of the first pixel opening 1a is projected on the substrate 7 as a first projection, and the bottom of the first via Va is projected on the substrate 7 as a second projection. The edge of the second projection surrounds the edge of the first projection, and the spacing d1 between the edge of the first projection and the edge of the second projection is 0-3 μm. Thus, the part of the anode 301a of the first light emitting component 3a exposed by the first pixel opening 1a is a flat part of the anode 301a, so as to ensure the uniformity of the light emitted by the first light emitting component 3a. Figure 4 In some embodiments, as shown in FIG. 1, the bottom of the first pixel opening 1a is projected on the substrate 7 as a first projection, and the bottom of the first via Va is projected on the substrate 7 as a second projection. The edge of the second projection surrounds the edge of the first projection, and the spacing d1 between the edge of the first projection and the edge of the second projection is 0-3 μm. Thus, the part of the anode 301a of the first light emitting component 3a exposed by the first pixel opening 1a is a flat part of the anode 301a, so as to ensure the uniformity of the light emitted by the first light emitting component 3a.

[0063] In some embodiments, the projection of the bottom of the first pixel opening 1a on the base substrate 7 is a first projection, and the orthographic projection of the anode 301a of the first light-emitting element 3a on the base substrate 7 is a third projection. The edge of the third projection surrounds the edge of the first projection. The distance d2 between the edge of the third projection and the edge of the first projection is greater than 0 and less than 3 μm, thereby ensuring uniform light emission from the first light-emitting element 3a and preventing the area of ​​the anode 301a from being too large, thereby ensuring that the photosensitive element receives sufficient light. For example, the distance d2 between the edge of the first projection and the edge of the third projection can be 0.5 μm, 1 μm, 2 μm, or 2.5 μm.

[0064] In some embodiments, the projection of the bottom of the first via Va on the base substrate 7 is the second projection, and the orthographic projection of the anode 301a of the first light-emitting element 3a on the base substrate 7 is the third projection. The second projection is within the range of the third projection to prevent the etching solution from contacting the underlying adapter 4a during the patterning process of the anode 301a and causing corrosion to the adapter 4a. The distance d3 between the edge of the third projection and the edge of the second projection is within the range of 0 to 3 μm to prevent the area of ​​the anode 301a from being too large, thereby ensuring that the photosensitive element can receive sufficient light. For example, Figure 5b As shown, the anode 301a can be located at the bottom of the first via hole Va, so that the anode 301a is a flat structure as a whole. In this case, the edge of the second projection and the edge of the third projection can overlap. Figure 5a As shown, a portion of the anode 301a is located on the sidewall of the first via Va. In this case, the distance d3 between the edge of the second projection and the edge of the third projection can be 0.5 μm, 1 μm, 2 μm, or 3 μm. For example, in some embodiments, the distance between the edge of the first projection and the edge of the second projection is 1 μm, the distance between the edge of the first projection and the edge of the third projection is 1 μm, and the distance between the edge of the second projection and the edge of the third projection is also 1 μm. This arrangement helps to reduce the area of ​​the anode 301a while maintaining the flatness of the anode 301a exposed by the first pixel opening 1a.

[0065] In some embodiments, the cross section of the first via hole Va gradually decreases in the direction close to the base substrate 7, and the slope angle θ of the side wall of the first via hole Va is in the range of 20° to 30°. For example, the slope angle θ can be in the range of 20°, 25°, or 30°. The cross section of the first via hole Va refers to the cross section of the first via hole Va perpendicular to the thickness direction of the display substrate. The slope angle θ refers to the acute angle formed between the side wall of the first via hole Va and the surface of the planarization layer 86 facing the base substrate 7. Figure 5a and Figure 5bAs shown, when the slope angle θ is too large, the anode 301a is prone to breakage; when the slope angle θ is too small, for example, the slope angle is 5°, the area of the anode 301a arranged on the sidewall of the first via Va is increased, thereby reducing the area of the anode 301a in contact with the light-emitting layer 302a under the condition that the total area of the anode 301a is constant, which is not conducive to light emission. Therefore, when the slope angle θ is set to 20°-30°, the anode 301a is neither prone to breakage nor can the light-emitting effect of the first light-emitting component 3a be ensured.

[0066] Figure 6 FIG. 1 is a structural schematic diagram of a display substrate provided in an embodiment of the present disclosure, Figure 7 FIG. 2 is a structural schematic diagram of another display substrate provided in an embodiment of the present disclosure, as Figure 6 and Figure 7 As shown in the present disclosure, the pixel defining layer 87 and the planarization layer 86 both extend from the conventional display area AA to the light-transmitting display area SA, the pixel defining layer 87 is provided with a plurality of second pixel openings 1b, and the planarization layer 86 is provided with a plurality of second vias Vb, both the second pixel openings 1b and the second vias Vb are located in the conventional display area AA. The conventional display area AA is provided with a second light-emitting component 3b corresponding to each second pixel opening 1b, the second light-emitting component 3b includes an anode 301b, a light-emitting layer 302b and a cathode 303b, the second pixel opening 1b exposes a part of the anode 301b, and the light-emitting layer 302b is arranged in the second pixel opening 1b. The cathodes 303b of the plurality of second light-emitting components 3b and the cathodes 303a of the plurality of first light-emitting components 3a can be formed as an integral structure.

[0067] The above-mentioned driving circuit layer includes a first pixel circuit and a second pixel circuit, the first pixel circuit is electrically connected with the first light-emitting component 3a, thereby providing a driving current for the first light-emitting component 3a, and the second pixel circuit is electrically connected with the second light-emitting component 3b, thereby providing a driving current for the second light-emitting component 3b.

[0068] In some embodiments, the first pixel circuit and the second pixel circuit are both arranged in the conventional display area AA. The anode 301a of the first light-emitting component 3a is connected with a transfer line 4a through the first via Va, and the transfer line 4a is connected with the first pixel circuit. The transfer line 4a can be made of a transparent conductive material.

[0069] Since the driving circuit layer usually includes metal structures, for example, thin film transistors and capacitors in the first pixel circuit and the second pixel circuit, the light transmittance is relatively poor. The present disclosure can improve the light-transmitting area of the light-transmitting display area SA by arranging the first pixel circuit connected with the first light-emitting component 3a in the conventional display area AA, thereby ensuring the camera shooting effect of the under-screen photosensitive element below the light-transmitting display area SA.

[0070] In some embodiments, the adapter cable 4a includes a connecting portion 4a0 and a transmission portion 4a1, and the connecting portion 4a0 and the transmission portion 4a1 are an integrated structure. Figure 6 As shown, the first via hole Va exposes a portion of the connecting portion 4a0 , and the transmission portion 4a1 is connected between the connecting portion 4a0 and the first pixel circuit.

[0071] In some embodiments, as Figure 6 As shown, a passivation layer 85 is provided on the side of the driving circuit layer away from the base substrate 7, and the transfer line 4a is located between the passivation layer 85 and the planarization layer 86. A transfer electrode 5 is provided in the conventional display area AA. The anode 301b of the second light-emitting element 3b is connected to the transfer electrode 5 through the second via Vb, and the transfer electrode 5 is electrically connected to the second pixel circuit.

[0072] The transfer electrode 5 and the transfer line 4a can be provided on the same layer, and the first pixel circuit and the second pixel circuit can be provided on the same layer, thereby simplifying the manufacturing process. It should be noted that the first pixel circuit and the second pixel circuit can include the same devices, for example, both include multiple thin film transistors and capacitors. Figure 6 Only one thin film transistor in the first pixel circuit (denoted as the first thin film transistor 6a) and one thin film transistor in the second pixel circuit (denoted as the second thin film transistor 6b) are shown. The first pixel circuit and the second pixel circuit are arranged on the same layer, which means that the thin film transistors in the first pixel circuit and the second pixel circuit have the same electrodes and are arranged on the same layer. Figure 6 As shown, the second electrode 6a4 of the first thin-film transistor 6a is connected to the anode 301a of the first light-emitting element 3a; the second electrode 6b4 of the second thin-film transistor is connected to the anode 301b of the second light-emitting element 3b. The gate 6a1 of the first thin-film transistor 6a is on the same layer as the gate 6b1 of the second thin-film transistor 6b; the first electrode 6a3 and the second electrode 6a4 of the first thin-film transistor 6a are on the same layer as the first electrode 6b3 and the second electrode 6b4 of the second thin-film transistor 6b; and the active layer 6a2 of the first thin-film transistor 6a is on the same layer as the active layer 6b2 of the second thin-film transistor 6b. Of course, both the first thin-film transistor 6a and the second thin-film transistor 6b can be dual-gate transistors, each having two gate layers. In this case, the first gate of the first thin-film transistor 6a is on the same layer as the first gate of the second thin-film transistor 6b, and the second gate of the first thin-film transistor 6a is on the same layer as the second gate of the second thin-film transistor 6b.

[0073] It should be noted that the two structures in the embodiment of the present disclosure are arranged in the same layer, which means that the two structures can be formed in the same patterning process, so the materials of the two structures can be the same. This arrangement not only simplifies the process but also reduces costs.

[0074] In addition, the first thin film transistor 6a and the second thin film transistor 6b can be bottom-gate thin film transistors or top-gate thin film transistors. Figure 6 The first thin film transistor 6a and the second thin film transistor 6b are described by way of example in which both are top-gate thin film transistors. The active layer 6a2 of the first thin film transistor 6a and the active layer 6b2 of the second thin film transistor 6b are both located between the layer in which the gate electrode is located and the substrate 7, and the material of the first active layer 6a2 and the second active layer 6b2 can include, for example, an inorganic semiconductor material (for example, polysilicon, amorphous silicon, or the like), an organic semiconductor material, or an oxide semiconductor material. The active layer 6a2 and the active layer 6b2 each include a channel portion and a source connection portion and a drain connection portion located on either side of the channel portion, and the source connection portion is connected to the source electrode of the thin film transistor, and the drain connection portion is connected to the drain electrode of the thin film transistor. The source connection portion and the drain connection portion can each be doped with impurities (for example, N-type impurities or P-type impurities) having a higher impurity concentration than the channel portion. The channel portion is in direct opposition to the gate electrode of the thin film transistor, and when the voltage signal applied to the gate electrode reaches a certain value, a carrier path is formed in the channel portion, causing the source electrode and the drain electrode of the thin film transistor to be conductive.

[0075] As shown in FIGS. 1, 2, and 3, the substrate 7 is provided with a buffer layer 81, a first gate insulating layer 82, a second gate insulating layer 83, and an interlayer insulating layer 84. Figure 6 Figure 7 As shown in FIGS. 1, 2, and 3, the substrate 7 is provided with a buffer layer 81, a first gate insulating layer 82, a second gate insulating layer 83, and an interlayer insulating layer 84.

[0076] The first gate insulating layer 82 is provided on the side of the active layer 6a2 and the active layer 6b2 that is farther from the substrate 7. The material of the first gate insulating layer 82 can include a silicon compound or a metal oxide. For example, the material of the first gate insulating layer 82 can include silicon nitride oxide, silicon oxide, silicon nitride, silicon carbon oxide, silicon carbon nitride, aluminum oxide, aluminum nitride, tantalum oxide, hafnium oxide, zirconium oxide, titanium oxide, or the like. In addition, the first gate insulating layer 82 can be a single layer or a plurality of layers.

[0077] ​The first gate electrode layer is disposed on the side of the first gate insulating layer 82 away from the substrate 7. The first gate electrode layer includes the gate electrode 6a1 and the gate electrode 6b1. The material of the first gate electrode layer can include, for example, a metal, a metal alloy, a metal nitride, a conductive metal oxide, a transparent conductive material, etc. For example, the gate electrode layer can include gold, an alloy of gold, silver, an alloy of silver, aluminum, an alloy of aluminum, aluminum nitride, tungsten, tungsten nitride, copper, an alloy of copper, nickel, chromium, chromium nitride, molybdenum, an alloy of molybdenum, titanium, titanium nitride, platinum, tantalum, tantalum nitride, neodymium, scandium, strontium ruthenium oxide, zinc oxide, tin oxide, indium oxide, gallium oxide, indium tin oxide, indium zinc oxide, etc. The first gate electrode layer can have a single layer or multiple layers.

[0078] The second gate insulating layer 83 is disposed on the side of the first gate electrode layer away from the substrate 7. The material of the second gate insulating layer 83 can include, for example, a silicon compound, a metal oxide. For example, the material of the second gate insulating layer 83 can include silicon oxynitride, silicon oxide, silicon nitride, silicon oxycarbide, silicon nitrocarbide, aluminum oxide, aluminum nitride, tantalum oxide, hafnium oxide, zirconium oxide, titanium oxide, etc. The second gate insulating layer 83 can be formed as a single layer or multiple layers.

[0079] The interlayer insulating layer 84 is disposed on the side of the second gate electrode layer away from the substrate 7. The material of the interlayer insulating layer 84 can include, for example, a silicon compound, a metal oxide, etc. The silicon compound and the metal oxide listed above can be selected specifically, and will not be described here again.

[0080] The source-drain conductive layer is disposed on the side of the interlayer insulating layer 84 away from the substrate 7. The source-drain conductive layer can include the source and the drain of each transistor. The source-drain conductive layer can include a metal, an alloy, a metal nitride, a conductive metal oxide, a transparent conductive material, etc. For example, the source-drain conductive layer can be a single layer or multiple layers of a metal, such as Mo / Al / Mo or Ti / Al / Ti.

[0081] The passivation layer 85 is disposed on the side of the source-drain conductive layer away from the substrate 7, and the planarization layer 86 is disposed on the side of the passivation layer 85 away from the substrate 7. The planarization layer 86 can be made of an organic insulating material, for example, including a resin material such as polyimide, epoxy resin, acrylic, polyester, photoresist, polyacrylate, polyamide, silicone, etc.

[0082] In some embodiments, the plurality of first light emitting elements 1a are connected to the same layer of the switching line 4a between the passivation layer 85 and the planarization layer 86. Figure 6 In some embodiments, the plurality of first light emitting elements 1a are connected to the same layer of the switching line 4a between the passivation layer 85 and the planarization layer 86. Figure 7As shown, the second light emitting element 3b is connected with the second pixel circuit through the second transfer electrode 502 and the first transfer electrode 501. The first passivation layer 851 and the second passivation layer 852 are arranged between the planarization layer 86 and the interlayer insulating layer 84, the second passivation layer 852 is located on the side of the first passivation layer 851 away from the substrate 7, the first transfer electrode 501 is located between the first passivation layer 851 and the second passivation layer 852, and the second transfer electrode 502 is located between the second passivation layer 852 and the planarization layer 86. The connection part 4a0 of the transfer line 4a connected with each first light emitting element 1a is arranged in the same layer and is located between the second passivation layer 852 and the planarization layer 86. The transmission part 4a1 of the transfer line 4a connected with a part of the first light emitting elements 1a is arranged in the same layer as the first transfer electrode 501, and the transmission part 4a1 of the transfer line 4a connected with another part of the first light emitting elements 1a is arranged in the same layer as the second transfer electrode 502. Arranging the transmission part 4a1 of the transfer line 4a connected with the plurality of first light emitting elements 1a in different layers can avoid short circuit and other adverse conditions caused by line congestion.

[0083] Of course, the transmission part 4a1 of the transfer line 4a connected with the plurality of first light emitting elements 1a can also be arranged in three layers, and correspondingly, the second light emitting element 3b is connected with the second pixel circuit through three transfer electrodes. Alternatively, the transmission part 4a1 of the transfer line 4a connected with the plurality of first light emitting elements 1a can also be arranged in a larger number of layers, which is not limited herein.

[0084] Please continue to refer to Figure 3 In the embodiments of the present disclosure, the regular display area AA includes a first sub-area AA1 and a second sub-area AA2 located between the first sub-area AA1 and the light-transmitting display area SA, and the first sub-area AA1 and the second sub-area AA2 are both provided with a plurality of second light emitting elements 3b and a plurality of second pixel circuits, and the second light emitting elements 3b are connected with the second pixel circuits one by one. In addition, the number of the first pixel circuits and the number of the first light emitting elements 3a are both plural, and the first light emitting elements 3a are connected with the first pixel circuits one by one. The plurality of first pixel circuits are all arranged in the second sub-area AA2, that is, the first pixel circuit connected with the first light emitting element 3a is arranged at a position close to the light-transmitting display area SA, so as to reduce the length of the transfer line 4a and further reduce the transmission resistance.

[0085] In some embodiments, the distribution density of the second light emitting elements 3b in the first sub-area AA1 and the second sub-area AA2 is the same, so as to make the display effect of the entire regular display area AA more uniform. Further, the distribution density of the first light emitting elements 3a in the light-transmitting display area SA is the same as the distribution density of the second light emitting elements 3b in the regular display area AA, so as to make the display effect of the light-transmitting display area SA and the regular display area AA more uniform and improve the visual experience.

[0086] It should be noted that the “distribution density” of the first light-emitting elements 3 a (or the second light-emitting elements 3 b ) refers to the number of the first light-emitting elements 3 a (or the second light-emitting elements 3 b ) in a unit area.

[0087] In some embodiments, the display substrate may further include: an encapsulation layer and a protective layer (neither of which is shown), wherein the encapsulation layer is arranged on the side of the first light-emitting element 3a and the second light-emitting element 3b away from the base substrate 7; and the protective layer is arranged on the side of the encapsulation layer away from the base substrate 7. The protective layer may be a glass cover plate or a cover plate made of other materials, and the orthographic projection of the protective layer on the base substrate 7 may cover the entire base substrate 7. The encapsulation layer covers the plurality of first light-emitting elements 3a and the second light-emitting elements 3b and is used to encapsulate the light-emitting elements to prevent moisture and / or oxygen in the external environment from corroding the light-emitting elements. The encapsulation layer may include a first inorganic encapsulation layer, a second inorganic encapsulation layer, and an organic encapsulation layer located therebetween.

[0088] Figure 8 This is a schematic diagram of the arrangement of the first light-emitting elements in the light-transmitting display area provided in some embodiments of the present disclosure, such as Figure 8 As shown, the light-transmitting display area includes multiple repeating areas A1, and each repeating area A1 is provided with multiple first light-emitting elements 3a. The multiple first light-emitting elements 3a in each repeating area A1 include: two first red light-emitting elements 3a_r, two first blue light-emitting elements 3a_b, and four first green light-emitting elements 3a_g. The multiple first light-emitting elements 3a in each repeating area A1 are arranged in an array. For example, the eight first light-emitting elements 3a in the same repeating area A1 are arranged in four rows. The first and third rows are both provided with first blue light-emitting elements 3a_b and first red light-emitting elements 3a_r, and the second and fourth rows are both provided with two first green light-emitting elements 3a_g. The first light-emitting elements 3a in two adjacent rows are arranged in a staggered manner. It should be noted that Figure 8 The above is only an exemplary arrangement, and the multiple first light-emitting elements 3a may also be arranged in other ways, which is not limited in the present disclosure.

[0089] In the normal display area AA, the plurality of second light emitting elements 3a include a plurality of second red light emitting elements, a plurality of second blue light emitting elements and a plurality of second green light emitting elements, and the arrangement of the second light emitting elements may be the same as that of the first light emitting elements.

[0090] Table 1 is a comparison table of parameters of the light-transmitting display area of ​​the display substrate in the embodiment of the present disclosure and the comparative example, wherein the light-transmitting display area of ​​the display substrate in the embodiment of the present disclosure adopts Figure 5a and Figure 5b The arrangement of the plurality of first light emitting elements 3a is as shown in FIG. Figure 8 The light-transmitting display area of ​​the display substrate in the comparative example adopts Figure 1bThe structure in , and the arrangement is based on Figure 8 In addition, the pixel density of the light-transmitting display area SA in the display substrates of the embodiment of the present disclosure and the comparative example is 400 ppi.

[0091] The "anode area" in Table 1 refers to the area of ​​the positive projection of the anode on the substrate 7. The unit of area is square micrometer. It can be seen from Table 1 that Figure 1b Compared with the structure shown in the figure, when the light-transmitting display area SA adopts Figure 5a or Figure 5b In the structure shown, the light transmission aperture ratio and light transmittance of the repeated area are improved, thereby increasing the amount of light received by the photosensitive element and further improving the imaging effect.

[0092] Table 1

[0093]

[0094]

[0095] In addition, through the simulation of the light spot of the light-transmitting display area SA, it is found that Figure 1b Compared with the structure of Figure 5a or Figure 5b When the structure is configured as shown in FIG, the brightness of the center of the light spot received by the photosensitive element below the transparent display area SA is higher.

[0096] Figure 9 is a circled energy curve diagram of the light-transmitting display area of ​​the display substrate in the embodiment of the present disclosure and the comparative example, Figure 9 The horizontal axis represents the radius in micrometers, and the vertical axis represents the normalized energy. Figure 9 The curve in FIG represents the light energy that can be received by the photosensitive element in the area defined by different radii with the midpoint of the light-transmitting display area SA as the center. Figure 9 It can be seen from the curve that, within a region of the same area, the display substrate of the embodiment of the present disclosure can enable the photosensitive element to receive more energy.

[0097] Figure 10 1 is an MTF (optical modulation transfer function test) simulation curve of the light-transmitting display area of ​​the display substrate in the embodiment of the present disclosure and the comparative example. Figure 10 In the figure, the horizontal axis is line pairs / mm (LP / mm), which is the number of lines per unit length (1mm) on the surface, and the vertical axis is the normalized representation of the clarity. Figure 10 It can be seen from the curve that, compared with the comparative example, the MTF of the light-transmitting display area of ​​the display substrate of the embodiment of the present disclosure can achieve higher clarity under the same line pairs.

[0098] The display device also includes any one of the display substrate provided in the above embodiments and a photosensitive element disposed away from the light-out side of the display substrate, and the orthographic projection of the photosensitive element on the display substrate is located within the light-transmissive display area SA.

[0099] It can be understood that the above embodiments are only exemplary embodiments adopted for illustrating the principles of the present application, and the present application is not limited thereto. Various modifications and improvements can be made by those of ordinary skill in the art without departing from the spirit and principle of the present application, and these modifications and improvements are also considered to be within the protection scope of the present application.

Claims

1. A display substrate having a regular display area and a see-through display area, the regular display area at least partially surrounding the see-through display area; characterized in that, The display substrate comprises: a substrate substrate; a driving circuit layer disposed on the substrate substrate; the driving circuit layer comprises: a first pixel circuit and a second pixel circuit located in the regular display area; a planarization layer disposed on a side of the driving circuit layer away from the substrate substrate; the planarization layer is provided with a first via hole located in the light-transmitting display area and a second via hole located in the regular display area; a pixel definition layer located on a side of the planarization layer away from the substrate substrate, the pixel definition layer is provided with a first pixel opening and a second pixel opening located in the regular display area; wherein the bottom of the first pixel opening is projected on the substrate substrate within the range of the bottom of the first via hole projected on the substrate substrate; a first light emitting member, the first light emitting member is at least partially located in the first pixel opening, and a first electrode of the first light emitting member is connected with a switching line through the first via hole, the switching line is electrically connected with the first pixel circuit of the driving circuit layer; a second light emitting member, a first electrode of the second light emitting member is connected with the second pixel circuit through the second via hole.

2. The display substrate of claim 1, wherein, The projection of the bottom of the first pixel opening on the substrate substrate is a first projection, the projection of the bottom of the first via hole on the substrate substrate is a second projection, the distance between the edge of the first projection and the edge of the second projection is 0-3μm.

3. The display substrate of claim 1, wherein, The projection of the bottom of the first pixel opening on the substrate substrate is a first projection, the orthographic projection of the first electrode of the first light emitting member on the substrate substrate is a third projection, the edge of the third projection surrounds the edge of the first projection.

4. The display substrate of claim 3, wherein, The distance between the edge of the third projection and the edge of the first projection is greater than 0 and less than 3μm.

5. The display substrate of claim 1, wherein, The projection of the bottom of the first via hole on the substrate substrate is a second projection, the orthographic projection of the first electrode of the first light emitting member on the substrate substrate is a third projection, the second projection is located within the range of the third projection. 6.The display substrate of claim 5, wherein, The distance between the edge of the third projection and the edge of the second projection is 0-3μm.

7. The display substrate according to any one of claims 1 to 6, characterized in that, The cross section of the first via hole gradually decreases along the direction close to the substrate substrate, and the slope angle of the sidewall of the first via hole is in the range of 20°-30°. 8.The display substrate of claim 1, wherein, The switching line comprises: a connecting part and a transmission part, the transmission part is connected between the connecting part and the first pixel circuit; the first via hole exposes a part of the connecting part. 9.The display substrate of claim 1, wherein, The material of the switching line comprises a transparent conductive material. 10.The display substrate of claim 1, wherein, The first pixel circuit and the second pixel circuit are disposed in the same layer; The second light emitting member is connected with the corresponding second pixel circuit through a switching electrode, and the switching electrode is disposed in the same layer as the switching line. 11.The display substrate of claim 1, wherein, The regular display area comprises: a first sub-area and a second sub-area located between the first sub-area and the light-transmitting display area, and the first sub-area and the second sub-area are both provided with: a plurality of second light emitting members and a plurality of second pixel circuits, the second light emitting members and the second pixel circuits are connected one by one. The first pixel circuits and the first light emitting pieces are both multiple in number, and the first light emitting pieces and the first pixel circuits are connected one by one in a one-to-one correspondence; the multiple first pixel circuits are all arranged in the second sub-region. 12.The display substrate of claim 11, wherein, The distribution density of the second light emitting pieces in the first sub-region and the second sub-region is the same.

13. A display device comprising: The display substrate as claimed in any one of claims 1 to 12 and a photosensitive element arranged on a side of the display substrate away from a display surface, wherein a normal projection of the photosensitive element on the display substrate is located within the light-transmissive display region.

Images