Thermal resistance test system and test method

Abstract

The application relates to the chip field and discloses a thermal resistance testing system and a testing method, the testing system comprising: a controllable thermostat for providing an environmental temperature for safe chip operation in multiple power consumption modes; a temperature acquisition module for regulating the environmental temperature provided by the controllable thermostat and acquiring multiple minimum environmental temperatures when the temperature alarm module of the safe chip alarms in the multiple power consumption modes; an oscilloscope for acquiring multiple actual power consumptions of the safe chip under the multiple minimum environmental temperatures; and a thermal resistance determination module for determining the average thermal resistance of the safe chip according to the multiple minimum environmental temperatures and the multiple actual power consumptions. The application can simply and effectively determine the average thermal resistance of the safe chip by using the environmental temperature values when the temperature alarm module of the safe chip internally alarms in the multiple power consumption modes and the corresponding actual power consumptions of the chip, and the cost of the testing system is relatively low.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of chip, in particular to a thermal resistance testing system and testing method. BACKGROUND

[0002] Chip thermal resistance (Rja) refers to the total thermal resistance from the chip heat source junction to the surrounding ambient air. The chip thermal resistance multiplied by its heat generation, i.e. the device temperature rise is obtained. With the development of safety chip to systematization and miniaturization, the heat flux density is increasing, causing temperature rise, thereby leading to the decline of chip functions. Therefore, the evaluation of the heat dissipation capacity of safety chip through the parameter of chip thermal resistance is also more and more important.

[0003] At present, the testing methods of the thermal resistance of safety chip mainly include the following two methods.

[0004] 1. The thermal resistance is simulated according to the chip packaging form. Taking a ball grid array (BGA) packaged chip as an example, the chip is composed of epoxy molding compound (EMC), wafer, internal solder ball, underfill adhesive, packaging substrate and external solder ball, etc. The thermal resistance Rja can be simulated according to the thermal model of each part of the material. However, the above method is a pre-estimation and evaluation method, and there is a certain error between the simulation environment and the actual application environment. For example, the chip is generally soldered on a printed circuit board (PCB), and the thermal resistance is affected by the material and the lamination of the PCB, resulting in an error.

[0005] 2. Professional instrument T3STER is used for measurement, the temperature / voltage (K coefficient) of the chip body diode is measured, the chip is applied with a heat current source, a dynamic voltage test is performed to obtain a plurality of groups of diode voltages, the chip junction temperature is obtained by fitting the K coefficient, the ambient temperature is subtracted to obtain the temperature rise, and the thermal resistance is obtained by dividing the power consumption. This method uses professional instruments for measurement, and the testing cost is high. SUMMARY

[0006] The purpose of the present application is to provide a thermal resistance testing system and testing method, which can use the environmental temperature value and the corresponding actual power consumption of the safety chip when the temperature alarm module inside the safety chip alarms in multiple power consumption modes, simply and effectively determine the average thermal resistance of the safety chip, and the cost of the testing system is relatively low.

[0007] To achieve the above object, the present application provides a thermal resistance testing system, comprising: a controllable thermostat for providing an environmental temperature for a secure chip to work in multiple power consumption modes; a temperature collecting module for regulating the environmental temperature provided by the controllable thermostat and collecting multiple minimum environmental temperatures when a temperature alarm module of the secure chip sends an alarm in the multiple power consumption modes; an oscilloscope for collecting multiple actual power consumptions of the secure chip in the multiple minimum environmental temperatures; and a thermal resistance determining module for determining an average thermal resistance of the secure chip according to the multiple minimum environmental temperatures and the multiple actual power consumptions.

[0008] Preferably, the multiple power consumption modes comprise at least two of a low power consumption mode, a moderate power consumption mode, a high power consumption mode and an extra-high power consumption mode.

[0009] Preferably, the temperature collecting module comprises: a first regulating unit for controlling to increase the environmental temperature provided by the controllable thermostat when the temperature alarm module does not send an alarm in any power consumption mode of the multiple power consumption modes; and a first collecting unit for determining the environmental temperature when the temperature alarm module sends an alarm for the first time in the any power consumption mode as the minimum environmental temperature when the temperature alarm module sends an alarm in the any power consumption mode.

[0010] Preferably, the controlling to increase the environmental temperature provided by the controllable thermostat comprises: controlling to increase the environmental temperature provided by the controllable thermostat at a first temperature change rate.

[0011] Preferably, the temperature collecting module comprises: a second regulating unit for controlling to decrease the environmental temperature provided by the controllable thermostat when the temperature alarm module sends an alarm in any power consumption mode of the multiple power consumption modes; and a second collecting unit for determining the environmental temperature when the temperature alarm module sends an alarm for the last time in the any power consumption mode as the minimum environmental temperature when the temperature alarm module sends an alarm in the any power consumption mode.

[0012] Preferably, the controlling to decrease the environmental temperature provided by the controllable thermostat comprises: controlling to decrease the environmental temperature provided by the controllable thermostat at a second temperature change rate.

[0013] Preferably, when the plurality of power consumption modes include a low power consumption mode, a medium power consumption mode, a high power consumption mode, and an ultra-high power consumption mode, the thermal resistance determination module includes: a first thermal resistance determination unit, configured to determine a first thermal resistance of the security chip based on the lowest ambient temperature and actual power consumption corresponding to the low power consumption mode and the lowest ambient temperature and actual power consumption corresponding to the medium power consumption mode; a second thermal resistance determination unit, configured to determine a second thermal resistance of the security chip based on the lowest ambient temperature and actual power consumption corresponding to the medium power consumption mode and the lowest ambient temperature and actual power consumption corresponding to the high power consumption mode; a third thermal resistance determination unit, configured to determine a third thermal resistance of the security chip based on the lowest ambient temperature and actual power consumption corresponding to the high power consumption mode and the lowest ambient temperature and actual power consumption corresponding to the ultra-high power consumption mode; and an average thermal resistance determination unit, configured to determine the average thermal resistance of the security chip based on the first thermal resistance, the second thermal resistance, and the third thermal resistance.

[0014] Preferably, the temperature acquisition module is a first logic circuit.

[0015] Preferably, the thermal resistance determination module is a second logic circuit.

[0016] Through the above technical solution, this invention creatively provides the ambient temperature for the safety chip to operate under multiple power consumption modes through a controllable constant temperature chamber; then, the ambient temperature provided by the controllable constant temperature chamber is adjusted by a temperature acquisition module, and multiple lowest ambient temperatures at which the temperature alarm module of the safety chip issues an alarm under the multiple power consumption modes are acquired; next, multiple actual power consumptions of the safety chip at the multiple lowest ambient temperatures are acquired by an oscilloscope; finally, the average thermal resistance of the safety chip is determined by a thermal resistance determination module based on the multiple lowest ambient temperatures and the multiple actual power consumptions. Thus, this invention can simply and effectively determine the average thermal resistance of the safety chip using the ambient temperature value at which the temperature alarm module inside the safety chip issues an alarm under multiple power consumption modes and the corresponding actual power consumption of the chip, and the testing system has a low cost.

[0017] A second aspect of the present invention provides a method for testing thermal resistance. The method may include: providing an ambient temperature for a security chip to operate under multiple power consumption modes through a controllable constant temperature chamber; adjusting the ambient temperature provided by the controllable constant temperature chamber through a temperature acquisition module, and acquiring multiple lowest ambient temperatures at which the temperature alarm module of the security chip issues an alarm under the multiple power consumption modes; acquiring multiple actual power consumptions of the security chip under the multiple lowest ambient temperatures through an oscilloscope; and determining the average thermal resistance of the security chip based on the multiple lowest ambient temperatures and the multiple actual power consumptions through a thermal resistance determination module.

[0018] For specific details and benefits of the thermal resistance testing method provided by this invention, please refer to the above description of the thermal resistance testing system, which will not be repeated here.

[0019] Other features and advantages of the present invention will be described in detail in the following detailed description section. Attached Figure Description

[0020] The accompanying drawings are provided to further illustrate embodiments of the present invention and form part of the specification. They are used together with the following detailed description to explain the embodiments of the present invention, but do not constitute a limitation thereof. In the drawings:

[0021] Figure 1 This is a schematic diagram of the structure of a thermal resistance testing system provided in an embodiment of the present invention; and

[0022] Figure 2 This is a schematic diagram of the structure of a controllable constant temperature chamber provided in an embodiment of the present invention; and

[0023] Figure 3 This is a flowchart of a thermal resistance testing method provided in an embodiment of the present invention. Detailed Implementation

[0024] The specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are for illustration and explanation only and are not intended to limit the present invention.

[0025] Considering that existing methods for testing chip thermal resistance produce large errors or require expensive specialized instruments, this invention proposes a low-cost, simple, and highly accurate testing method.

[0026] Specifically, each embodiment of the present invention only requires the configuration of four common laboratory instruments or circuits: a controllable constant temperature chamber, an oscilloscope, a temperature acquisition module (e.g., a logic circuit), and a thermal resistance determination module (e.g., a logic circuit). Combined with the temperature alarm module inside the safety chip, the lowest ambient temperature and the actual power consumption of the chip when the temperature alarm module alarms under different power consumption modes are tested. Then, based on the multiple sets of lowest ambient temperatures and actual power consumption of the chip obtained from the test, the average power consumption of the chip is determined.

[0027] Figure 1 This is a schematic diagram of the structure of a thermal resistance testing system provided in an embodiment of the present invention. Figure 1As shown, the test system includes: a controllable constant temperature chamber 10, used to provide the ambient temperature for the security chip to operate under multiple power consumption modes; a temperature acquisition module 20, used to adjust the ambient temperature provided by the controllable constant temperature chamber and acquire multiple minimum ambient temperatures at which the temperature alarm module of the security chip issues an alarm under the multiple power consumption modes; an oscilloscope 30, used to acquire multiple actual power consumptions of the security chip under the multiple minimum ambient temperatures; and a thermal resistance determination module 40, used to determine the average thermal resistance of the security chip based on the multiple minimum ambient temperatures and the multiple actual power consumptions.

[0028] The temperature acquisition module 20 can be a first logic circuit.

[0029] The thermal resistance determination module 40 can be a second logic circuit.

[0030] The plurality of power consumption modes may include at least two of the following: low power consumption mode, medium power consumption mode, high power consumption mode, and ultra-high power consumption mode.

[0031] The actual power consumption of the security chip gradually increases in the low-power mode, medium-power mode, high-power mode, and ultra-high-power mode. Of course, the number of specific power consumption modes can be determined based on the chip's power consumption; chips with higher power consumption can have more modes set. This allows for the calculation of the chip's thermal resistance across more power consumption ranges and the averaging of these resistances, resulting in more accurate calculations.

[0032] Before testing, the security chip 1 is fixed on the printed circuit board (PCB) 2 and connected to power (VCC) and ground (GND). Then, it is placed in a controlled temperature chamber 10. Figure 2 As shown.

[0033] In one embodiment, the temperature acquisition module 20 may include: a first control unit, configured to control the increase of the ambient temperature provided by the controllable constant temperature chamber when the temperature alarm module does not issue an alarm in any of the plurality of power consumption modes; and a first acquisition unit, configured to determine the ambient temperature at which the temperature alarm module first issues an alarm in any of the power consumption modes as the lowest ambient temperature at which the temperature alarm module issues an alarm in any of the power consumption modes.

[0034] Specifically, controlling the increase of the ambient temperature provided by the controllable constant temperature chamber may include: controlling the increase of the ambient temperature provided by the controllable constant temperature chamber at a first temperature change rate.

[0035] For example, the lowest ambient temperature at which the chip's temperature alarm module issues an alarm in mode 1 (e.g., low power mode) can be measured by the following steps 1-2.

[0036] Step 1: Set the security chip 1 to operate in mode 1 (e.g., low power mode), and set the temperature of the controllable constant temperature chamber 10 to an initial value (e.g., 50°C). After the temperature stabilizes, activate the chip's temperature alarm module for detection.

[0037] Step 2: If the temperature alarm module does not issue an alarm (i.e., the junction temperature limit alarm is not triggered), the operating temperature of the controllable constant temperature chamber 10 is slowly increased at a temperature change rate of 0.5℃ / minute until the chip's temperature alarm module issues an alarm. The ambient temperature TDH1 (i.e., the lowest ambient temperature under mode 1) at the time of the first alarm is recorded, and the voltage and current of each power supply of the chip are recorded to obtain the actual power consumption P1.

[0038] In one embodiment, the temperature acquisition module 20 may include: a second control unit, configured to control and reduce the ambient temperature provided by the controllable constant temperature chamber when the temperature alarm module issues an alarm in any of the plurality of power consumption modes; and a second acquisition unit, configured to determine the ambient temperature at the time when the temperature alarm module last issued an alarm in any of the power consumption modes as the lowest ambient temperature at the time when the temperature alarm module issued an alarm in any of the power consumption modes.

[0039] Specifically, controlling the reduction of the ambient temperature provided by the controllable constant temperature chamber may include: controlling the reduction of the ambient temperature provided by the controllable constant temperature chamber at a second temperature change rate.

[0040] For example, the lowest ambient temperature at which the chip's temperature alarm module issues an alarm in mode 1 (e.g., low power mode) can be measured by the following steps 1-2.

[0041] Step 1: Set the security chip 1 to operate in mode 1 (e.g., low power mode), and set the temperature of the controllable constant temperature chamber 10 to an initial value (e.g., 50°C). After the temperature stabilizes, activate the chip's temperature alarm module for detection.

[0042] Step 2: If the temperature alarm module issues an alarm (i.e., triggers the junction temperature upper limit alarm), the operating temperature of the controllable constant temperature chamber 10 is slowly reduced at a temperature change rate of 0.5℃ / minute until the chip's temperature alarm module stops alarming. The ambient temperature TDH1 (i.e., the lowest ambient temperature under mode 1) at the time of the last alarm is recorded, and the voltage and current of each power supply of the chip are recorded to obtain the actual power consumption P1.

[0043] The lowest ambient temperature TDH2 and the chip's actual power consumption P2 when the chip's temperature alarm module issues an alarm can be measured in process measurement mode 2 (e.g., medium power consumption mode) similar to the process described above.

[0044] The lowest ambient temperature TDH3 and the chip's actual power consumption P3 when the chip's temperature alarm module issues an alarm can be measured in process measurement mode 3 (e.g., high power mode) similar to the process described above.

[0045] The lowest ambient temperature TDH4 and the chip's actual power consumption P4 when the chip's temperature alarm module issues an alarm can be measured in process measurement mode 4 (e.g., ultra-high power mode) similar to the process described above.

[0046] When the multiple power consumption modes include a low power consumption mode, a medium power consumption mode, a high power consumption mode, and an ultra-high power consumption mode, the thermal resistance determination module may include: a first thermal resistance determination unit, configured to determine a first thermal resistance of the security chip based on the lowest ambient temperature and actual power consumption corresponding to the low power consumption mode and the lowest ambient temperature and actual power consumption corresponding to the medium power consumption mode; a second thermal resistance determination unit, configured to determine a second thermal resistance of the security chip based on the lowest ambient temperature and actual power consumption corresponding to the medium power consumption mode and the lowest ambient temperature and actual power consumption corresponding to the high power consumption mode; a third thermal resistance determination unit, configured to determine a third thermal resistance of the security chip based on the lowest ambient temperature and actual power consumption corresponding to the high power consumption mode and the lowest ambient temperature and actual power consumption corresponding to the ultra-high power consumption mode; and an average thermal resistance determination unit, configured to determine the average thermal resistance of the security chip based on the first thermal resistance, the second thermal resistance, and the third thermal resistance.

[0047] For example, firstly, based on the lowest ambient temperature TDH1 corresponding to the low-power mode and the actual power consumption P1, the lowest ambient temperature TDH2 corresponding to the medium-power mode and the actual power consumption P2, and the following formula, the first thermal resistance Rja1 of the security chip is determined.

[0048] Rja1 = (TDH2 - TDH1) / (P2 - P1).

[0049] Secondly, based on the lowest ambient temperature TDH2 corresponding to the medium power consumption mode and the actual power consumption P2, the lowest ambient temperature TDH3 corresponding to the high power consumption mode and the actual power consumption P3, and the following formula, the second thermal resistance Rja2 of the security chip is determined.

[0050] Rja2=(TDH3-TDH2) / (P3-P2).

[0051] Next, based on the lowest ambient temperature TDH3 corresponding to the high power consumption mode and the actual power consumption P3, the lowest ambient temperature TDH4 corresponding to the ultra-high power consumption mode and the actual power consumption P4, and the following formula, the third thermal resistance Rja3 of the security chip is determined.

[0052] Rja3=(TDH4-TDH3) / (P4-P3).

[0053] Finally, based on the first thermal resistance Rja1, the second thermal resistance Rja2, the third thermal resistance Rja3, and the following formula, the average thermal resistance Rja of the security chip is determined.

[0054] Rja = (Rja1 + Rja2 + Rja3) / 3.

[0055] Of course, the first three steps mentioned above can also be performed simultaneously. In addition, for chips with high power consumption, the chip can be set to more power consumption modes based on power consumption, and then the process described above can be executed similarly to determine the lowest ambient temperature TDHn when the chip's temperature alarm module alarms and the chip's actual power consumption Pn, and the chip's average thermal resistance can be calculated similarly to the four formulas mentioned above.

[0056] Specifically, the average thermal resistance of the chip can be determined according to the following steps 1-9.

[0057] Step 1: Fix the security chip 1 onto the printed circuit board (PCB) 2, and connect the power supply (VCC) and ground (GND). Then, place it in the controlled temperature chamber 10. Figure 2 As shown.

[0058] Step 2: Set the security chip 1 to operate in mode 1 (e.g., low power mode), and set the temperature of the controllable constant temperature chamber 10 to the initial value (e.g., 50°C).

[0059] Step 3: Once the temperature stabilizes, activate the temperature alarm module of safety chip 1 for detection.

[0060] Step 4-1: If the temperature alarm module does not issue an alarm (i.e., the junction temperature upper limit alarm is not triggered), the operating temperature of the controllable constant temperature chamber 10 is slowly increased at a temperature change rate of 0.5℃ / minute until the chip temperature alarm module issues an alarm. The ambient temperature TDH1 (i.e., the lowest ambient temperature under mode 1) at the time of the first alarm is recorded, and the voltage and current of each power supply of the safety chip are recorded to obtain the actual power consumption P1.

[0061] Step 4-2: If the temperature alarm module issues an alarm (i.e. triggers the junction temperature upper limit alarm), the operating temperature of the controllable constant temperature chamber 10 is slowly reduced at a temperature change rate of 0.5℃ / minute until the temperature alarm module of the chip stops alarming. The ambient temperature TDH1 at the time of the last alarm (i.e. the lowest ambient temperature under mode 1) is recorded, and the voltage and current of each power supply of the safety chip are recorded to obtain the actual power consumption P1.

[0062] It should be noted that either step 4-1 or step 4-2 can be performed.

[0063] Step 5: Set the safety chip 1 to work in mode 2 (e.g., medium power consumption mode), set the temperature of the controllable constant temperature chamber 10 to the initial value (e.g., 50℃), and follow steps 4-1 or 4-2 to record the ambient temperature TDH2 (i.e., the lowest ambient temperature in mode 2) when the chip's temperature alarm module alarms, and record the voltage and current of each power supply of the chip to obtain the actual power consumption P2.

[0064] Step 6: Set the security chip 1 to work in mode 3 (e.g., high power mode), set the temperature of the controllable constant temperature chamber 10 to the initial value (e.g., 50°C), and follow steps 4-1 or 4-2 to record the ambient temperature TDH3 (i.e., the lowest ambient temperature in mode 3) when the chip's temperature alarm module alarms, and record the voltage and current of each power supply of the chip to obtain the actual power consumption P3.

[0065] Step 7: Set the security chip 1 to work in mode 4 (e.g., ultra-high power consumption mode), set the temperature of the controllable constant temperature chamber 10 to the initial value (e.g., 50°C), and execute according to step 4-1 or 4-2 to record the ambient temperature TDH4 (i.e., the lowest ambient temperature in mode 4) when the chip's temperature alarm module alarms, and record the voltage and current of each power supply of the chip to obtain the actual power consumption P4.

[0066] Step 8: Derive the three sets of thermal resistance values ​​for the chip using the following three formulas.

[0067] Rja1 = (TDH2 - TDH1) / (P2 - P1);

[0068] Rja2 = (TDH3 - TDH2) / (P3 - P2); and

[0069] Rja3=(TDH4-TDH3) / (P4-P3).

[0070] Step 9: Determine the average thermal resistance Rja of security chip 1 = (Rja1 + Rja2 + Rja3) / 3.

[0071] This embodiment utilizes the alarm function of the temperature alarm module in the security chip, setting four power consumption modes and collecting the lowest ambient temperature value when the temperature alarm module generates an alarm. Using the actual power consumption and corresponding ambient temperature values ​​for these four power consumption modes, the average thermal resistance of the chip is calculated. Because four modes are set, it is convenient to calculate the chip's thermal resistance across three power consumption ranges and then average the results, making the calculation more accurate.

[0072] It should be noted that security chips typically do not include sensors and AD samplers, so the thermal resistance of security chips cannot be obtained through direct testing.

[0073] In summary, this invention creatively provides the ambient temperature for the safety chip to operate under multiple power consumption modes through a controllable constant temperature chamber; then, a temperature acquisition module regulates the ambient temperature provided by the controllable constant temperature chamber and acquires multiple lowest ambient temperatures at which the temperature alarm module of the safety chip issues an alarm under the multiple power consumption modes; next, an oscilloscope acquires multiple actual power consumptions of the safety chip at the multiple lowest ambient temperatures; finally, a thermal resistance determination module determines the average thermal resistance of the safety chip based on the multiple lowest ambient temperatures and the multiple actual power consumptions. Therefore, this invention can simply and effectively determine the average thermal resistance of the safety chip using the ambient temperature values ​​at which the temperature alarm module inside the safety chip issues an alarm under multiple power consumption modes and the corresponding actual power consumption of the chip. Furthermore, the cost of this testing system is low.

[0074] Figure 3 This is a flowchart of a thermal resistance testing method provided in an embodiment of the present invention. Figure 3 As shown, the testing method may include: step S301, providing the ambient temperature for the security chip to operate under multiple power consumption modes through a controllable constant temperature chamber; step S302, adjusting the ambient temperature provided by the controllable constant temperature chamber through a temperature acquisition module, and acquiring multiple lowest ambient temperatures when the temperature alarm module of the security chip issues an alarm under the multiple power consumption modes; step S303, acquiring multiple actual power consumptions of the security chip under the multiple lowest ambient temperatures through an oscilloscope; and step S304, determining the average thermal resistance of the security chip based on the multiple lowest ambient temperatures and the multiple actual power consumptions through a thermal resistance determination module.

[0075] For specific details and benefits of the thermal resistance testing method provided by this invention, please refer to the above description of the thermal resistance testing system, which will not be repeated here.

[0076] The preferred embodiments of the present invention have been described in detail above with reference to the accompanying drawings. However, the present invention is not limited to the specific details of the above embodiments. Within the scope of the technical concept of the present invention, various simple modifications can be made to the technical solution of the present invention, and these simple modifications all fall within the protection scope of the present invention.

[0077] It should also be noted that the various specific technical features described in the above specific embodiments can be combined in any suitable manner without contradiction. In order to avoid unnecessary repetition, the present invention will not describe the various possible combinations separately.

[0078] Those skilled in the art will understand that all or part of the steps in the methods of the above embodiments can be implemented by a program instructing related hardware. This program is stored in a storage medium and includes several instructions to cause a microcontroller, chip, or processor to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as a USB flash drive, a portable hard drive, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk.

[0079] Furthermore, various different embodiments of the present invention can be combined in any way, as long as they do not violate the spirit of the present invention, they should also be regarded as the content disclosed by the present invention.

Claims

1. A thermal resistance testing system, characterized in that, The testing system includes: A controllable temperature chamber is used to provide the ambient temperature for safe chip operation in multiple power consumption modes; The temperature acquisition module is used to regulate the ambient temperature provided by the controllable constant temperature chamber and to acquire multiple minimum ambient temperatures when the temperature alarm module of the security chip issues an alarm under multiple power consumption modes. An oscilloscope is used to acquire multiple actual power consumptions of the security chip at the multiple lowest ambient temperatures; and A thermal resistance determination module is used to determine the average thermal resistance of the security chip based on the plurality of lowest ambient temperatures and the plurality of actual power consumptions. The temperature acquisition module includes: The first control unit is used to control the increase of the ambient temperature provided by the controllable constant temperature chamber when the temperature alarm module does not issue an alarm in any of the multiple power consumption modes. The first acquisition unit is used to determine the ambient temperature at which the temperature alarm module first issues an alarm in any power consumption mode as the lowest ambient temperature at which the temperature alarm module issues an alarm in any power consumption mode. The second control unit is configured to control and reduce the ambient temperature provided by the controllable constant temperature chamber when the temperature alarm module issues an alarm in any of the multiple power consumption modes; and The second acquisition unit is used to determine the ambient temperature at which the temperature alarm module last issued an alarm in any power consumption mode as the lowest ambient temperature at which the temperature alarm module issued an alarm in any power consumption mode.

2. The testing system according to claim 1, characterized in that, The plurality of power consumption modes include at least two of the following: low power consumption mode, medium power consumption mode, high power consumption mode, and ultra-high power consumption mode.

3. The testing system according to claim 1, characterized in that, The controllable increase in the ambient temperature provided by the controllable constant temperature chamber includes: The ambient temperature provided by the controllable constant temperature chamber is increased at a first temperature change rate.

4. The testing system according to claim 1, characterized in that, The control to reduce the ambient temperature provided by the controllable constant temperature chamber includes: The ambient temperature provided by the controllable constant temperature chamber is reduced by controlling the second temperature change rate.

5. The testing system according to any one of claims 2-4, characterized in that, When the multiple power consumption modes include low power consumption mode, medium power consumption mode, high power consumption mode, and ultra-high power consumption mode, the thermal resistance determination module includes: The first thermal resistance determination unit is used to determine the first thermal resistance of the security chip based on the lowest ambient temperature and actual power consumption corresponding to the low power consumption mode and the lowest ambient temperature and actual power consumption corresponding to the medium power consumption mode. The second thermal resistance determination unit is used to determine the second thermal resistance of the security chip based on the lowest ambient temperature and actual power consumption corresponding to the medium power consumption mode and the lowest ambient temperature and actual power consumption corresponding to the high power consumption mode. The third thermal resistance determination unit is used to determine the third thermal resistance of the security chip based on the lowest ambient temperature and actual power consumption corresponding to the high power consumption mode and the lowest ambient temperature and actual power consumption corresponding to the ultra-high power consumption mode; and An average thermal resistance determination unit is used to determine the average thermal resistance of the security chip based on the first thermal resistance, the second thermal resistance, and the third thermal resistance.

6. The testing system according to claim 1, characterized in that, The temperature acquisition module is the first logic circuit.

7. The testing system according to claim 1, characterized in that, The thermal resistance determination module is a second logic circuit.

8. A method for testing thermal resistance, characterized in that, The testing method includes: A controllable constant temperature chamber provides the ambient temperature for the safe chip to operate in multiple power consumption modes; The ambient temperature provided by the controllable constant temperature chamber is regulated by the temperature acquisition module, and multiple lowest ambient temperatures are collected when the temperature alarm module of the security chip issues an alarm under multiple power consumption modes. The actual power consumption of the security chip at the lowest possible ambient temperatures was collected using an oscilloscope; and The thermal resistance determination module determines the average thermal resistance of the security chip based on the multiple lowest ambient temperatures and the multiple actual power consumptions. The temperature acquisition module includes: The first control unit is used to control the increase of the ambient temperature provided by the controllable constant temperature chamber when the temperature alarm module does not issue an alarm in any of the multiple power consumption modes. The first acquisition unit is used to determine the ambient temperature at which the temperature alarm module first issues an alarm in any power consumption mode as the lowest ambient temperature at which the temperature alarm module issues an alarm in any power consumption mode. The second control unit is configured to control and reduce the ambient temperature provided by the controllable constant temperature chamber when the temperature alarm module issues an alarm in any of the multiple power consumption modes; and The second acquisition unit is used to determine the ambient temperature at which the temperature alarm module last issued an alarm in any power consumption mode as the lowest ambient temperature at which the temperature alarm module issued an alarm in any power consumption mode.

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