Electronic devices and methods for waking electronic devices from sleep mode
By introducing a low-power threshold detection mode and an acceleration detection mechanism in sleep mode, the problems of slow startup and increased power consumption of electronic devices are solved, and accurate wake-up and power consumption of electronic devices are achieved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- MEMSIC SEMICON WUXI
- Filing Date
- 2022-11-15
- Publication Date
- 2026-05-26
AI Technical Summary
Existing electronic devices suffer from slow startup or frequent false triggers when resuming normal operation from sleep mode, leading to increased power consumption.
In the sleep mode, a low-power threshold detection mode is introduced. The acceleration is detected by the low-power threshold detection circuit to determine whether it exceeds the predetermined threshold range, and then decide whether to enter the continuous working mode. Different sampling rate strategies are combined to reduce power consumption.
It enables electronic devices to be accurately and promptly woken up from sleep mode, reducing the power consumption of electronic devices.
Smart Images

Figure CN115793834B_ABST
Abstract
Description
[Technical Field]
[0001] This invention relates to the field of circuit design technology, and more particularly to an electronic device and a method for waking up the electronic device from sleep mode. [Background Technology]
[0002] Modern electronic products, especially consumer products, have increasingly higher power consumption requirements. In particular, mobile wearable devices, although they have sleep modes, often suffer from slow startup or frequent false triggers when resuming normal operation or protection mechanisms, which in turn constantly sacrifices power consumption.
[0003] Therefore, it is necessary to propose an improved technical solution to overcome the above problems. [Summary of the Invention]
[0004] One of the objectives of this invention is to provide an electronic device and a method for waking the electronic device from sleep mode, which can accurately and timely wake the electronic device from sleep mode, thereby reducing the power consumption of the electronic device.
[0005] According to one aspect of the present invention, the present invention provides a method for waking an electronic device from a sleep mode. The electronic device has a sleep mode, a continuous operating mode, and a low-power threshold detection mode. When the electronic device is in sleep mode, if it receives an intermittent low-power threshold detection enable signal, it enters the low-power threshold detection mode. When the electronic device is in sleep mode, if it receives a sampling request action signal or acceleration data exceeding a first threshold range, it enters the continuous operating mode. When the electronic device is in the continuous operating mode, if it does not receive the sampling request action signal within a predetermined time period or the acceleration data does not exceed a second threshold range within the predetermined time period, it enters the sleep mode. When the electronic device is in the low-power threshold detection mode, the low-power threshold detection circuit operates, and the low-power threshold detection circuit performs acceleration detection on the electronic device to determine whether the detected acceleration exceeds a third predetermined threshold range. If not, the low-power threshold detection mode continues until it returns to the sleep mode; if yes, it enters the continuous operating mode.
[0006] Furthermore, when the electronic device is in low-power threshold detection mode, if it receives the sampling request action signal, it enters the continuous working mode.
[0007] Furthermore, in the continuous operating mode, active sampling is performed at a first sampling rate; in the low-power threshold detection mode, sampling is performed at a second sampling rate; the second sampling rate is lower than the first sampling rate.
[0008] Furthermore, the low-power threshold detection circuit includes: a data selector; an accumulation counter, the input of which is connected to the X / Y / Z axis channels of the sensor in the electronic device via the data selector, the accumulation counter being used to accumulate the accelerations of the X, Y, and Z axes in the current sampling period to obtain a current accumulation value, the current accumulation value being output by the output of the accumulation counter; a previous accumulation value memory, the input of which is connected to the output of the accumulation counter, being used to store the current accumulation value output by the accumulation counter in the current sampling period, and to output the stored previous accumulation value through its output in the next sampling period; a subtractor, which is used to take the difference between the current accumulation value output by the accumulation counter and the previous accumulation value output by the previous accumulation value memory to obtain the difference in accumulation values; and a comparison circuit, the input of which is connected to the output of the subtractor, the comparison circuit being used to determine whether the difference in accumulation values output by the subtractor exceeds a third predetermined threshold range, and to output the corresponding judgment result WAKEUP through its output.
[0009] Furthermore, when the difference between the cumulative values output by the subtractor exceeds the third predetermined threshold range, the judgment result WAKEUP output by the comparison circuit is at the first logic level; when the difference between the cumulative values output by the subtractor does not exceed the third predetermined threshold range, the judgment result WAKEUP output by the comparison circuit is at the second logic level.
[0010] Furthermore, the third predetermined threshold range is located between the upper threshold and the lower threshold, wherein the upper threshold is greater than the lower threshold.
[0011] Furthermore, the comparison circuit includes: an upper limit comparator, whose first input terminal is connected to the upper limit threshold and whose second input terminal is connected to the output terminal of the subtractor, the upper limit comparator being used to compare the difference between the upper limit threshold and the cumulative value output by the subtractor, and outputting a first comparison result upper_cmp through its output terminal; a lower limit comparator, whose first input terminal is connected to the lower limit threshold and whose second input terminal is connected to the output terminal of the subtractor, the lower limit comparator being used to compare the difference between the lower limit threshold and the cumulative value output by the subtractor, and outputting a second comparison result lower_cmp through its output terminal; and a logic unit, which performs logical operations based on the first comparison result and the second comparison result, and outputs the judgment result.
[0012] Furthermore, the first and second input terminals of the upper limit comparator are respectively its inverting input terminal and its non-inverting input terminal; the first and second input terminals of the lower limit comparator are respectively its inverting input terminal and its inverting input terminal; and the logic unit 256 is an OR gate.
[0013] Furthermore, the low-power threshold detection circuit uses the exact same X / Y / Z channel multiplexing sequence as the continuous operating mode.
[0014] Furthermore, the upper limit threshold and the lower limit threshold are set by registers, and the upper limit threshold and the lower limit threshold are opposite numbers; and / or the sampling rate of the accumulator counter is generated by a digital timing module, and the sampling rate of the accumulator counter ranges from 0.25Hz to 25Hz.
[0015] According to another aspect of the present invention, an electronic device is provided, which has a sleep mode, a continuous operating mode, and a low-power threshold detection mode. When the electronic device is in sleep mode, if it receives an intermittent low-power threshold detection enable signal, it enters the low-power threshold detection mode; if it receives a sampling request action signal or acceleration data exceeds a first threshold range, it enters the continuous operating mode. When the electronic device is in the continuous operating mode, if it does not receive the sampling request action signal within a predetermined time period or the acceleration data does not exceed a second threshold range within the predetermined time period, it enters the sleep mode. When the electronic device is in the low-power threshold detection mode, a low-power threshold detection circuit operates, and the low-power threshold detection circuit performs acceleration detection on the electronic device to determine whether the detected acceleration exceeds a third predetermined threshold range. If not, the low-power threshold detection mode continues until it returns to the sleep mode; if yes, it enters the continuous operating mode.
[0016] Compared with existing technologies, this invention adds an LPTD mode between SLEEP mode and CWAKE mode, which can accurately and timely wake up electronic devices from sleep mode, thereby reducing the power consumption of electronic devices. [Attached Image Description]
[0017] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort. Wherein:
[0018] Figure 1 This is a schematic diagram of the state switching of an electronic device in one embodiment of the present invention;
[0019] Figure 2 This is a circuit diagram of a low-power threshold detection circuit in one embodiment of the present invention.
Detailed Implementation Methods
[0020] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.
[0021] The term "an embodiment" or "embodiment" as used herein refers to a specific feature, structure, or characteristic that may be included in at least one implementation of the invention. The phrase "in one embodiment" appearing in different places throughout this specification does not necessarily refer to the same embodiment, nor is it a single or selective embodiment that excludes other embodiments. Unless otherwise specified, the terms "connected," "linked," and "connected" used herein to indicate electrical connection refer to direct or indirect electrical connection.
[0022] Please refer to Figure 1 As shown, this is a schematic diagram of the state switching of an electronic device in one embodiment of the present invention. Based on Figure 1 The diagram illustrating the state transitions of an electronic device shows how to wake the device from sleep mode. The following is based on... Figure 1 This section provides a detailed explanation of how to wake an electronic device from sleep mode.
[0023] The electronic device of this invention has a SLEEP mode (i.e., sleep mode) 110, a CWAKE mode (i.e., normal working mode or continuous working mode) 120, and an LPTD mode (i.e., low power threshold detection mode) 130. The default mode is the SLEEP mode (i.e., sleep mode) 110.
[0024] When the electronic device is in SLEEP mode 110, if it receives an intermittent low-power threshold detection enable signal lptd_en, it enters LPTD mode 130, at which point the low-power threshold detection circuit is enabled (see details). Figure 2 (As shown) work.
[0025] When the electronic device is in SLEEP mode 110, if it receives a sampling request action signal cwake_en (for example, the user generates the sampling request action signal cwake_en through a button on the electronic device) or the acceleration data exceeds a first threshold range, it enters CWAKE mode 120.
[0026] When the electronic device is in CWAKE mode 120, if it does not receive the sampling request action signal cwake_en within a predetermined time or if the acceleration data does not exceed the second threshold range within a predetermined time, it will enter SLEEP mode 110.
[0027] When the electronic device is in LPTD mode 130, the low power threshold detection circuit (see details) is in this state. Figure 2When the low-power threshold detection circuit operates, it detects the acceleration of the electronic device and determines whether the detected acceleration exceeds the third predetermined threshold range (or determines whether the electronic device is active). If not (i.e., N), it continues in LPTD mode 130 until it returns to SLEEP mode 110; if yes (i.e., Y), it enters CWAKE mode 120.
[0028] When the electronic device is in LPTD mode 130, if it receives the sampling request action signal cwake_en, it will enter CWAKE mode 120.
[0029] Please refer to Figure 2 As shown, it is a circuit diagram of a low-power threshold detection circuit in one embodiment of the present invention. Figure 2 The low-power threshold detection circuit shown includes a selection mux 210, an accumulation counter 220, a previous accumulation value memory 230, a subtractor 240, and a comparator circuit 250.
[0030] The input terminal of the data selector 210 is connected to the X / Y / Z axis channel of the sensor in the electronic device, its control terminal 2 receives the channel selection signal CH_SEL[1:0], and its output terminal 1 is connected to the input terminal of the cumulative counter 220.
[0031] The input terminal of the accumulator counter 220 is connected to the X / Y / Z axis channels of a sensor in an electronic device via a data selector 210. The accumulator counter 220 is used to accumulate the accelerations of the X, Y, and Z axes during the current sampling period to obtain the current accumulated value, which is output from the output terminal of the accumulator counter 220. Alternatively, the accumulator counter 220 accumulates the accelerations of the X, Y, and Z axes during the current sampling period, and the current accumulated value (or total value) stored in the accumulator counter 220 can be expressed as:
[0032] Total LPTD Activity=Δ(X+Y+Z)
[0033] The input of the previous accumulation value memory 230 is connected to the output of the accumulation counter 220. It is used to store the current accumulation value output by the accumulation counter 220 in the current sampling period, and output the stored previous accumulation value through its output in the next sampling period.
[0034] Subtractor 240 is used to take the difference between the current accumulated value output by the accumulated counter 220 and the previous accumulated value output by the previous accumulated value memory 230 to obtain the difference in accumulated values.
[0035] The input of the comparator circuit 250 is connected to the output of the subtractor 240. The comparator circuit 250 is used to determine whether the difference between the accumulated values output by the subtractor 240 exceeds a third predetermined threshold range, and outputs the corresponding judgment result WAKEUP through its output. When the difference between the accumulated values output by the subtractor 240 exceeds the third predetermined threshold range, the judgment result WAKEUP output by the comparator circuit 250 is a first logic level (e.g., high level); when the difference between the accumulated values output by the subtractor 240 does not exceed the third predetermined threshold range, the judgment result WAKEUP output by the comparator circuit 250 is a second logic level (e.g., low level).
[0036] exist Figure 2 In the embodiment shown, the third predetermined threshold range is located between the upper threshold LPTD_THU and the lower threshold LPTD_THL, and the upper threshold LPTD_THU is greater than the lower threshold LPTD_THL. The comparison circuit 250 includes an upper limit comparator 252, a lower limit comparator 252, and a logic unit 256. The first input of the upper limit comparator 252 is connected to the upper limit threshold LPTD_THU, and its second input is connected to the output of the subtractor 240. The upper limit comparator 252 compares the difference between the upper limit threshold LPTD_THU and the accumulated value output by the subtractor 240, and outputs a first comparison result, upper_cmp. The first input of the lower limit comparator 254 is connected to the lower limit threshold LPTD_THL, and its second input is connected to the output of the subtractor 240. The lower limit comparator 254 compares the difference between the lower limit threshold LPTD_THL and the accumulated value output by the subtractor 240, and outputs a second comparison result, lower_cmp. The logic unit 256 performs logical operations based on the first comparison result, upper_cmp, and the second comparison result, lower_cmp, and outputs a judgment result, WAKEUP.
[0037] When the electronic device is in LPTD mode 130, the digital state machine is searching for the WAKEUP transition edge. Once a WAKEUP transition to the first logic level is detected (indicating that the difference between the accumulated values output by subtractor 240 exceeds a third predetermined threshold range), the digital state machine transitions the electronic device to CWAKE mode 120 and begins active sampling at the faster CWAKE mode 120 sampling rate. Alternatively, in CWAKE mode 120, active sampling is performed at the first sampling rate; in LPTD mode 130, sampling is performed at a second sampling rate, where the second sampling rate is lower than the first sampling rate.
[0038] exist Figure 2In the specific embodiment shown, the first and second input terminals of the upper limit comparator 252 are its non-inverting and inverting input terminals, respectively; the first and second input terminals of the lower limit comparator 254 are its inverting and non-inverting input terminals, respectively; and the logic unit 256 is an OR gate.
[0039] exist Figure 2 In the illustrated embodiment, the upper limit threshold LPTD_THU and the lower limit threshold LPTD_TH are set by the register, which applies the same threshold to both sides of the center of 0g to set the upper limit threshold LPTD_THU and the lower limit threshold LPTD_TH, that is, the upper limit threshold LPTD_THU and the lower limit threshold LPTD_TH are opposite numbers; the sampling rate sysclk of the cumulative counter 220 is generated by the digital timing module, and the sampling rate of the cumulative counter 220 ranges from 0.25Hz to 25Hz.
[0040] It should be noted that, in Figure 2 In the illustrated embodiment, the low-power threshold detection circuit is an analog low-power section that uses an accumulator counter 220 to accumulate acceleration data from the sensor's X / Y / Z axis channels at a slow sampling frequency. The low-power threshold detection circuit operates independently of the data Sigma-Delta A / D Modulator in CWAKE mode 120, does not use a FIFO to store data, and samples acceleration in an extremely low-power mode. The low-power threshold detection circuit uses the exact same X / Y / Z axis channel multiplexing sequence as CWAKE mode 120, but instead of using a digital Sinc filter to accumulate 1-bit ADC samples, it uses a dedicated accumulator counter 220.
[0041] In summary, this invention incorporates a low-power threshold-based trigger detection mechanism between SLEEP mode 110 and CWAKE mode 120. This mechanism adds an LPTD (Low Power Threshold Detection) mode 130 function to the sensor circuit. First, it accumulates the accelerations of the X, Y, and Z axes in the current sampling period to obtain the current accumulated value. Then, it subtracts the current accumulated value from the previous accumulated value in the previous sampling period to obtain the difference in accumulated values. Finally, it determines whether the difference in accumulated values output by the subtractor 240 exceeds a third predetermined threshold range and generates a corresponding judgment result, WAKEUP. When the judgment result WAKEUP indicates that the difference in accumulated values exceeds the third predetermined threshold range, it enters CWAKE mode 120. This allows for accurate and timely waking of the electronic device from sleep mode, thereby reducing the power consumption of the electronic device.
[0042] In this invention, terms such as “connection,” “linked,” “connected,” and “joined” that indicate electrical connection, unless otherwise specified, indicate direct or indirect electrical connection.
[0043] The above description is only a preferred embodiment of the present invention. The scope of protection of the present invention is not limited to the above embodiments. Any equivalent modifications or changes made by those skilled in the art based on the disclosure of the present invention should be included within the scope of protection set forth in the claims.
Claims
1. A method for waking an electronic device from sleep mode, characterized in that, The electronic device has a sleep mode, a continuous working mode, and a low-power threshold detection mode. When the electronic device is in sleep mode, if it receives an intermittent low power threshold detection enable signal, it enters the low power threshold detection mode; if it receives a sampling request action signal or acceleration data exceeding the first threshold range, it enters the continuous working mode. When the electronic device is in continuous working mode, if it does not receive the sampling request action signal within a predetermined time period or if the acceleration data does not exceed the second threshold range within the predetermined time period, it enters sleep mode. When the electronic device is in low power threshold detection mode, the low power threshold detection circuit works. The low power threshold detection circuit detects the acceleration of the electronic device and determines whether the detected acceleration exceeds a third predetermined threshold range. If not, the low power threshold detection mode continues until it returns to the sleep mode. If so, then enter the continuous working mode. The low-power threshold detection circuit includes: Data selector; An accumulation counter, whose input is connected to the X / Y / Z axis channels of a sensor in the electronic device via the data selector, is used to accumulate the accelerations of the X, Y, and Z axes during the current sampling period to obtain the current accumulated value, which is output from the output of the accumulation counter. The previous accumulated value memory has its input terminal connected to the output terminal of the accumulated counter. It is used to store the current accumulated value output by the accumulated counter in the current sampling period, and output the stored previous accumulated value through its output terminal in the next sampling period. A subtractor is used to take the difference between the current accumulated value output by the accumulated counter and the previous accumulated value output by the previous accumulated value memory to obtain the difference in accumulated values; A comparison circuit, whose input is connected to the output of the subtractor, is used to determine whether the difference between the cumulative values output by the subtractor exceeds a third predetermined threshold range, and outputs the corresponding judgment result WAKEUP through its output.
2. The method for waking an electronic device from sleep mode according to claim 1, characterized in that, When the electronic device is in low-power threshold detection mode, if it receives the sampling request action signal, it enters the continuous working mode.
3. The method for waking an electronic device from sleep mode according to claim 2, characterized in that, In the continuous operating mode, active sampling is performed at a first sampling rate; In the low-power threshold detection mode, sampling is performed at the second sampling rate; The second sampling rate is lower than the first sampling rate.
4. The method for waking an electronic device from sleep mode according to claim 1, characterized in that, When the difference between the cumulative values output by the subtractor exceeds the third predetermined threshold range, the judgment result WAKEUP output by the comparison circuit is the first logic level. When the difference between the cumulative values output by the subtractor does not exceed the third predetermined threshold range, the judgment result WAKEUP output by the comparison circuit is the second logic level.
5. The method for waking an electronic device from sleep mode according to claim 1, characterized in that, The third predetermined threshold range is located between the upper threshold and the lower threshold. The upper limit threshold is greater than the lower limit threshold.
6. The method for waking an electronic device from sleep mode according to claim 5, characterized in that, The comparison circuit includes: An upper limit comparator has its first input connected to the upper limit threshold and its second input connected to the output of the subtractor. The upper limit comparator is used to compare the difference between the upper limit threshold and the cumulative value output by the subtractor, and outputs the first comparison result upper_cmp through its output. A lower limit comparator has its first input connected to the lower limit threshold and its second input connected to the output of the subtractor. The lower limit comparator is used to compare the difference between the lower limit threshold and the cumulative value output by the subtractor, and outputs a second comparison result lower_cmp through its output. The logic unit performs logical operations based on the first comparison result and the second comparison result, and outputs the judgment result.
7. The method for waking an electronic device from sleep mode according to claim 6, characterized in that, The first and second input terminals of the upper limit comparator are its inverting input terminal and its non-inverting input terminal, respectively. The first and second input terminals of the lower limit comparator are its inverting input terminal and its non-inverting input terminal, respectively. The logic unit is an OR gate.
8. The method for waking an electronic device from sleep mode according to claim 1, characterized in that, The low-power threshold detection circuit uses the exact same X / Y / Z channel multiplexing sequence as the continuous operating mode.
9. The method for waking an electronic device from sleep mode according to claim 5, characterized in that, The upper and lower thresholds are set by registers, and the upper and lower thresholds are opposites; and / or The sampling rate of the accumulator counter is generated by a digital timing module, and the sampling rate of the accumulator counter ranges from 0.25 Hz to 25 Hz.
10. An electronic device, characterized in that, It features a sleep mode, a continuous working mode, and a low-power threshold detection mode. When the electronic device is in sleep mode, if it receives an intermittent low power threshold detection enable signal, it enters the low power threshold detection mode; if it receives a sampling request action signal or acceleration data exceeding the first threshold range, it enters the continuous working mode. When the electronic device is in continuous working mode, if it does not receive the sampling request action signal within a predetermined time period or if the acceleration data does not exceed the second threshold range within the predetermined time period, it enters sleep mode. When the electronic device is in low power threshold detection mode, the low power threshold detection circuit works. The low power threshold detection circuit detects the acceleration of the electronic device and determines whether the detected acceleration exceeds a third predetermined threshold range. If not, the low power threshold detection mode continues until it returns to the sleep mode. If so, then enter the continuous working mode. The low-power threshold detection circuit includes: Data selector; An accumulation counter, whose input is connected to the X / Y / Z axis channels of a sensor in the electronic device via the data selector, is used to accumulate the accelerations of the X, Y, and Z axes during the current sampling period to obtain the current accumulated value, which is output from the output of the accumulation counter. The previous accumulated value memory has its input terminal connected to the output terminal of the accumulated counter. It is used to store the current accumulated value output by the accumulated counter in the current sampling period, and output the stored previous accumulated value through its output terminal in the next sampling period. A subtractor is used to take the difference between the current accumulated value output by the accumulated counter and the previous accumulated value output by the previous accumulated value memory to obtain the difference in accumulated values; A comparison circuit, whose input is connected to the output of the subtractor, is used to determine whether the difference between the cumulative values output by the subtractor exceeds a third predetermined threshold range, and outputs the corresponding judgment result WAKEUP through its output.
11. The electronic device according to claim 10, characterized in that, When the electronic device is in low-power threshold detection mode, if it receives the sampling request action signal, it enters the continuous working mode. In the continuous operating mode, active sampling is performed at a first sampling rate; In the low-power threshold detection mode, sampling is performed at the second sampling rate; The second sampling rate is lower than the first sampling rate.