A task control device, an electronic device, and a storage medium
Through the kernel mapper and scheduler in the task control device, contextless switching between kernel threads and IO task management is realized, which solves the problems of inefficiency and execution sequence control in multi-threading technology, and improves the work efficiency of the computer.
Patent Information
- Application Number
- CN202211461847.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-11-17
- Publication Date
- 2025-07-25
- Estimated Expiration
- 2042-11-17
AI Technical Summary
Existing multithreading technologies have problems such as slow kernel thread context switching, high memory consumption, and inability to control the execution order between processes or threads, resulting in low computer work efficiency.
The task control device is adopted, including a kernel mapper and a scheduling unit. The kernel mapper is bound to the kernel thread, and the scheduler is associated with the task queue. The execution order and conditions in the task queue are adjusted by the scheduler to realize kernel-level switching-free task transmission and IO task blocking management.
It solves the problems of slow kernel thread context switching and IO task blocking, improves the computer's work efficiency and flexibility in task execution, and realizes efficient communication and sequential control between processes.
Smart Images

Figure CN115794390B_ABST
Abstract
Description
Background Art
[0002] With the changes in the information age, the data that computers need to process is increasing. The CPU (Central Processing Unit) of computers has evolved from single-core and single-thread to multi-core and multi-thread, and accordingly, multi-process and multi-thread development technologies can be evolved. However, in multi-process technologies, the context switching of kernel threads is slow, and a large amount of memory consumption is used to maintain communication between contexts. The execution order between processes or threads cannot be controlled, resulting in inefficient communication between processes. Although existing multi-thread technologies have solved the problems of efficient communication and its context switching, they still cannot solve the problem of large memory consumption. Traditional coroutines only solve the problem of IO blocking and still cannot solve the problem of the execution order between threads. Summary of the Invention
[0003] In view of this, the present invention provides a task control device, an electronic device, and a storage medium, which at least partially solve the technical problems existing in the prior art. The technical solution adopted by the present invention is as follows:
[0004] According to one aspect of the present application, a task control device is provided. The task control device is disposed in an electronic device. The electronic device has at least two cores, and each core has at least one kernel thread. The task control device includes:
[0005] A plurality of kernel mappers and a plurality of scheduling units. Each kernel mapper corresponds to a kernel thread. Each scheduling unit can be connected to any kernel mapper. Each scheduling unit includes a scheduler and a task queue associated with the scheduler. A plurality of tasks to be executed can be stored in each task queue;
[0006] The scheduler is configured to transfer the tasks to be executed in its corresponding task queue to the currently associated kernel mapper;
[0007] The kernel mapper is configured to transfer the received tasks to be executed to the kernel thread corresponding to it.
[0008] In an exemplary embodiment of the present application, when the task queue corresponding to the scheduler is empty, the connection relationship with the currently connected kernel mapper is disconnected.
[0009] In an exemplary embodiment of the present application, the kernel mapper is configured to obtain the context information of the task to be executed currently executed by its corresponding kernel thread. The context information includes the execution status of the corresponding task to be executed.
[0010] In an exemplary embodiment of the present application, when the kernel thread corresponding to the kernel mapper executes a task to be executed, the scheduling unit associated with the task to be executed saves the execution state of the current task to be executed every set time interval, and takes out the current task to be executed from the kernel thread through the kernel mapper, and inserts the task to be executed into the corresponding position in the task queue associated with the scheduler according to the execution state.
[0011] In an exemplary embodiment of the present application, if the kernel mapper currently associated with the scheduler has a task block, the connection relationship with the currently associated kernel mapper is disconnected, and a connection relationship with the kernel mapper in the idle state is established.
[0012] In an exemplary embodiment of the present application, the scheduler can delete the task to be executed corresponding to the task cancellation instruction from its corresponding task queue according to the received task cancellation instruction.
[0013] In an exemplary embodiment of the present application, the scheduler stores the execution order and execution conditions of each task to be executed in the task queue associated with it, and the task queue is a double-ended queue;
[0014] The scheduler is used to adjust the arrangement order of the tasks to be executed in its corresponding task queue according to the execution order and execution conditions.
[0015] In an exemplary embodiment of the present application, the scheduler stores the context information of each task to be executed in the task queue associated with it.
[0016] According to one aspect of the present application, a non-transitory computer-readable storage medium is provided, and at least one instruction or at least one program segment is stored in the storage medium, and the at least one instruction or the at least one program segment is loaded and executed by a processor to implement the task control device described above.
[0017] According to one aspect of the present application, an electronic device is provided, including a processor and the non-transitory computer-readable storage medium.
[0018] The present invention has at least the following beneficial effects:
[0019] The task control device of the present invention includes a kernel mapper and a scheduler associated therewith. Each kernel mapper is bound to a kernel thread, adjusting traditional kernel-level threads into user-level threads, enabling communication between processes without kernel-level context switching, and solving the problems of slow context switching and low execution efficiency. There is a corresponding task queue on each scheduler, and the task queue consists of several tasks to be executed. If one of the kernel mappers has a task block, that is, when the current task of the kernel mapper cannot be executed, the kernel mapper will switch the tasks to be executed after this task and the scheduler associated therewith to an idle kernel mapper, solving the problem of IO task block of the thread. Moreover, one kernel mapper can be connected to multiple schedulers, and the task queues associated with each scheduler are double-ended queues, so that any task to be executed in the task queue associated with the scheduler can adjust its corresponding execution order according to the context information, solving the problem that the execution order cannot be adjusted between existing threads. BRIEF DESCRIPTION OF THE DRAWINGS
[0020] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the following drawings are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings.
[0021] Figure 1 It is a block diagram of the task control device provided by the embodiment of the present invention;
[0022] Figure 2 It is a connection block diagram of an embodiment of the task control device provided by the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS
[0023] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the drawings in the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, rather than all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the scope of protection of the present invention.
[0024] With the advent of the information age and the increasing speed of information development, the computing amount required by computers is getting larger and larger. There are some problems in the existing multi-thread technology and multi-process technology of computers, such as slow context switching speed of kernel threads, large memory consumption required for context maintenance, and inability to control the execution order between processes or threads. These problems will affect the working efficiency of computers. Therefore, in order to solve the above problems, a task control device for controllable logic scheduling applied to multi-core computers is proposed.
[0025] The task control device is disposed within an electronic device. The electronic device used has at least two cores, and each core has at least one core thread; to adapt to the working environment of a multi-core computer.
[0026] As Figure 1 shown, the task control device includes: a number of core mappers and a number of scheduling units. Each core mapper corresponds to one core thread, and each scheduling unit can be connected to any core mapper. The scheduling unit is used for task scheduling. Each scheduling unit includes a scheduler and a task queue associated with the scheduler. A number of tasks to be executed can be stored in each task queue. The tasks to be executed are tasks that each core thread needs to execute and process. The scheduler represents the context environment required for the tasks to be executed. It is the maximum logical core number of the central processing unit of the computer and is used to transfer the tasks to be executed in its corresponding task queue to the currently associated core mapper, establish a transmission relationship between the tasks to be executed waiting to be executed and its associated core mapper, and control its associated core mapper to establish or disconnect an association relationship with different tasks to be executed, so that each task to be executed in its associated task queue can obtain a running opportunity. The core mapper is equivalent to the mapping of its corresponding core thread and is used to transfer the received tasks to be executed to its corresponding core thread for the core thread to process the tasks.
[0027] Each core mapper is correspondingly bound to one core thread, while one core mapper can be associated with multiple schedulers, and one scheduler is associated with a task queue composed of multiple tasks to be executed. That is, the binding between the core mapper and the core thread is fixed, the binding between the core mapper and the scheduler is dynamic, and the binding between the scheduler and the task queue is also dynamic. Dynamic binding means that it can be switched at any time, and fixed binding means that it cannot be switched.
[0028] Since each core mapper is only bound to one core thread, there is no problem of kernel-level context switching, thus solving the problems of slow existing context switching and low efficiency of core thread task execution.
[0029] The context information of each task to be executed in the task queue associated with each scheduler is stored in each scheduler. The core mapper is used to obtain the context information of the task to be executed currently executed by its corresponding core thread. The context information includes the execution status of the corresponding task to be executed. The context information of the code segment of each task to be executed is saved in the scheduler associated with it, solving the problems of the inability of a multi-core central processing unit computer to share communication and the inability to perceive the running status of the code segment of the task to be executed.
[0030] When the kernel thread is executing work, the scheduler of the kernel mapper associated with it obtains the context memory information of the current work, extracts a to-be-executed task waiting to run from the task queue associated with the scheduler, and hands it over to the kernel mapper associated with it. The kernel mapper then sends this to-be-executed task to the kernel thread for execution work.
[0031] When the task queue corresponding to the scheduler is empty, the connection relationship with the currently connected kernel mapper is disconnected, making this scheduler, its associated kernel mapper, and kernel thread idle, indicating that there are no to-be-executed tasks to run on this kernel thread. If the kernel mapper currently associated with the scheduler has a task block, the connection relationship with the currently associated kernel mapper is disconnected, and a connection relationship is established with an idle kernel mapper. Task block means that the task currently being executed by the kernel mapper is in a stalled state. For example, due to network problems or task execution conditions, the current task cannot be executed. Since this task cannot be executed, its subsequent to-be-executed tasks cannot be executed either, which causes the current kernel mapper to be in a working stop state, while the other kernel mappers are in an idle state, affecting the working efficiency of the kernel thread. Therefore, in order to improve the working efficiency of the kernel thread, it is necessary to switch the scheduler of the kernel thread with a task block, along with the remaining to-be-executed tasks, to an idle kernel mapper, so that each kernel mapper is in a working state, and the phenomenon of one kernel thread being blocked while the other kernel threads are idle does not occur, thereby improving the working efficiency of all kernel threads and solving the existing problem of IO task block.
[0032] Each scheduler also stores the execution order and execution conditions of each to-be-executed task in the task queue associated with it. The task queue is a double-ended queue, and the scheduler can adjust the arrangement order of the to-be-executed tasks in its corresponding task queue according to the execution order and execution conditions, and perform operations such as appending to the head or tail of the task queue and deleting tasks at any time.
[0033] The scheduler can adjust the execution order of each pending task in the task queue associated with it according to execution conditions or other factors. The scheduler places the pending tasks to be adjusted at the head or tail or any position of the task queue associated with it to adjust the execution order of the entire task queue. For example, there are four pending tasks A, B, C, and D in the task queue associated with a scheduler. At this time, the execution order of this task queue is A, B, C, D. However, due to the temporary change of the execution conditions, it is necessary for the pending task C to be executed before B. At this time, the scheduler needs to adjust the pending task C to between the pending task A and the pending task B. The execution order of the adjusted task queue becomes A, C, B, D to meet the execution conditions at the current moment. The scheduler can also delete the pending task corresponding to the task cancellation instruction from its corresponding task queue according to the received task cancellation instruction. For example, before the four pending tasks A, B, C, and D are executed, the scheduler receives a task cancellation instruction to cancel the pending task C. At this time, the scheduler deletes the pending task C from the task queue, so that the execution order of the task queue becomes A, B, D, achieving the purpose of completely controlling the execution order, suspension, and exit of the code segments of the pending tasks.
[0034] In addition, to prevent all kernel mappers from being blocked by IO tasks and occupying all kernel mappers, resulting in other pending tasks being unable to run, an operation of forcibly yielding the execution right is also taken. When the kernel thread corresponding to the kernel mapper is executing a pending task and an IO task block occurs, it checks the running status of the other kernel mappers. If there are idle kernel mappers among the other kernel mappers, the remaining pending tasks in the task queue are switched to the idle kernel mappers. If there are no idle kernel mappers among the other kernel mappers, an operation of forcibly yielding the execution right is taken. Forcibly yielding the execution right means that the scheduling unit associated with the pending task saves the execution status of the current pending task every set time period, and takes out the current pending task from the kernel thread through the kernel mapper, and inserts the pending task into the corresponding position in the task queue associated with the scheduler according to the execution status. Forcibly yielding the execution right is explained as: each pending task only runs for a set time period, such as 2 ms. When the running time exceeds the set time period, regardless of whether this pending task has completed running, the execution status of this pending task is paused and saved, and this pending task is switched to the end of the corresponding task queue and waits to be executed again. When this pending task is sent to the kernel thread for execution again, its associated scheduler will send the saved latest execution status that has not been completed to the kernel thread, so that the kernel thread continues to execute this pending task. Forcibly yielding the execution right can prevent all kernel mappers from being in the IO task blocked state, giving each pending task a chance to run and further improving the processing efficiency of the kernel thread.
[0035] As Figure 2 shown is a connection block diagram of an embodiment of the task control device of the present invention. There are 4 kernel threads, and the corresponding kernel mappers are also 4, which are in a one-to-one binding connection. There are 5 schedulers, and each kernel mapper can be connected to multiple schedulers. The number of schedulers connected to each kernel mapper is uncertain. There is a task queue on each scheduler. There are 4 tasks to be executed, namely A, B, C, and D, in the task queue, which are executed in sequence. If an IO task block occurs in the first scheduler of the first kernel mapper, the first kernel mapper will switch all the tasks to be executed after the scheduler carrying the blocked task to the idle kernel mapper. If all kernel mappers are in the working state, an operation of forcibly yielding the execution right is performed, so that the blocked task to be executed moves to the end of the corresponding task queue after executing for a set time, and the subsequent tasks to be executed are sent to the kernel thread in sequence for operation.
[0036] The task control device of the present invention includes a kernel mapper and a scheduler associated therewith. Each kernel mapper is bound to a kernel thread, and the traditional kernel-level thread is adjusted to a user-level thread, enabling communication between processes without the need for kernel-level context switching, thus solving the problems of slow context switching and low execution efficiency. There is a corresponding task queue on each scheduler. The task queue consists of several tasks to be executed. If a task block occurs in one of the kernel mappers, that is, when the current task of the kernel mapper cannot be executed, the kernel mapper will switch the tasks to be executed after the task and the associated scheduler to the idle kernel mapper, solving the problem of IO task block of the thread. Moreover, one kernel mapper can be connected to multiple schedulers, and the task queue associated with each scheduler is a double-ended queue, so that any task to be executed in the task queue associated with the scheduler can adjust its corresponding execution order according to the context information, thus solving the problem that the execution order cannot be adjusted between existing threads.
[0037] An embodiment of the present invention also provides a computer program product, which includes program code. When the program product runs on an electronic device, the program code is used to cause the electronic device to execute the steps in the methods in the devices according to various exemplary embodiments of the present invention described above in this specification.
[0038] In addition, although the steps of the methods in the present disclosure are described in a specific order in the drawings, this does not require or imply that these steps must be executed in that specific order, or that all the steps shown must be executed to achieve the desired result. Additionally or alternatively, some steps may be omitted, multiple steps may be combined into one step for execution, and / or one step may be decomposed into multiple steps for execution, etc.
[0039] From the description of the above embodiments, those skilled in the art can easily understand that the exemplary embodiments described herein can be implemented by software or by a combination of software and necessary hardware. Therefore, the technical solutions according to the embodiments of the present disclosure can be embodied in the form of a software product, which can be stored in a non-volatile storage medium (such as a CD-ROM, a USB flash drive, a mobile hard disk, etc.) or on a network, including several instructions to enable a computing device (such as a personal computer, a server, a mobile terminal, or a network device, etc.) to execute the method according to the embodiments of the present disclosure.
[0040] In an exemplary embodiment of the present disclosure, there is also provided an electronic device capable of implementing the method of the above-described device.
[0041] Those skilled in the art can understand that various aspects of the present invention can be implemented as a system, a method, or a program product. Therefore, various aspects of the present invention can be specifically implemented in the following forms, namely: a complete hardware implementation, a complete software implementation (including firmware, microcode, etc.), or an implementation combining hardware and software aspects, which can be collectively referred to herein as "circuitry", "module", or "system".
[0042] An electronic device according to this embodiment of the present invention. The electronic device is merely an example and should not impose any limitation on the functions and usage scope of the embodiments of the present invention.
[0043] The electronic device is presented in the form of a general-purpose computing device. The components of the electronic device may include, but are not limited to: at least one of the above-mentioned processors, at least one of the above-mentioned memories, and a bus connecting different system components (including the memory and the processor).
[0044] Among them, the memory stores program code, and the program code can be executed by the processor, so that the processor executes the steps according to various exemplary embodiments of the present invention described in the above "Exemplary Method" section of this specification.
[0045] The memory may include a readable medium in the form of a volatile memory, such as a random access memory (RAM) and / or a cache memory, and may further include a read-only memory (ROM).
[0046] The memory may further include a program / utility having a set (at least one) of program modules, and such program modules include, but are not limited to: an operating system, one or more application programs, other program modules, and program data. The implementation of a network environment may be included in each or some combination of these examples.
[0047] The bus can represent one or more of several types of bus architectures, including a memory bus or memory controller, a peripheral bus, an accelerated graphics port, a processor, or a local bus using any of the various bus architectures.
[0048] The electronic device can also communicate with one or more external devices (such as a keyboard, a pointing device, a Bluetooth device, etc.), and can also communicate with one or more devices that enable a user to interact with the electronic device, and / or communicate with any device that enables the electronic device to communicate with one or more other computing devices (such as a router, a modem, etc.). Such communication can be carried out through an input / output (I / O) interface. Moreover, the electronic device can also communicate with one or more networks (such as a local area network (LAN), a wide area network (WAN), and / or a public network, such as the Internet) through a network adapter. As shown in the figure, the network adapter communicates with other modules of the electronic device through the bus. It should be understood that although not shown in the figure, other hardware and / or software modules can be used in conjunction with the electronic device, including but not limited to: microcode, device drivers, redundant processors, external disk drive arrays, RAID systems, tape drives, and data backup storage systems, etc.
[0049] Through the description of the above embodiments, those skilled in the art can easily understand that the exemplary embodiments described herein can be implemented by software, or can be implemented by the way of software in combination with necessary hardware. Therefore, the technical solutions according to the embodiments of the present disclosure can be embodied in the form of a software product, which can be stored in a non-volatile storage medium (which can be a CD-ROM, a USB flash drive, a mobile hard disk, etc.) or on a network, including several instructions to enable a computing device (which can be a personal computer, a server, a terminal device, or a network device, etc.) to execute the method according to the embodiments of the present disclosure.
[0050] In an exemplary embodiment of the present disclosure, there is also provided a computer-readable storage medium, on which a program product capable of implementing the above method of this specification is stored. In some possible implementation manners, various aspects of the present invention can also be implemented in the form of a program product, which includes program code. When the program product runs on a terminal device, the program code is used to enable the terminal device to execute the steps according to various exemplary embodiments of the present invention described in the above "Exemplary Method" section of this specification.
[0051] The program product may employ any combination of one or more readable media. The readable media may be a readable signal medium or a readable storage medium. The readable storage medium may be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination of the foregoing. More specific examples of the readable storage medium (a non-exhaustive list) include: an electrical connection having one or more wires, a portable disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
[0052] A computer-readable signal medium may include a data signal propagated in a baseband or as part of a carrier wave, in which the readable program code is carried. Such a propagated data signal may take many forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination of the foregoing. The readable signal medium may also be any readable medium other than the readable storage medium, which can send, propagate, or transmit a program for use by or in connection with an instruction execution system, apparatus, or device.
[0053] The program code contained on the readable medium may be transmitted with any appropriate medium, including but not limited to wireless, wireline, optical fiber cable, RF, etc., or any suitable combination of the foregoing.
[0054] The program code for performing the operations of the present invention may be written in any combination of one or more programming languages, including object-oriented programming languages such as Java, C++, etc., and also including conventional procedural programming languages such as the "C" language or similar programming languages. The program code may execute entirely on the user's computing device, partially on the user's device, as a stand-alone software package, partially on the user's computing device and partially on a remote computing device, or entirely on the remote computing device or server. In the case of a remote computing device, the remote computing device may be connected to the user's computing device through any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computing device (e.g., through the Internet using an Internet service provider).
[0055] In addition, the above drawings are only schematic illustrations of the processes included in the method according to the exemplary embodiments of the present invention, and are not for limiting purposes. It is easy to understand that the processes shown in the above drawings do not indicate or limit the chronological order of these processes. Additionally, it is also easy to understand that these processes may be executed, for example, synchronously or asynchronously in multiple modules.
[0056] It should be noted that although several modules or units of the device for action execution are mentioned in the above detailed description, such division is not mandatory. In fact, according to the embodiments of the present disclosure, the features and functions of two or more of the above-described modules or units can be embodied in one module or unit. Conversely, the features and functions of one module or unit described above can be further divided and embodied by multiple modules or units.
[0057] As described above, the above are only specific embodiments of the present invention, but the protection scope of the present invention is not limited thereto. Any changes or substitutions that can be easily thought of by those skilled in the art within the technical scope disclosed by the present invention should be covered within the protection scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims
1. A task control device, characterized in that, The device is disposed within an electronic device, and the electronic device has at least two cores, and each of the cores has at least one core thread; The device includes: a plurality of core mappers and a plurality of scheduling units. Each core mapper corresponds to one core thread, and each scheduling unit can be connected to any one of the core mappers. Each scheduling unit includes a scheduler and a task queue associated with the scheduler; a plurality of to-be-executed tasks can be stored in each of the task queues; The scheduler is configured to transfer the to-be-executed tasks in its corresponding task queue to the currently associated core mapper; The core mapper is configured to transfer the received to-be-executed tasks to the core thread corresponding thereto; Wherein, the core mapper is configured to obtain the context information of the to-be-executed task currently executed by its corresponding core thread, and the context information includes the execution status of the corresponding to-be-executed task; Wherein, when the core thread corresponding to the core mapper executes the to-be-executed task, the scheduling unit associated with the to-be-executed task saves the execution status of the current to-be-executed task every set time period, takes out the current to-be-executed task from the core thread through the core mapper, and inserts the to-be-executed task into the corresponding position in the task queue associated with the scheduler according to the execution status.
2. The device according to claim 1, characterized in that When the task queue corresponding to the scheduler is empty, the scheduler disconnects the connection relationship with the currently connected core mapper.
3. The device according to claim 1, characterized in that, If the core mapper currently associated with the scheduler has a task block, the connection relationship with the currently associated core mapper is disconnected, and a connection relationship with an idle core mapper is established.
4. The device according to claim 1, characterized in that, The scheduler can delete the to-be-executed task corresponding to the task cancellation instruction from its corresponding task queue according to the received task cancellation instruction.
5. The device according to claim 1, characterized in that, The execution order and execution conditions of each to-be-executed task in the task queue associated with the scheduler are stored in the scheduler, and the task queue is a double-ended queue; The scheduler is configured to adjust the arrangement order of the to-be-executed tasks in its corresponding task queue according to the execution order and the execution conditions.
6. The device according to claim 1, characterized in that, The context information of each to-be-executed task in the task queue associated with the scheduler is stored in the scheduler.
7. A non-transitory computer-readable storage medium, characterized in that, At least one instruction or at least one program segment is stored in the storage medium, and the at least one instruction or the at least one program segment is loaded and executed by a processor to implement the device according to any one of claims 1-6.
8. An electronic device, characterized in that, It includes a processor and the non-transitory computer-readable storage medium according to claim 7.
Citation Information
Patent Citations
Task scheduling method and device, electronic equipment and computer readable storage medium
CN113946410A
Task scheduling method and device, equipment and storage medium
CN114691321A