A method for testing interlocking logic of a virtual TT&C device

Abstract

This invention discloses a method for testing the interlocking logic of a virtual monitoring and control device. Virtual machine A generates a five-prevention logic rule base; virtual machine B identifies the monitoring and control interlocking logic; virtual machine A generates five-prevention logic test templates and multiple corresponding five-prevention logic test templates that do not meet the permitted operation conditions, and sends them to virtual machine B; virtual machine B determines whether the five-prevention logic test template is a permitted operation based on the monitoring and control interlocking logic, and provides feedback to virtual machine A; virtual machine A compares the feedback from virtual machine B with the expected permitted operation signal state of the corresponding five-prevention logic test template. This invention establishes a monitoring and control interlocking test environment using virtual machines A and B, without relying on the monitoring and control devices and primary equipment in operation at the substation, achieving automatic testing of interlocking logic, avoiding equipment wear caused by multiple modifications to the primary equipment status, and improving the efficiency of on-site interlocking verification.

Description

Technical Field

[0001] This invention relates to the field of secondary commissioning technology for intelligent substations, specifically to a method for testing the interlocking logic of a virtual measurement and control device. Background Technology

[0002] Electrical operations in power systems require specific procedures, each step of which is fixed and cannot be skipped. Therefore, to prevent unnecessary accidents caused by improper operation by operators, maintenance personnel, and others, the concept of "five-prevention" interlocking was proposed. "Five-prevention" interlocking is a proactive measure to prevent operational errors, and its implementation has become a crucial measure for safe power production. With the continuous development of the power grid and technological advancements, anti-misoperation devices are constantly being improved and perfected. The five-prevention logic at the bay level is implemented by the measurement and control device. Therefore, in integrated automation upgrades and bay expansion projects involving the replacement or addition of measurement and control devices, verifying the correctness of the measurement and control anti-misoperation interlocking logic becomes a vital part of the work of operators and maintenance personnel.

[0003] Currently, there are two methods for testing the anti-misoperation interlocking logic of the measurement and control system: one is to directly change the state of the primary switch, and the other is to simulate the state of the primary switch using a tester. Both methods require testing with the measurement and control device, especially since the combinations of anti-misoperation interlocking logic are numerous. Using the first method can affect the lifespan of the actual primary equipment, while using the second method, once testing begins, disrupts the synchronous execution of other tests on the measurement and control device, impacting testing efficiency. Furthermore, the five-prevention logic of the measurement and control system involves not only signals within the current bay but also signals across bays. If cross-bay equipment is in operation during renovation or expansion, on-site testing is not feasible. Therefore, this patent imports the interlocking file of the measurement and control device, analyzes its anti-misoperation interlocking logic, and simulates the measurement and control device to test the anti-misoperation interlocking logic. This verifies the correctness and comprehensiveness of the measurement and control anti-misoperation interlocking logic and improves the testing efficiency of the measurement and control system. Summary of the Invention

[0004] The technical problem to be solved by the present invention is to overcome the defects of the prior art and to propose a method for testing the interlocking logic of a virtual measurement and control device.

[0005] The above-mentioned objectives of the present invention are achieved through the following technical means:

[0006] A method for testing the interlocking logic of a virtual measurement and control device includes the following steps:

[0007] Step 1: Generate the five-prevention logic rule base for virtual machine A;

[0008] Step 2: Import the control and measurement device interlocking file into virtual machine B and identify the control and measurement interlocking logic;

[0009] Step 3: Virtual machine A generates a five-proof logic test template that meets the allowable operation conditions for the isolation switch and grounding switch under the bay, and a number of corresponding five-proof logic test templates that do not meet the allowable operation conditions, and sends them to virtual machine B;

[0010] Step 4: Virtual machine B determines whether the five-prevention logic test template is an allowed operation based on the measurement and control interlocking logic, generates the corresponding allowed operation GOOSE signal and allowed operation MMS signal and sends them to virtual machine A;

[0011] Step 5: Virtual machine A compares the GOOSE and MMS signals sent by virtual machine B with the expected status of the corresponding five-proof logic test template. If they match, the test result is qualified; if they do not match, the test result is abnormal.

[0012] Step 6: Virtual machine A outputs the test report.

[0013] As described above, step 1 includes the following steps:

[0014] Step 1.1: Virtual machine A draws the primary wiring diagram and models the primary electrical components, which include circuit breakers, disconnectors, grounding switches, and transformers, including current transformers and voltage transformers.

[0015] Step 1.2: Import the SCD file into virtual machine A and instantiate primary electrical components with different intervals; edit the five-proof logic rules for the disconnectors and grounding switches with different intervals to form a five-proof logic rule library.

[0016] As described above, step 1.1 includes the following steps:

[0017] Step 1.1.1: Draw the primary main wiring diagram according to the actual substation voltage level, wiring method, and bay classification. The primary main wiring diagram includes bus bays, main transformer bays, and line bays.

[0018] Step 1.1.2: Based on the properties of the primary electrical components contained in the primary wiring diagram, create primary electrical component models according to the intervals;

[0019] Step 1.1.3: Set the model name of the primary electrical component according to the actual primary electrical component number.

[0020] As described above, step 1.2 includes the following steps:

[0021] Step 1.2.1: Import the SCD file and parse the process layer channel references and station control layer channel references for different equipment;

[0022] Step 1.2.2: Filter the intelligent terminal channel references and merging unit channel references corresponding to the circuit breaker position, isolator position, grounding switch position, and transformer position in the SCD file, and map the intelligent terminal channel references and merging unit channel references to the primary electrical component model corresponding to the primary main wiring diagram;

[0023] Step 1.2.3: Filter the measurement and control permission operation signal channel references of the disconnector and grounding switch in the SCD file, and map the measurement and control permission operation signal channel references to the primary electrical component model corresponding to the primary main wiring diagram;

[0024] Step 1.2.4: Edit the five-prevention logic rules for allowing the opening and closing of disconnectors and grounding switches with different intervals using "AND, OR, NOT" logic to form a five-prevention logic rule library.

[0025] As described above, step 2 includes the following steps:

[0026] Step 2.1: Import the measurement and control interlocking file and SCD file into virtual machine B;

[0027] Step 2.2: Virtual machine B traverses the measurement and control interlocking file to identify the SCD address and the corresponding SCD address of the circuit breaker, disconnector, grounding switch, and transformer with different numbers.

[0028] Step 2.3: Virtual machine B traverses the measurement and control interlocking files to identify the opening and closing logic of the five-prevention circuit breakers for the different numbers of the disconnectors and grounding switches;

[0029] Step 2.4: Virtual machine B generates the measurement and control interlocking logic.

[0030] As described in step 3 above, the five-proof logic test template includes a five-proof logic test template that meets the allowed operation conditions at intervals and a corresponding set of five-proof logic test templates that do not meet the allowed operation conditions.

[0031] By sequentially inverting the states of each primary electrical component in the five-proof logic test template that meets the allowed operating conditions, the corresponding five-proof logic test templates that do not meet the allowed operating conditions are obtained.

[0032] Compared with the prior art, the present invention has the following advantages:

[0033] This invention establishes a monitoring and control interlocking test environment using virtual machines A and B. It does not rely on the monitoring and control devices and primary equipment in operation at the substation, and realizes the automatic testing function of interlocking logic. This avoids the problem of equipment damage caused by multiple modifications to the status of primary equipment, and also improves the efficiency of on-site interlocking verification. Attached Figure Description

[0034] Figure 1This is a diagram illustrating the connection between virtual machine A and virtual machine B. Detailed Implementation

[0035] To facilitate understanding and implementation of the present invention by those skilled in the art, the present invention will be further described in detail below with reference to embodiments. It should be understood that the embodiments described herein are for illustration and explanation only and are not intended to limit the present invention.

[0036] Figure 1 This is a schematic diagram of the test method of the present invention. The diagram includes two virtual machines, A and B. Virtual machine A simulates a smart terminal sending a GOOSE signal containing the positions of the circuit breaker, isolator, and grounding switch to virtual machine B; it also simulates a merging unit sending an SV signal containing voltage and current to virtual machine B. Virtual machine B simulates a measurement and control device sending an operation-allowed GOOSE signal and an operation-allowed MMS signal to virtual machine A.

[0037] Virtual machine A includes a five-defense logic rule base module, a five-defense logic testing module, and a result evaluation module.

[0038] The five-prevention logic rule base module includes: a main wiring diagram editing module and a primary and secondary association module;

[0039] The five-prevention logic test module includes: a five-prevention logic test template module, a virtual local / cross-interval status sending module, a virtual process layer status receiving module, and a station control layer status receiving module.

[0040] Virtual machine B includes a measurement and control interlocking rule base module and a virtual measurement and control module.

[0041] The monitoring and control interlocking rule base module includes: an interlocking file import module and a file parsing module;

[0042] The virtual measurement and control module includes: a virtual measurement and control evaluation module, a virtual measurement and control process layer sending module, and a virtual measurement and control station control layer sending module.

[0043] like Figure 1 As shown, a method for testing the interlocking logic of a virtual measurement and control device includes the following specific steps:

[0044] Step 1: The five-prevention logic rule base module of Virtual Machine A generates the five-prevention logic rule base. Virtual Machine A includes a main wiring diagram editing module and a primary and secondary association module, specifically including the following steps:

[0045] Step 1.1: The main wiring diagram editing module draws the primary main wiring diagram and models the primary electrical components. This includes the following steps:

[0046] Step 1.1.1: Draw the primary main wiring diagram according to the actual substation voltage level, wiring method, and bay classification. The primary main wiring diagram includes bus bays, main transformer bays, line bays, etc. Different bays include primary electrical components such as circuit breakers, disconnectors, grounding switches, and instrument transformers. Instrument transformers include current transformers (CTs) and voltage transformers (PTs). A bay may only include current transformers (CTs), or only voltage transformers (PTs), or it may include both current transformers (CTs) and voltage transformers (PTs).

[0047] Step 1.1.2: Based on the attributes of the primary electrical components included in the primary wiring diagram, create primary electrical component models according to intervals. For example, the circuit breaker model is CB, the disconnector model is G, the grounding switch model is GD, and the current transformer / voltage transformer model is CT / PT.

[0048] Step 1.1.3: Set the model name of the primary electrical component according to the actual primary electrical component number. For example, the circuit breaker number is 101, the I busbar disconnector number is 1011, the II busbar disconnector number is 1012, and the line disconnector number is 1013.

[0049] Step 1.2: Import the SCD file into the primary and secondary correlation module, instantiate primary electrical components with different intervals; edit the five-prevention logic rules for the disconnectors and grounding switches with different intervals to form a five-prevention logic rule library.

[0050] Step 1.2.1: Import the SCD file and parse the process layer channel references and station control layer channel references of different equipment.

[0051] Step 1.2.2: Filter the intelligent terminal channel references and merging unit channel references corresponding to the circuit breaker position, isolator position, grounding switch position, and transformer position in the SCD file, and map the intelligent terminal channel references and merging unit channel references to the primary electrical component model corresponding to the primary main wiring diagram.

[0052] For example: select the line intelligent terminal GOOSE channel corresponding to the location of the line interval circuit breaker and connect it to the corresponding line circuit breaker; select the line merging unit SV channel corresponding to the line current transformer / voltage transformer and connect it to the corresponding line CT / PT.

[0053] Step 1.2.3: Filter the control and measurement permission operation signal channel parameters for the disconnectors and grounding switches in the SCD file, and map the control and measurement permission operation signal channel parameters to the primary electrical component model corresponding to the primary main wiring diagram. The control and measurement permission operation signals include the permission operation signals in the process layer dsGOOSE dataset and the permission operation signals in the station control layer dsDin dataset.

[0054] Step 1.2.4: Edit the five-prevention logic rules for allowing the opening and closing of disconnectors and grounding switches at different intervals using "AND, OR, NOT" logic to form a five-prevention logic rule library. For example: Busbar-side disconnector allowed operation = Busbar I disconnector open position & Busbar II disconnector & Line disconnector.

[0055] Step 2: The measurement and control interlocking rule base module of virtual machine B imports the interlocking files of the measurement and control device and automatically identifies the measurement and control interlocking logic. The measurement and control interlocking rule base module includes an interlocking file import module and a file parsing module. The principle for automatically identifying the measurement and control interlocking logic is as follows:

[0056] Step 2.1: The interlocking file import module imports the measurement and control interlocking file and the SCD file and sends them to the file parsing module.

[0057] Step 2.2: The file parsing module traverses the token dictionary nodes of the measurement and control interlocking file to identify the SCD address and the corresponding SCD address of the allowable operation signal for circuit breakers, disconnectors, grounding switches, and transformers with different numbers.

[0058] For example: the SCD addresses corresponding to the switch knife switch and CT / PT are 2216=CL2216CTRL / CBCSWI1.Pos.stVal, 22165=CL2216CTRL / CSWI3.Pos.stVal, 221647=CL2216CTRL / CSWI6.Pos.stVal, and 22164=CL2216CTRL / CSWI2.Pos.stVal.

[0059] Step 2.3: The file parsing module traverses the operation rules nodes of the monitoring and control interlocking file, using "&" to represent AND logic, "|" to represent OR logic, and "1" and "0" to represent closing and opening logic, to identify the opening and closing logic of the five-proof circuit breakers for different numbered isolators and grounding switches. For example: 22164CTRL_ALLOW_CLOSE_goose:(2216=0&22165=0&221647=0&221627=0); 22164CTRL_ALLOW_OPEN_goose:(2216=0&22165=0&221647=0&221627=0).

[0060] Step 2.4: Using the SCD addresses and corresponding SCD addresses of the circuit breakers, isolators, grounding switches, and transformers obtained in Step 2.2, and the opening and closing five-prevention logic of the isolators and grounding switches obtained in Step 2.3, the measurement and control interlocking logic is obtained.

[0061] Step 3: The five-proof logic test module of virtual machine A generates five-proof logic test templates that meet the allowable operation conditions for the isolation switch and grounding switch under the bay, as well as multiple corresponding five-proof logic test templates that do not meet the allowable operation conditions. The five-proof logic test templates that meet the allowable operation conditions and the multiple corresponding five-proof logic test templates that do not meet the allowable operation conditions are sent to the virtual measurement and control evaluation module of virtual machine B through the virtual bay / cross-bay status sending module.

[0062] The five-proof logic test template includes a five-proof logic test template that meets the allowed operation conditions under the interval and a corresponding set of five-proof logic test templates that do not meet the allowed operation conditions.

[0063] The states of each primary electrical component (including circuit breaker state, isolator state, grounding switch state, and transformer state) in the five-proof logic test template that meets the permissible operation conditions are sequentially inverted to obtain the corresponding five-proof logic test templates that do not meet the permissible operation conditions.

[0064] For example, the five-proof logic test template corresponding to the permissible operation conditions of the busbar disconnectors in the line bay is: Busbar I disconnector open, Busbar II disconnector open, and line-side disconnector open. The corresponding five-proof logic test templates that do not meet the permissible operation conditions are: 1. Busbar I disconnector closed, Busbar II disconnector open, and line-side disconnector open; 2. Busbar I disconnector open, Busbar II disconnector closed, and line-side disconnector open; 3. Busbar I disconnector open, Busbar II disconnector open, and line-side disconnector closed.

[0065] Step 4: The virtual measurement and control evaluation module of virtual machine B determines whether the five-prevention logic test template is an allowed operation based on the measurement and control interlocking logic, generates the corresponding allowed operation GOOSE signal and allowed operation MMS signal, and sends the allowed operation GOOSE signal and allowed operation MMS signal to the virtual process layer status receiving module and the station control layer status receiving module of virtual machine A through the virtual measurement and control process layer sending module and the virtual measurement and control station control layer sending module.

[0066] Step 5: The result evaluation module of virtual machine A compares the GOOSE and MMS signals sent by virtual machine B with the expected signal status of the corresponding five-proof logic test template. If the comparison is consistent, the test result is qualified; if the comparison is inconsistent, the test result is abnormal.

[0067] Step 6: The result evaluation module of virtual machine A automatically outputs a test report.

[0068] The specific embodiments described herein are merely illustrative of the spirit of the invention. Those skilled in the art to which this invention pertains may make various modifications or additions to the described specific embodiments or use similar methods to substitute them, without departing from the spirit of the invention or exceeding the scope defined by the appended claims.

Claims

1. A method for testing the interlocking logic of a virtual measurement and control device, characterized in that, Includes the following steps: Step 1: Virtual machine A generates a five-defense logic rule base; Step 2: Import the control and measurement device interlocking file into Virtual Machine B and identify the control and measurement interlocking logic; Step 3: Virtual machine A generates a five-proof logic test template that meets the allowable operation conditions for the isolation switch and grounding switch under the bay, and a number of corresponding five-proof logic test templates that do not meet the allowable operation conditions, and sends them to virtual machine B; Step 4: Virtual machine B determines whether the five-prevention logic test template is an allowed operation based on the measurement and control interlocking logic, generates the corresponding allowed operation GOOSE signal and allowed operation MMS signal and sends them to virtual machine A; Step 5: Virtual machine A compares the GOOSE and MMS signals sent by virtual machine B with the expected status of the corresponding five-proof logic test template. If they match, the test result is qualified; if they do not match, the test result is abnormal. Step 6: Virtual machine A outputs a test report. Step 1 includes the following steps: Step 1.1: Virtual machine A draws the primary wiring diagram and models the primary electrical components, which include circuit breakers, disconnectors, grounding switches, and transformers, including current transformers and voltage transformers. Step 1.2: Import the SCD file into virtual machine A, instantiate primary electrical components with different intervals; edit the five-proof logic rules for the disconnectors and grounding switches with different intervals to form a five-proof logic rule library. Step 1.1 includes the following steps: Step 1.1.1: Draw the primary main wiring diagram according to the actual substation voltage level, wiring method, and bay classification. The primary main wiring diagram includes bus bays, main transformer bays, and line bays. Step 1.1.2: Based on the properties of the primary electrical components contained in the primary wiring diagram, create primary electrical component models according to the intervals; Step 1.1.3: Set the model name of the primary electrical component according to the actual primary electrical component number. Step 1.2 includes the following steps: Step 1.2.1: Import the SCD file and parse the process layer channel references and station control layer channel references for different equipment; Step 1.2.2: Filter the intelligent terminal channel references and merging unit channel references corresponding to the circuit breaker position, isolator position, grounding switch position, and transformer position in the SCD file, and map the intelligent terminal channel references and merging unit channel references to the primary electrical component model corresponding to the primary main wiring diagram; Step 1.2.3: Filter the measurement and control permission operation signal channel references of the disconnector and grounding switch in the SCD file, and map the measurement and control permission operation signal channel references to the primary electrical component model corresponding to the primary main wiring diagram; Step 1.2.4: Edit the five-prevention logic rules for allowing the opening and closing of disconnectors and grounding switches with different intervals using "AND, OR, NOT" logic, forming a five-prevention logic rule library. Step 2 includes the following steps: Step 2.1: Import the measurement and control interlocking file and SCD file into virtual machine B; Step 2.2: Virtual machine B traverses the measurement and control interlocking file to identify the SCD address and the corresponding SCD address of the circuit breaker, disconnector, grounding switch, and transformer with different numbers. Step 2.3: Virtual machine B traverses the measurement and control interlocking files to identify the opening and closing logic of the five-prevention circuit breakers for the different numbers of the disconnectors and grounding switches; Step 2.4: Virtual machine B generates the measurement and control interlocking logic. In step 3, the five-proof logic test template includes a five-proof logic test template that meets the allowed operation conditions at intervals and a corresponding set of five-proof logic test templates that do not meet the allowed operation conditions. By sequentially inverting the states of each primary electrical component in the five-proof logic test template that meets the allowed operating conditions, the corresponding five-proof logic test templates that do not meet the allowed operating conditions are obtained.

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