Wafer processing method and light emitting diode chip mass transfer method

By growing a silicon nitride layer on a substrate and forming a sulfur nitride photomask layer as the photomask layer, the warping problem of wafers in the prior art is solved, and efficient mass transfer of light-emitting diode chips is realized.

CN115810648BActive Publication Date: 2026-07-24CHONGQING KONKA PHOTOELECTRIC TECH RES INST CO LTD
View PDF 2 Cites 0 Cited by

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
CHONGQING KONKA PHOTOELECTRIC TECH RES INST CO LTD
Filing Date
2021-09-13
Publication Date
2026-07-24

AI Technical Summary

Technical Problem

In existing technologies, wafer warping causes significant offset and deflection of the LED chip during the transfer process, affecting the transfer effect.

Method used

A silicon nitride layer is grown on the substrate to reduce warpage, and a silicon nitride photomask layer is formed by etching. This photomask layer is used directly to avoid positional deviations during laser lift-off and improves transfer yield.

Benefits of technology

It effectively reduces wafer warpage, decreases the offset and deflection of LED chips during the transfer process, and improves transfer yield.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN115810648B_ABST
    Figure CN115810648B_ABST
Patent Text Reader

Abstract

The application discloses a wafer processing method and a light emitting diode chip mass transfer method. The wafer processing method comprises the following steps: providing a substrate; growing a silicon nitride layer on a first surface of the substrate; growing an epitaxial layer on a second surface of the substrate, the second surface being arranged opposite to the first surface; and etching the epitaxial layer to form a plurality of light emitting diode chips. The silicon nitride layer formed on the substrate can protect the substrate, reduce the warping of the substrate, and further reduce the warping of the wafer.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] This invention relates to the field of light-emitting diode (LED) chip transfer technology, and more particularly to a wafer fabrication method and a method for mass transfer of LED chips. Background Technology

[0002] Miniature LED chips possess excellent characteristics such as high brightness, high contrast, high responsiveness, and low power consumption. However, one of the bottlenecks to achieving mass production of miniature LED chips is mass transfer. A wafer includes a substrate and multiple LED chips situated on the substrate. Typical wafers exhibit warping. During mass transfer of LED chips, the spacing between the backplane and the individual LED chips on the substrate varies significantly. When using lasers to peel off the LED chips from the substrate, this can sometimes lead to significant offset and / or deflection during the transfer of the miniature LED chips. Please refer to [link to relevant documentation]. Figure 1 .

[0003] Therefore, how to reduce wafer warpage and avoid large offsets and / or deflections of LED chips during transfer is an urgent problem to be solved. Summary of the Invention

[0004] In view of the shortcomings of the prior art, the purpose of this application is to provide a wafer fabrication method and a mass transfer method for light-emitting diode chips, which aims to solve the technical problems that existing wafers have large warpage and that light-emitting diode chips sometimes have large deviations and / or deflections during the transfer process.

[0005] A wafer fabrication process, the method comprising:

[0006] Provide a substrate.

[0007] A silicon nitride layer is grown on the first surface of the substrate.

[0008] An epitaxial layer is grown on a second surface of the substrate, the second surface being disposed opposite to the first surface.

[0009] The epitaxial layer is etched to form multiple light-emitting diode chips.

[0010] By forming a silicon nitride layer on the substrate that can protect the substrate, the warpage of the substrate is reduced, thereby reducing the warpage of the wafer.

[0011] Optionally, the thickness of the silicon nitride layer is 0.3-2.0 μm, so that the silicon nitride layer can better protect the substrate to avoid large warping of the substrate.

[0012] Optionally, the method further includes:

[0013] The silicon nitride layer is etched to form a silicon nitride photomask layer, which is used to transmit laser light during the peeling of the LED chip. The silicon nitride photomask layer is in zero-distance contact with the substrate, avoiding large laser spots during laser peeling of the LED chip and substrate, thus preventing the laser from affecting the LED chip located near the silicon nitride photomask layer. Using the etched silicon nitride layer directly as the silicon nitride photomask layer eliminates positional deviations caused by placing the photomask on the substrate, improving the transfer yield of the silicon nitride photomask layer, and eliminating the need to place the photomask on the substrate during the peeling process of the substrate and multiple arrayed LED chips.

[0014] Optionally, etching the silicon nitride layer to form a silicon nitride photomask layer includes:

[0015] Determine the position of each of the light-emitting diode chips projected onto the silicon nitride layer.

[0016] By etching the silicon nitride at the locations where each of the LED chips is projected onto the silicon nitride layer, a silicon nitride photomask is formed. This misaligns the projection of the silicon nitride photomask with each LED chip, thus preventing the laser from affecting the LED chips located near the silicon nitride photomask when the LED chips and the substrate are peeled off.

[0017] Optionally, the light-emitting diode chip is one of a blue light-emitting diode chip, a green light-emitting diode chip, and a red light-emitting diode chip.

[0018] A method for mass transfer of light-emitting diode chips, the method comprising:

[0019] Provide a back panel.

[0020] A laser is provided to selectively peel light-emitting diode chips from a wafer onto a backplane, wherein the wafer is manufactured using the wafer fabrication process described above.

[0021] Because the wafer warpage is small, the positional deviation of each LED chip during the transfer of the LEDs from the wafer to the backplane can be reduced, and the degree and possibility of deflection of each LED chip can be reduced.

[0022] Optionally, the selective stripping of the light-emitting diode chip from the wafer to the backplane using the laser includes:

[0023] The laser is used to selectively pass through one or more vias in the silicon nitride photomask layer to strip the light-emitting diode chip grown on the wafer opposite to the via onto the backplane.

[0024] The silicon nitride photomask layer is formed by etching a silicon nitride layer on the substrate. The silicon nitride photomask layer is in zero-distance contact with the substrate, avoiding large light spots during laser separation of the LED chip from the substrate, thus preventing the laser from affecting the LED chip located near the photomask. Using the silicon nitride layer directly as the silicon nitride photomask layer eliminates positional deviations caused by placing the photomask on the wafer, improving the transfer yield of the LED chip.

[0025] Optionally, the selective stripping of the light-emitting diode chip from the wafer to the backplane using the laser includes:

[0026] The laser selectively passes through one or more vias in the silicon nitride photomask layer to peel off the light-emitting diode (LED) chip grown on the wafer opposite to the via to the backplane; thus, when peeling off the LED chip and the substrate, the laser can avoid affecting the LED chip located near the silicon nitride photomask layer.

[0027] Optionally, the selective stripping of the light-emitting diode chip from the wafer to the backplane using the laser includes:

[0028] The wafer is divided into multiple sub-wafers, each sub-wafer having a silicon nitride photomask layer and at least one of the light-emitting diode chips.

[0029] The laser is used to selectively pass through one or more vias in each sub-silicon nitride photomask layer to peel off the light-emitting diode chips grown on each sub-wafer that are opposite to the vias to the backplane; this avoids uneven stress on the wafer due to the large force-bearing area when transferring the light-emitting diode chips.

[0030] Optionally, the wafer is divided into multiple sub-wafers, including:

[0031] Cut tracks are etched on the silicon nitride photomask layer.

[0032] The wafer is divided into multiple sub-wafers along the cleaving path; this eliminates the need to identify the position of each LED chip to determine the cleaving path when dividing the wafer into multiple sub-wafers, simplifying the wafer dicing process and improving the wafer dicing efficiency.

[0033] Optionally, after selectively stripping the LED chips from the wafer onto the backplane using the laser, the LED chips transferred to the backplane are then soldered to the backplane. Attached Figure Description

[0034] Figure 1 This is a schematic diagram of the structure for peeling light-emitting diode chips from wafers in the prior art;

[0035] Figure 2 This is a flowchart of the wafer fabrication process in the implementation of this application;

[0036] Figure 3 for Figure 2 A structural diagram of one of the processes;

[0037] Figure 4 for Figure 2 A structural diagram of one of the processes;

[0038] Figure 5 for Figure 2 A structural diagram of one of the processes;

[0039] Figure 6 for Figure 2 A structural diagram of one of the processes;

[0040] Figure 7 This is a schematic diagram of the mass transfer process of LED chips in an embodiment of this application;

[0041] Figure 8 for Figure 7 A structural diagram of one of the processes.

[0042] Explanation of reference numerals in the attached figures:

[0043] 10-Wafer wafer;

[0044] 100 - Substrate; 110 - First surface; 120 - Second surface;

[0045] 200 - Silicon nitride layer; 210 - Silicon nitride photomask layer; 211 - Cut track;

[0046] 300 - Epitaxial layer; 310 - Light-emitting diode chip;

[0047] 400-back panel. Detailed Implementation

[0048] To facilitate understanding of this application, a more complete description will be provided below with reference to the accompanying drawings. Preferred embodiments of this application are shown in the drawings. However, this application can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to provide a more thorough and complete understanding of the disclosure of this application.

[0049] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the specification of this application is for the purpose of describing particular embodiments only and is not intended to be limiting of this application.

[0050] Miniature LED chips possess excellent characteristics such as high brightness, high contrast, high responsiveness, and low power consumption. However, one of the bottlenecks in achieving mass production of miniature LED chips is mass transfer. During mass transfer, due to warping, the spacing between the substrate and the individual LED chips on the substrate varies significantly. This causes misalignment and deflection of the miniature LED chips during laser lift-off. Please refer to [link to relevant documentation]. Figure 1 .

[0051] Therefore, this application aims to provide a solution that can solve the above-mentioned technical problems, the details of which will be described in subsequent embodiments.

[0052] Example 1

[0053] Please see Figure 2 This application provides a wafer fabrication method, which includes, but is not limited to, the following steps:

[0054] S101 provides a substrate.

[0055] In the embodiments provided in this application, the substrate 100 may be sapphire, and the substrate 100 may be used to grow the epitaxial layer 300. The material of the epitaxial layer 300 is generally gallium nitride (GaN). Generally speaking, the coefficient of thermal expansion of the substrate 100 is greater than that of the epitaxial layer 300. For example, the coefficient of thermal expansion of sapphire is greater than that of gallium nitride.

[0056] S102, a silicon nitride layer is grown on the first surface of the substrate.

[0057] In the embodiments provided in this application, the silicon nitride layer 200 has high hardness, high strength, and a low coefficient of thermal expansion. If the epitaxial layer 300 is grown directly on the substrate 100, the epitaxial layer 300 grown on the substrate 100 will expand when subjected to high-temperature treatment, for example, the epitaxial layer 300 grown on the substrate 100 will expand after high-temperature treatment at 1000°C. When the substrate 100 returns to room temperature, it will shrink. Generally, the shrinkage ratio of the substrate 100 will be greater than that of the epitaxial layer 300, which will cause significant warping of the substrate 100 and the epitaxial layer 300. To avoid significant warping of the substrate 100 and the epitaxial layer 300, a silicon nitride layer 200 can be grown on the substrate 100 first. Generally, the silicon nitride layer 200 has a higher hardness than the substrate 100, and the coefficient of thermal expansion of the silicon nitride layer 200 at high temperatures is lower than that of the substrate 100. After the silicon nitride layer 200 is grown on the substrate 100, the substrate 100 and the silicon nitride layer 200 are firmly bonded. When the silicon nitride layer 200 and the epitaxial layer 300 are grown on the substrate 100, if the substrate 100, along with the silicon nitride layer 200 and the epitaxial layer 300, is in a high-temperature environment, the silicon nitride layer 200 can protect the substrate 100, preventing the substrate 100 from warping significantly.

[0058] S103, an epitaxial layer is grown on the second surface of the substrate, the second surface being disposed opposite to the first surface.

[0059] S104, etching the epitaxial layer to form multiple light-emitting diode chips.

[0060] In the embodiments provided in this application, the epitaxial layer 300 is used to form a light-emitting diode chip 310. Specifically, the epitaxial layer 300 is etched to form a plurality of light-emitting diode chips 310 arranged in an array.

[0061] Please see Figure 3The silicon nitride layer 200 and the epitaxial layer 300 are respectively grown on the first surface 110 and the second surface 120 of the substrate 100. After the silicon nitride layer 200 is formed on the first surface 110 of the substrate 100, the epitaxial layer 300 is formed on the second surface 120 of the substrate 100. When etching to form the light-emitting diode chip 310, the epitaxial layer 300 undergoes high-temperature treatment. After the high-temperature treatment, the epitaxial layer 300 is returned to the room temperature environment. During this process, the substrate 100, which is bonded to the epitaxial layer 300, also undergoes high-temperature and room-temperature environments. The substrate 100 expands when in the high-temperature environment and contracts when it returns to the room temperature environment. In this embodiment, by first growing the silicon nitride layer 200 on the substrate 100, the silicon nitride layer 200 has greater hardness. When the substrate 100 contracts from the high-temperature environment to the room temperature environment, the silicon nitride layer 200 can protect the substrate 100 and prevent the substrate 100 from warping significantly.

[0062] Please refer to the embodiments provided in this application. Figure 4 In forming the light-emitting diode chip 310, the epitaxial layer 300 is subjected to processes such as exposure, development, etching and vapor deposition to form multiple arrays of light-emitting diode chips 310.

[0063] When a silicon nitride layer 200 is formed on the first surface 110 of the substrate 100, the thickness of the silicon nitride layer 200 is 0.3-2 μm.

[0064] In the embodiments provided in this application, when the thickness of the silicon nitride layer 200 is too thin, the overall strength of the silicon nitride layer 200 is insufficient, which in turn leads to a smaller force by which the silicon nitride layer 200 protects the substrate 100 and reduces the warpage of the substrate 100. When the thickness of the silicon nitride layer 200 is too thick, the bonding strength between the silicon nitride layer 200 and the substrate 100 is low, which also leads to a smaller effect of the silicon nitride layer 200 in protecting the substrate 100 and reducing the warpage of the substrate 100. When the thickness of the silicon nitride layer 200 is 0.3-2 μm, the silicon nitride layer 200 has a better effect in protecting the substrate 100 and reducing the warpage of the substrate 100.

[0065] The manufacturing process of the wafer 10 further includes:

[0066] The silicon nitride layer 200 is etched to form a silicon nitride photomask layer 210, which is used to transmit laser light when the light-emitting diode chip 310 is stripped.

[0067] After etching the epitaxial layer 300, the silicon nitride layer 200 is etched, so that a portion of the silicon nitride layer 200 is removed, and the remaining portion of the silicon nitride layer 200 is retained to form a silicon nitride photomask layer 210.

[0068] In traditional technology, the silicon nitride photomask layer 210 is not directly formed from the silicon nitride layer 200 grown on the substrate 100. Instead, an external photomask is placed on the surface of the substrate 100 opposite to the surface where the light-emitting diode chip 310 is located. There is a photomask mask between the photomask and the substrate 100. Due to the presence of the photomask mask, there is a certain distance between the photomask and the substrate 100. When the laser passes through the photomask and hits the substrate 100 to separate the substrate 100 from the light-emitting diode chip 310, there is generally a deviation of 3-5μm, which will produce a large light spot. A large light spot deviation will interfere with the surrounding light-emitting diode chips 310.

[0069] Please refer to the embodiments provided in this application. Figure 5 The silicon nitride layer 200 is processed through exposure, development, etching, and other processes to form the silicon nitride photomask layer 210. That is, the silicon nitride photomask layer 210 is grown on the substrate 100 and formed through certain processes. The silicon nitride photomask layer 210 is in zero-distance contact with the substrate 100, which can avoid the generation of large light spots when the light-emitting diode chip 310 is peeled off by laser, thereby avoiding the laser from affecting the light-emitting diode chip 310 near the silicon nitride photomask layer 210. In addition, using the silicon nitride layer 200 directly as the silicon nitride photomask layer 210 can eliminate the positional deviation caused by placing the silicon nitride photomask layer 210 on the substrate 100, thereby improving the transfer yield. When peeling off the substrate 100 and the multiple arrayed light-emitting diode chips 310, the process of setting the position of the silicon nitride photomask layer 210 is eliminated.

[0070] The etching of the silicon nitride layer 200 to form a silicon nitride photomask layer 210 includes:

[0071] The position of each of the light-emitting diode chips 310 projected onto the silicon nitride layer 200 is determined.

[0072] The silicon nitride at the locations where each of the light-emitting diode chips 310 is projected onto the silicon nitride layer 200 is etched to form a silicon nitride photomask layer 210.

[0073] In the embodiments provided in this application, an array of light-emitting diode (LED) chips 310 is arranged on the substrate 100, with gaps between adjacent LED chips 310. During etching of the silicon nitride layer 200, each LED chip 310 on the substrate 100 is projected onto the silicon nitride layer 200, determining the position of each LED chip 310 projected onto the silicon nitride layer 200. The silicon nitride portion of each LED chip 310 projected onto the silicon nitride layer 200 is removed by etching, and the retained portion of the silicon nitride layer 200 forms the silicon nitride photomask layer 210. In one possible implementation, the specific structure of the silicon nitride photomask layer 210 is etched and formed according to specific requirements.

[0074] In the embodiments provided in this application, the light-emitting diode chip 310 is one of a blue light-emitting diode chip, a green light-emitting diode chip, and a red light-emitting diode chip.

[0075] Example 2

[0076] Please see Figure 7 This application also provides a method for mass transfer of light-emitting diode chips, the method comprising:

[0077] S201 provides a back panel.

[0078] In this embodiment of the application, the wafer 10 includes a silicon nitride photomask layer 210, a substrate 100, and a plurality of light-emitting diode chips 310 on the substrate 100. The silicon nitride photomask layer 210 is located on a first surface 110 of the substrate 100, and the plurality of light-emitting diode chips 310 are located on a second surface 120 of the substrate 100.

[0079] In the process of transferring the light-emitting diode chip, the light-emitting diode chip in the wafer is specifically transferred to the backplane.

[0080] S202, a laser is provided to selectively peel off light-emitting diode chips on the wafer to the backplane.

[0081] In the embodiments provided in this application, the plurality of arrayed light-emitting diode (LED) chips 310 and the substrate 100 are irradiated with a laser, causing the gallium nitride on the substrate 100 to decompose under the laser irradiation. This separates the arrayed LED chips 310 from the substrate 100, and the LED chips 310 fall onto the backplate 400, thereby achieving the transfer of the LED chips 310. Please refer to [link to relevant documentation]. Figure 8 .

[0082] In the embodiments provided in this application, a silicon nitride layer 200 is disposed on the first surface 110 of the substrate 100. The silicon nitride layer 200 can protect the substrate 100 and reduce the large warpage that occurs when the substrate 100 is transferred from a high temperature environment to a normal temperature environment. When transferring multiple array-arranged light-emitting diodes on the substrate 100 to the back plate 400, the positional deviation between each light-emitting diode chip 310 and the back plate 400 can be reduced. When peeling multiple array-arranged light-emitting diode chips 310 from the substrate 100, the degree of deflection of each light-emitting diode chip 310 and the possibility of deflection can be reduced.

[0083] In the embodiments provided in this application, a silicon nitride layer 200 is grown on the first surface 110 of the substrate 100 to strengthen the substrate 100. An epitaxial layer 300 is grown on the second surface 120 of the substrate 100 opposite to the first surface 110. When the substrate 100 and the epitaxial layer 300 are subjected to high temperature and room temperature environments respectively, the silicon nitride layer 200 can protect the substrate 100 and prevent the substrate 100 from warping significantly, thereby improving the transfer yield of the light-emitting diode chip 310.

[0084] In the embodiments provided in this application, before the epitaxial layer 300 is formed on the second surface 120 of the substrate 100, the silicon nitride layer 200 on the first surface 110 of the substrate 100 is cured; when the epitaxial layer 300 is formed on the second surface 120 of the substrate 100, the cured silicon nitride layer 200 can protect the substrate 100 and prevent the substrate 100 from undergoing large warping due to expansion and contraction.

[0085] In the embodiments provided in this application, a silicon nitride layer 200 is formed on the first surface 110 of the substrate 100, which can reduce the stress on the substrate 100 (the silicon nitride layer 200 can balance part of the stress), reduce the piezoelectric field of the epitaxial energy, and improve the internal quantum efficiency of the light-emitting diode chip 310.

[0086] The selective stripping of the light-emitting diode chip 310 from the wafer 10 onto the backplane 400 using the laser includes:

[0087] The laser is used to selectively pass through one or more vias in the silicon nitride photomask layer 210 to strip the light-emitting diode chip 310 grown on the wafer 10 opposite to the vias onto the backplane 400.

[0088] Specifically, the backplate 400 is positioned to correspond with the position of each of the wafers 10;

[0089] The wafer 10 is stripped from its attached light-emitting diode chip 310 so that the light-emitting diode chip 310 located on each wafer 10 is transferred to the backplane 400.

[0090] The selective stripping of the light-emitting diode chip 310 from the wafer 10 onto the backplane 400 using the laser includes:

[0091] The wafer 10 is divided into multiple sub-wafers, each sub-wafer having a sub-silicon nitride photomask layer 210 and at least one of the light-emitting diode chips 310;

[0092] The laser is used to selectively pass through one or more vias in each sub-silicon nitride photomask layer 210 to peel off the light-emitting diode chips 310 grown on each sub-wafer opposite to the vias onto the backplane 400.

[0093] In the embodiments provided in this application, when transferring multiple arrayed light-emitting diode chips 310, in order to avoid uneven stress on the substrate 100, the wafer 10 with the light-emitting diode chips 310 is divided into multiple sub-wafers with at least one light-emitting diode chip 310 attached; since the size of the sub-wafers is also smaller than that of the wafer 10, the stress on the sub-wafers is more uniform during the process of transferring the light-emitting diode chips 310 onto the backplate 400.

[0094] The wafer 10 is divided into multiple sub-wafers, including:

[0095] Cut channels 211 are etched on the silicon nitride photomask layer 210.

[0096] The wafer 10 is divided into multiple sub-wafers along the cutting path 211.

[0097] Please refer to the embodiments provided in this application. Figure 6 When dicing wafer 10 into multiple sub-wafers, cleaving channels 211 can be etched on wafer 10 first to facilitate the dicing of wafer 10 into multiple sub-wafers. To avoid cutting the light-emitting diode chip 310 when dicing wafer 10, cleaving channels 211 can be etched on silicon nitride photomask layer 210. The projection of silicon nitride photomask layer 210 is offset from the position of each light-emitting diode chip 310. When dicing wafer 10 into multiple sub-wafers along the cleaving channels 211, the dicing equipment can avoid cutting the light-emitting diode chip 310 and damaging the light-emitting diode chip 310.

[0098] When the wafer 10 is divided into multiple sub-wafers, the wafer 10 is directly etched along the silicon nitride photomask layer 210 to form the cut path 211 and then cut along the cut path 211. This eliminates the need to import CAD drawings to determine the position of each light-emitting diode chip 310 projected onto the first surface 110 of the substrate 100, thus simplifying the wafer 10 cutting process.

[0099] After selectively peeling the light-emitting diode chip 310 from the wafer 10 onto the backplane 400 using the laser, the light-emitting diode chip 310 transferred to the backplane 400 is soldered to the backplane 400.

[0100] In the embodiments provided in this application, red light-emitting diode chips, green light-emitting diode chips, and blue light-emitting diode chips can all be transferred to the same backplane 400, and one red light-emitting diode chip, one green light-emitting diode chip, and one blue light-emitting diode chip form a light-emitting diode chip group.

[0101] In summary, in this embodiment of the application, a silicon nitride layer 200 is formed on the substrate 100. The silicon nitride layer 200 strengthens the substrate 100, which can prevent the substrate 100 from warping significantly when it changes from a high-temperature environment to a room-temperature environment. This can prevent the warping of the substrate 100 from causing significant changes in the position of the light-emitting diode chip 310 on the substrate 100. It can also reduce the possibility of the light-emitting diode chip 310 deflecting when the substrate 100 and the light-emitting diode chip 310 are peeled off, and reduce the positional deviation of the light-emitting diode chip 310 when it is transferred to the back plate 400.

[0102] It should be understood that the application of the present invention is not limited to the examples above. Those skilled in the art can make improvements or modifications based on the above description, and all such improvements and modifications should fall within the protection scope of the appended claims.

Claims

1. A wafer fabrication process, characterized in that, The method includes: Provide a substrate; A silicon nitride layer is grown on the first surface of the substrate; An epitaxial layer is grown on a second surface of the substrate, the second surface being disposed opposite to the first surface; Etching the epitaxial layer forms multiple light-emitting diode chips; The method further includes: The silicon nitride layer is etched to form a silicon nitride photomask layer, which is used to transmit laser light during the stripping of the light-emitting diode chip.

2. The wafer fabrication method as described in claim 1, characterized in that, The thickness of the silicon nitride layer is 0.3-2.0 μm.

3. The wafer fabrication method as described in claim 1 or 2, characterized in that, The etching of the silicon nitride layer to form a silicon nitride photomask layer includes: Determine the position of each of the light-emitting diode chips projected onto the silicon nitride layer; The silicon nitride at the locations where each of the light-emitting diode chips is projected onto the silicon nitride layer is etched to form a silicon nitride photomask layer.

4. The wafer fabrication method as described in claim 1, characterized in that, The light-emitting diode chip is one of a blue light-emitting diode chip, a green light-emitting diode chip, or a red light-emitting diode chip.

5. A method for mass transfer of light-emitting diode chips, characterized in that, The method includes: Provide a back panel; A laser is provided to selectively peel light-emitting diode chips from a wafer onto a backplane, wherein the wafer is manufactured using a chip fabrication process as described in any one of claims 1-3.

6. The method for mass transfer of light-emitting diode chips as described in claim 5, characterized in that, The selective stripping of light-emitting diode chips from the wafer onto the backplane using the laser includes: The laser is used to selectively pass through one or more vias in the silicon nitride photomask layer to strip the light-emitting diode chip grown on the wafer opposite to the via onto the backplane.

7. The method for mass transfer of light-emitting diode chips as described in claim 5, characterized in that, The selective stripping of light-emitting diode chips from the wafer onto the backplane using the laser includes: The wafer is divided into multiple sub-wafers, each sub-wafer having a silicon nitride photomask layer and at least one of the light-emitting diode chips; The laser is used to selectively pass through one or more vias in each sub-silicon nitride photomask layer to peel off the light-emitting diode chips grown on each sub-wafer that are opposite to the vias onto the backplane.

8. The method for mass transfer of light-emitting diode chips as described in claim 7, characterized in that, The wafer is divided into multiple sub-wafers, including: Etch a cut on the silicon nitride photomask layer; The wafer is divided into multiple sub-wafers along the cutting path.

9. The method for mass transfer of light-emitting diode chips as described in claim 5, characterized in that, After selectively stripping the LED chips from the wafer onto the backplane using the laser, the LED chips transferred to the backplane are then soldered to the backplane.