A coding method and apparatus

Abstract

The embodiment of the application discloses a coding and decoding method and device, relates to the field of communication, and reduces resource consumption and calculation delay on the premise of effectively recovering whole-packet lost packets. The specific scheme comprises the following steps: obtaining a code stream; determining the number N of lost original packets according to the number M of original packets, the number R of redundant packets and the packet length L when the code stream is encoded; obtaining an original-elimination result by performing original elimination on P redundant packets; constructing a standard Cauchy matrix with R rows and M columns according to the packet receiving sequence and the packet identifier in the code stream; selecting elements corresponding to the overlapping positions of the columns corresponding to the P lost original packets and the rows corresponding to the P redundant packets in the standard Cauchy matrix to obtain a P-order decoding matrix; and multiplying the original-elimination result by the inverse matrix of the P-order decoding matrix to obtain the P lost original packets.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of communications, and in particular to a coding and decoding method and apparatus. Background Art

[0002] With the rapid development of communication technology, video conferencing systems have become widely used. A video conferencing system is a network-based multimedia communication system that supports multi-person video conferencing, video communication, multi-person voice, screen sharing, dynamic presentations, text communication, SMS messaging, electronic whiteboards, multi-person desktop sharing, file transfer, and other functions, providing a convenient communication channel for enterprises.

[0003] In practice, network quality (e.g., packet loss) is a major factor affecting the video conferencing experience. For example, packet loss can directly lead to screen distortion, freezing, and lag, severely impacting user experience and conference quality. Therefore, packet loss optimization technology during the encoding and decoding process of video transmission is an essential feature of video conferencing systems.

[0004] Traditional forward error correction (FEC) technology only identifies and corrects erroneous bits in data, limiting its ability to recover from sudden, prolonged packet loss. New FEC technology provides an end-to-end chip solution for recovering entire packets from lost packets. Specifically, the transmitter constructs a coding matrix based on the original packet (the original data packet to be sent, also called the original packet) according to a codec algorithm, generating a redundant packet and then transmitting both the original and redundant packets. The receiver then decodes the received data packet using the codec algorithm to recover the lost original packet.

[0005] However, the new FEC technology has the following drawbacks: the coding matrix currently constructed by the transmitter is complex, which increases the burden on the encoding and decoding schemes; the receiver must sort the out-of-order original packets and redundant packets before selecting the decoding matrix, which results in very high resource overhead and computational delay. Summary of the Invention

[0006] The embodiments of the present application provide a coding and decoding method and apparatus that reduce resource overhead and computing delay while effectively recovering entire packet loss.

[0007] To achieve the above objectives, the present invention adopts the following technical solutions:

[0008] In a first aspect, a decoding method is provided, which can be applied to a decoding device. The method can include: obtaining a code stream, the code stream including X original packets and Q redundant packets; parsing the code stream to obtain the X original packets and the Q redundant packets according to a number M of original packets, a number R of redundant packets and a packet length L during encoding of the code stream, determining a number N of lost original packets, N being equal to M minus X; Q being less than or equal to R; performing original elimination on P redundant packets in the Q redundant packets to obtain an original elimination result; wherein the P redundant packets are redundant packets that meet a condition; P being a smaller one of N and Q; constructing a standard Cauchy matrix with R rows and M columns according to a packet receiving order and a packet identifier in the code stream; selecting elements corresponding to overlapping positions of columns corresponding to the P lost original packets and rows corresponding to the P redundant packets in the standard Cauchy matrix to obtain a P-order decoding matrix; and left multiplying the P-order decoding matrix by an inverse matrix of the P-order decoding matrix to obtain the P lost original packets.

[0009] The decoding steps provided by the embodiments of the present application can simplify the construction of the decoding matrix, and reduce the burden of encoding and decoding, because the decoding matrix is a standard Cauchy matrix. In addition, the decoding end can directly determine the elements to construct the decoding matrix according to the packet receiving order and the packet identifier in the code stream, without the need for reordering even if the original packets and the redundant packets are out of order, thereby greatly reducing resource consumption and calculation delay.

[0010] The P lost original packets are part or all of the N lost original packets. When Q is less than N, the maximum error correction capability of the encoding and decoding system is Q, and P is equal to Q. In this case, the P lost original packets are any P original packets in the N lost original packets.

[0011] In a possible implementation, the original elimination result includes original elimination results of the P redundant packets. The original elimination result of one redundant packet includes original elimination results of elements included in the redundant packet. The original elimination result of one element is the element minus a part of the element calculated from the P original packets to be recovered during encoding of the element. The P original packets are part or all of the original packets successfully received in the code stream received by the decoding end.

[0012] In another possible implementation, the number M of original packets, the number R of redundant packets and the packet length L are encoding parameters, which can be configured in the encoding end device and / or the decoding end device according to actual needs. Alternatively, the encoding parameters can be input into the encoding end device by a user in real time, and transmitted to the decoding end device by the encoding end device.

[0013] In another possible implementation, the standard Cauchy matrix with R rows and M columns is constructed according to the packet receiving order and the packet identifier in the code stream, and the construction can include:

[0014] The element in the fth row and the gth column of the standard Cauchy matrix is determined according to the packet identifier indxf of the fth received original packet in the received packet sequence of the received code stream, the packet identifier indxg of the gth received redundant packet in the received packet sequence of the received code stream, and the standard Cauchy matrix element sets X and Y wherein X includes x i , Y includes y j , i is greater than or equal to 1 and less than or equal to R, j is greater than or equal to 1 and less than or equal to M; x i and y j are independent elements; f is greater than or equal to 1 and less than or equal to R, and g is greater than or equal to 1 and less than or equal to M.

[0015] wherein x i and y j in the R-row and M-column element of the standard Cauchy matrix are strongly related to the order of the original packet and the redundant packet in the encoding, which can be represented by the packet identifier, so that the value of the element in the decoding matrix can be determined according to the packet identifier, and the position of the element in the decoding matrix can be determined according to the received packet sequence of the received code stream, so that the R-row and M-column standard Cauchy matrix used for selecting the decoding matrix can be determined without reordering, and the resource consumption can be greatly reduced.

[0016] In a possible implementation, the standard Cauchy matrix can be a Cauchy matrix in a Galois field.

[0017] In a possible implementation, the standard Cauchy matrix can be a Cauchy matrix in a Galois field, and the decoding method provided in the application can further include: performing LDU decomposition on the P-order decoding matrix to obtain an upper triangular matrix, a diagonal matrix and a lower triangular matrix; obtaining the inverse matrix of the upper triangular matrix, the inverse matrix of the diagonal matrix and the inverse matrix of the lower triangular matrix respectively, and taking the product of the inverse matrix of the upper triangular matrix, the inverse matrix of the diagonal matrix and the inverse matrix of the lower triangular matrix as the inverse matrix of the P-order decoding matrix.

[0018] It has been verified that, after LDU decomposition of the matrix in the Galois field, the inverse is obtained respectively and then the product is obtained, the result is consistent with the result of the mathematical inversion algorithm, and the complexity of the inversion process can be reduced and the decoding efficiency can be improved by performing inversion after LDU decomposition.

[0019] In one possible implementation, obtaining the inverse matrix of a lower triangular matrix may specifically include: determining the inverse element of each element in the lower triangular matrix, and arranging the inverse elements of each element in the lower triangular matrix according to the position of the element in the lower triangular matrix to form the inverse matrix of the lower triangular matrix. The inverse elements of the diagonal elements and the first element below the diagonal elements in the lower triangular matrix are themselves; and the inverse elements of the other elements in the lower triangular matrix except the diagonal elements and the first element below the diagonal elements are obtained according to the following formula:

[0020] Among them, L o,s -1 is the element L in the oth row and sth column of the lower triangular matrix o,s The inverse element of L o,s i L is the lower triangular matrix o,s The inverse element of the i-th element below the diagonal element in the column, L o,s i′ L is the lower triangular matrix o,s The inverse element of the i-th element on the right; A is L o,s The number of elements separated from the diagonal elements in the column or row direction.

[0021] In one possible implementation, obtaining the inverse matrix of an upper triangular matrix may specifically include: determining the inverse element of each element in the upper triangular matrix; and arranging the inverse elements of each element in the upper triangular matrix according to the position of the element in the upper triangular matrix to form the inverse matrix of the upper triangular matrix. The inverse elements of the diagonal elements and the first element above the diagonal elements in the upper triangular matrix are themselves; and the inverse elements of the elements in the upper triangular matrix other than the diagonal elements and the first element above the diagonal elements are obtained according to the following formula:

[0022] Among them, L p,q -1 is the element L in the pth row and qth column of the upper triangular matrix p,q The inverse element of L p,q i L is the upper triangular matrix p,q The inverse element of the i-th element above the diagonal element in the column, L p,q i′ L is the upper triangular matrix p,q The inverse element of the i-th element on the left; B is L p,q The number of elements separated from the diagonal elements in the column or row direction.

[0023] In combination with the first aspect or any of the foregoing possible implementations, in another possible implementation, X and Y do not intersect. X and Y, as sets of elements used to construct the standard Cauchy matrix, are independent of each other and do not intersect, thereby improving the independence of each element in the standard Cauchy matrix and improving encoding and decoding performance.

[0024] In combination with the first aspect or any of the above possible implementations, in another possible implementation, Y is {0, 1, ..., M-2, M-1}, and X is {M, M+1, ..., M+R-2, M+R-1}. This implementation provides specific numerical values ​​for the element set for constructing the above standard Cauchy matrix, improving the feasibility of the solution.

[0025] In a second aspect, a coding method is provided, which is applied to a coding device. The method may include: obtaining the number M of original packets, the number R of redundant packets, and the packet length L; obtaining M original packets; constructing a standard Cauchy matrix with R rows and M columns as a coding matrix, where the element in the i-th row and j-th column of the coding matrix is x i with y j are independent elements, x i Belongs to a set X, y containing R elements j Belong to a set Y consisting of M elements, i is greater than or equal to 1 and less than or equal to R, and j is greater than or equal to 1 and less than or equal to M. The M original packets are left-multiplied by the encoding matrix to obtain R redundant packets; the M original packets and the R redundant packets are sent.

[0026] In a possible implementation, the encoding matrix is ​​a Galois Field Cauchy matrix, x i +y j Less than 2 8 (That is, less than 256, or equivalently, less than or equal to 255.) It has been verified that decomposing the LDU matrix in a Galois field, taking the inverse and then multiplying it, produces results consistent with those of a mathematical inversion algorithm. Inverting the LDU matrix after decomposition can reduce the complexity of the inversion process, thereby improving decoding efficiency.

[0027] In another possible implementation, X and Y do not intersect. X and Y, as sets of elements used to construct the standard Cauchy matrix, are independent of each other and do not intersect, which improves the independence of each element in the standard Cauchy matrix and improves encoding and decoding performance.

[0028] In another possible implementation, Y is {0, 1, ..., M-2, M-1}, and X is {M, M+1, ..., M+R-2, M+R-1}. This implementation provides specific values ​​for the element set that constructs the standard Cauchy matrix, improving the feasibility of the solution.

[0029] In a third aspect, a decoding apparatus is provided, which can include an obtaining unit, a determining unit, a deoriginalizing unit, a constructing unit, and a processing unit. Wherein:

[0030] The obtaining unit is configured to obtain a code stream, the code stream including X original packets and Q redundant packets.

[0031] The determining unit is configured to parse the X original packets and the Q redundant packets from the code stream according to a number M of original packets, a number R of redundant packets, and a packet length L during encoding of the code stream by the obtaining unit, to determine a number N of lost original packets, N being equal to M minus the X, and Q being less than or equal to R.

[0032] The deoriginalizing unit is configured to deoriginalize P redundant packets in the Q redundant packets to obtain a deoriginalizing result. The P redundant packets are redundant packets satisfying a condition, and P is a smaller value between N and Q.

[0033] The constructing unit is configured to construct a standard Cauchy matrix of R rows and M columns according to a packet receiving order and a packet identifier in the code stream. The packet identifier is used to indicate a packet order during encoding of the data packet.

[0034] The selecting unit is configured to select elements corresponding to overlapping positions of rows corresponding to the P redundant packets and columns corresponding to the P lost original packets in the standard Cauchy matrix to obtain a P-order decoding matrix.

[0035] The processing unit is configured to left-multiply the deoriginalizing result by an inverse matrix of the P-order decoding matrix to obtain the P lost original packets.

[0036] It should be noted that the decoding apparatus provided in the third aspect is used to execute the decoding method provided in the first aspect or any possible implementation manner of the first aspect, and the specific implementation can refer to the foregoing first aspect or any possible implementation manner of the first aspect.

[0037] In a fourth aspect, an encoding apparatus is provided, which can include an obtaining unit, a constructing unit, an encoding unit, and a sending unit. Wherein:

[0038] The obtaining unit is configured to obtain a number M of original packets, a number R of redundant packets, and a packet length L, and to obtain the M original packets.

[0039] The constructing unit is configured to construct a standard Cauchy matrix of R rows and M columns. An element in the i-th row and the j-th column of the encoding matrix is x i and y j are independent elements, x i belongs to a set X including R elements, y j belongs to a set Y including M elements, i is greater than or equal to 1 and less than or equal to R, and j is greater than or equal to 1 and less than or equal to M.

[0040] The encoding unit is configured to left-multiply the M original packets by an encoding matrix to obtain R redundant packets.

[0041] The sending unit is configured to send the M original packets and the R redundant packets.

[0042] It should be noted that the encoding apparatus provided in the fourth aspect is used to execute the encoding method provided in the second aspect or any possible implementation manner of the second aspect, and specific implementation can be referred to the foregoing second aspect or any possible implementation manner of the second aspect.

[0043] In the fifth aspect, the present application provides a decoding apparatus which can realize the functions in the method examples described in the first aspect, and the functions can be realized by hardware or by hardware executing corresponding software. The hardware or software includes one or more modules corresponding to the functions. The decoding apparatus can exist in the form of a chip product.

[0044] In a possible implementation manner, the decoding apparatus can include a processor and a transmission interface. The transmission interface is configured to receive and send data. The processor is configured to invoke software instructions stored in a memory, so that the decoding apparatus executes the functions in the method examples described in the first aspect.

[0045] In the sixth aspect, the present application provides an encoding apparatus which can realize the functions in the method examples described in the second aspect, and the functions can be realized by hardware or by hardware executing corresponding software. The hardware or software includes one or more modules corresponding to the functions. The encoding apparatus can exist in the form of a chip product.

[0046] In a possible implementation manner, the encoding apparatus can include a processor and a transmission interface. The transmission interface is configured to receive and send data. The processor is configured to invoke software instructions stored in a memory, so that the encoding apparatus executes the functions in the method examples described in the second aspect.

[0047] In the seventh aspect, a computer readable storage medium is provided, and the computer readable storage medium stores instructions. When the instructions are executed on a computer or a processor, the computer or the processor executes the decoding method or the encoding method provided in the first aspect or the second aspect or any possible implementation manner thereof.

[0048] In the eighth aspect, a computer program product is provided, and the computer program product includes instructions. When the instructions are executed on a computer or a processor, the computer or the processor executes the decoding method or the encoding method provided in the first aspect or the second aspect or any possible implementation manner thereof.

[0049] In a ninth aspect, a chip system is provided, which includes a processor, and can further include a memory for implementing the corresponding functions in the above method. The chip system can be composed of a chip, or can include a chip and other discrete devices.

[0050] In a tenth aspect, a codec system is provided, which includes the decoding apparatus of the fifth aspect and the encoding apparatus of the sixth aspect, and has the functions of each of the above aspects and any possible implementation manner.

[0051] It should be noted that any of the above aspects and the various possible implementation manners can be combined as long as the schemes are not contradictory. BRIEF DESCRIPTION OF DRAWINGS

[0052] Figure 1 A structural schematic diagram of a communication system provided by an embodiment of the present application is shown in FIG. 1.

[0053] Figure 2 A structural schematic diagram of a communication apparatus provided by an embodiment of the present application is shown in FIG. 2.

[0054] Figure 3 A flowchart of a codec method provided by an embodiment of the present application is shown in FIG. 3.

[0055] Figure 4 A curve diagram of performance data changing with the number of redundancy packets R provided by an embodiment of the present application is shown in FIG. 4.

[0056] Figure 5 A curve diagram of performance data changing with the number of original packets M provided by an embodiment of the present application is shown in FIG. 5.

[0057] Figure 6 A curve diagram of performance data changing with the packet length L provided by an embodiment of the present application is shown in FIG. 6.

[0058] Figure 7 A structural schematic diagram of a decoding apparatus provided by an embodiment of the present application is shown in FIG. 7.

[0059] Figure 8 A structural schematic diagram of a decoding device provided by an embodiment of the present application is shown in FIG. 8.

[0060] Figure 9 A structural schematic diagram of an encoding apparatus provided by an embodiment of the present application is shown in FIG. 9.

[0061] Figure 10 A structural schematic diagram of an encoding device provided by an embodiment of the present application is shown in FIG. 10. DETAILED DESCRIPTION

[0062] In the embodiments of the present application, in order to clearly describe the technical solutions of the embodiments of the present application, the words of "first", "second" and the like are used to distinguish the same items or similar items with basically the same functions and effects. Those skilled in the art can understand that the words of "first", "second" and the like do not limit the quantity and execution order, and the words of "first", "second" and the like do not necessarily mean different. The technical features described by the words of "first", "second" do not have a prior order or a size order.

[0063] In the embodiments of the present application, the words of "exemplary" or "for example" are used to represent an example, illustration or description. Any embodiment or design scheme described as "exemplary" or "for example" in the embodiments of the present application should not be interpreted as more preferred or more advantageous than other embodiments or design schemes. In fact, the words of "exemplary" or "for example" are intended to present the relevant concept in a specific manner and facilitate understanding.

[0064] In the description of the present application, unless otherwise specified, " / " represents that the objects before and after the " / " are in an "or" relationship, for example, A / B can represent A or B; "and / or" in the present application is only a description of the association relationship of the associated objects, which means that there can be three relationships, for example, A and / or B can represent: A exists alone, A and B exist together, and B exists alone, wherein A and B can be singular or plural. In addition, in the description of the present application, unless otherwise specified, "multiple" means two or more than two. "At least one of the following (one)" or the like means any combination of the items, including any combination of single item (one) or multiple items (ones). For example, at least one of a, b, or c can represent: a, b, c, a-b, a-c, b-c, or a-b-c, wherein a, b, and c can be single or multiple.

[0065] In the embodiments of the present application, at least one can also be described as one or more, and multiple can be two, three, four or more, which is not limited by the present application.

[0066] Before describing the embodiments of the present application, the nouns involved in the present application are explained and described.

[0067] The original package (also referred to as the original package) refers to a data package to be transmitted in a coding and decoding system. The coding parameters define the length L of the original package. The data to be transmitted is constructed into multiple data packages with a length of L, which are the original packages.

[0068] The redundant packet is a reference data packet related to the original packet and sent together with the original packet during encoding, and is used for reference decoding at the decoding end. At the encoding end, the original packet can be multiplied by a coding matrix corresponding to the coding and decoding algorithm to obtain the redundant packet. At the decoding end, the redundant packet can be multiplied by the inverse matrix of the decoding matrix corresponding to the coding and decoding algorithm to obtain the discarded original packet.

[0069] The current FEC technology selects a non-standard matrix as the coding matrix when recovering long-time continuous packet loss, which increases the burden of the coding and decoding scheme, and the decoding end can select the decoding matrix and then decode only after the original packet and the redundant packet in disorder are sorted according to the sending order, which has very large resource consumption and calculation delay.

[0070] Based on this, the embodiment of the present application provides a coding and decoding method, which uses a standard Cauchy matrix as a coding matrix to reduce the burden of coding and decoding. Since the coding matrix is a standard Cauchy matrix, the decoding end can determine the decoding matrix according to the receiving order of the data packets in the code stream for decoding, without the need to sort the original packet and the redundant packet in disorder, thereby reducing resource consumption, improving calculation effect, and thus reducing calculation delay.

[0071] The coding and decoding method provided by the embodiment of the present application can be applied to Figure 1 the communication system as shown in FIG. 1. As shown in FIG. 1, the communication system can include an encoding end device 101, a communication link 102, and a decoding end device 103. Figure 1

[0072] The encoding end device 101 is configured to obtain a code stream to be transmitted and encode the code stream to obtain an encoded code stream (including an original packet and a redundant packet), and then transmit the encoded code stream to the decoding end device 103 through the communication link 102. During the transmission process, there can be packet loss and disorder. The decoding end device 103 decodes the code stream after receiving the code stream. The specific processing process of the encoding end device 101 and the decoding end device 103 can be referred to in subsequent embodiments, and will not be described in detail here.

[0073] It should be noted that in different application scenarios, Figure 1 the forms of various components in the communication system shown in FIG. 1 are different, and the embodiment of the present application does not limit Figure 1 the actual forms of various components in the communication system shown in FIG. 1.

[0074] For example, in a video conference scenario, the encoding end device 101 can be a switch accessed by a video processing device (such as a conference terminal) at one end of the conference, the decoding end device 103 can be a switch accessed by a video processing device at the other end of the conference, and the communication link 102 can be a wide area network (WAN).

[0075] ​The embodiments of the present application are described in detail below with reference to the accompanying drawings.

[0076] On the one hand, the embodiment of the present application provides a communication device for executing the encoding method or decoding method provided by the present application. The communication device can be deployed in Figure 1 In the encoding end device 101 or the decoding end device 103 shown in FIG. For example, the communication device can be a functional module or chip in the encoding end device 101 or the decoding end device 103.

[0077] Figure 2 FIG. 2 shows a communication device 20 related to various embodiments of the present application. Figure 2 As shown, the communication device 20 may include a processor 201 , a memory 202 , and a transceiver 203 .

[0078] The following combination Figure 2 The components of the communication device 20 are described in detail.

[0079] Among them, the memory 202 can be a volatile memory (volatile memory), such as random-access memory (RAM); or a non-volatile memory (non-volatile memory), such as read-only memory (ROM), flash memory, hard disk drive (HDD) or solid-state drive (SSD); or a combination of the above types of memory, used to store program code, configuration files or other content that can implement the method of the present application.

[0080] The processor 201 is the control center of the communication device 20. For example, the processor 201 can be a central processing unit (CPU), an application specific integrated circuit (ASIC), or one or more integrated circuits configured to implement the embodiments of the present application, such as one or more microprocessors (digital single processors, DSPs) or one or more field programmable gate arrays (FPGAs).

[0081] The transceiver 203 is used to communicate with other devices and can be a communication port or other.

[0082] In a possible implementation, when the communication apparatus 20 is deployed in a decoding end device, the processor 201 performs the following functions by running or executing software programs and / or modules stored in the memory 202 and calling data stored in the memory 302:

[0083] The code stream is obtained, the code stream including X original packets and Q redundant packets; X original packets and Q redundant packets are obtained by parsing the code stream according to a number M of original packets, a number R of redundant packets, and a packet length L when the code stream is encoded, a number N of lost original packets is determined, N being equal to M minus X; Q is less than or equal to R; P redundant packets in the Q redundant packets are subjected to original elimination to obtain an original elimination result; wherein, the P redundant packets satisfy a condition; P is a smaller value in Q and N; a standard Cauchy matrix with R rows and M columns is constructed according to a packet receiving order and a packet identifier in the code stream; elements corresponding to overlapping positions of rows corresponding to P redundant packets participating in original elimination and columns corresponding to P lost original packets in the standard Cauchy matrix are selected to obtain a P-order decoding matrix; the P lost original packets are obtained by left multiplying the original elimination result by an inverse matrix of the P-order decoding matrix. It should be understood that, in the embodiment of the application, the code stream to be sent includes M original packets, and the M original packets correspond to R redundant packets.

[0084] In another possible implementation, when the communication apparatus 20 is deployed in an encoding end device, the processor 201 performs the following functions by running or executing software programs and / or modules stored in the memory 202 and calling data stored in the memory 302:

[0085] A number M of original packets, a number R of redundant packets, and a packet length L are obtained; M original packets are obtained; a standard Cauchy matrix with R rows and M columns is constructed as an encoding matrix; an element in the i th row and the j th column of the encoding matrix is x i and y j are independent elements, x i belongs to a set X including R elements, y j belongs to a set Y including M elements, i is greater than or equal to 1 and less than or equal to R, j is greater than or equal to 1 and less than or equal to M; the M original packets are left multiplied by the encoding matrix to obtain R redundant packets; and the M original packets and the R redundant packets are sent.

[0086] On the other hand, the embodiment of the application provides a coding and decoding method, an encoding method is performed by an encoding end device, and a decoding method is performed by a decoding end device. As shown in FIG. 8, the coding and decoding method provided by the application includes: Figure 3

[0087] S301, an encoding end device obtains a number M of original packets, a number R of redundant packets, and a packet length L.

[0088] ​Wherein, the original packet number M, the redundant packet number R and the packet length L are encoding parameters, which can be configured in the encoding terminal device and / or the decoding terminal device according to actual requirements. Alternatively, the encoding parameters can also be input into the coding and decoding system by the user in real time. Alternatively, the encoding parameters can also be input into the encoding terminal device by the user, and sent to the decoding terminal device by the encoding terminal device.

[0089] S302, the encoding terminal device acquires M original packets.

[0090] Specifically, in S302, the encoding terminal device divides the to-be-transmitted data according to the packet length L according to the original packet number M in the encoding parameters, and each L length of to-be-transmitted data is taken as an original packet. M data packets in the constructed data packet are selected as the original packets of this encoding operation, and M original packets in S302 are obtained.

[0091] Optionally, in actual application, M data packets can be selected according to a preset rule, and the selection process is not limited by the embodiments of the application. For example, the preset rule can be to select the original packets in time sequence, or the preset rule can be to select the original packets according to the business emergency degree. Of course, the preset rule can also be other, which can be configured according to actual requirements, and is not limited.

[0092] For example, the encoding terminal device can select M data packets to construct the form of encoding block in S302.

[0093] For example, M original packets are recorded as M1 to M M , which can be shown in the form of the following data matrix, each row being an original packet, the length being L, i.e. L elements, and one element being fixed-size data. For example, one element can be 8-bit (bit) size data.

[0094]

[0095] Wherein, the original packet M1 = [M 11 M 12 M 13 … M 1L ];

[0096] The original packet M2 = [M 21 M 22 M 23 … M 2L ];

[0097] …

[0098] The original packet M M = [M M1 M M2 M M3 … M ML ]。

[0099] The number of rows of the data matrix is the original package number M in the encoding parameter, also called the original package number. The columns can be in units of bytes (Byte). The column length can be long or short when constructing the Block. The encoding length of the data matrix is subject to the maximum length L of the original package. The tail of the original package that is less than L can be padded with 0 (padding 0) to fill up.

[0100] S303, the encoding end device constructs an R by M standard Cauchy matrix as an encoding matrix.

[0101] Specifically, the R by M standard Cauchy matrix can be constructed according to M and R in the encoding parameter obtained in S301.

[0102] The R by M standard Cauchy matrix constructed in S303 is used by the encoding device to generate redundant packages from original packages.

[0103] For example, an m by n standard Cauchy matrix can be described as follows:

[0104]

[0105] The x elements (such as x(i) in the above formula) and y elements (such as y(i) in the above formula) in the standard Cauchy matrix are elements in their respective mathematical domains. The standard Cauchy matrix has the following characteristics: any sub-matrix of the standard Cauchy matrix is a singular matrix and has an inverse matrix.

[0106] In one possible implementation, the R by M standard Cauchy matrix constructed in S303 can be a Cauchy matrix of a Galois field, and the elements in the matrix are taken from the Galois field. The x elements (such as x(i) in the above formula) and y elements (such as y(i) in the above formula) are elements in the Galois field GF(2 W ) and can be completed within an operation complexity of O(n 2 ).

[0107] For example, in S303, the encoding end device can construct an R by M encoding matrix according to the following steps 1 and 2:

[0108] Step 1, the encoding end device constructs an element set for constructing a standard Cauchy matrix (i.e., an encoding matrix).

[0109] The element set constructed in step 1 includes a set X and a set Y. The set X includes the x elements in the Cauchy matrix, and the set Y includes the y elements in the Cauchy matrix. The set X includes {x1, x2,..., x R-1 , x R}, and the set Y includes {y1, y2,..., y M-1,y M}. Among them, x i with y j are independent elements, i is greater than or equal to 1 and less than or equal to R, j is greater than or equal to 1 and less than or equal to M.

[0110] For example, when the standard Cauchy matrix with R rows and M columns constructed in S303 is a Cauchy matrix of a Galois field, the elements in the set X and the set Y are all Galois fields GF(2 8 ) in the element. Among them, x i with y j are independent elements on the Galois field, x i +y j Less than 2 8 .

[0111] It should be noted that the elements in set X and set Y can be configured according to actual needs, and the embodiments of the present application are not limited to this. Constraints of set X and set Y can also be configured according to actual needs.

[0112] For example, set X and set Y may not have an intersection.

[0113] For example, the set Y can be {0, 1, ..., M-2, M-1}, and the set X can be {M, M+1, ..., M+R-2, M+R-1}. That is, y1 = 0, ..., y M =M-1,x1=M,……,x R =M+R-1.

[0114] Step 2: The encoding end device constructs a standard Cauchy matrix with R rows and M columns as the encoding matrix based on the element set constructed in step 1.

[0115] For example, a standard Cauchy matrix (encoding matrix) with R rows and M columns can be expressed as the following matrix:

[0116]

[0117] Among them, the element in row i and column j of the encoding matrix is x i Belongs to a set X, y containing R elements j Belongs to the set Y of M elements. The number of rows in this encoding matrix is ​​equal to the number of redundant packets R, and the number of columns is equal to the number of original packets M. The columns are in bytes, and the column length is equal to the number of original packets M in the encoding parameter. This encoding matrix construction method selects elements from the finite set of elements constructed in step 1, which can reduce unreasonable value selection and excess computational resource overhead, and can more accurately construct the encoding matrix. When the construction process is implemented in hardware, every value of M and R can be accurately represented in the circuit without additional logic overhead.

[0118] S304: The encoding end device multiplies the M original packets by the encoding matrix to obtain R redundant packets.

[0119] In S304, the encoding end device multiplies the M original packets obtained in S302 by the encoding matrix constructed in S303 to obtain R redundant packets.

[0120] For example, the process of S304 can be schematically illustrated as follows:

[0121]

[0122] The right side of the equal sign in the above formula is the redundant packet matrix, which contains R redundant packets. Each row is a redundant packet. The length of each redundant packet is L. The R redundant packets are recorded as M′1 to MR′ R .

[0123] Among them, the redundant packet M′1=[M′ 11 M′ 12 M′ 13 … M′ 1L ];

[0124] Redundant packet M′2=[M′ 21 M′ 22 M′ 23 … M′ 2L ];

[0125] …

[0126] Redundant packet M′ R =[M′ R1 M′ R2 M′ R3 … M′ RL ].

[0127] The generated redundant packet is the encoding result. According to the principle of matrix multiplication, each element in the redundant packet contains the element information of the original packet and the encoding matrix, which is the basis for successfully decoding and recovering the lost original packet.

[0128] For example, for the redundant packet M′2, according to the principle of matrix multiplication, the elements thereof satisfy the following equation, where each element contains the element information of the original packet and the encoding matrix:

[0129]

[0130]

[0131] …

[0132]

[0133] For example, for the redundant packet M'6, according to the principle of matrix multiplication, the elements therein satisfy the following equation, wherein each element contains the element information of the original packet and the encoding matrix:

[0134]

[0135]

[0136] ...

[0137]

[0138] For example, for the redundant packet M'9, according to the principle of matrix multiplication, the elements therein satisfy the following equation, wherein each element contains the element information of the original packet and the encoding matrix:

[0139]

[0140]

[0141] ...

[0142]

[0143] S305. The encoding end device sends the M original packets and the R redundant packets.

[0144] Specifically, in S305, the encoding end device sends the M original packets and the R redundant packets as a sending code stream to a communication link between the encoding end device and the decoding end device.

[0145] Further, in S305, when the encoding end device sends the M original packets and the R redundant packets, a packet identifier is marked in each packet, used to indicate the packet order when the data packet is encoded, so as to facilitate the decoding end to determine the decoding matrix according to the packet identifier.

[0146] For example, the packet identifier of the mth original packet can be m, and m is less than or equal to M; the packet identifier of the rth redundant packet can be r, and r is less than or equal to R.

[0147] Optionally, the packet identifier can further include indication information used to indicate whether the data packet is an original packet or a redundant packet.

[0148] In a possible implementation manner, the encoding end device can send the M original packets and the R redundant packets in sequence according to the numbering order of the M original packets and the R redundant packets.

[0149] In another possible implementation manner, the encoding end device can send the M original packets and the R redundant packets out of sequence in order to improve transmission security or based on other reasons.

[0150] Furthermore, after the encoding end device sends M original packets and R redundant packets in S305, due to the influence of the communication link, transmission scenario, or transmission environment, some of the M original packets may be lost, and need to be decoded and recovered at the decoding end using the method provided in this application.

[0151] S306: The decoding end device obtains a code stream, which includes X original packets and Q redundant packets.

[0152] The code stream obtained by the decoding end device in S306 is the code stream received from the communication link and can be referred to as the received code stream. The received code stream is the code stream after the transmission of the transmission code stream sent by the encoding end device in S305. Because packet loss may occur during transmission of the transmission code stream over the communication link, X is less than or equal to M, and Q is less than or equal to R.

[0153] For example, assume that the code stream sent by the encoding end device in S305 includes M original packets and R redundant packets, and original packets M1, M7, and M8 are lost during transmission. It should be noted that the loss of redundant packets during transmission is not considered and will not be described in detail in this embodiment of the application.

[0154] S307: The decoding end device parses the code stream according to the number M of original packets, the number R of redundant packets, and the packet length L during code stream encoding to obtain X original packets and Q redundant packets, and determines the number N of lost original packets.

[0155] Among them, the number of original packets M, the number of redundant packets R and the packet length L during code stream encoding are decoding parameters.

[0156] In one possible implementation, the decoding parameters can be configured on the decoding end device according to actual needs and kept consistent with the encoding parameters of the encoding end. Accordingly, in S307, the decoding end device can directly obtain the number of original packets M, the number of redundant packets R, and the packet length L when encoding the configured bitstream.

[0157] In another possible implementation, the encoding end device can interact with the decoding end device, and the encoding end device can send its encoding parameters to the decoding end device as decoding parameters of the decoding end device. Accordingly, in S307, the decoding end device can receive the number M of original packets, the number R of redundant packets, and the packet length L when encoding the code stream sent by the encoding end device.

[0158] Specifically, since packet loss may occur when the transmitted code stream is transmitted over a communication link, N is equal to M minus X. N is greater than or equal to 0.

[0159] Further, the decoding end device can parse the code stream (for example, the code stream can be identified as one data packet according to the size of the data packet) in S307 to obtain X original packets and Q redundant packets contained in the code stream, and then M minus X equals N. For example, the decoding end device can determine whether each data packet is an original packet or a redundant packet according to the mark of each data packet.

[0160] For example, based on the example in S306, N can be 3 in S307.

[0161] In S308, the decoding end device performs original packet elimination on P redundant packets in the Q redundant packets to obtain an original packet elimination result.

[0162] P is the fault tolerance capability of the decoding end device, that is, the number of lost original packets that can be recovered, and P is the smaller one of Q and N. When Q is smaller than N, the decoding end device can support recovery of Q original packets in the N lost original packets, and in this case, the lost original packets to be recovered can be selected according to actual requirements, which is not limited in the embodiments of the present application.

[0163] It should be noted that the condition for selecting P redundant packets can be configured according to actual requirements, which is not limited in the embodiments of the present application.

[0164] In a possible implementation, the first P redundant packets in the Q redundant packets in the order of the redundant packets can be selected.

[0165] In another possible implementation, P redundant packets can be randomly selected from the Q redundant packets.

[0166] For example, based on the examples in S306 and S307, it is assumed that 3 original packets (M1, M7, and M8) are lost in the transmission of M original packets, R redundant packets are transmitted, and the first 3 redundant packets (M'2, M'6, and M'9) in the Q redundant packets received by the decoding end device in the code stream are selected as the redundant packets M'2, M'6, and M'9 for original packet elimination.

[0167] Further, the original packet elimination result can include an original packet elimination result of each redundant packet in the P redundant packets. The original packet elimination result of one redundant packet is the original packet elimination result of the elements contained in the redundant packet.

[0168] The original packet elimination result of one element is the element minus the part calculated from P lost original packets (original packets to be recovered) when the element is encoded. Since each element in the redundant packet carries the information of each original packet, the purpose of original packet elimination of the element is to eliminate the information of the lost original packet carried by the element and retain the information of the X original packets received by the element, so as to achieve the purpose of recovering the lost original packet by using the received original packet.

[0169] The P lost original packets are selected from the N lost original packets according to actual requirements, and the embodiments of the present application are not limited thereto.

[0170] The specific implementation of S308 is described below based on the examples in S306 and S307.

[0171] For example, based on the examples in S307 and S308, it is assumed that the original elimination is performed on the redundant packets M'2, M'6 and M'9, according to the description of the equations satisfied by the elements in M'2, M'6 and M'9 in S304, the equations are transformed to perform the original elimination, the part related to the lost original packets is eliminated, and the part related to the received original packets is reserved as the original elimination result. The original elimination process of the redundant packets M'2, M'6 and M'9 is shown in the following equations.

[0172] For the redundant packet M'2, it includes elements M'2, M'3, M'4 and M'5. 21 ……M'2, M'3, M'4 and M'5. 2L It is assumed that the original elimination result of the redundant packet M'2 includes M''2, M''3, M''4 and M''5. 21 ……M''2, M''3, M''4 and M''5. 2L Wherein:

[0173] The original elimination result M''2 of M'2 is: 21 21

[0174]

[0175] The original elimination result M''5 of M'5 is: 22 22

[0176]

[0177] …

[0178] The original elimination result M''4 of M'4 is: 2L 2L

[0179]

[0180] For the redundant packet M'6, it includes elements M'6, M'7, M'8 and M'9. 61 ……M'6, M'7, M'8 and M'9. 6L The original elimination result of the redundant packet M'6 includes M''6, M''7, M''8 and M''9. 61 ……M''6, M''7, M''8 and M''9. 6L Wherein:

[0181] The original elimination result M''6 of M'6 is: 61 61

[0182]

[0183] ​​​​​​​​M' 62 The original result M'' of M' 62 is:

[0184]

[0185] …

[0186] M' 6L The original result M'' of M' 6L is:

[0187]

[0188] For the original package M'9, which includes elements M' 91 … M' 9L , the original result of the original package M'9 includes M'' 91 … M'' 9L . Wherein:

[0189] M' 91 The original result M'' of M' 91 is:

[0190]

[0191] M' 92 The original result M'' of M' 92 is:

[0192]

[0193] …

[0194] M' 9L The original result M'' of M' 9L is:

[0195]

[0196] The original result of the original package M'2, M'6, M'9 can be described as:

[0197] S309, the decoding end device constructs an R row M column standard Cauchy matrix according to the package receiving order and the package identifier in the code stream.

[0198] Wherein, the R row M column standard Cauchy matrix constructed in S309 is used to select a decoding matrix. It should be noted that the R row M column standard Cauchy matrix constructed in S309 is only the same in form as the R row M column standard Cauchy matrix constructed in S303, and the content is constructed according to the actual needs, which is not limited.

[0199] In a possible implementation manner, the R row M column standard Cauchy matrix constructed in S309 can be an R row M column Galois field Cauchy matrix.

[0200] Specifically, the decoding end device constructs a standard Cauchy matrix of R rows and M columns according to the package identification and the package receiving order in the code stream in S309. Specifically, the standard Cauchy matrix of R rows and M columns can be constructed according to the package identification indxf of the original package received in the fth position in the receiving package order of the code stream, the package identification indxg of the redundant package received in the gth position in the receiving package order of the code stream, and the standard Cauchy matrix element set X and Y, to determine the element in the fth row and the gth column of the standard Cauchy matrix According to the above method, each element in the standard Cauchy matrix is determined, and thus the standard Cauchy matrix of R rows and M columns is obtained.

[0201] Wherein, the set X and the set Y are the same as the set X and the set Y described in S303, and will not be described here. f is greater than or equal to 1 and less than or equal to R, and g is greater than or equal to 1 and less than or equal to M.

[0202] For example, assuming that the package identification of the original package received in the 3rd position in the receiving package order of the code stream is 5, and the package identification of the redundant package received in the 4th position in the receiving package order of the code stream is 2, the element in the 3rd row and the 4th column of the standard Cauchy matrix is determined as follows: Assuming that the standard Cauchy matrix element set Y is {0, 1, …, M-2, M-1}, and the set X is {M, M+1, …, M+R-2, M+R-1}, thus x5=M+4 and y2=1,

[0203] In S310, the decoding end device selects the elements corresponding to the overlapping positions of the columns corresponding to the P lost original packages and the rows corresponding to the P redundant packages in the standard Cauchy matrix of R rows and M columns, to obtain a P-order decoding matrix.

[0204] Wherein, the P lost original packages in S310 are the lost original packages to be recovered. The P lost original packages can be selected from the N lost original packages according to actual needs, which is not limited in the embodiments of the present application. The P redundant packages are the redundant packages for original elimination.

[0205] For example, based on the example in S306 to S308, assuming that the standard Cauchy matrix of R rows and M columns constructed in S309 is in the form of the matrix shown in S309, the elements corresponding to the overlapping positions of the columns (1st column, 7th column, 8th column) corresponding to the P lost original packages (the original packages to be recovered, for example, M1, M7, M8) and the rows (2nd row, 6th row, 9th row) corresponding to the P redundant packages (the redundant packages for original elimination, M'2, M'6, M'9) in the standard Cauchy matrix of R rows and M columns are selected, to obtain a 3-order decoding matrix as follows:

[0206]

[0207] S311, the decoding end device left multiplies the inverse matrix of the P-order decoding matrix with the result of the original elimination, to obtain P lost original packets.

[0208] Exemplarily, based on the example of S306 to S310, the operation process of the lost original packets M1, M7 and M8 in the encoding process can be as follows:

[0209]

[0210]

[0211] The inverse operation of the operation process of the lost original packets M1, M7 and M8 in the encoding process can express the lost original packets M1, M7 and M8 as the result of the inverse matrix of the 3-order decoding matrix and the matrix multiplication of the result of the original elimination, and the specific expression is as follows:

[0212]

[0213] In this way, three lost original packets are recovered.

[0214] In the process of recovering the original packets in S311, only the inverse matrix of the P-order decoding matrix can recover the original packets, and for the implementation of obtaining the inverse matrix of the P-order decoding matrix, the standard Cauchy matrix is selected as the encoding and decoding matrix, because the Cauchy matrix necessarily has an inverse matrix, and the embodiments of the application provide the following several possible implementation manners.

[0215] One possible implementation manner is to obtain the inverse matrix of the P-order decoding matrix according to the inverse operation of mathematical operation, and this process is not described herein.

[0216] Exemplarily, for a 2-order matrix to obtain the inverse matrix, the positions of a and d are exchanged, the negative numbers are placed in front of b and c, and divided by the determinant (ad-bc), and the following formula (1) is obtained:

[0217]

[0218] Exemplarily, for the inverse operation of the P-order upper (lower) triangular matrix (as shown in formula (2)), the elementary transformation of the matrix can be used to obtain the inverse matrix as shown in formula (3).

[0219]

[0220] The elementary transformation is as follows:

[0221] In another possible implementation, for the inversion of a non-upper (lower) triangular matrix, if direct elementary transformation is used, the calculation amount is very large, and the transformation steps in the middle need to be recorded. When the coding matrix is a standard Cauchy matrix in a Galois field, a simplified inversion method can be: the P-order coding matrix can be decomposed into an upper triangular matrix, a lower triangular matrix, and a diagonal matrix. After the inverses of L, D, and U are calculated, the product of the inverses of L, D, and U is taken as the inverse of the P-order coding matrix.

[0222] For example, the software and hardware codes of the LDU decomposition part can refer to Pivoting and Backward Stability of Fast Algorithms for Solving Cauchy Linear Equations by Professor Thomas of Stanford University. The algorithm idea of LDU decomposition is to use the displacement structure of a matrix to specify a suitable displacement operator to speed up the Gaussian elimination process, and details are not described herein. Of course, the LDU decomposition can also refer to other algorithms, and details are not limited herein.

[0223] In a possible implementation, the process of calculating the inverses of L, D, and U can refer to the inversion method of mathematical operations, and details are not limited herein.

[0224] Further, the process of inverting the matrix of formula (2) to obtain the matrix of formula (3) is demonstrated. For the inversion of a P-order upper (lower) triangular matrix, the inversion can be represented as:

[0225] The P-order lower left triangular matrix is split into P matrices according to columns as follows:

[0226]

[0227] The split P matrices are multiplied from right to left, and the process is as follows:

[0228]

[0229] The process is continued to multiply to the left, and the process is as follows:

[0230]

[0231] The right side result in formula (5) is compared with the right half content in formula (3) It is found that the two only differ in the signs of addition and subtraction operations, and are completely equivalent in the Galois field. The addition and subtraction in the Galois field are both XOR operations in binary. Therefore, in the Galois field, the above demonstration process can be used as the inversion method of a lower triangular matrix, and the inverse of an upper triangular matrix can be calculated based on the same idea.

[0232] Exemplarily, based on the above ideas, an embodiment of the present application provides a method for obtaining the inverse matrix of a lower triangular matrix using a Galois field, which may specifically include: determining the inverse element of each element in the lower triangular matrix; arranging the inverse elements of each element in the lower triangular matrix according to the position of the element in the lower triangular matrix to form the inverse matrix of the lower triangular matrix.

[0233] The inverse elements of the diagonal elements and the first element below the diagonal elements in the lower triangular matrix are themselves; the inverse elements of the other elements in the lower triangular matrix except the diagonal elements and the first element below the diagonal elements are obtained according to the following formula:

[0234]

[0235] Among them, L o,s -1 is the element L in the oth row and sth column of the lower triangular matrix o,s The inverse element of L o,s i L is the lower triangular matrix o,s The inverse element of the i-th element below the diagonal element in the column, L o,s i′ L is the lower triangular matrix o,s The inverse element of the i-th element on the right; A is L o,s The number of elements separated from the diagonal elements in the column or row direction.

[0236] For example, the inversion process of the lower triangular matrix is ​​expressed in code. The elements on the rows and columns of the corresponding matrix are parsed from right to left. The matrix is ​​denoted as L, the row and column are denoted as i and j respectively, the diagonal element and the first element below it remain unchanged, and the multiplication and accumulation are performed in sequence starting from the second element below the diagonal element. The following expression is derived:

[0237] L[i][i] == 1; (i.e. the diagonal elements remain unchanged);

[0238] L[i+1][i] == L[i+1][i]; (the first element below the diagonal element remains unchanged);

[0239] L[j][i]==L[j-1][i]*L[j][i+1]+L[j][i];

[0240] j==R(>=3); when i==R-2, when j==R, L[j][i]==L[j-1][i]*L[j][i+1]+L[j][i];

[0241] When i==R-3, j==R-1, L[j][i]==L[j-1][i]*L[j][i+1]+L[j][i].

[0242] For example, the pseudo-code expression of the lower triangular matrix inversion process can be:

[0243]

[0244] For example, based on the above pseudocode expression, when i=2, j=4, j++=5, k=3, k++=4, L[3][2]*L[4][3]==>L[3][2]*L[5][3]+L[4][2]*L[5][4].

[0245] For example, for the lower triangular matrix The inverse matrix of the lower triangular matrix is ​​a matrix consisting of the inverse elements of the elements in the lower triangular matrix: the inverse element of the diagonal element 1 of the lower triangular matrix is ​​itself and remains unchanged. The inverse elements of the first elements below the diagonal element g, a, d, and f are also themselves and remain unchanged. The inverse elements of the elements in the lower triangular matrix other than the diagonal elements and the first element below the diagonal elements are as follows:

[0246] The element h is the element L in row o=3 and column s=1 3,1 , which is separated from the diagonal elements by 1 element in the column direction or row direction, L 3,1 The inverse element of the first element below the diagonal element in the column is g, L 3,1 The inverse element of the first element a on the right is a, that is, the inverse element H=ga+h of the element h.

[0247] Element b is the element L in row o=4 and column s=2 4,2 , which is separated from the diagonal elements by 1 element in the column direction or row direction, L 4,2 The inverse element of the first element below the diagonal element in the column is a, L 4,2 The inverse element of the first element d on the right is d, that is, the inverse element S=ad+b of element b.

[0248] The element e is the element L in row o=5 and column s=3 5,3 , which is separated from the diagonal elements by 1 element in the column direction or row direction, L 5,3 The inverse element of the first element below the diagonal element in the column is d, L 5,3 The inverse element of the first element f on the right is f, that is, the inverse element of element e K = df + e.

[0249] Element i is the element L in row o=4 and column s=1 4,1 , which is 2 elements away from the diagonal elements in the column direction or row direction, L4,1 The inverse element of the 1st element below the diagonal element in the column where the element is located is g, L 4,1 The inverse element of the 1st element on the right side is S, L 4,1 The inverse element of the 2nd element below the diagonal element in the column where the element is located is H, L 4,1 The inverse element of the 2nd element on the right side is d, that is, the inverse element of the element i is Z = gS + Hd + i.

[0250] The element c is the element L in the o = 5th row and the s = 2nd column 5,2 , which is spaced 2 elements apart from the diagonal element in the column direction or the row direction, L 5,2 The inverse element of the 1st element below the diagonal element in the column where the element is located is a, L 5,2 The inverse element of the 1st element on the right side is K, L 5,2 The inverse element of the 2nd element below the diagonal element in the column where the element is located is S, L 5,2 The inverse element of the 2nd element on the right side is f, that is, the inverse element of the element c is Y = aK + Sf + c.

[0251] The element j is the element L in the o = 5th row and the s = 1st column 5,1 , which is spaced 3 elements apart from the diagonal element in the column direction or the row direction, L 5,1 The inverse element of the 1st element below the diagonal element in the column where the element is located is g, L 5,1 The inverse element of the 1st element on the right side is Y, L 5,1 The inverse element of the 2nd element below the diagonal element in the column where the element is located is H, L 5,1 The inverse element of the 2nd element on the right side is K, L 5,1 The inverse element of the 3rd element below the diagonal element in the column where the element is located is Z, L 5,1 The inverse element of the 3rd element on the right side is f, that is, the inverse element of the element j is P = gY + HK + Zf + j.

[0252] Therefore, the inverse matrix of the lower triangular matrix is expressed as follows:

[0253]

[0254] Exemplarily, based on the above idea, the embodiment of the application provides a method for obtaining the inverse matrix of an upper triangular matrix in a Galois field, which specifically can include: determining the inverse element of each element in the upper triangular matrix; and arranging the inverse elements of each element in the upper triangular matrix according to the position of the element in the upper triangular matrix to form the inverse matrix of the upper triangular matrix.

[0255] wherein the inverse of the diagonal element and the first element above the diagonal element in the upper triangular matrix is itself; the inverse of the other elements in the upper triangular matrix is obtained according to the following formula:

[0256]

[0257] wherein L p,q -1 is the inverse of the element L p,q in the pth row and qth column of the upper triangular matrix; L p,q i is the inverse of the ith element above the diagonal element in the column where L p,q is located; L p,q i′ is the inverse of the ith element to the left of L p,q ; B is the number of elements spaced from the diagonal element in the column direction or row direction. p,q

[0258] For example, the inverse process of the upper triangular matrix is expressed by code, the elements on the rows and columns of the matrix are parsed from right to left once, the matrix is denoted as L, the rows and columns are denoted as i and j respectively, the diagonal element and the first element above the diagonal element remain unchanged, the product accumulation is performed on the second element above the diagonal element and the subsequent elements, and the pseudo code expression of the inverse process of the upper triangular matrix can be as follows:

[0259]

[0260] For example, for the upper triangular matrix The inverse matrix of the upper triangular matrix is a matrix composed of the inverse elements of the elements in the upper triangular matrix: the inverse element of the diagonal element 1 of the upper triangular matrix is itself, which remains unchanged, the inverse elements of the first elements g, a, d, and f above the diagonal element are also themselves, which remain unchanged. The inverse elements of the elements in the upper triangular matrix other than the diagonal element and the first element above the diagonal element are as follows:

[0261] The element h is the element L 3,5 in the p = 3th row and q = 5th column, which is spaced by 1 element from the diagonal element in the column direction or row direction, the inverse element of the 1st element above the diagonal element in the column where L 3,5 is located is g, and the inverse element of the 1st element to the left of L 3,5 is a, i.e. the inverse element H of the element h is ga + h.

[0262] The element b is the element L 2,4 in the p = 2th row and q = 4th column, which is spaced by 1 element from the diagonal element in the column direction or row direction, the inverse element of the 1st element above the diagonal element in the column where L 2,4 ​The inverse of the 1st element above the diagonal element in the column where it is located is a, L 2,4 The inverse of the 1st element to the left is d, i.e. the inverse of element b is S = ad + b.

[0263] Element e is the element L in row p = 1, column s = 3 1,3 which is 1 element away from the diagonal element in either the column or row direction, L 1,3 The inverse of the 1st element above the diagonal element in the column where it is located is d, L 1,3 The inverse of the 1st element to the left is f, i.e. the inverse of element e is K = df + e.

[0264] Element i is the element L in row p = 2, column q = 5 2,5 which is 2 elements away from the diagonal element in either the column or row direction, L 2,5 The inverse of the 1st element above the diagonal element in the column where it is located is g, L 2,5 The inverse of the 1st element to the left is S, L 2,5 The inverse of the 2nd element above the diagonal element in the column where it is located is H, L 2,5 The inverse of the 2nd element to the left is d, i.e. the inverse of element i is Z = gS + Hd + i.

[0265] Element c is the element L in row p = 1, column q = 4 1,4 which is 2 elements away from the diagonal element in either the column or row direction, L 1,4 The inverse of the 1st element above the diagonal element in the column where it is located is a, L 1,4 The inverse of the 1st element to the left is K, L 1,4 The inverse of the 2nd element above the diagonal element in the column where it is located is S, L 1,4 The inverse of the 2nd element to the left is f, i.e. the inverse of element c is Y = aK + Sf + c.

[0266] Element j is the element L in row p = 1, column q = 5 1,5 which is 3 elements away from the diagonal element in either the column or row direction, L 1,5 The inverse of the 1st element above the diagonal element in the column where it is located is g, L 1,5 The inverse of the 1st element to the left is Y, L 1,5 The inverse of the 2nd element above the diagonal element in the column where it is located is H, L 1,5 The inverse of the 2nd element to the left is K, L 1,5 The inverse of the 3rd element above the diagonal element in the column where it is located is Z, L 1,5 The inverse of the 3rd element to the left is f, i.e. the inverse of element j is P = gY + HK + Zf + j.

[0267] Therefore, the inverse matrix of the upper triangular matrix is expressed as follows:

[0268]

[0269] It should be noted that through the above process of inverting the upper and lower triangular matrix, it can be known that the complexity of the inversion algorithm is mainly concentrated in the P element position derived above, that is, the first column of the last row (lower left corner) of the lower triangular matrix L and the first row of the last column (upper right corner) of the upper triangular matrix U, and the calculation complexity of the remaining elements decreases in turn. In this way, there is a very obvious optimization effect compared with the resource consumption and calculation delay of the multiplication of the P order matrix.

[0270] It should be noted that the execution order of the steps included in the coding and decoding method provided by the embodiments of the present application can be configured according to actual needs, and the drawings of the embodiments of the present application only illustrate possible execution orders and do not constitute a limitation.

[0271] Through the coding and decoding steps provided by the embodiments of the present application, since the decoding matrix is a standard Cauchy matrix, the construction is simple, and the burden of coding and decoding is reduced. In addition, since the decoding matrix is a standard Cauchy matrix, the decoding end can directly determine the element to construct the decoding matrix according to the receiving order and the packet identifier of the data packet in the code stream, even if the original packet and the redundant packet are out of order, there is no need to reorder, which greatly reduces the resource consumption and calculation delay.

[0272] Based on the scheme provided by the present application, the performance of the FEC hardware accelerator using the scheme of the present application is tested in three dimensions through experiments. The three parameters M, R and L carried in the encoding parameters respectively represent the number of original packets, the number of redundant packets and the encoding length. The double data rate (DDR) delay is 200 nanoseconds (ns), and there is a 3% 1000 ns bus large delay. The performance data at a clock frequency of 500 megahertz, based on the typical scenario M = 78, R = 22, L = 800, Figures 4 to 6 respectively, are the performance diagrams of fixing two parameters and changing the other parameter.

[0273] The FEC fixes the number of original packets M and the packet length L, and changes the number of redundant packets R. The performance data curve changing with the number of redundant packets R is as shown in Figure 4 .

[0274] The FEC fixes the number of redundant packets R and the packet length L, and changes the number of original packets M. The performance data curve changing with the number of original packets M is as shown in Figure 5 .

[0275] The FEC fixes the number of original packets M and the number of redundant packets R, and changes the packet length L. The performance data curve changing with the packet length L is as shown inFigure 6 As shown.

[0276] The above mainly introduces the scheme provided by the embodiments of the present application from the working principle of the encoding device and the decoding device. It can be understood that the encoding device and the decoding device contain the hardware structure and / or software module for executing the respective functions in order to realize the above functions. The unit in the encoding device for executing the functions in the above method embodiments is referred to as an encoding apparatus, and the unit in the decoding device for executing the functions in the above method embodiments is referred to as a decoding apparatus. Those skilled in the art should easily realize that the units and algorithm steps of each example described in combination with the embodiments disclosed in the present application can be realized in the form of hardware or the combination of hardware and computer software. Whether a certain function is realized in the form of hardware or computer software driving hardware depends on the specific application and design constraints of the technical solution. The skilled person can use different methods to realize the described functions for each specific application, but such implementation should not be considered beyond the scope of the present application.

[0277] The embodiments of the present application can divide the functional modules of the apparatus for executing the coding method provided by the present application according to the above method examples. For example, each functional module can be divided corresponding to each function, or two or more functions can be integrated in one processing module. The above integrated module can be realized in the form of hardware or software functional module. It should be noted that the division of the modules in the embodiments of the present application is illustrative, and is only a logical functional division. There can be another division manner when actually implemented.

[0278] In the case of dividing each functional module corresponding to each function, Figure 7 A possible structure schematic diagram of the decoding apparatus 70 for executing the decoding method provided by the present application deployed in the decoding device involved in the above embodiments is shown. The decoding apparatus 70 can be a functional module or a chip. As shown in the figure, Figure 7 The decoding apparatus 70 can include an acquisition unit 701, a determination unit 702, a deoriginal unit 703, a construction unit 704, a selection unit 705, and a processing unit 706. The acquisition unit 701 is configured to execute the process S306 in Figure 3 The determination unit 702 is configured to execute the process S307 in Figure 3 The deoriginal unit 703 is configured to execute the process S308 in Figure 3 The construction unit 704 is configured to execute the process S309 in Figure 3 The selection unit 705 is configured to execute the process S310 in Figure 3 The processing unit 706 is configured to execute the process S311 in Figure 3In the process S311. Among them, all relevant contents of each step involved in the above method embodiment can be referred to the functional description of the corresponding functional module, and will not be repeated here.

[0279] In the case of an integrated unit, Figure 8 FIG. 1 shows a possible structural diagram of the decoding device involved in the above embodiment. Figure 8 As shown, the decoding device 80 may include: a processing module 801 and a communication module 802. The processing module 801 is used to control and manage the actions of the decoding device 80, and the communication module 802 is used to communicate with other devices. For example, the processing module 801 is used to execute Figure 3 The decoding device 80 may further include a storage module 803 for storing program codes and data of the decoding device 80 .

[0280] Among them, the processing module 801 can be Figure 2 The processor 201 in the physical structure of the communication device 20 shown can be a processor or a controller. For example, it can be a CPU, a general-purpose processor, a DSP, an ASIC, an FPGA or other programmable logic device, a transistor logic device, a hardware component or any combination thereof. It can implement or execute various exemplary logic blocks, modules and circuits described in conjunction with the disclosure of this application. The processing module 801 can also be a combination that implements computing functions, such as a combination of one or more microprocessors, a combination of a DSP and a microprocessor, etc. The communication module 802 can be Figure 2 The transceiver 203 in the physical structure of the communication device 20 shown, the communication module 802 can be a communication port, or can be a transceiver, a transceiver circuit or a communication interface. Alternatively, the above-mentioned communication interface can realize communication with other devices through the above-mentioned elements with transceiver functions. The above-mentioned elements with transceiver functions can be realized by antennas and / or radio frequency devices. The storage module 803 can be Figure 2 The communication device 20 is shown with a memory 202 in its physical structure.

[0281] When the processing module 801 is a processor, the communication module 802 is a transceiver, and the storage module 803 is a memory, the embodiment of the present application Figure 8 The decoding device 80 involved can be Figure 2 The communication device 20 is shown.

[0282] As mentioned above, the decoding device 70 or decoding equipment 80 provided in the embodiments of the present application can be used to implement the corresponding functions in the methods implemented in the above-mentioned embodiments of the present application. For the convenience of explanation, only the parts related to the embodiments of the present application are shown. For specific technical details not disclosed, please refer to the embodiments of the present application.

[0283] In the case of dividing each functional module into corresponding functional modules, Figure 9 FIG1 shows a possible structural diagram of an encoding device 90 deployed in the encoding device involved in the above embodiment to execute the encoding method provided by the present application. The encoding device 90 may be a functional module or a chip. Figure 9 As shown, the encoding device 90 may include: an acquisition unit 901, a construction unit 902, an encoding unit 903, and a sending unit 904. The acquisition unit 901 is used to perform Figure 3 Process S301 or S302 in the process; construction unit 902 is used to perform Figure 3 Process S303 in the encoding unit 903 is used to perform Figure 3 Process S304 in the sending unit 904 is used to execute Figure 3 In the process S305. Among them, all relevant contents of each step involved in the above method embodiment can be referred to the functional description of the corresponding functional module, and will not be repeated here.

[0284] In the case of an integrated unit, Figure 10 FIG. 1 shows a possible structural diagram of the encoding device involved in the above embodiment. Figure 10 As shown, the encoding device 100 may include: a processing module 1001 and a communication module 1002. The processing module 1001 is used to control and manage the actions of the encoding device 100, and the communication module 1002 is used to communicate with other devices. Figure 3 In any of the processes S301 to S304, the processing module 1001 executes the communication module 1002 Figure 3 The encoding device 100 may further include a storage module 1003 for storing program codes and data of the encoding device 100 .

[0285] Among them, the processing module 1001 can be Figure 2 The processor 201 in the physical structure of the communication device 20 shown can be a processor or a controller. For example, it can be a CPU, a general-purpose processor, a DSP, an ASIC, an FPGA or other programmable logic device, a transistor logic device, a hardware component or any combination thereof. It can implement or execute various exemplary logic blocks, modules and circuits described in conjunction with the disclosure of this application. The processing module 1001 can also be a combination that implements computing functions, such as a combination of one or more microprocessors, a combination of a DSP and a microprocessor, and so on. The communication module 1002 can be Figure 2The transceiver 203 in the physical structure of the communication device 20 shown in the figure, the communication module 1002 can be a communication port, or can be a transceiver, transceiver circuit or communication interface, etc. Alternatively, the above-mentioned communication interface can realize communication with other devices through the above-mentioned element with transceiving function. The above-mentioned element with transceiving function can be realized by an antenna and / or a radio frequency device. The storage module 1003 can be Figure 2 The memory 202 in the physical structure of the communication device 20 shown in the figure.

[0286] When the processing module 1001 is a processor, the communication module 1002 is a transceiver, and the storage module 1003 is a memory, the embodiment of the present application Figure 10 The encoding device 100 involved can be Figure 2 The communication device 20 shown in the figure.

[0287] As described above, the encoding apparatus 90 or the encoding device 100 provided by the embodiment of the present application can be used to implement the corresponding functions in the method implemented by the embodiments of the present application. For the convenience of description, only the parts related to the embodiments of the present application are shown, and the specific technical details not disclosed are referred to the embodiments of the present application.

[0288] As another form of the embodiment, a computer readable storage medium is provided, which stores instructions, and the instructions are executed to perform the encoding and decoding method in the method embodiment.

[0289] As another form of the embodiment, a computer program product is provided, which contains instructions, and when the computer program product is run on a computer, the computer is caused to perform the encoding and decoding method in the method embodiment.

[0290] The embodiment of the present application further provides a chip system, which includes a processor for implementing the technical method of the embodiment of the present application. In a possible design, the chip system further includes a memory for saving the necessary program instructions and / or data of the embodiment of the present application. In a possible design, the chip system further includes a memory for the processor to call the application program code stored in the memory. The chip system can be composed of one or more chips, or can include chips and other discrete devices, and the embodiment of the present application does not make specific limitation thereto.

[0291] The steps of a method or algorithm described in connection with the present disclosure can be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. A software module can reside in RAM, flash memory, ROM, erasable programmable ROM (EPROM), electrically EPROM (EEPROM), registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art. An exemplary storage medium is coupled to the processor such that the processor can read information from, and write information to, the storage medium. In the alternative, the storage medium can be integral to the processor. The processor and the storage medium can reside in an ASIC. Alternatively, the processor and the storage medium can be external to the ASIC. In the alternative, the storage medium can be remote from the processor, e.g., in access terminal. The processor can execute a software module from the storage medium, e.g., an application program, or can execute a software module not resident in the memory. The processor can execute the software module to provide the functionality described herein.

[0292] The steps of a method or algorithm described in connection with the present disclosure can be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. A software module can reside in RAM, flash memory, ROM, erasable programmable ROM (EPROM), electrically EPROM (EEPROM), registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art. An exemplary storage medium is coupled to the processor such that the processor can read information from, and write information to, the storage medium. In the alternative, the storage medium can be integral to the processor. The processor and the storage medium can reside in an ASIC. Alternatively, the processor and the storage medium can be external to the ASIC. In the alternative, the processor and the storage medium can be integrated in the ASIC. The ASIC can reside in a core network interface device. In the alternative, the processor and the storage medium can reside as discrete components in the core network interface device. Alternatively, the memory can be coupled to the processor through a bus. The processor can process information stored in the memory to generate output information for use by an output device or for use by another device via a communication link. The application software can comprise one or more software modules to be executed by the processor using the memory.

[0293] Those skilled in the art can clearly understand that, for the convenience and brevity, only the division of the above functional modules is taken as an example for description, and in actual application, the above functions can be completed by different functional modules according to needs, that is, the internal structure of the device is divided into different functional modules to complete all or part of the functions described above.

[0294] In several embodiments provided in the present application, it should be understood that the disclosed apparatus and method can be implemented in other ways. For example, the above-described device embodiments are merely illustrative. For example, the division of the modules or units is only a logical function division, and actual implementation can have another division manner. For example, a plurality of units or components can be combined or integrated into another device, or some features can be ignored or not executed. In addition, the coupling or direct coupling or communication connection between the units or components shown or discussed can be indirect coupling or communication connection through some interface, device or unit, and can be electrical, mechanical or other forms.

[0295] The units described as separate components may or may not be physically separate, and the components displayed as units may be a physical unit or multiple physical units, that is, may be located in one place, or also can be distributed to multiple different places. Part or all of the units can be selected according to actual needs to achieve the purpose of the embodiment scheme.

[0296] In addition, each functional unit in each embodiment of the present application can be integrated in one processing unit, or each unit can be physically present alone, or two or more units can be integrated in one unit. The integrated unit can be realized in the form of hardware or in the form of a software functional unit.

[0297] The integrated unit, if realized in the form of a software functional unit and sold or used as an independent product, can be stored in a readable storage medium. Based on such understanding, the technical scheme of the embodiments of the present application essentially or the part that contributes to the prior art or the whole or part of the technical scheme can be embodied in the form of a software product, which is stored in a storage medium and includes a plurality of instructions for making a device (which can be a single-chip microcomputer, a chip, etc.) or a processor execute all or part of the steps of the method described in each embodiment of the present application. The foregoing storage medium includes: a U disk, a mobile hard disk, a ROM, a RAM, a magnetic disk or an optical disk and various program code storage media.

[0298] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto, any change or replacement within the technical scope disclosed in the present application should be covered in the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims

1. A decoding method, comprising: The method comprises: acquiring a code stream, the code stream comprising X original packets and Q redundant packets; analyzing the code stream to acquire the X original packets and the Q redundant packets according to a number M of original packets, a number R of redundant packets and a packet length L when the code stream is encoded, determining a number N of lost original packets, the N being equal to the M minus the X; the Q being less than or equal to the R; performing original elimination on P redundant packets in the Q redundant packets to obtain an original elimination result; wherein the P redundant packets are redundant packets satisfying a condition; the P being a smaller one of the N and the Q; constructing a standard Cauchy matrix with R rows and M columns according to a packet receiving order and a packet identifier in the code stream; wherein the packet identifier is used to indicate the packet order when being encoded; selecting elements corresponding to overlapping positions of columns corresponding to the P lost original packets and rows corresponding to the P redundant packets in the standard Cauchy matrix to obtain a P-order decoding matrix; performing LDU decomposition of an upper triangular matrix, a diagonal matrix and a lower triangular matrix on the P-order decoding matrix to obtain an upper triangular matrix, a diagonal matrix and a lower triangular matrix; respectively acquiring an inverse matrix of the upper triangular matrix, an inverse matrix of the diagonal matrix and an inverse matrix of the lower triangular matrix; taking a product of the inverse matrix of the upper triangular matrix, the inverse matrix of the diagonal matrix and the inverse matrix of the lower triangular matrix as an inverse matrix of the P-order decoding matrix; multiplying the original elimination result on the left by the inverse matrix of the P-order decoding matrix to obtain the P lost original packets.

2. The method of claim 1, wherein, The step of constructing the standard Cauchy matrix with R rows and M columns according to the packet receiving order and the packet identifier in the code stream comprises: According to the packet identifier of the original packet received in the first receiving order of the code stream , the packet identifier of the redundant packet received in the first receiving order of the code stream , and the standard Cauchy matrix element sets X and Y, the element in the first row and the first column of the standard Cauchy matrix is determined as = . Wherein, the X includes , the Y includes , is greater than or equal to 1, and less than or equal to the R, is greater than or equal to 1, and less than or equal to the M; With the are independent elements; is greater than or equal to 1, and less than or equal to the R, Greater than or equal to 1, and less than or equal to the M.

3. The method according to claim 1 or 2, characterized in that, the standard Cauchy matrix is a Cauchy matrix of a Galois field.

4. The method of claim 1, wherein, The step of acquiring the inverse matrix of the lower triangular matrix comprises: determining inverse elements of each element in the lower triangular matrix; arranging the inverse elements of each element in the lower triangular matrix according to positions of the elements in the lower triangular matrix to form the inverse matrix of the lower triangular matrix; wherein inverse elements of diagonal elements and a first element below the diagonal elements in the lower triangular matrix are themselves; inverse elements of other elements in the lower triangular matrix except the diagonal elements and the first element below the diagonal elements are obtained according to the following formula: ； Wherein, the is the inverse element of the element in the row and the column of the lower triangular matrix; the is the inverse element of the element below the diagonal element in the column where the is located in the lower triangular matrix, the is the inverse element of the element on the right side of the in the lower triangular matrix; the is the inverse element of the element on the left side of the in the lower triangular matrix; the is the inverse element of the element below the diagonal element in the column where the is located in the lower triangular matrix; the is the number of elements spaced from the diagonal element in the column direction or the row direction.

5. The method according to claim 1 or 4, characterized in that, The step of acquiring the inverse matrix of the upper triangular matrix comprises: determining inverse elements of each element in the upper triangular matrix; arranging the inverse elements of each element in the upper triangular matrix according to positions of the elements in the upper triangular matrix to form the inverse matrix of the upper triangular matrix; wherein inverse elements of diagonal elements and a first element above the diagonal elements in the upper triangular matrix are themselves; inverse elements of other elements in the upper triangular matrix except the diagonal elements and the first element above the diagonal elements are obtained according to the following formula: ； Among them, the is the first Rank Column Elements The inverse element of For the upper triangular matrix described The diagonal element above the column The inverse element of the element, For the upper triangular matrix described Left side The inverse element of an element; For the The number of elements separated from the diagonal elements in the column or row direction.

6. The method of claim 2, wherein, the X and the Y have no intersection.

7. The method of claim 2, wherein, the Y is {0, 1, …, M-2, M-1}, and the X is {M, M+1, …, M+R-2, M+R-1}.

8. An encoding method characterized by comprising: The method comprises: acquiring a number M of original packets, a number R of redundant packets and a packet length L; acquiring M original packets; A standard Cauchy matrix of R rows and M columns is constructed as the encoding matrix, the element in the i-th row and j-th column of the encoding matrix being ; the elements ; the elements ; the elements ; the elements are independent of each other, the elements belong to a set X comprising R elements, the elements belong to a set Y comprising M elements, the elements are greater than or equal to 1 and less than or equal to the R, the elements are greater than or equal to 1 and less than or equal to the M; multiplying the M original packets on the left by the encoding matrix to obtain R redundant packets. The M original packets and the R redundant packets are sent, and the M original packets and the R redundant packets are parsed to obtain X original packets and Q redundant packets when the code stream is decoded, wherein P redundant packets in the Q redundant packets are deoriginalized to obtain a deoriginalization result, and the Q is less than or equal to the R; The standard Cauchy matrix is used to select columns corresponding to the P lost original packets and elements corresponding to overlapping positions of rows corresponding to the P redundant packets to obtain a P-order decoding matrix; the P-order decoding matrix is subjected to upper triangular matrix, diagonal matrix and lower triangular matrix LDU decomposition to obtain an upper triangular matrix, a diagonal matrix and a lower triangular matrix; inverse matrices of the upper triangular matrix, the diagonal matrix and the lower triangular matrix are respectively obtained; a product of the inverse matrices of the upper triangular matrix, the diagonal matrix and the lower triangular matrix is taken as an inverse matrix of the P-order decoding matrix, and the inverse matrix of the P-order decoding matrix is used to obtain the P lost original packets.

9. The method of claim 8, wherein, The encoding matrix is a Galois field Cauchy matrix, the less than .

10. The method according to claim 8 or 9, characterized in that, The X and the Y have no intersection.

11. The method according to claim 8 or 9, characterized in that, The Y is {0, 1, …, M-2, M-1}, and the X is {M, M+1, …, M+R-2, M+R-1}.

12. A decoding apparatus, characterized by comprising: The device comprises: An acquisition unit is configured to acquire a code stream, wherein the code stream comprises X original packets and Q redundant packets. A determination unit is configured to determine a number N of lost original packets according to a number M of original packets, a number R of redundant packets and a packet length L when the code stream is encoded, wherein the N is equal to the M minus the X, and the Q is less than or equal to the R. A deoriginalization unit is configured to deoriginalize P redundant packets in the Q redundant packets to obtain a deoriginalization result, wherein the P redundant packets are redundant packets satisfying a condition, and the P is a smaller value in the N and the Q. A construction unit is configured to construct a standard Cauchy matrix with R rows and M columns according to a packet receiving sequence and a packet identifier in the code stream, wherein the packet identifier is used to indicate a packet sequence when the code stream is encoded. A selection unit is configured to select columns corresponding to the P lost original packets and elements corresponding to overlapping positions of rows corresponding to the P redundant packets in the standard Cauchy matrix to obtain a P-order decoding matrix. An inverse calculation unit is configured to perform upper triangular matrix, diagonal matrix and lower triangular matrix LDU decomposition on the P-order decoding matrix to obtain an upper triangular matrix, a diagonal matrix and a lower triangular matrix, and to respectively obtain inverse matrices of the upper triangular matrix, the diagonal matrix and the lower triangular matrix, and to take a product of the inverse matrices of the upper triangular matrix, the diagonal matrix and the lower triangular matrix as an inverse matrix of the P-order decoding matrix. A processing unit is configured to left-multiply the deoriginalization result by the inverse matrix of the P-order decoding matrix to obtain the P lost original packets.

13. The decoding apparatus of claim 12, wherein, The construction unit is specifically configured to: According to the packet identifier of the original packet received in the first receiving order of the code stream , the packet identifier of the redundant packet received in the first receiving order of the code stream , and the standard Cauchy matrix element sets X and Y, the element in the first row and the first column of the standard Cauchy matrix is determined as = . wherein said X comprises , said Y comprises , said is greater than or equal to 1 and less than or equal to said R, said is greater than or equal to 1 and less than or equal to said M; said is independent of said are independent elements of each other; said is greater than or equal to 1 and less than or equal to said R, said is greater than or equal to 1 and less than or equal to said M.

14. The decoding apparatus of claim 12 or 13, wherein, The standard Cauchy matrix is a Cauchy matrix in a Galois field.

15. The decoding device of claim 12, wherein, The inverse calculation unit is specifically configured to: Determine inverse elements of each element in the lower triangular matrix. The inverse elements of each element in the lower triangular matrix are arranged according to the positions of the elements in the lower triangular matrix to form an inverse matrix of the lower triangular matrix; The inverse element of the diagonal element in the lower triangular matrix and the first element below the diagonal element is itself; The inverse elements of other elements in the lower triangular matrix except the diagonal element and the first element below the diagonal element are obtained according to the following formula: ； Among them, the is the first Rank Column Elements The inverse element of For the lower triangular matrix described in The diagonal element below the column The inverse element of the element, For the lower triangular matrix described in Right side The inverse element of an element; For the The number of elements separated from the diagonal elements in the column or row direction.

16. The decoding apparatus of claim 12 or 15, wherein, The inverse unit is specifically used for: determining the inverse element of each element in the upper triangular matrix; arranging the inverse elements of each element in the upper triangular matrix according to the positions of the elements in the upper triangular matrix to form an inverse matrix of the upper triangular matrix; The inverse element of the diagonal element in the upper triangular matrix and the first element above the diagonal element is itself; The inverse elements of other elements in the upper triangular matrix except the diagonal element and the first element above the diagonal element are obtained according to the following formula: ； Among them, the is the first Rank Column Elements The inverse element of For the upper triangular matrix described The diagonal element above the column The inverse element of the element, For the upper triangular matrix described Left side The inverse element of an element; For the The number of elements separated from the diagonal elements in the column or row direction.

17. The decoding device of claim 13, wherein, The X and the Y have no intersection.

18. The decoding device of claim 13, wherein, The Y is {0, 1, …, M-2, M-1}, and the X is {M, M+1, …, M+R-2, M+R-1}.

19. An encoding apparatus, comprising: The encoding device comprises: an acquisition unit configured to acquire a number M of original packets, a number R of redundant packets, and a packet length L; the acquisition unit is further configured to acquire the M original packets; a building unit for building a standard Cauchy matrix of R rows and M columns as an encoding matrix, the element in the i-th row and j-th column of said encoding matrix being ; said ; said ; said ; said ; said ; said ; said ; said ; said an encoding unit configured to left-multiply the M original packets by the encoding matrix to obtain R redundant packets; a sending unit configured to send the M original packets and the R redundant packets, the M original packets and the R redundant packets being used to obtain X original packets and Q redundant packets after being parsed during decoding of a code stream, wherein P redundant packets in the Q redundant packets are subjected to original elimination to obtain an original elimination result, and the Q is less than or equal to the R; The standard Cauchy matrix is used to select columns corresponding to the P lost original packets during decoding, and elements at overlapping positions of rows corresponding to the P redundant packets are obtained to obtain a P-order decoding matrix; the P-order decoding matrix is subjected to upper triangular matrix, diagonal matrix, and lower triangular matrix LDU decomposition to obtain an upper triangular matrix, a diagonal matrix, and a lower triangular matrix; inverse matrices of the upper triangular matrix, the diagonal matrix, and the lower triangular matrix are obtained respectively; and a product of the inverse matrices of the upper triangular matrix, the diagonal matrix, and the lower triangular matrix is taken as an inverse matrix of the P-order decoding matrix, which is used to obtain the P lost original packets.

20. The encoding device of claim 19, wherein, The encoding matrix is a Galois field Cauchy matrix, the less than .

21. The encoding apparatus of claim 19 or 20, wherein, The X and the Y have no intersection.

22. The encoding apparatus of claim 19 or 20, wherein, The Y is {0, 1, …, M-2, M-1}, and the X is {M, M+1, …, M+R-2, M+R-1}.

23. A decoding apparatus, comprising: The decoding device comprises a processor and a transmission interface; the transmission interface is configured to receive and send data; the processor is configured to invoke software instructions stored in a memory to enable the decoding device to perform the decoding method in any one of claims 1 to 7.

24. An encoding apparatus, comprising: The encoding device comprises a processor and a transmission interface; the transmission interface is configured to receive and send data; The processor is configured to invoke software instructions stored in the memory to cause the encoding apparatus to perform the encoding method of any one of claims 8-11.

25. A computer-readable storage medium, characterized in that, The computer readable storage medium has stored therein instructions which, when executed on a computer or processor, cause the computer or processor to perform the decoding method or the encoding method of any one of claims 1-11.

26. A computer program product, characterised in that, An article of manufacture including instructions which, when executed on a computer or processor, cause the computer or processor to perform the decoding method or the encoding method of any one of claims 1-11.

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