Display device

Abstract

The present disclosure provides a display device, including a substrate, a thin-film transistor, a first insulating layer, a pixel electrode, and a common electrode. The thin-film transistor is disposed on the substrate and includes a drain. The first insulating layer is disposed on the thin-film transistor and includes a first opening. The pixel electrode is disposed on the first insulating layer and is electrically connected to the drain through the first opening. The common electrode is disposed on the pixel electrode and within the first opening.

Description

[0001] This disclosure is a divisional application of the patent application for invention titled "Display Device" with the application number 202010830552.0, filed on August 18, 2020. Technical Field

[0002] This disclosure relates to an electronic device, and more particularly to a display device that can improve and stabilize the electron transfer between a pixel electrode and a drain electrode. Background Art

[0003] Flat display panels have been widely used in electronic devices such as mobile phones, televisions, monitors, tablet computers, vehicle-mounted displays, wearable devices, and desktop computers. With the booming development of electronic products, the requirements for the display quality on electronic products are getting higher and higher, making the electronic devices for display continuously improved towards a larger or higher resolution display effect. Summary of the Invention

[0004] This disclosure provides a display device that can improve and stabilize the electron transfer between a pixel electrode and a drain electrode.

[0005] According to an embodiment of this disclosure, a display device includes a substrate, a thin-film transistor, a first insulating layer, a pixel electrode, and a common electrode. The thin-film transistor is disposed on the substrate and includes a drain electrode. The first insulating layer is disposed on the thin-film transistor and includes a first opening. The pixel electrode is disposed on the first insulating layer and is electrically connected to the drain electrode through the first opening. The common electrode is disposed on the pixel electrode and within the first opening.

[0006] According to an embodiment of this disclosure, a display device includes a substrate, a thin-film transistor, a first insulating layer, and a pixel electrode. The thin-film transistor is disposed on the substrate and includes a gate electrode. The first insulating layer is disposed on the thin-film transistor and includes a first opening. The pixel electrode is disposed on the first insulating layer and is electrically connected to the thin-film transistor through the first opening. The first opening overlaps with the gate electrode.

[0007] According to an embodiment of this disclosure, an electronic device includes a substrate, a thin-film transistor, a first insulating layer, a first electrode, a second insulating layer, and a second electrode. The thin-film transistor is disposed on the substrate and includes a drain electrode. The first insulating layer is disposed on the thin-film transistor and includes a first opening. The first electrode is disposed on the first insulating layer and within the first opening. The first electrode is electrically connected to the drain electrode through the first opening. The second insulating layer is disposed on the first electrode. The second electrode is disposed on the second insulating layer and within the first opening. Brief Description of the Drawings

[0008] The drawings are included to provide a further understanding of this disclosure, and the drawings are incorporated into and constitute a part of this specification. The drawings illustrate embodiments of this disclosure and, together with the description, are used to explain the principles of this disclosure.

[0009] Figure 1A Top view schematic diagram of a display device according to an embodiment of the present disclosure;

[0010] Figure 1B is Figure 1A Cross-sectional schematic diagram of the display device along the section line A-A';

[0011] Figure 1C is Figure 1A Cross-sectional schematic diagram of the display device along the section line B-B';

[0012] Figure 2 Top view schematic diagram of a display device according to another embodiment of the present disclosure.

[0013] Explanation of the reference numerals in the drawings

[0014] 100, 100a: Display device;

[0015] 110: Thin film transistor;

[0016] 120, 120a, 120b: Transfer pad;

[0017] 121, 121a, 121b: First part;

[0018] 122, 122a, 122b: Second part;

[0019] 123, 123a, 123b: First side;

[0020] 124, 124a, 124b: Second side;

[0021] 130: Pixel electrode;

[0022] 140: Substrate;

[0023] 150: First insulating layer;

[0024] 151, 151a, 151b: First opening;

[0025] 160: Second insulating layer;

[0026] 161, 161a, 161b: Second opening;

[0027] 170: Buffer layer;

[0028] 171: Masking layer;

[0029] 172, 174: Insulating layer;

[0030] 173: Dielectric layer;

[0031] 173a, 173b, 173c: Opening holes;

[0032] 180: Common electrode;

[0033] 190: Black matrix layer;

[0034] CH: Channel

[0035] D1, D2: Distance;

[0036] DL: Data line;

[0037] GE: Gate;

[0038] GI: Gate insulating layer;

[0039] GIa, GIb, GIc: Opening holes;

[0040] SD1: Source;

[0041] SD2: Drain;

[0042] SE: Semiconductor layer;

[0043] SL: Scan line;

[0044] W1, W2, W3, W4, W5, W6: Width;

[0045] X, Y: Direction. Detailed implementation

[0046] This disclosure can be understood by referring to the following detailed description and in conjunction with the accompanying drawings. It should be noted that, for the convenience of the reader's understanding and for the simplicity of the drawings, only a part of the electronic device is shown in the multiple drawings of this disclosure, and the specific elements in the drawings are not drawn to actual scale. In addition, the number and size of each element in the drawings are only for illustration and are not used to limit the scope of this disclosure.

[0047] In the following specification and claims, words such as "comprising" and "including" are open-ended terms and should therefore be interpreted as meaning "including but not limited to...".

[0048] It should be understood that when an element or film layer is said to be "on" or "connected to" another element or film layer, it can be directly on or directly connected to this other element or layer, or there may be intervening elements or film layers between the two (non-direct case). Conversely, when an element is said to be "directly" "on" or "directly connected to" another element or film layer, there are no intervening elements or film layers between the two.

[0049] Although terms such as first, second, third... may be used to describe various components, the components are not limited to these terms. These terms are only used to distinguish a single component in the specification from other components. The same terms may not be used in the claims, and first, second, third... may be used instead according to the order in which the components are claimed. Therefore, in the following specification, the first component may be the second component in the claims.

[0050] In some embodiments of the present disclosure, terms related to joining and connecting, such as "connect" and "interconnect", unless otherwise defined, may mean that two structures are in direct contact, or may also mean that two structures are not in direct contact, with other structures disposed between these two structures. And these terms related to joining and connecting may also include cases where both structures are movable, or both structures are fixed. In addition, the term "coupled" includes any direct and indirect electrical connection means.

[0051] In the present disclosure, the lengths and widths may be measured by using an optical microscope, and the thickness may be measured from a cross-sectional image in an electron microscope, but are not limited thereto. Additionally, there may be a certain error between any two values or directions used for comparison.

[0052] The electronic device disclosed herein may include, but is not limited to, a display device, an antenna device, a sensing device, a touch display, a curved display, or a free shape display. The electronic device may be a bendable or flexible electronic device. The electronic device may include, for example, light-emitting diodes, liquid crystals, fluorescence, phosphors, quantum dots (QDs), other suitable display media, or combinations thereof, but is not limited thereto. The light-emitting diodes may include, for example, organic light-emitting diodes (OLEDs), inorganic light-emitting diodes (LEDs), mini light-emitting diodes (mini LEDs), micro light-emitting diodes (micro LEDs), or quantum dot light-emitting diodes (which may be, for example, QLEDs, QDLEDs), or other suitable materials or any permutations and combinations of the above, but is not limited thereto. The display device may include, for example, a tiled display device, but is not limited thereto. The antenna device may be, for example, a liquid crystal antenna, but is not limited thereto. The antenna device may include, for example, an antenna tiling device, but is not limited thereto. It should be noted that the electronic device may be any permutation and combination of the above, but is not limited thereto. In addition, the shape of the electronic device may be rectangular, circular, polygonal, a shape with curved edges, or other suitable shapes. The electronic device may have peripheral systems such as a driving system, a control system, a light source system, a rack system, etc. to support the display device, the antenna device, or the tiling device. The following will illustrate the present disclosure with a display device as an example, but the present disclosure is not limited thereto.

[0053] It should be understood that, without departing from the spirit of the present disclosure, the features in several different embodiments may be replaced, reorganized, and mixed to complete other embodiments in the following exemplary embodiments. As long as the features between the embodiments do not violate the inventive spirit or conflict with each other, they can be arbitrarily mixed and used.

[0054] Reference will now be made in detail to the exemplary embodiments of the present disclosure. Examples of the exemplary embodiments are illustrated in the accompanying drawings. Whenever possible, the same reference numerals are used in the drawings and the description to refer to the same or like parts.

[0055] Figure 1A A top view schematic diagram of a display device according to an embodiment of the present disclosure. Figure 1B is Figure 1A A cross-sectional schematic diagram of the display device along the section line A-A'. Figure 1C is Figure 1A A cross-sectional schematic diagram of the display device along the section line B-B'. For the clarity and convenience of illustration in the drawings,Figure 1A Some components in the display device are omitted.

[0056] Please also refer to Figure 1A , Figure 1B and Figure 1C , the display device 100 of this embodiment includes a thin-film transistor 110, a transfer pad 120, and a pixel electrode 130. Among them, the thin-film transistor 110, the transfer pad 120, and the pixel electrode 130 are all disposed on the substrate 140 of the display device 100. In this embodiment, the substrate 140 may include a rigid substrate, a flexible substrate, or a combination of the foregoing. For example, the material of the substrate 140 may include glass, quartz, sapphire, ceramics, polycarbonate (PC), polyimide (PI), polyethylene terephthalate (PET), other suitable substrate materials, or a combination of the foregoing, but is not limited thereto.

[0057] In this embodiment, the thin-film transistor 110 includes a gate GE, a partial gate insulating layer GI, a source SD1, a drain SD2, and a semiconductor layer SE, but is not limited thereto. The gate insulating layer GI may have openings GIa, GIb to expose a part of the semiconductor layer SE. In this embodiment, the material of the source SD1 and / or the drain SD2 may include a transparent conductive material or a non-transparent conductive material, such as indium tin oxide, indium zinc oxide, indium oxide, zinc oxide, tin oxide, a metal material (such as aluminum, molybdenum, copper, silver, etc.), other suitable materials, or a combination of the above, but is not limited thereto. The material of the semiconductor layer SE may include amorphous silicon, low-temperature polycrystalline silicon (LTPS), metal oxide (such as indium gallium zinc oxide IGZO), other suitable materials, or a combination of the above, but is not limited thereto. In other embodiments, different thin-film transistors may include different materials of the semiconductor layer, but is not limited thereto.

[0058] In the top view schematic diagram of the display device 100 of this embodiment (as Figure 1A shown), the display device 100 further includes a scan line SL and a data line DL. The scan line SL and the data line DL are disposed on the substrate 140. The scan line SL extends along the direction X, and the data line DL extends along the direction Y, and the direction X is different from the direction Y. Since the source SD1 of the thin-film transistor 110 can be electrically connected to the data line DL, and the gate GE of the thin-film transistor 110 can be electrically connected to the scan line SL, the thin-film transistor 110 can be electrically connected to the data line DL and the scan line SL.

[0059] Please also refer to Figure 1A , Figure 1BAnd Figure 1C In this embodiment, the display device 100 further includes a first insulating layer 150 having a first opening 151, a second insulating layer 160 having a second opening 161, a buffer layer 170, a shielding layer 171, an insulating layer 172, a dielectric layer 173, an insulating layer 174, and a common electrode 180. Among them, the first insulating layer 150, the second insulating layer 160, the buffer layer 170, the insulating layer 172, the dielectric layer 173, and the insulating layer 174 can be single-layer or multi-layer structures, and can include, for example, organic materials, inorganic materials, or combinations of the foregoing, but are not limited thereto. In this embodiment, the material of the shielding layer 171 can be, for example, a metal material or other light-shielding materials. In some embodiments, the display device 100 may also not be provided with a shielding layer (not shown).

[0060] In this embodiment, the buffer layer 170 and the shielding layer 171 are both disposed between the thin film transistor 110 and the substrate 140, and the shielding layer 171 is disposed corresponding to the channel CH of the semiconductor layer SE corresponding to the gate GE. The insulating layer 172 is disposed between the gate GE and the gate insulating layer GI, and the insulating layer 172 is disposed corresponding to the gate GE. The dielectric layer 173 is disposed between the second insulating layer 160 and the gate insulating layer GI to cover the gate GE and the gate insulating layer GI. The dielectric layer 173 may have openings 173a, 173b. Among them, the opening 173a communicates with the opening GIa to expose a part of the semiconductor layer SE, and the opening 173b communicates with the opening GIb to expose a part of the semiconductor layer SE.

[0061] In this embodiment, the source electrode SD1 and the drain electrode SD2 are respectively disposed on the dielectric layer 173. The source electrode SD1 can also be disposed in the opening 173a of the dielectric layer 173 and the opening GIa of the gate insulating layer GI, so that the source electrode SD1 can be electrically connected to the semiconductor layer SE through the opening 173a and the opening GIa. The drain electrode SD2 can also be disposed in the opening 173b of the dielectric layer 173 and the opening GIb of the gate insulating layer GI, so that the drain electrode SD2 can be electrically connected to the semiconductor layer SE through the opening 173b and the opening GIb.

[0062] In this embodiment, the second insulating layer 160 is disposed between the transfer pad 120 and the drain electrode SD2. Specifically, the second insulating layer 160 is disposed on the thin film transistor 110. The second insulating layer 160 covers the source electrode SD1, the drain electrode SD2, and the dielectric layer 173. The second insulating layer 160 and the substrate 140 are respectively disposed on opposite sides of the thin film transistor 110. The second insulating layer 160 has a second opening 161, and the second opening 161 exposes a part of the drain electrode SD2.

[0063] In this embodiment, the transfer pad 120 can be electrically connected to the drain SD2. Specifically, the transfer pad 120 is disposed on the second insulating layer 160 and located between the pixel electrode 130 and the drain SD2. The transfer pad 120 can also be disposed within the second opening 161 of the second insulating layer 160, such that the transfer pad 120 can be electrically connected to the drain SD2 through the second opening 161 of the second insulating layer 160. In some embodiments, the transfer pad 120 can be disposed corresponding to the drain SD2. The orthographic projection of the transfer pad 120 on the substrate 140 can overlap with the orthographic projection of the drain SD2 on the substrate 140, and the orthographic projection of the transfer pad 120 on the substrate 140 can be larger than the orthographic projection of the drain SD2 on the substrate 140. In the top view of the display device 100 (as Figure 1A shown), the area of the transfer pad 120 can be larger than the area of the drain SD2. In this embodiment, the transfer pad 120 is made of a metallic material, and the metallic material can include molybdenum (Mo), aluminum (Al), titanium (Ti), copper (Cu), other suitable metals, or alloys or combinations of the above materials, but is not limited thereto. In some embodiments, the material of the transfer pad 120 can also include a transparent conductive material, such as indium tin oxide or indium zinc oxide, but is not limited thereto.

[0064] In this embodiment, the first insulating layer 150 is disposed between the transfer pad 120 and the pixel electrode 130. Specifically, the first insulating layer 150 is disposed on the transfer pad 120, and the first insulating layer 150 covers the transfer pad 120 and the second insulating layer 160. The first insulating layer 150 and the thin film transistor 110 are respectively disposed on opposite sides of the second insulating layer 160. The first insulating layer 150 has a first opening 151, and the first opening 151 exposes a portion of the transfer pad 120. In some embodiments, the first opening 151 of the first insulating layer 150 can be disposed corresponding to the transfer pad 120, but is not limited thereto.

[0065] In this embodiment, the pixel electrode 130 is disposed on the first insulating layer 150 and located between the insulating layer 174 and the first insulating layer 150. The pixel electrode 130 can also be disposed within the first opening 151, such that the pixel electrode 130 can be electrically connected to the transfer pad 120 through the first opening 151 of the first insulating layer 150. In some embodiments, the orthographic projection of the pixel electrode 130 on the substrate 140 overlaps with the orthographic projection of the transfer pad 120 on the substrate 140, but is not limited thereto.

[0066] In this embodiment, the insulating layer 174 is disposed on the pixel electrode 130 and within the first opening 151. The insulating layer 174 covers the pixel electrode 130 and the first insulating layer 150. The common electrode 180 is disposed on the insulating layer 174 and within the first opening 151, such that the insulating layer 174 is located between the common electrode 180 and the pixel electrode 130.

[0067] Specifically, in this embodiment, in a top view of the display device 100 (as Figure 1A shown), the transfer pad 120 may include a first portion 121 corresponding to the first opening 151 and a second portion 122 corresponding to the second opening 161. The first portion 121 of the transfer pad 120 may be exposed by the first opening 151 of the first insulating layer 150, but the second portion 122 of the transfer pad 120 is not exposed by the first opening 151 of the first insulating layer 150. The second portion 122 of the transfer pad 120 may also be disposed within the second opening 161 of the second insulating layer 160, but the first portion 121 of the transfer pad 120 is not disposed within the second opening 161 of the second insulating layer 160. Herein, since the area of the orthographic projection of the transfer pad 120 on the substrate 140 is greater than the area of the orthographic projection of the drain SD2 on the substrate 140, and the width W1 of the first portion 121 and the width W2 of the second portion 122 of the transfer pad 120 are both greater than the width W3 of the drain SD2, thus, compared with the drain SD2, the transfer pad 120 has a larger area to contact the pixel electrode 130.

[0068] More specifically, in this embodiment, in a top view of the display device 100 (as Figure 1AAs shown in the figure, the width W4 of the first opening 151 can be smaller than the width W1 of the first portion 121 of the transfer pad 120, and the width W4 of the first opening 151 can be greater than the width W3 of the drain SD2. Subsequently, since the transfer pad 120 has a larger area than the drain SD2 to contact the pixel electrode 130, the width W4 of the first opening 151 corresponding to the transfer pad 120 can also be greater than the width W5 of the second opening 161 corresponding to the drain SD2. That is to say, the first contact area where the pixel electrode 130 contacts the transfer pad 120 through the first opening 151 can be greater than the second contact area where the transfer pad 120 contacts the drain SD2 through the second opening 161. Among them, the size of the contact area can be used to represent the level of electron transfer amount, that is, the larger the contact area, the higher the electron transfer amount, and the smaller the contact area, the lower the electron transfer amount. Therefore, compared with the display device without the transfer pad, the display device 100 of this embodiment can increase the contact area with the pixel electrode 130 through the setting of the transfer pad 120 to improve and stabilize the electron transfer between the pixel electrode 130 and the drain SD2 (that is, the pixel electrode 130 is electrically connected to the drain SD2 through the first opening 151, the transfer pad 120, and the second opening 161), and reduce the resistance value between the pixel electrode 130 and the drain SD2, thereby improving the display quality of the display device 100. In this embodiment, the width W1 of the first portion 121, the width W2 of the second portion 122, the width W3 of the drain SD2, the width W4 of the first opening 151, and the width W5 of the second opening 161 are, for example, the maximum widths measured along the extension direction of the scan line SL (i.e., the direction X).

[0069] In addition, in this embodiment, in the top view of the display device 100 (as Figure 1A shown), the width W1 of the first portion 121 of the transfer pad 120 can be, for example, greater than the width W2 of the second portion 122 of the transfer pad 120, and the transfer pad 120 can form a contour similar to a gourd shape. In this embodiment, since the width W1 of the first portion 121 of the transfer pad 120 is greater than the width W2 of the second portion 122 of the transfer pad 120, and the distance D1 between the second portion 122 of the transfer pad 120 and the data line DL can be greater than the distance between the first portion 121 of the transfer pad 120 and the data line DL, the parasitic capacitance between the transfer pad 120 and the data line DL (or the source SD1) can be reduced, the cross-talk phenomenon between the transfer pad 120 and the data line DL (or the source SD1) can be reduced, and the problem of uneven block brightness can be avoided.

[0070] In addition, in this embodiment, in the top view of the display device 100 (as Figure 1AAs shown, the first opening 151 of the first insulating layer 150 may not overlap with the second opening 161 of the second insulating layer 160. A distance D2 may exist between the first opening 151 of the first insulating layer 150 and the second opening 161 of the second insulating layer 160. Specifically, since the first opening 151 of the first insulating layer 150 does not overlap with the second opening 161 of the second insulating layer 160, the insulating layer 174 in the first opening 151 can be formed between the pixel electrode 130 and the common electrode 180, thereby avoiding the risk of short circuit due to contact between the pixel electrode 130 and the common electrode 180. On the contrary, when the first opening of the first insulating layer overlaps with the second opening of the second insulating layer (not shown), due to the invert taper of the transfer pad, the insulating layer in the first opening may be broken, and then the pixel electrode may contact the common electrode and cause a short circuit.

[0071] In addition, in this embodiment, in the cross-sectional view of the display device 100 (as Figure 1C shown), since the transfer pad 120 can be disposed on the drain SD2 and can be in a different stack from the source SD1 (or data line DL), the widths W1, W2 of the transfer pad 120 can be greater than the width W4 of the first opening 151. That is, the orthographic projection of the transfer pad 120 on the substrate 140 can partially overlap with the orthographic projection of the first insulating layer 150 on the substrate 140. In this embodiment, in the first opening 151, the widths W1, W2 of the transfer pad 120 can be greater than the width W6 of the pixel electrode 130. Thus, a relatively flat topography can be provided to enable the insulating layer 174 in the first opening 151 to be formed between the pixel electrode 130 and the common electrode 180, so as to avoid the risk of short circuit due to contact between the pixel electrode 130 and the common electrode 180. On the contrary, in a display device without a transfer pad (not shown), when the width of the drain is less than the width of the first opening and the edge of the drain is exposed in the first opening, due to the vertical taper or invert taper of the drain, the insulating layer in the first opening may be broken, and then the pixel electrode may contact the common electrode and cause a short circuit. In this embodiment, the width W6 of the pixel electrode 130 in the first opening 151 is measured, for example, along the extension direction of the scanning line SL (i.e., direction X).

[0072] In addition, in this embodiment, in the top view of the display device 100 (as Figure 1AAs shown, the transfer pad 120 has a first side 123 and a second side 124 that face each other. Among them, the first side 123 is adjacent to the first opening 151, and the second side 124 is adjacent to the second opening 161. The first side 123 can be regarded as the side of the first part 121 of the transfer pad 120 away from the second opening 161, and the second side 124 can be regarded as the side of the second part 122 of the transfer pad 120 away from the first opening 151. In this embodiment, in the extending direction of the data line DL (i.e., the direction Y), among two adjacent transfer pads 120, the first side 123 of one transfer pad 120 faces the second side 124 of the other transfer pad 120, and the second side 124 of one transfer pad 120 faces away from the first side 123 of the other transfer pad 120.

[0073] In short, in the display device 100 of the present disclosure embodiment, the pixel electrode 130 can be electrically connected to the transfer pad 120 through the first opening 151 of the first insulating layer 150, and the transfer pad 120 can be electrically connected to the drain SD2. Among them, since the width W4 of the first opening 151 is greater than the width W3 of the drain SD2, and the width W4 of the first opening 151 is less than the width W1 of the transfer pad 120, the contact area between the pixel electrode 130 and the transfer pad 120 can be increased. In this way, the display device 100 of this embodiment can improve and stabilize the electron transfer between the pixel electrode 130 and the drain SD2 through the setting of the transfer pad 120, reduce the resistance value between the pixel electrode 130 and the drain SD2, and improve the display quality of the display device 100.

[0074] Other embodiments will be listed below for illustration. It must be noted here that the following embodiments follow the component numbers and some contents of the foregoing embodiments, where the same numbers are used to represent the same or similar components, and the description of the same technical content is omitted. For the description of the omitted parts, reference can be made to the foregoing embodiments, and the following embodiments will not be repeated.

[0075] Figure 2 It is a top view schematic diagram of a display device according to another embodiment of the present disclosure. For the clarity and convenience of illustration of the drawings, Figure 2 the pixel electrode in the display device is omitted. Please refer to Figure 1A and Figure 2 simultaneously. The display device 100a of this embodiment is substantially similar to Figure 1AThe display device 100, so the same and similar components in the two embodiments will not be repeated here. The main difference between the display device 100a of this embodiment and the display device 100 is that in the display device 100a of this embodiment, two adjacent pixel electrodes (not shown) in the Y direction are arranged in a back-to-back manner. In addition, in the extending direction of the data line DL (i.e., the Y direction), among two adjacent transfer pads 120a and 120b, the first side 123a of the transfer pad 120a faces the first side 123b of the transfer pad 120b, and the second side 124a of the transfer pad 120a faces away from the second side 124b of the transfer pad 120b.

[0076] Specifically, in the display device 100a of this embodiment, in the Y direction, the transfer pad 120a and the transfer pad 120b are adjacent to each other. The transfer pad 120a has a first side 123a and a second side 124a that face each other, and the transfer pad 120b has a first side 123b and a second side 124b that face each other. Among them, the first side 123a of the transfer pad 120a is adjacent to the first opening 151a and the second side 124a is adjacent to the second opening 161a, the first side 123b of the transfer pad 120b is adjacent to the first opening 151b and the second side 124b is adjacent to the second opening 161b. The first side 123a of the transfer pad 120a can be regarded as the side of the first part 121a of the transfer pad 120a away from the second opening 161a, and the second side 124a of the transfer pad 120a can be regarded as the side of the second part 122a of the transfer pad 120a away from the first opening 151a. The first side 123b of the transfer pad 120b can be regarded as the side of the first part 121b of the transfer pad 120b away from the second opening 161b, and the second side 124b of the transfer pad 120b can be regarded as the side of the second part 122b of the transfer pad 120b away from the first opening 151b. In addition, between the adjacent transfer pads 120a and 120b, there are also openings GIc and 173c, so that the source (not shown) and the drain SD2 can be electrically connected to the semiconductor layer SE respectively.

[0077] In this embodiment, in order to avoid light leakage caused by the topography problem of the first openings 151a and 151b, the black matrix layer 190 of the display device 100a not only shields the scanning line SL, but also shields the first openings 151a and 151b and the range extending about 3 microns outward from the edges of the first openings 151a and 151b.

[0078] In addition, in order to increase the aperture ratio, the display device 100a of the present embodiment further sets the first openings 151a and 151b in the central region of the black matrix layer 190, and sets the second openings 161a and 161b in the peripheral region of the black matrix layer 190. Specifically, by making the first opening 151a of the transfer pad 120a face the first opening 151b of the transfer pad 120b, and the second opening 161a of the transfer pad 120a face away from the second opening 161b of the transfer pad 120b, the first openings 151a and 151b can be set in the central region of the black matrix layer 190. That is, the first opening 151a of the transfer pad 120a can be adjacent to the first opening 151b of the transfer pad 120b, the first opening 151a of the transfer pad 120a can be far from the second opening 161b of the transfer pad 120b, and the first opening 151b of the transfer pad 120b can be far from the second opening 161a of the transfer pad 120a. Conversely, if the first opening is set in the peripheral region of the black matrix layer and the second opening is set in the central region of the black matrix layer (not shown), in order to ensure that the range extending about 3 microns outward from the edge of the first opening can be shielded, an additional shielding range of the black matrix layer will be required. In this way, the aperture ratio will decrease.

[0079] In summary, in the display device of the present disclosure embodiment, the pixel electrode can be electrically connected to the transfer pad through the first opening of the first insulating layer, and the transfer pad can be electrically connected to the drain. Among them, since the width of the first opening is greater than the width of the drain and the width of the first opening is less than the width of the transfer pad, the contact area between the pixel electrode and the transfer pad can be increased. In this way, the display device of the present embodiment can improve and stabilize the electron transfer between the pixel electrode and the drain through the setting of the transfer pad, reduce the resistance value between the pixel electrode and the drain, and improve the display quality of the display device. For example, in a high-pixel display panel with a small pixel size (such as a display panel for virtual reality (VR), but not limited thereto), since the width of its drain is smaller than that of a high-pixel display panel with a large pixel size, there may be no stable electron transfer due to the too small contact area between the pixel electrode and the drain. Therefore, if a transfer pad can be set in a high-pixel display panel with a small pixel size according to the teachings of the present embodiment and through the electrical connection design of the transfer pad, the resistance value between the pixel electrode and the drain can be reduced to simultaneously meet the requirements of a small pixel size and a high resolution.

[0080] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present disclosure, rather than to limit them; although the present disclosure has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements on some or all of the technical features; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present disclosure.

Claims

1. A display device, characterized in that, comprising: a substrate; a thin film transistor disposed on the substrate and including a drain; a first insulating layer disposed on the thin film transistor and including a first opening; a pixel electrode disposed on the first insulating layer and electrically connected to the drain through the first opening; a common electrode disposed on the pixel electrode and within the first opening; a shielding layer disposed between the substrate and the thin film transistor; a second insulating layer disposed on the thin film transistor and including a second opening; and a transfer pad disposed within the second opening and electrically connected to the drain through the second opening, wherein the width of the first opening is greater than the width of the drain and less than the width of the transfer pad, wherein a first contact area where the pixel electrode contacts the transfer pad through the first opening is greater than a second contact area where the transfer pad contacts the drain through the second opening.

2. The display device according to claim 1, characterized in that, the thin film transistor further includes a semiconductor layer, and the display device further includes: a dielectric layer including an opening, wherein the drain is electrically connected to the semiconductor layer through the opening.

3. The display device according to claim 2, characterized in that, the thickness of the first insulating layer is greater than the thickness of the dielectric layer.

4. The display device according to claim 1, characterized in that, the second insulating layer is disposed between the common electrode and the pixel electrode.

5. A display device, characterized in that, comprising: a substrate; a thin film transistor disposed on the substrate and including a gate and a drain; a first insulating layer disposed on the thin film transistor and including a first opening; and a pixel electrode disposed on the first insulating layer and electrically connected to the thin film transistor through the first opening; a shielding layer disposed between the substrate and the thin film transistor; a second insulating layer disposed on the thin film transistor and including a second opening; and a transfer pad disposed within the second opening and electrically connected to the drain through the second opening, wherein the width of the first opening is greater than the width of the drain and less than the width of the transfer pad, wherein a first contact area where the pixel electrode contacts the transfer pad through the first opening is greater than a second contact area where the transfer pad contacts the drain through the second opening, wherein the first opening overlaps with the gate.

6. The display device according to claim 5, characterized in that, the thin film transistor further includes a semiconductor layer, and the display device further includes: a dielectric layer including an opening, wherein the drain is electrically connected to the semiconductor layer through the opening.

7. The display device according to claim 6, characterized in that, the thickness of the first insulating layer is greater than the thickness of the dielectric layer.

8. An electronic device, characterized in that, comprising: a substrate; a thin film transistor disposed on the substrate and including a drain; a first insulating layer disposed on the thin film transistor and including a first opening; The first electrode is disposed on the first insulating layer and within the first opening, and is electrically connected to the drain through the first opening; The second insulating layer is disposed on the first electrode; The second electrode is disposed on the second insulating layer and within the first opening; The shielding layer is disposed between the substrate and the thin film transistor; The third insulating layer is disposed on the thin film transistor and includes a second opening; And The transfer pad is disposed within the second opening and is electrically connected to the drain through the second opening, wherein the width of the first opening is greater than the width of the drain and less than the width of the transfer pad, wherein a first contact area where the first electrode contacts the transfer pad through the first opening is greater than a second contact area where the transfer pad contacts the drain through the second opening.

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