An adaptive control method and control circuit for a laser driver

Abstract

This invention discloses an adaptive control method and control circuit for a laser driver. The method involves a pre-stage differential amplifier A... V Current source I drv With modulation current I modset A feedback control loop is provided between them, and the feedback control loop includes a feedback transconductance amplifier G. m2 Feedback transconductance amplifier G m2 With the subsequent transconductance amplifier G in the main channel m1 Having the same circuit structure, the feedback transconductance amplifier G m2 Operating in critical limiting mode, the feedback control loop controls the pre-stage differential amplifier A. V The output differential voltage amplitude makes the subsequent transconductance amplifier G... m1 It also operates in an adaptive critical limiting state, achieving adaptive matching between the driving voltage amplitude and output current of the laser driver. By optimizing the circuit design, it improves the nonlinear matching between the driving voltage and the laser modulation current, thereby enhancing the consistency and stability of performance parameters when driving different types of lasers, making it suitable for large-scale applications.

Description

Technical Field

[0001] This invention relates to a laser driver, belonging to the field of optical communication integrated circuit design technology. Background Technology

[0002] In optical communication data transmission links, high-speed data signals typically drive a laser to emit light via a differential laser driver. In the laser driver, the data signal is amplified to a certain amplitude by a pre-stage differential voltage amplifier, which then drives a final-stage differential transconductance amplifier. This amplifier converts the voltage signal into a current signal, i.e., a modulation current, which flows into the external laser, exciting it to emit light and achieving electro-optical conversion. The modulation current originates from the current source of the final-stage differential transconductance amplifier.

[0003] The magnitude of the modulation current output by a laser driver needs to be set according to the characteristics of the laser. Therefore, the laser driver needs to adapt to different modulation currents. Its output stage is generally a differential structure. The amplitude of the voltage signal output by the front stage is equal to the product of its current source and load resistance. It needs to match the magnitude of the modulation current of the subsequent stage. This means that the subsequent stage must operate in a limited state, but the amplitude cannot be too large, in order to minimize overshoot and pulse width distortion of the output modulation current, thereby ensuring the eye diagram quality of the laser output optical signal. To achieve this matching, the current method is to design the current source of the front-stage differential amplifier to be proportional to the modulation current of the subsequent stage. This makes the amplitude of the voltage drive signal output by the front stage related to the modulation current. As the modulation current increases, the amplitude of the voltage drive signal also increases, and vice versa. This method results in a linear correlation, meaning that the amplitude of the voltage drive signal changes linearly with the modulation current. However, the relationship between the output current of the output stage differential amplifier and the required amplitude of the voltage drive signal is a square law, which is non-linear. Clearly, this linear correlation can only improve the eye diagram quality of the output signal to a certain extent, but it is difficult to adapt to the nonlinear matching requirements. As a result, the eye diagram quality of the output optical signal is difficult to guarantee when the laser driver drives lasers with different modulation currents, and the consistency is poor. Summary of the Invention

[0004] To overcome the shortcomings of the prior art, the present invention provides an adaptive control method and control circuit for a laser driver that improves the matching between the driving voltage and the laser modulation current by optimizing the circuit design, thereby improving the quality of the output optical eye diagram.

[0005] The technical solution adopted by this invention to solve its technical problem is:

[0006] An adaptive control method for a laser driver, wherein a pre-stage differential amplifier A is used in the main channel. V and subsequent transconductance amplifier G m1 The signal is amplified, and then the subsequent transconductance amplifier G...m1 Current source I mod Controlled by modulation current I modset In the pre-amplifier A V Current source I drv With modulation current I modset A feedback control loop is provided between them, and the feedback control loop includes a feedback transconductance amplifier G. m2 The feedback transconductance amplifier G m2 With the subsequent transconductance amplifier G in the main channel m1 Having the same circuit structure and similar limiting characteristics, the feedback transconductance amplifier G m2 Current source I The value of 2 k 1 I modset With modulation current I modset As a proportional relationship, the feedback transconductance amplifier G m2 Output current I 4. The feedback current is obtained after amplification. I 1. Feedback current I The value of 1 k 2 I modset , k 2 I modset < k 1 I modset The feedback current I After being converted to voltage, one output is given to the feedback transconductance amplifier G. m2 This makes the feedback transconductance amplifier G m2 It is operating at the critical limiting state, and the other output controls the current source. I drv This controls the preceding differential amplifier A. V The output differential voltage amplitude makes the subsequent transconductance amplifier G... m1 It also operates in an adaptive critical limiting state, achieving nonlinear matching between the driving voltage amplitude and output current of the laser driver, improving the consistency of performance parameters when driving different types of lasers, and making it suitable for large-scale applications.

[0007] An adaptive control circuit for a laser driver employing the above method, the main channel including a pre-stage differential amplifier A V and subsequent transconductance amplifier G m1 The pre-amplifier AV The input terminal is connected to the data signal V. data The output terminal is connected to the subsequent transconductance amplifier G. m1 The input terminal of the subsequent transconductance amplifier G m1 The output terminal is the drive current used to drive the laser. I out The pre-amplifier A V Current source I drv With modulation current I modset A feedback control loop is provided between them, the feedback control loop including converter IV and feedback transconductance amplifier G. m2 and current error amplifier A I The feedback transconductance amplifier G m2 and current error amplifier A I With the modulation current I modset Connection, the feedback transconductance amplifier G m2 Output current I 4. Connect the current error amplifier A. I The current input terminal of the current error amplifier A I Output feedback current I 1. Connect the input terminal of the converter IV, and the converter IV will convert the current error amplifier A... I The output current is the current source. I After conversion, a high and a low differential DC voltage are obtained, which are output in two paths. One path is the feedback voltage output, which is connected to the feedback transconductance amplifier G. m2 One input terminal is connected to the first stage differential amplifier A, and the other is the control voltage output terminal. V When the feedback control loop is stable, the current error amplifier A... I The two input currents are approximately equal, and the feedback transconductance amplifier G... m2 The output current is approximately equal to the feedback current. I The value of 1 k 2 I modset Much smaller than the feedback transconductance amplifier G m2 Current source I 2 value k 1 I modset That is, the feedback transconductance amplifier G m2 Operating in critical limiting mode. Preamplifier A. V Operating in the limiting state also enables the current source to... I drvThe difference between the IV conversion of the differential output voltage amplitude and the current-voltage conversion principle of the converter IV lies in the fact that the differential output level changes rapidly with the input data. This is different from the principle of the preceding differential amplifier A. V The voltage amplifiers in the series follow the same current-to-voltage conversion principle and can use either the same differential circuit structure or a single-ended circuit structure.

[0008] Furthermore, the adaptive control circuit of the present invention also includes transistors MOS1, MOS2, MOS3, MOS4, and MOS5; the drain of transistor MOS2 is connected to the subsequent transconductance amplifier G. m1 Current source I mod The gate (G) of transistor MOS1 is connected to the gate (G) of transistor MOS1, and then connected to the drain (D) of transistor MOS1 and the modulation current. I modset The contact point of the transistor is grounded at its source (S); the source (S) of transistor MOS1 is grounded; the gate (G) of transistor MOS4 and the gate (G) of transistor MOS5 are connected together and then connected to the drain (D) of transistor MOS1 and the modulation current. I modset The contact point of the transistor MOS4 is connected to the current error amplifier A. I Current source I 3. The source (S) terminal is grounded; the drain (D) terminal of the transistor MOS5 is connected to the feedback transconductance amplifier G. m2 Current source I 2. The source (S) terminal is grounded; the drain (D) terminal of the transistor MOS3 is connected to the pre-amplifier A. V Current source I drv The G terminal is connected to the control voltage output terminal of the converter IV, and the S terminal is grounded.

[0009] The feedback transconductance amplifier G m2 Including transistors MOS6, MOS7, MOS8, MOS9, and MOS. 10 The transistor MOS 10 The S terminal is connected to the power supply V. DD The gate (G) and drain (D) terminals are connected to the drain (D) terminal of transistor MOS9. The gate (G) terminal of transistor MOS9 is connected to the gate (G) terminal of transistor MOS8 and then to the bias voltage V. B1 The source (S) terminal of transistor MOS7 is connected to the drain (D) terminal of transistor MOS7, and the gate (G) terminal of transistor MOS7 is connected to converter IV; the drain (D) terminal of transistor MOS8 is connected to current error amplifier A. IThe source (S) terminal of transistor MOS6 is connected to the drain (D) terminal of transistor MOS6; the gate (G) terminal of transistor MOS6 is connected to converter IV; the source (S) terminal of transistor MOS6 is connected to the source (S) terminal of transistor MOS7 and then connected to the drain (D) terminal of transistor MOS5.

[0010] The current error amplifier A I Including transistors MOS 11 MOS transistor 12 MOS transistor 13 MOS transistor 14 MOS transistor 15 Capacitor C and current source I 5; The transistor MOS 11 The S-terminal and the transistor MOS 12 After the S terminal is connected, it is connected to the power supply V. DD The transistor MOS 11 The gate of the transistor MOS 12 The gate (G) terminal is connected to the transistor MOS. 11 The junction between the drain (D) of transistor MOS8 and the drain (D) of transistor MOS8; the transistor MOS 12 The drain (D) terminal is split into two paths: one path is connected to the drain of transistor MOS4, and the other path is connected to transistor MOS. 13 The gate (G) of the transistor; the MOS transistor 13 The S terminal is connected to the power supply V. DD The drain terminal is connected to the current source. I 5 is the positive terminal; one end of the capacitor C is connected to the power supply V. DD The other end is connected to the transistor MOS. 12 The drain of the transistor MOS 13 The contact point of the G pole; the current source I The negative terminal of 5 is grounded; the transistor MOS 14 The S-terminal and the transistor MOS 15 After the S-pole is connected, it is connected to the power supply V. DD The transistor MOS 14 The gate of the transistor MOS 15 The gate (G) terminal is connected to the transistor MOS. 14 The drain terminal and the transistor MOS 13 The contact point of the drain terminal; the transistor MOS 15 The drain (D) terminal is connected to the converter IV.

[0011] The converter IV includes a transistor MOS. 16 MOS transistor 17A load resistor R1 and a load resistor R2 are connected in series, and the other end of the load resistor R1 is connected to the power supply V. DD The other end of the load resistor R2 is connected to the transistor MOS. 17 The drain terminal of the transistor MOS 17 The source (S) terminal of the transistor is grounded; the transistor MOS 16 The drain of the transistor is connected to the MOS transistor. 15 The drain (D) and source (S) terminals of transistor MOS3 are grounded, and the gate (G) terminal of transistor MOS3 is connected to the gate (G) terminal of transistor MOS3. 16 The gate and transistor MOS 17 The gate (G) terminal is connected to the transistor MOS. 16 The drain terminal and the transistor MOS 15 The contact point of the D pole.

[0012] The pre-stage differential amplifier A V Including transistors MOS 18 MOS transistor 19 MOS transistor 20 MOS transistor 21 Load resistors R3 and R4 are connected in parallel, with one end of the load resistors R3 and R4 connected to the power supply V. DD The other end of the load resistor R3 is connected to the transistor MOS. 20 The drain terminal of the transistor MOS 20 The S-terminal of the transistor MOS is connected to the S-terminal. 18 The drain terminal; the other end of the load resistor R4 is connected to the transistor MOS. 21 The drain terminal of the transistor MOS 21 The S-terminal of the transistor MOS is connected to the S-terminal. 19 The drain terminal of the transistor MOS 21 The gate of the transistor MOS 20 The G terminal is connected to a bias voltage V. B2 The transistor MOS 18 The S-terminal and the transistor MOS 19 The S-pole is connected to the current source. I drv The positive terminal of the current source I drv The negative terminal of the transistor is grounded; the transistor MOS 18 The G stage is the preamplifier of the differential amplifier A. V The positive input terminal is connected to the data signal V. data positive V data+ The transistor MOS 19 The G stage is the preamplifier of the differential amplifier A. VThe negative input terminal is connected to the data signal V. data negative electrode V data- The load resistor R3 and the transistor MOS 20 The contact point of the drain (D) is the preamplifier A. V positive output terminal V out+ The load resistor R4 and the transistor MOS 21 The contact point of the drain (D) is the preamplifier A. V negative output terminal V out- .

[0013] The subsequent transconductance amplifier G m1 Including transistors MOS 22 MOS transistor 23 MOS transistor 24 and transistor MOS 25 The transistor MOS 24 The D-stage transconductance amplifier G is the next stage. m1 positive output terminal I out+ The transistor MOS 25 The D-stage transconductance amplifier G is the next stage. m1 negative terminal of the output I out- The transistor MOS 22 The G-stage transconductance amplifier G is the last stage of the G-stage. m1 positive input terminal V in+ Connect to the preamplifier A V positive output terminal V out+ The transistor MOS 23 The G-stage transconductance amplifier G is the last stage of the G-stage. m1 negative input terminal V in- Connect to the preamplifier A V negative output terminal V out- The transistor MOS 24 The gate of the transistor MOS 25 The G terminal is connected to a bias voltage V. B3 The transistor MOS 24 The S-terminal of the transistor MOS is connected to the S-terminal. 22 The drain terminal of the transistor MOS 25 The S-terminal of the transistor MOS is connected to the S-terminal. 23 The drain terminal of the transistor MOS 22 The S-terminal and the transistor MOS 23 The S-pole is connected to the current source. I mod The positive terminal of the current source I mod The negative terminal is grounded.

[0014] The transistor MOS 10 MOS transistor 11 MOS transistor 12 MOS transistor 13 MOS transistor 14 MOS transistor 15 The remaining transistors are P-channel: MOS1, MOS2, MOS3, MOS4, MOS5, MOS6, MOS7, MOS8, MOS9, and MOS... 16 MOS transistor 17 MOS transistor 18 MOS transistor 19 MOS transistor 20 MOS transistor 21 MOS transistor 22 MOS transistor 23 MOS transistor 24 MOS transistor 25 It is an N-channel.

[0015] The components that make up the above circuit are packaged in the same integrated circuit. When there are process deviations or temperature changes between the components, the components are affected in the same way, thus avoiding the impact of process deviations and temperature changes.

[0016] The beneficial effects of this invention are: This invention improves the performance of the pre-amplifier A... V Current source I drv With modulation current I modset A feedback control loop is provided between them, and the feedback control loop controls the front-stage differential amplifier A. V The output differential voltage amplitude makes the subsequent transconductance amplifier G... m1 Operating in an adaptive critical limiting state, it achieves adaptive matching between the driving voltage amplitude and the output current of the laser driver. Through optimized circuit design, it improves the nonlinear matching between the driving voltage and the laser modulation current, thereby enhancing the consistency and stability of performance parameters when driving different types of lasers, making it suitable for large-scale applications. Attached Figure Description

[0017] The present invention will be further described below with reference to the accompanying drawings and embodiments.

[0018] Figure 1 This is the circuit schematic diagram of the present invention.

[0019] Figure 2 This is the circuit diagram of the present invention.

[0020] Figure 3 It is the preamplifier differential amplifier A V The circuit diagram.

[0021] Figure 4 It is the subsequent transconductance amplifier G m1 The circuit diagram. Detailed Implementation

[0022] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to specific embodiments and accompanying drawings. It should be noted that, unless otherwise specified, the embodiments and features of the present invention can be combined with each other. Those skilled in the art should understand that the description of this embodiment is merely exemplary and not intended to limit the scope of protection of this invention.

[0023] Reference Figures 1 to 4 An adaptive control method for a laser driver, which employs a pre-stage differential amplifier A in the main channel. V and subsequent transconductance amplifier G m1 The signal is amplified, and then the subsequent transconductance amplifier G... m1 Current source I mod Controlled by modulation current I modset In the pre-amplifier A V Current source I drv With modulation current I modset A feedback control loop is provided between them, and the feedback control loop includes a feedback transconductance amplifier G. m2 The feedback transconductance amplifier G m2 With the subsequent transconductance amplifier G in the main channel m1 Having the same circuit structure and similar limiting characteristics, the feedback transconductance amplifier G m2 Current source I The value of 2 k 1 I modset With modulation current I modset As a proportional relationship, the feedback transconductance amplifier G m2 Output current I 4. The feedback current is obtained after amplification. I 1. Feedback current I The value of 1 k 2 I modset , k 2I modset < k 1 I modset The feedback current I After being converted to voltage, one output is given to the feedback transconductance amplifier G. m2 This makes the feedback transconductance amplifier G m2 It is operating at the critical limiting state, and the other output controls the current source. I drv This controls the preceding differential amplifier A. V The output differential voltage amplitude makes the subsequent transconductance amplifier G... m1 It also operates in an adaptive critical limiting state, achieving nonlinear matching between the driving voltage amplitude and output current of the laser driver, improving the consistency of performance parameters when driving different types of lasers, and making it suitable for large-scale applications.

[0024] In optical communication systems, when a laser driver needs to drive different types of lasers or when there are temperature changes, the modulation current of the laser... I modset Things will change ( I modset (Generated by an external circuit), i.e., modulation current I modset and subsequent transconductance amplifier G m1 Current source I mod It will change; a preamplifier A is required. V The voltage signal amplitude also changes accordingly to ensure the quality and consistency of the output current signal and performance parameters, such as signal edge time, overshoot, and pulse width distortion, in order to ensure the performance of the subsequent transconductance amplifier G. m1 To improve the output signal quality, this invention optimizes circuit design, improves the matching between the driving voltage and the laser modulation current, and enhances the output optical eye diagram quality.

[0025] An adaptive control circuit for a laser driver employing the above method, the main channel including a pre-stage differential amplifier A V and subsequent transconductance amplifier G m1 The pre-amplifier A V The input terminal is connected to the data signal V. data The output terminal is connected to the subsequent transconductance amplifier G. m1 The input terminal of the subsequent transconductance amplifier G m1 The output terminal is the drive current used to drive the laser. I out The pre-amplifier A V Current source I drv With modulation currentI modset A feedback control loop is provided between them, the feedback control loop including converter IV and feedback transconductance amplifier G. m2 and current error amplifier A I The feedback transconductance amplifier G m2 and current error amplifier A I With the modulation current I modset Connection, the feedback transconductance amplifier G m2 Output current I 4. Connect the current error amplifier A. I The current input terminal of the current error amplifier A I Output feedback current I 1. Connect the input terminal of the converter IV, and the converter IV will convert the current error amplifier A... I The output current is the current source. I After conversion, a high and a low differential DC voltage are obtained, which are output in two paths. One path is the feedback voltage output, which is connected to the feedback transconductance amplifier G. m2 One input terminal is connected to the first stage differential amplifier A, and the other is the control voltage output terminal. V When the feedback control loop is stable, the current error amplifier A... I The two input currents are approximately equal, and the feedback transconductance amplifier G... m2 The output current is approximately equal to the feedback current. I The value of 1 k 2 I modset Much smaller than the feedback transconductance amplifier G m2 Current source I The value of 2 k 1 I modset That is, the feedback transconductance amplifier G m2 Operating in critical limiting mode. Preamplifier A. V Operating in the limiting state also enables the current source to... I drv The difference between the IV conversion of the differential output voltage amplitude and the current-voltage conversion principle of the converter IV lies in the fact that the differential output level changes rapidly with the input data. This is different from the principle of the preceding differential amplifier A. V The voltage amplifiers in the series follow the same current-to-voltage conversion principle and can use either the same differential circuit structure or a single-ended circuit structure.

[0026] The feedback transconductance amplifier G m2 With the subsequent transconductance amplifier G in the main channel m1 With the same circuit structure and similar limiting characteristics, the feedback transconductance amplifier Gm2 Preset to limit operation mode, when the modulation current I modset and current source I mod When the change occurs, it is passed through current error amplifier A. I The converter IV adaptively obtains the feedback transconductance amplifier G. m2 Feedback current operating in critical limiting state I 1. The pre-amplifier A in the main channel V Current source I drv Subjected to the same control, it will also cause the subsequent transconductance amplifier G to... m1 Operating in a critical limiting state, it adaptively matches the modulation current and the drive signal amplitude, always maintaining the amplitude of the subsequent transconductance amplifier G in the main channel. m1 The critical limiting drive is compatible with various lasers used in optical communication, improves the output signal quality, and is suitable for large-scale applications in multiple scenarios.

[0027] Furthermore, the adaptive control circuit of the present invention also includes transistors MOS1, MOS2, MOS3, MOS4, and MOS5; the drain of transistor MOS2 is connected to the subsequent transconductance amplifier G. m1 Current source I mod The gate (G) of transistor MOS1 is connected to the gate (G) of transistor MOS1, and then connected to the drain (D) of transistor MOS1 and the modulation current. I modset The contact point of the transistor is grounded at its source (S); the source (S) of transistor MOS1 is grounded; the gate (G) of transistor MOS4 and the gate (G) of transistor MOS5 are connected together and then connected to the drain (D) of transistor MOS1 and the modulation current. I modset The contact point of the transistor MOS4 is connected to the current error amplifier A. I Current source I 3. The source (S) terminal is grounded; the drain (D) terminal of the transistor MOS5 is connected to the feedback transconductance amplifier G. m2 Current source I 2. The source (S) terminal is grounded; the drain (D) terminal of the transistor MOS3 is connected to the pre-amplifier A. V Current source I drv The gate (G) terminal is connected to the control voltage output terminal of converter IV, and the source (S) terminal is grounded. The current value of transistor MOS5 is the current source. I The value of 2 k 1 I modset The current value of transistor MOS4 is the current source. I The value of 3k 2 I modset .

[0028] The feedback transconductance amplifier G m2 Including transistors MOS6, MOS7, MOS8, MOS9, and MOS. 10 The transistor MOS 10 The S terminal is connected to the power supply V. DD The gate (G) and drain (D) terminals are connected to the drain (D) terminal of transistor MOS9. The gate (G) terminal of transistor MOS9 is connected to the gate (G) terminal of transistor MOS8 and then to the bias voltage V. B1 The source (S) terminal of transistor MOS7 is connected to the drain (D) terminal of transistor MOS7, and the gate (G) terminal of transistor MOS7 is connected to converter IV; the drain (D) terminal of transistor MOS8 is connected to current error amplifier A. I The source (S) terminal of transistor MOS6 is connected to the drain (D) terminal of transistor MOS6; the gate (G) terminal of transistor MOS6 is connected to converter IV; the source (S) terminal of transistor MOS6 is connected to the source (S) terminal of transistor MOS7, and then connected to the drain (D) terminal of transistor MOS5. The current in transistor MOS8 is the current in the feedback transconductance amplifier G. m2 The output current.

[0029] The current error amplifier A I Including transistors MOS 11 MOS transistor 12 MOS transistor 13 MOS transistor 14 MOS transistor 15 Capacitor C and current source I 5; The transistor MOS 11 The S-terminal and the transistor MOS 12 After the S-pole is connected, it is connected to the power supply V. DD The transistor MOS 11 The gate of the transistor MOS 12 The gate (G) terminal is connected to the transistor MOS. 11 The junction between the drain (D) of transistor MOS8 and the drain (D) of transistor MOS8; the transistor MOS 12 The drain (D) terminal is split into two paths: one path is connected to the drain of transistor MOS4, and the other path is connected to transistor MOS. 13 The gate (G) of the transistor; the MOS transistor 13 The S terminal is connected to the power supply V. DD The drain terminal is connected to the current source. I 5 is the positive terminal; one end of the capacitor C is connected to the power supply V. DD The other end is connected to the transistor MOS. 12The drain terminal and the transistor MOS 13 The contact point of the G pole; the current source I The negative terminal of 5 is grounded; the transistor MOS 14 The S-terminal and the transistor MOS 15 After the S-pole is connected, it is connected to the power supply V. DD The transistor MOS 14 The gate of the transistor MOS 15 The gate (G) terminal is connected to the transistor MOS. 14 The drain terminal and the transistor MOS 13 The contact point of the drain terminal; the transistor MOS 15 The drain (D) terminal is connected to the converter IV.

[0030] The converter IV includes a transistor MOS. 16 MOS transistor 17 A load resistor R1 and a load resistor R2 are connected in series, and the other end of the load resistor R1 is connected to the power supply V. DD The other end of the load resistor R2 is connected to the transistor MOS. 17 The drain terminal of the transistor MOS 17 The source (S) terminal of the transistor is grounded; the transistor MOS 16 The drain of the transistor is connected to the MOS transistor. 15 The drain (D) and source (S) terminals of transistor MOS3 are grounded, and the gate (G) terminal of transistor MOS3 is connected to the gate (G) terminal of transistor MOS3. 16 The gate and transistor MOS 17 The gate (G) terminal is connected to the transistor MOS. 16 The drain terminal and the transistor MOS 15 The contact point of the D pole.

[0031] The working principle of this invention is: the current of the transistor MOS8 is the feedback transconductance amplifier G. m2 The output current passes through the transistor MOS. 11 and transistor MOS 12 After mirroring, it is made of transistor MOS 12 The output voltage is compared with the current of transistor MOS4 and the error is amplified. The output voltage controls transistor MOS4. 13 The current, and the current source I 5. The difference current after the subtraction operation passes through the transistor MOS. 14 and transistor MOS 15 Mirrored output, transistor MOS 15 The output current is the current error amplifier A. I Feedback current I 1. Transistor MOS 16From transistor MOS 15 The obtained voltage-controlled transistor MOS 17 And the current of transistor MOS3, transistor MOS 17 The current is converted into a differential voltage across the load resistor R2, which serves as the feedback transconductance amplifier G. m2 The input signal controls the current of transistors MOS6 and MOS7, while the current of transistor MOS3 serves as the current for the pre-amplifier A. V Current source I drv Control the pre-amplifier A V The output voltage amplitude, which in turn determines the subsequent transconductance amplifier G. m1 The work status.

[0032] The pre-stage differential amplifier A V This is a common-source, common-gate differential voltage amplifier circuit, including transistors (MOS). 18 MOS transistor 19 MOS transistor 20 MOS transistor 21 Load resistors R3 and R4 are connected in parallel, with one end of the load resistors R3 and R4 connected to the power supply V. DD The other end of the load resistor R3 is connected to the transistor MOS. 20 The drain terminal of the transistor MOS 20 The S-terminal of the transistor MOS is connected to the S-terminal. 18 The drain terminal; the other end of the load resistor R4 is connected to the transistor MOS. 21 The drain terminal of the transistor MOS 21 The S-terminal of the transistor MOS is connected to the S-terminal. 19 The drain terminal of the transistor MOS 21 The gate of the transistor MOS 20 The G terminal is connected to a bias voltage V. B2 The transistor MOS 18 The S-terminal and the transistor MOS 19 The S-pole is connected to the current source. I drv The positive terminal of the current source I drv The negative terminal of the transistor is grounded; the transistor MOS 18 The G stage is the preamplifier of the differential amplifier A. V The positive input terminal is connected to the data signal V. data positive V data+ The transistor MOS 19 The G stage is the preamplifier of the differential amplifier A. V The negative input terminal is connected to the data signal V.data negative electrode V data- The load resistor R3 and the transistor MOS 20 The contact point of the drain (D) is the preamplifier A. V positive output terminal V out+ The load resistor R4 and the transistor MOS 21 The contact point of the drain (D) is the preamplifier A. V negative output terminal V out- .

[0033] The subsequent transconductance amplifier G m1 This is a common-source, common-gate differential transconductance amplifier circuit. The input is a voltage signal, and the output is a current signal. It includes a transistor (MOS). 22 MOS transistor 23 MOS transistor 24 and transistor MOS 25 The transistor MOS 24 The D-stage transconductance amplifier G is the next stage. m1 positive output terminal I out+ The transistor MOS 25 The D-stage transconductance amplifier G is the next stage. m1 negative terminal of the output I out- The transistor MOS 22 The G-stage transconductance amplifier G is the last stage of the G-stage. m1 positive input terminal V in+ Connect to the preamplifier A V positive output terminal V out+ The transistor MOS 23 The G-stage transconductance amplifier G is the last stage of the G-stage. m1 negative input terminal V in- Connect to the preamplifier A V negative output terminal V out- The transistor MOS 24 The gate of the transistor MOS 25 The G terminal is connected to a bias voltage V. B3 The transistor MOS 24 The S-terminal of the transistor MOS is connected to the S-terminal. 22 The drain terminal of the transistor MOS 25 The S-terminal of the transistor MOS is connected to the S-terminal. 23 The drain terminal of the transistor MOS 22 The S-terminal and the transistor MOS 23 The S-pole is connected to the current source. I mod The positive terminal of the current source Imod The negative terminal is grounded.

[0034] The transistor MOS 10 MOS transistor 11 MOS transistor 12 MOS transistor 13 MOS transistor 14 MOS transistor 15 The P-channel transistor can also be replaced with an N-channel transistor. The remaining transistors are MOS1, MOS2, MOS3, MOS4, MOS5, MOS6, MOS7, MOS8, MOS9, and MOS... 16 MOS transistor 17 MOS transistor 18 MOS transistor 19 MOS transistor 20 MOS transistor 21 MOS transistor 22 MOS transistor 23 MOS transistor 24 MOS transistor 25 An N-channel transistor can be replaced with a P-channel transistor, and a MOSFET can be replaced with a transistor or other device with equivalent functionality. The connection method can be modified accordingly. Figure 2 , Figure 3 , Figure 4 Power supply V in DD The voltage values ​​can be the same or different, bias voltage V B1 Bias voltage V B2 Bias voltage V B3 The voltage values ​​can be the same or different, depending on the circuit requirements.

[0035] The MOSFETs, circuits, capacitors, and other components that make up the above circuit are packaged in the same integrated circuit. When there are process deviations or temperature changes between components, the components are affected in the same way, thus avoiding the impact of process deviations and temperature changes.

[0036] This invention relates to the pre-stage differential amplifier A. V Current source I drv With modulation current I modset A feedback control loop is provided between them, and the feedback control loop controls the front-stage differential amplifier A. V The output differential voltage amplitude makes the subsequent transconductance amplifier G... m1Operating in an adaptive critical limiting state, it achieves adaptive matching between the driving voltage amplitude and the output current of the laser driver. Through optimized circuit design, it improves the nonlinear matching between the driving voltage and the laser modulation current, and enhances the consistency of performance parameters when driving different types of lasers, making it suitable for large-scale applications.

[0037] The above embodiments do not limit the scope of protection of this invention. All equivalent modifications and variations made by those skilled in the art without departing from the overall concept of this invention are still within the scope of this invention.

Claims

1. An adaptive control method for a laser driver, characterized in that... This method uses a pre-stage differential amplifier A in the main channel. V and subsequent transconductance amplifier G m1 The signal is amplified, and then the subsequent transconductance amplifier G... m1 Current source I mod Controlled by modulation current I modset In the pre-amplifier A V Current source I drv With modulation current I modset A feedback control loop is provided between them, and the feedback control loop includes a feedback transconductance amplifier G. m2 The feedback transconductance amplifier G m2 With the subsequent transconductance amplifier G in the main channel m1 Having the same circuit structure, the feedback transconductance amplifier G m2 Current source I The value of 2 k 1 I modset With modulation current I modset As a proportional relationship, the feedback transconductance amplifier G m2 Output current I 4. The feedback current is obtained after amplification. I 1. Feedback current I The value of 1 k 2 I modset , k 2 I modset < k 1 I modset The feedback current I After being converted to voltage, one output is given to the feedback transconductance amplifier G. m2 This makes the feedback transconductance amplifier G m2 When operating in a critical limiting state, another output controls the current source. I drv This controls the preceding differential amplifier A. V The output voltage amplitude of the subsequent transconductance amplifier G m1 It also operates in an adaptive critical limiting state.

2. An adaptive control circuit for a laser driver, the main channel including a pre-stage differential amplifier A V and subsequent transconductance amplifier G m1 The pre-amplifier A V The input terminal is connected to the data signal V. data The output terminal is connected to the subsequent transconductance amplifier G. m1 The input terminal of the subsequent transconductance amplifier G m1 The output terminal is the drive current used to drive the laser. I out Its features are The pre-stage differential amplifier A V Current source I drv With modulation current I modset A feedback control loop is provided between them, the feedback control loop including converter IV and feedback transconductance amplifier G. m2 and current error amplifier A I The feedback transconductance amplifier G m2 and current error amplifier A I With the modulation current I modset Connection, the feedback transconductance amplifier G m2 Output current I 4. Connect the current error amplifier A. I The current input terminal of the current error amplifier A I Output feedback current I 1. Connect the input terminal of the converter IV. The output terminal of the converter IV is divided into two paths, one of which is the feedback voltage output terminal connected to the feedback transconductance amplifier G. m2 One input terminal is connected to the first stage differential amplifier A, and the other is the control voltage output terminal. V .

3. The adaptive control circuit for a laser driver according to claim 2, characterized in that... The adaptive control circuit also includes transistors MOS1, MOS2, MOS3, MOS4, and MOS5; the drain of transistor MOS2 is connected to the subsequent transconductance amplifier G. m1 Current source I mod The gate (G) of transistor MOS1 is connected to the gate (G) of transistor MOS1, and then connected to the drain (D) of transistor MOS1 and the modulation current. I modset The contact point of the transistor is grounded at its source (S); the source (S) of transistor MOS1 is grounded; the gate (G) of transistor MOS4 and the gate (G) of transistor MOS5 are connected together and then connected to the drain (D) of transistor MOS1 and the modulation current. I modset The contact point of the transistor MOS4 is connected to the current error amplifier A. I Current source I 3. The source (S) terminal is grounded; the drain (D) terminal of the transistor MOS5 is connected to the feedback transconductance amplifier G. m2 Current source I 2. The source (S) terminal is grounded; the drain (D) terminal of the transistor MOS3 is connected to the pre-amplifier A. V Current source I drv The G terminal is connected to the control voltage output terminal of the converter IV, and the S terminal is grounded.

4. The adaptive control circuit for a laser driver according to claim 3, characterized in that... The feedback transconductance amplifier G m2 Including transistors MOS6, MOS7, MOS8, MOS9, and MOS. 10 The transistor MOS 10 The S terminal is connected to the power supply V. DD The gate (G) and drain (D) terminals are connected to the drain (D) terminal of transistor MOS9. The gate (G) terminal of transistor MOS9 is connected to the gate (G) terminal of transistor MOS8 and then to the bias voltage V. B1 The source (S) terminal of transistor MOS7 is connected to the drain (D) terminal of transistor MOS7, and the gate (G) terminal of transistor MOS7 is connected to converter IV; the drain (D) terminal of transistor MOS8 is connected to current error amplifier A. I The source (S) terminal of transistor MOS6 is connected to the drain (D) terminal of transistor MOS6; the gate (G) terminal of transistor MOS6 is connected to converter IV; the source (S) terminal of transistor MOS6 is connected to the source (S) terminal of transistor MOS7 and then connected to the drain (D) terminal of transistor MOS5.

5. The adaptive control circuit for a laser driver according to claim 4, characterized in that... The current error amplifier A I Including transistors MOS 11 MOS transistor 12 MOS transistor 13 MOS transistor 14 MOS transistor 15 Capacitor C and current source I 5; The transistor MOS 11 The S-terminal and the transistor MOS 12 After the S-pole is connected, it is connected to the power supply V. DD The transistor MOS 11 The gate of the transistor MOS 12 The gate (G) terminal is connected to the transistor MOS. 11 The junction between the drain (D) of transistor MOS8 and the drain (D) of transistor MOS8; the transistor MOS 12 The drain (D) terminal is split into two paths: one path is connected to the drain of transistor MOS4, and the other path is connected to transistor MOS. 13 The gate (G) of the transistor; the MOS transistor 13 The S terminal is connected to the power supply V. DD The drain terminal is connected to the current source. I 5 is the positive terminal; one end of the capacitor C is connected to the power supply V. DD The other end is connected to the transistor MOS. 12 The drain terminal and the transistor MOS 13 The contact point of the G pole; the current source I The negative terminal of 5 is grounded; the transistor MOS 14 The S-terminal and the transistor MOS 15 After the S-pole is connected, it is connected to the power supply V. DD The transistor MOS 14 The gate of the transistor MOS 15 The gate (G) terminal is connected to the transistor MOS. 14 The drain terminal and the transistor MOS 13 The contact point of the drain terminal; the transistor MOS 15 The drain (D) terminal is connected to the converter IV.

6. The adaptive control circuit for a laser driver according to claim 5, characterized in that... The converter IV includes a transistor MOS. 16 MOS transistor 17 A load resistor R1 and a load resistor R2 are connected in series, and the other end of the load resistor R1 is connected to the power supply V. DD The other end of the load resistor R2 is connected to the transistor MOS. 17 The drain terminal of the transistor MOS 17 The source (S) terminal of the transistor is grounded; the transistor MOS 16 The drain of the transistor is connected to the MOS transistor. 15 The drain (D) and source (S) terminals of transistor MOS3 are grounded, and the gate (G) terminal of transistor MOS3 is connected to the gate (M) terminal of transistor MOS3. 16 The gate and transistor MOS 17 The gate (G) terminal is connected to the transistor MOS. 16 The drain terminal and the transistor MOS 15 The contact point of the D pole.

7. The adaptive control circuit for a laser driver according to claim 3, characterized in that... The pre-stage differential amplifier A V Including transistors MOS 18 MOS transistor 19 MOS transistor 20 MOS transistor 21 Load resistors R3 and R4 are connected in parallel, with one end of the load resistors R3 and R4 connected to the power supply V. DD The other end of the load resistor R3 is connected to the transistor MOS. 20 The drain terminal of the transistor MOS 20 The S-terminal of the transistor MOS is connected to the S-terminal. 18 The drain terminal; the other end of the load resistor R4 is connected to the transistor MOS. 21 The drain terminal of the transistor MOS 21 The S-terminal of the transistor MOS is connected to the S-terminal. 19 The drain terminal of the transistor MOS 21 The gate of the transistor MOS 20 The G terminal is connected to a bias voltage V. B2 The transistor MOS 18 The S-terminal and the transistor MOS 19 The S-pole is connected to the current source. I drv The positive terminal of the current source I drv The negative terminal of the transistor is grounded; the transistor MOS 18 The G stage is the preamplifier of the differential amplifier A. V The positive input terminal is connected to the data signal V. data positive V data+ The transistor MOS 19 The G stage is the preamplifier of the differential amplifier A. V The negative input terminal is connected to the data signal V. data negative electrode V data- The load resistor R3 and the transistor MOS 20 The contact point of the drain (D) is the preamplifier A. V positive output terminal V out+ The load resistor R4 and the transistor MOS 21 The contact point of the drain (D) is the preamplifier A. V negative output terminal V out- .

8. The adaptive control circuit for a laser driver according to claim 7, characterized in that... The subsequent transconductance amplifier G m1 Including transistors MOS 22 MOS transistor 23 MOS transistor 24 and transistor MOS 25 The transistor MOS 24 The D-stage transconductance amplifier G is the next stage. m1 positive output terminal I out+ The transistor MOS 25 The D-stage transconductance amplifier G is the next stage. m1 negative terminal of the output I out- The transistor MOS 22 The G-stage transconductance amplifier G is the last stage of the G-stage. m1 positive input terminal V in+ Connect to the preamplifier A V positive output terminal V out+ The transistor MOS 23 The G-stage transconductance amplifier G is the last stage of the G-stage. m1 negative input terminal V in- Connect to the preamplifier A V negative output terminal V out- The transistor MOS 24 The gate of the transistor MOS 25 The G terminal is connected to a bias voltage V. B3 The transistor MOS 24 The S-terminal of the transistor MOS is connected to the S-terminal. 22 The drain terminal of the transistor MOS 25 The S-terminal of the transistor MOS is connected to the S-terminal. 23 The drain terminal of the transistor MOS 22 The S-terminal and the transistor MOS 23 The S-pole is connected to the current source. I mod The positive terminal of the current source I mod The negative terminal is grounded.

9. The adaptive control circuit for a laser driver according to any one of claims 2 to 8, characterized in that... The components constituting any one of the adaptive control circuits of claims 2 to 8 are packaged in the same integrated circuit.

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