Pixel driving circuit and driving method thereof, display panel and display device

Abstract

The present disclosure relates to the technical field of display, and proposes a pixel driving circuit and a driving method thereof, a display panel and a display device. The pixel driving circuit is used for driving a light emitting unit to emit light. The pixel driving circuit comprises a first driving transistor and a current compensation circuit. The first electrode of the first driving transistor is connected to a first power supply end, the second electrode of the first driving transistor is connected to the first electrode of the light emitting unit, and the gate electrode of the first driving transistor is connected to a first node. The current compensation circuit is connected in parallel with the first driving transistor between the first power supply end and the first electrode of the light emitting unit. The current compensation circuit is used for providing a driving current to the light emitting unit through the first power supply end in response to a control signal. The pixel driving circuit can realize large current output.

Description

Technical Field

[0001] The present disclosure relates to the field of display technology, and in particular to a pixel driving circuit and a driving method thereof, a display panel, and a display device. Background Art

[0002] The display panel needs to undergo a luminescence aging process (L-Aging) and / or a reverse aging process (Reverse Aging) before leaving the factory. The luminescence aging process (L-Aging) drives the light-emitting unit to emit light and ages the light-emitting unit quickly, so that the display panel is in a relatively stable state after leaving the factory. The reverse aging process (Reverse Aging) provides a large driving current to the light-emitting unit to melt the impurity conductive structure in the cathode and anode of the light-emitting unit, thereby avoiding the impurity conductive structure short-circuiting the light-emitting unit. However, in the related art, due to the limitations of the mobility and carrier concentration parameters of the driving transistor, the driving transistor has an upper limit on-current, and the maximum driving current output by the pixel driving circuit is limited by the upper limit on-current of the driving transistor, resulting in poor results of the luminescence aging process (L-Aging) or the reverse aging process (Reverse Aging).

[0003] It should be noted that the information disclosed in the above background technology section is only used to enhance the understanding of the background of the present disclosure, and therefore may include information that does not constitute prior art known to ordinary technicians in the field. Summary of the Invention

[0004] According to one aspect of the present disclosure, a pixel driving circuit is provided, wherein the pixel driving circuit is used to drive a light-emitting unit to emit light, and the pixel driving circuit includes: a first driving transistor; and a current compensation circuit. The first driving transistor has a first electrode connected to a first power supply terminal, a second electrode connected to a first electrode of the light-emitting unit, and a gate connected to a first node; the current compensation circuit is connected in parallel with the first driving transistor between the first power supply terminal and the first electrode of the light-emitting unit, and is used to respond to a control signal to provide a driving current to the light-emitting unit through the first power supply terminal.

[0005] In an exemplary embodiment of the present disclosure, the current compensation circuit includes: one or more second driving transistors connected in parallel, the first electrode of the second driving transistor is connected to the first electrode of the first driving transistor, the second electrode is connected to the second electrode of the first driving transistor, and the gate is connected to the first node.

[0006] In an exemplary embodiment of the present disclosure, the pixel driving circuit further includes: a first light-emitting control circuit, the first light-emitting control circuit being connected to the first power supply terminal and the first electrode of the first driving transistor, and being used to respond to a control signal to connect the first power supply terminal and the first electrode of the first driving transistor; the current compensation circuit further includes: a second light-emitting control circuit, the second light-emitting control circuit being connected to the first power supply terminal and the first electrode of the first driving transistor, and being used to respond to a control signal to connect the first power supply terminal and the first electrode of the first driving transistor.

[0007] In an exemplary embodiment of the present disclosure, the pixel driving circuit further includes: a third light-emitting control circuit, the third light-emitting control circuit being connected to the first electrode of the light-emitting unit and the second electrode of the first driving transistor, and being used to respond to a control signal to connect the second electrode of the first driving transistor and the first electrode of the light-emitting unit; the current compensation circuit further includes: a fourth light-emitting control circuit, the fourth light-emitting control circuit being connected to the first electrode of the light-emitting unit and the second electrode of the first driving transistor, and being used to respond to a control signal to connect the second electrode of the first driving transistor and the first electrode of the light-emitting unit.

[0008] In an exemplary embodiment of the present disclosure, when the pixel driving circuit further includes a first light-emitting control circuit, the current compensation circuit further includes a second light-emitting control circuit; the first light-emitting control circuit is also connected to the first enable signal terminal, and the first light-emitting control circuit is used to respond to the signal of the first enable signal terminal to connect the first power supply terminal and the first electrode of the first driving transistor; the second light-emitting control circuit is also connected to the first enable signal terminal, and the second light-emitting control circuit is used to respond to the signal of the first enable signal terminal to connect the second electrode of the first driving transistor and the first electrode of the light-emitting unit; the third light-emitting control circuit is also connected to the first enable signal terminal, and the third light-emitting control circuit is used to respond to the signal of the first enable signal terminal to connect the first power supply terminal and the first electrode of the first driving transistor; the fourth light-emitting control circuit is also connected to the first enable signal terminal, and the fourth light-emitting control circuit is used to respond to the signal of the first enable signal terminal to connect the second electrode of the first driving transistor and the first electrode of the light-emitting unit.

[0009] In an exemplary embodiment of the present disclosure, the first light-emitting control circuit includes: a fifth transistor, the first electrode of the fifth transistor is connected to the first power supply terminal, the second electrode is connected to the first electrode of the first driving transistor, and the gate is connected to the first enable signal terminal; the second light-emitting control circuit includes: one or more eighth transistors connected in parallel, the first electrode of the eighth transistor is connected to the first electrode of the fifth transistor, the second electrode is connected to the second electrode of the fifth transistor, and the gate is connected to the first enable signal terminal; the third light-emitting control circuit includes: a sixth transistor, the first electrode of the sixth transistor is connected to the second electrode of the first driving transistor, the second electrode is connected to the first electrode of the light-emitting unit, and the gate is connected to the first enable signal terminal; the fourth light-emitting control circuit includes: one or more ninth transistors connected in parallel, the first electrode of the ninth transistor is connected to the first electrode of the sixth transistor, the second electrode is connected to the second electrode of the sixth transistor, and the gate is connected to the first enable signal terminal.

[0010] In an exemplary embodiment of the present disclosure, the width-to-length ratios of the channel regions of the fifth transistor, the sixth transistor, the eighth transistor, and the ninth transistor are approximately the same, and the width-to-length ratios of the channel regions of the first driver transistor and the second driver transistor are approximately the same; the width-to-length ratio of the channel region of any transistor among the fifth transistor, the sixth transistor, the eighth transistor, and the ninth transistor is greater than the width-to-length ratio of the channel region of any transistor among the first driver transistor and the second driver transistor.

[0011] In an exemplary embodiment of the present disclosure, the current compensation circuit includes: one or more parallel tenth transistors, the first electrode of the tenth transistor is connected to the first power supply terminal, the second electrode is connected to the first electrode of the light-emitting unit, and the gate is connected to the second enable signal terminal.

[0012] In an exemplary embodiment of the present disclosure, the width-to-length ratio of the tenth transistor channel region is greater than the width-to-length ratio of the first driving transistor channel region.

[0013] In an exemplary embodiment of the present disclosure, the pixel driving circuit further includes: a data writing circuit, a first light-emitting control circuit, a third light-emitting control circuit, a compensation circuit, a first reset circuit, a second reset circuit, and a storage circuit. The data writing circuit is connected to the first electrode, the data signal terminal, and the gate driving signal terminal of the first driving transistor, and is used to respond to the signal of the gate driving signal terminal to transmit the signal of the data signal terminal to the first electrode of the first driving transistor; the first light-emitting control circuit is connected to the first power supply terminal, the first electrode of the first driving transistor, and the first enable signal terminal, and is used to respond to the signal of the first enable signal terminal to connect the first power supply terminal and the first electrode of the first driving transistor; the third light-emitting control circuit is connected to the first electrode of the light-emitting unit, the second electrode of the first driving transistor, and the first enable signal terminal, and is used to respond to the signal of the first enable signal terminal to connect the second electrode of the first driving transistor and the first electrode of the light-emitting unit. an electrode; a compensation circuit connected to the first node, the second electrode of the first driving transistor, and the gate driving signal terminal, and configured to respond to the signal of the gate driving signal terminal to connect the first node and the second electrode of the first driving transistor; a first reset circuit connected to the first initial signal terminal, the first node, and the first reset signal terminal, and configured to respond to the signal of the first reset signal terminal to transmit the signal of the first initial signal terminal to the first node; a second reset circuit connected to the first electrode of the light-emitting unit, the second initial signal terminal, and the second reset signal terminal, and configured to respond to the signal of the second reset signal terminal to transmit the signal of the second initial signal terminal to the first electrode of the light-emitting unit; a storage circuit connected between the first node and the first power supply terminal.

[0014] In an exemplary embodiment of the present disclosure, the data write circuit includes: a fourth transistor, a first electrode of the fourth transistor being connected to the data signal terminal, a second electrode being connected to the first electrode of the first driving transistor, and a gate being connected to the gate driving signal terminal; the first light-emitting control circuit includes: a fifth transistor, a first electrode of the fifth transistor being connected to the first power supply terminal, a second electrode being connected to the first electrode of the first driving transistor, and a gate being connected to the first enable signal terminal; the third light-emitting control circuit includes: a sixth transistor, a first electrode of the sixth transistor being connected to the second electrode of the first driving transistor, a second electrode being connected to the first electrode of the light-emitting unit, and a gate being connected to the first enable signal terminal; the compensation circuit includes: a second transistor, a first electrode of the second transistor being connected to the first node, a second electrode being connected to the second electrode of the first driving transistor, and a gate being connected to the gate driving signal terminal; the first reset circuit includes: a first transistor, a first electrode of the first transistor being connected to the first initial signal terminal, a second electrode being connected to the first node, and a gate being connected to the first reset signal terminal; the second reset circuit includes: a seventh transistor, a first electrode of the seventh transistor being connected to the second initial signal terminal, a second electrode being connected to the first electrode of the light-emitting unit, and a gate being connected to the second reset signal terminal; and the storage circuit includes: a capacitor connected between the first node and the first power supply terminal.

[0015] According to one aspect of the present disclosure, a method for driving a pixel driving circuit is provided, wherein the method is used to drive the above-mentioned pixel driving circuit, and the method includes:

[0016] In a first light-emitting stage, the light-emitting unit is driven to emit light by the first driving transistor;

[0017] In the second light-emitting stage, the current compensation circuit is used to drive the light-emitting unit to emit light.

[0018] According to one aspect of the present disclosure, a method for driving a pixel driving circuit is provided, wherein the method is used to drive the above-mentioned pixel driving circuit, and the method includes:

[0019] In the light emitting stage, the first driving transistor and the current compensation circuit are simultaneously used to drive the light emitting unit to emit light.

[0020] According to one aspect of the present disclosure, a display panel is provided, wherein the display panel includes the above-mentioned pixel driving circuit.

[0021] According to one aspect of the present disclosure, a display device is provided, wherein the display device includes the above-mentioned display panel.

[0022] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] The accompanying drawings are incorporated into and constitute a part of the specification, illustrate embodiments consistent with the present disclosure, and together with the specification, are used to explain the principles of the present disclosure. Obviously, the drawings described below are only some embodiments of the present disclosure, and those skilled in the art can derive other drawings based on these drawings without inventive effort.

[0024] Figure 1 This is a schematic structural diagram of an exemplary embodiment of a pixel driving circuit disclosed herein;

[0025] Figure 2 is a structural schematic diagram of another exemplary embodiment of the pixel driving circuit disclosed herein;

[0026] Figure 3 is a structural schematic diagram of another exemplary embodiment of the pixel driving circuit disclosed herein;

[0027] Figure 4 is a structural schematic diagram of another exemplary embodiment of the pixel driving circuit disclosed herein;

[0028] Figure 5 is a structural schematic diagram of another exemplary embodiment of the pixel driving circuit disclosed herein;

[0029] Figure 6 is a structural schematic diagram of another exemplary embodiment of the pixel driving circuit disclosed herein;

[0030] Figure 7 is a structural schematic diagram of another exemplary embodiment of the pixel driving circuit disclosed herein;

[0031] Figure 8 is a structural schematic diagram of another exemplary embodiment of the pixel driving circuit disclosed herein;

[0032] Figure 9 is a structural schematic diagram of another exemplary embodiment of the pixel driving circuit disclosed herein;

[0033] Figure 10 for Figure 9 A timing diagram of each node in an exemplary embodiment of a pixel driving circuit driving method shown;

[0034] Figure 11 is a structural schematic diagram of another exemplary embodiment of the pixel driving circuit disclosed herein;

[0035] Figure 12 for Figure 11 A timing diagram of each node in an exemplary embodiment of a pixel driving circuit driving method shown;

[0036] Figure 13 is a structural schematic diagram of another exemplary embodiment of the pixel driving circuit disclosed herein;

[0037] Figure 14 for Figure 13 A timing diagram of each node in an exemplary embodiment of a pixel driving circuit driving method shown;

[0038] Figure 15 is a structural schematic diagram of another exemplary embodiment of the pixel driving circuit disclosed herein;

[0039] Figure 16 FIG. 4 is a structural diagram of another exemplary embodiment of a pixel driving circuit disclosed herein. DETAILED DESCRIPTION

[0040] Example embodiments will now be described more fully with reference to the accompanying drawings. However, example embodiments can be implemented in many forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete and will fully convey the concepts of the example embodiments to those skilled in the art. Like reference numerals in the figures represent like or similar structures, and thus their detailed description will be omitted.

[0041] Although relative terms such as "upper" and "lower" are used in this specification to describe the relationship of one component of the illustrations to another component, these terms are used in this specification for convenience only, such as based on the orientation of the examples shown in the drawings. It is understood that if the device in the illustrations is turned upside down, the component described as "upper" will become the component "lower". Other relative terms such as "higher", "lower", "top", "bottom", "left", and "right" have similar meanings. When a structure is "on" another structure, it may mean that the structure is integrally formed on the other structure, or that the structure is "directly" disposed on the other structure, or that the structure is "indirectly" disposed on the other structure through another structure.

[0042] The terms "a", "an", and "said" are used to indicate that there are one or more elements / components / etc.; the terms "including" and "having" are used to express an open-ended inclusive meaning and mean that there may be additional elements / components / etc. in addition to the listed elements / components / etc.

[0043] This exemplary embodiment first provides a pixel driving circuit, such as Figure 1FIG. 1 is a schematic diagram of an exemplary embodiment of a pixel driving circuit of the present disclosure, wherein the pixel driving circuit is used to drive the light-emitting unit OLED to emit light. The pixel driving circuit may include: a first driving transistor DT1 and a current compensation circuit 1. The first electrode of the first driving transistor DT1 is connected to the first power supply terminal VDD, the second electrode is connected to the first electrode of the light-emitting unit OLED, and the gate is connected to the first node N1; the current compensation circuit 1 and the first driving transistor DT1 are connected in parallel between the first power supply terminal VDD and the first electrode of the light-emitting unit OLED, and the current compensation circuit 1 is used to respond to a control signal to provide a driving current to the light-emitting unit OLED through the first power supply terminal VDD. The second electrode of the light-emitting unit OLED may be connected to the second power supply terminal VSS. The first power supply terminal VDD may be a high-level signal terminal, and the second power supply terminal VSS may be a low-level signal terminal.

[0044] The pixel driving circuit provided in this exemplary embodiment can provide a driving current to the light-emitting unit simultaneously through the current compensation circuit 1 and the first driving transistor DT1, or can provide a driving current to the light-emitting unit solely through the current compensation circuit 1. Thus, the upper limit of the output current of the pixel driving circuit is not limited by the upper limit of the conduction current of the first driving transistor. The pixel driving circuit can output a relatively large current to better implement a light aging process (L-Aging) and / or a reverse aging process (Reverse Aging).

[0045] In this exemplary embodiment, Figure 2 , which is a structural diagram of another exemplary embodiment of the pixel driving circuit disclosed herein. The current compensation circuit 1 may include: one or more second driving transistors DT2 connected in parallel, wherein the first electrode of the second driving transistor DT2 is connected to the first electrode of the first driving transistor DT1, the second electrode is connected to the second electrode of the first driving transistor DT1, and the gate is connected to the first node N1. In this exemplary embodiment, the second driving transistor DT2 can operate in a saturation region, and the second driving transistor DT2 can output a current of a preset magnitude to the light-emitting unit OLED according to its gate-source voltage difference. The second driving transistor DT2 and the first driving transistor DT1 may have approximately the same channel region width-to-length ratio. Among them, the width-to-length ratio of the channel region of transistor A is A1, and the width-to-length ratio of the channel region of transistor B is A2. In this application, the channel region width-to-length ratio of transistor A and transistor DB being approximately the same can be understood as |A1-A2| / A2 being less than or equal to 10%.

[0046] It should be noted that Figure 2In the pixel driving circuit shown, the current compensation circuit 1 includes three parallel second driving transistors DT2. It should be understood that in other exemplary embodiments, the current compensation circuit 1 may also include other numbers of second driving transistors DT2. For example, the number of parallel second driving transistors DT2 in the current compensation circuit 1 may be 1, 2, 4, 8, etc.

[0047] In this exemplary embodiment, Figure 3 FIG2 is a schematic diagram of another exemplary embodiment of a pixel driving circuit according to the present disclosure. The pixel driving circuit may further include a first light-emission control circuit CN1 connected to the first power supply terminal VDD and the first electrode of the first driving transistor DT1, and configured to connect the first power supply terminal VDD and the first electrode of the first driving transistor DT1 in response to a control signal. In this exemplary embodiment, the upper limit on-state current of the first light-emission control circuit CN1 may also limit the maximum output current of the pixel driving circuit.

[0048] like Figure 4 , which is a structural diagram of another exemplary embodiment of the pixel driving circuit disclosed herein. The current compensation circuit 1 may further include: a second light-emitting control circuit CN2, the second light-emitting control circuit CN2 being connected to the first power supply terminal VDD and the first electrode of the first driving transistor DT1, and being configured to connect the first power supply terminal VDD and the first electrode of the first driving transistor DT1 in response to a control signal. This exemplary embodiment adds a second light-emitting control circuit CN2 arranged in parallel with the first light-emitting control circuit CN1, thereby increasing the maximum output current of the pixel driving circuit. Figure 4 As shown, the control terminals of the first light-emitting control circuit CN1 and the second light-emitting control circuit CN2 can both be connected to the first enable signal terminal EM1, that is, the first light-emitting control circuit CN1 and the second light-emitting control circuit CN2 can be turned on at the same time. It should be understood that in other exemplary embodiments, the control terminals of the first light-emitting control circuit CN1 and the second light-emitting control circuit CN2 can also be connected to different signal terminals, and when the light-emitting unit is aged, only the second light-emitting control circuit CN2 can be turned on.

[0049] like Figure 4As shown, in this exemplary embodiment, the first light-emitting control circuit CN1 may include: a fifth transistor T5, a first electrode of the fifth transistor T5 is connected to the first power supply terminal VDD, a second electrode is connected to the first electrode of the first driving transistor DT1, and a gate is connected to the first enable signal terminal EM1; the second light-emitting control circuit CN2 may include: one or more eighth transistors T8 connected in parallel, a first electrode of the eighth transistor T8 is connected to the first electrode of the fifth transistor T5, a second electrode is connected to the second electrode of the fifth transistor T5, and a gate is connected to the first enable signal terminal EM1.

[0050] It should be noted that Figure 4 In the pixel driving circuit shown, the second light-emitting control circuit CN2 includes two eighth transistors T8 connected in parallel. It should be understood that in other exemplary embodiments, the second light-emitting control circuit CN2 may also include other numbers of eighth transistors T8. For example, the number of eighth transistors T8 connected in parallel in the second light-emitting control circuit CN2 may be 1, 3, 4, 8, etc.

[0051] In this exemplary embodiment, Figure 5 FIG2 is a schematic diagram of another exemplary embodiment of a pixel driving circuit according to the present disclosure. In this exemplary embodiment, the pixel driving circuit further includes a third light-emission control circuit CN3 connected to the first electrode of the light-emitting element OLED and the second electrode of the first driving transistor DT1, and configured to connect the second electrode of the first driving transistor DT1 to the first electrode of the light-emitting element OLED in response to a control signal. In this exemplary embodiment, the upper limit on-state current of the third light-emission control circuit CN3 may also limit the maximum output current of the pixel driving circuit.

[0052] like Figure 6 As shown, it is a structural diagram of another exemplary embodiment of the pixel driving circuit disclosed in the present invention. The current compensation circuit 1 also includes: a fourth light-emitting control circuit CN4, the fourth light-emitting control circuit CN4 is connected to the first electrode of the light-emitting unit OLED and the second electrode of the first driving transistor DT1, and is used to respond to a control signal to connect the second electrode of the first driving transistor DT1 and the first electrode of the light-emitting unit OLED. This exemplary embodiment adds a fourth light-emitting control circuit CN4 arranged in parallel with the third light-emitting control circuit CN3, so as to increase the maximum output current of the pixel driving circuit. Figure 6As shown, the control terminals of the third and fourth light-emitting control circuits CN3 and CN4 can both be connected to the enable signal terminal EM, that is, the third and fourth light-emitting control circuits CN3 and CN4 can be turned on simultaneously. It should be understood that in other exemplary embodiments, the control terminals of the third and fourth light-emitting control circuits CN3 and CN4 can also be connected to different signal terminals, and when performing an aging process on the light-emitting unit, only the fourth light-emitting control circuit CN4 can be turned on.

[0053] like Figure 6 As shown, the third light-emitting control circuit CN3 may include: a sixth transistor T6, a first electrode of the sixth transistor T6 is connected to the second electrode of the first driving transistor DT1, a second electrode is connected to the first electrode of the light-emitting unit OLED, and a gate is connected to the first enable signal terminal EM1; the fourth light-emitting control circuit CN4 may include: one or more parallel ninth transistors T9, a first electrode of the ninth transistor T9 is connected to the first electrode of the sixth transistor T6, a second electrode is connected to the second electrode of the sixth transistor T6, and a gate is connected to the first enable signal terminal EM1.

[0054] It should be noted that Figure 6 In the pixel driving circuit shown, the fourth light-emitting control circuit CN4 includes two parallel ninth transistors T9. It should be understood that in other exemplary embodiments, the fourth light-emitting control circuit CN4 may also include other numbers of ninth transistors T9. For example, the number of parallel ninth transistors T9 in the fourth light-emitting control circuit CN4 may be 1, 3, 4, 8, etc.

[0055] like Figure 7 FIG2 is a schematic diagram of another exemplary embodiment of a pixel driving circuit according to the present disclosure. The pixel driving circuit may further include: a first light-emitting control circuit CN1 and a third light-emitting control circuit CN3. The first light-emitting control circuit CN1 is connected to the first power supply terminal VDD and the first electrode of the first driving transistor DT1, and is configured to connect the first power supply terminal VDD and the first electrode of the first driving transistor DT1 in response to a control signal. The third light-emitting control circuit CN3 is connected to the first electrode of the light-emitting unit OLED and the second electrode of the first driving transistor DT1, and is configured to connect the second electrode of the first driving transistor DT1 and the first electrode of the light-emitting unit OLED in response to a control signal. The upper limit conduction current of the first light-emitting control circuit CN1 and the third light-emitting control circuit CN3 both affect the maximum output current of the pixel driving circuit.

[0056] like Figure 8FIG2 is a schematic diagram of the structure of another exemplary embodiment of the pixel driving circuit disclosed herein. The current compensation circuit 1 may further include: a second light-emitting control circuit CN2 and a fourth light-emitting control circuit CN4. The second light-emitting control circuit CN2 is connected to the first power supply terminal VDD and the first electrode of the first driving transistor DT1, and is configured to connect the first power supply terminal VDD and the first electrode of the first driving transistor DT1 in response to a control signal. The fourth light-emitting control circuit CN4 is connected to the first electrode of the light-emitting unit OLED and the second electrode of the first driving transistor DT1, and is configured to connect the second electrode of the first driving transistor DT1 and the first electrode of the light-emitting unit OLED in response to a control signal. This exemplary embodiment adds a second light-emitting control circuit CN2 arranged in parallel with the first light-emitting control circuit CN1, and a fourth light-emitting control circuit CN4 arranged in parallel with the third light-emitting control circuit CN3, thereby increasing the maximum output current of the pixel driving circuit. The structures of the second light-emitting control circuit CN2 and the fourth light-emitting control circuit CN4 may be the same as those in the above embodiment.

[0057] In this exemplary embodiment, the first drive transistor DT1 and the second drive transistor DT2 need to operate in the saturation region as drive transistors, and the fifth transistor T5, the sixth transistor T6, the eighth transistor T8, and the ninth transistor T9 need to operate in the cut-off region and the saturation region as switch transistors. The width-to-length ratio of the drive transistor channel region needs to be smaller than the width-to-length ratio of the switch transistor channel region. At the same time, since the upper limit current of the transistor conduction is positively correlated with the width-to-length ratio of the transistor channel region, in this exemplary embodiment, the number of parallel eighth transistors T8 can be smaller than the number of parallel second drive transistors DT2, and the number of parallel ninth transistors T9 can be smaller than the number of parallel second drive transistors DT2. For example, the number of eighth transistors T8 is m1, the number of second drive transistors DT2 is m2, and the number of ninth transistors T9 is m3, and (m1+1):(m2+1):(m3+1) can be equal to 1:4:1.

[0058] In this exemplary embodiment, the above-mentioned parallel transistor solution can be applied to pixel driving circuits of various architectures. For example, the above-mentioned parallel transistor solution can be applied to a 7T1C pixel driving circuit, such as Figure 9The figure shows a schematic diagram of the structure of another exemplary embodiment of the pixel driving circuit of the present disclosure. In this exemplary embodiment, the pixel driving circuit further includes: a data writing circuit 2, a first light-emitting control circuit CN1, a third light-emitting control circuit CN3, a compensation circuit 3, a first reset circuit 4, a second reset circuit 5, and a storage circuit 6. The data writing circuit 2 is connected to the first electrode of the first driving transistor DT1, the data signal terminal Data, and the gate driving signal terminal Gate, and is used to transmit the signal of the data signal terminal Data to the first electrode of the first driving transistor DT1 in response to the signal of the gate driving signal terminal Gate; the first light-emitting control circuit CN1 is connected to the first power supply terminal VDD, the first electrode of the first driving transistor DT1, and the first enable signal terminal EM1, and is used to connect the first power supply terminal VDD and the first electrode of the first driving transistor DT1 in response to the signal of the first enable signal terminal EM1; the third light-emitting control circuit CN3 is connected to the first electrode of the light-emitting unit OLED, the second electrode of the first driving transistor DT1, and the first enable signal terminal EM1, and is used to connect the second electrode of the first driving transistor DT1 and the first electrode of the light-emitting unit OLED in response to the signal of the first enable signal terminal EM1; The compensation circuit 3 is connected to the first node N1, the second electrode of the first driving transistor DT1, and the gate driving signal terminal Gate, and is used to respond to the signal of the gate driving signal terminal Gate to connect the first node N1 and the second electrode of the first driving transistor DT1; the first reset circuit 4 is connected to the first initial signal terminal Vinit1, the first node N1, and the first reset signal terminal Re1, and is used to respond to the signal of the first reset signal terminal Re1 to transmit the signal of the first initial signal terminal Vinit1 to the first node N1; the second reset circuit 5 is connected to the first electrode of the light-emitting unit OLED, the second initial signal terminal Vinit2, and the second reset signal terminal Re2, and is used to respond to the signal of the second reset signal terminal Re2 to transmit the signal of the second initial signal terminal Vinit2 to the first electrode of the light-emitting unit OLED; the storage circuit 6 is connected between the first node N1 and the first power supply terminal VDD.

[0059] In this exemplary embodiment, Figure 9As shown, the data writing circuit 2 includes: a fourth transistor T4, a first electrode of the fourth transistor T4 is connected to the data signal terminal Data, a second electrode is connected to the first electrode of the first driving transistor DT1, and a gate is connected to the gate driving signal terminal Gate; the first light emitting control circuit CN1 includes: a fifth transistor T5, a first electrode of the fifth transistor T5 is connected to the first power supply terminal VDD, a second electrode is connected to the first electrode of the first driving transistor DT1, and a gate is connected to the first enable signal terminal EM1; the third light emitting control circuit CN3 includes: a sixth transistor T6, a first electrode of the sixth transistor T6 is connected to the second electrode of the first driving transistor DT1, a second electrode is connected to the first electrode of the light emitting unit OLED, and a gate is connected to the first enable signal terminal EM1; the compensation circuit includes: a first The second transistor T2, the first electrode of the second transistor T2 is connected to the first node N1, the second electrode is connected to the second electrode of the first driving transistor DT1, and the gate is connected to the gate driving signal terminal Gate; the first reset circuit 4 includes: a first transistor T1, the first electrode of the first transistor T1 is connected to the first initial signal terminal Vinit1, the second electrode is connected to the first node N1, and the gate is connected to the first reset signal terminal Re1; the second reset circuit 5 includes: a seventh transistor T7, the first electrode of the seventh transistor T7 is connected to the second initial signal terminal Vinit2, the second electrode is connected to the first electrode of the light-emitting unit OLED, and the gate is connected to the second reset signal terminal Re2; the storage circuit 6 includes: a capacitor C, the capacitor C is connected between the first node N1 and the first power supply terminal VDD.

[0060] In other exemplary embodiments, the first reset signal terminal Re1 and the second reset signal terminal Re2 may also share the same signal terminal, and the first initial signal terminal Vinit1 and the second initial signal terminal Vinit2 may also share the same signal terminal.

[0061] In this exemplary embodiment, the first transistor T1, the second transistor T2, the fourth transistor T4, the fifth transistor T5, the sixth transistor T6, the seventh transistor T7, the eighth transistor T8, the ninth transistor T9, the first driving transistor DT1, and the second driving transistor DT2 may all be P-type transistors. The threshold voltages of the first driving transistor DT1 and the second driving transistor DT2 may be the same.

[0062] like Figure 10 As shown, Figure 9The following is a timing diagram of each node in an exemplary embodiment of a pixel driving circuit driving method. Gate represents the timing of the gate drive signal terminal signal, Re1 represents the timing of the first reset signal terminal signal, Re2 represents the timing of the second reset signal terminal signal, EM1 represents the timing of the first enable signal terminal EM1 signal, and Data represents the timing of the data signal terminal. The driving method of the pixel driving circuit in this display panel may include a reset phase t1, a data writing phase t2, and a light-emitting phase t3. During the reset phase t1, the first reset signal terminal Re1 outputs a low-level signal, the first transistor T1 turns on, and the first initial signal terminal Vinit1 inputs a first initial signal to the first node N1. During the data writing phase t2, the gate drive signal terminal Gate outputs a low-level signal, the fourth transistor T4, the second transistor T2, and the seventh transistor T7 turn on, and the data signal terminal Da outputs a data signal to write a voltage Vdata+Vth to the first node N1, where Vdata is the voltage of the data signal and Vth is the threshold voltage of the first drive transistor DT1. Simultaneously, the second initial signal terminal Vinit2 inputs a second initial signal to the second electrode of the sixth transistor T6. In the light-emitting phase t3: the first enable signal terminal EM1 outputs a low-level signal, the sixth transistor T6, the eighth transistor T8, the fifth transistor T5, and the ninth transistor T9 are turned on, and the first driving transistor DT1 and the second driving transistor DT2 drive the light-emitting unit to emit light under the action of the voltage Vdata+Vth at the first node N1. The driving current I output by any driving transistor (including any first driving transistor or second driving transistor) is (μWCox / 2L)(Vdata+Vth-Vdd-Vth) 2 Where μ is carrier mobility; Cox is the gate capacitance per unit area; W is the width of the driver transistor channel; L is the length of the driver transistor channel; Vgs is the gate-source voltage difference of the driver transistor; and Vth is the threshold voltage of the driver transistor. The total current output by the pixel driver circuit is equal to the sum of the output currents of the individual driver transistors.

[0063] It should be understood that in other exemplary embodiments, Figure 9 The pixel driving circuit shown may not include the ninth transistor T9 and / or the eighth transistor T8. The threshold voltages of the first driving transistor DT1 and the second driving transistor DT2 may also be different.

[0064] It should be understood that the above-mentioned parallel transistor solution can also be applied to pixel driving circuits of other architectures. Figure 11, which is a schematic diagram of the structure of another exemplary embodiment of a pixel driving circuit of the present disclosure. The pixel driving circuit includes a first transistor T1, a second transistor T2, a fourth transistor T4, a fifth transistor T5, a sixth transistor T6, a seventh transistor T7, an eighth transistor T8, a ninth transistor T9, a first driving transistor DT1, a second driving transistor DT2, and a capacitor C. The first transistor T1, the second transistor T2, the fourth transistor T4, the fifth transistor T5, the sixth transistor T6, the seventh transistor T7, the eighth transistor T8, the ninth transistor T9, the first driving transistor DT1, and the second driving transistor DT2 may all be P-type transistors. The threshold voltages of the first driving transistor DT1 and the second driving transistor DT2 may be the same.

[0065] It should be understood that in other exemplary embodiments, Figure 11 The pixel driving circuit shown may not include the ninth transistor T9. The threshold voltages of the first driving transistor DT1 and the second driving transistor DT2 may also be different.

[0066] like Figure 12 As shown, Figure 11The timing diagram of each node in an exemplary embodiment of a pixel driving circuit driving method shown in FIG. Gate represents the timing of the gate driving signal terminal Gate signal, Re represents the timing of the reset signal terminal Re signal, and EM1 represents the timing of the first enable signal terminal EM1 signal. The driving method of the pixel driving circuit in the display panel may include a reset phase t1, a data writing phase t2, and a light-emitting phase t3. In the reset phase t1: the reset signal terminal Re outputs a low-level signal, the first transistor T1 and the seventh transistor T7 are turned on, the reference voltage terminal Vref inputs the reference voltage Vf to the second node N2, and the initial signal terminal Vinit inputs the initial voltage Vt to the first node N1. In the data writing stage t2: the gate drive signal terminal Gate outputs a low-level signal, the fourth transistor T4, the second transistor T2, and the eighth transistor T8 are turned on, the data signal terminal Data inputs a data signal to the second node N2, the voltage of the data signal is Vdata, the voltage of the second node N2 changes from Vf to Vdata, and under the coupling action of the capacitor C, the voltage of the first node N1 changes from Vt to Vt+Vdata-Vf, the first drive transistor DT1 and the second drive transistor DT2 are turned on, and the first power supply terminal VDD inputs a voltage Vdd+Vth to the first node N1, where Vdd is the voltage of the first power supply terminal VDD and Vth is the threshold voltage of the first drive transistor DT1. In the light-emitting stage t3, the first enable signal terminal EM1 outputs a low-level signal, the fifth transistor T5, the sixth transistor T6, and the ninth transistor T9 are turned on, the voltage of the second node N2 changes from Vdata to Vf, and under the coupling action of the capacitor C, the voltage of the first node N1 changes to Vdd+Vth+Vf-Vdata. The first driving transistor DT1 and the second driving transistor DT2 output a driving current under the action of the voltage at the first node N1 to drive the light-emitting unit OLED to emit light.

[0067] like Figure 13 2 is a schematic diagram of the structure of another exemplary embodiment of the pixel driving circuit of the present disclosure. The pixel driving circuit includes a first transistor T1, a second transistor T2, a fourth transistor T4, a fifth transistor T5, a sixth transistor T6, a seventh transistor T7, an eighth transistor T8, a ninth transistor T9, a first driving transistor DT1, a second driving transistor DT2, a first capacitor C1, and a second capacitor C2. The first transistor T1, the second transistor T2, the fourth transistor T4, the fifth transistor T5, the sixth transistor T6, the seventh transistor T7, the eighth transistor T8, the ninth transistor T9, the first driving transistor DT1, and the second driving transistor DT2 can all be P-type transistors. The threshold voltage of the first driving transistor DT1 and the second driving transistor DT2 can be the same.

[0068] It should be understood that in other exemplary embodiments, Figure 13The pixel driving circuit shown may not include the ninth transistor T9. The threshold voltages of the first driving transistor DT1 and the second driving transistor DT2 may also be different.

[0069] like Figure 14 As shown, Figure 13 The following is a timing diagram of each node in an exemplary embodiment of a pixel driving circuit driving method. AZn-1 represents the timing of the signal at the first control signal terminal AZn-1, AZn represents the timing of the signal at the second control signal terminal AZn, EM1 represents the timing of the signal at the first enable signal terminal EM1, and Sn represents the timing of the signal at the third control signal terminal Sn. The driving method of the pixel driving circuit in this display panel may include a first phase t1, a second phase t2, and a third phase t3. In the first phase t1, the third control signal terminal Sn and the first control signal terminal AZn-1 output low-level signals, the first transistor T1, the fourth transistor T4, and the fifth transistor T5 are turned on, the data signal terminal Data inputs a data signal to the third node N3, the data signal voltage is Vdata, the first power supply terminal VDD inputs a high-level power supply voltage Vdd to the second node N2, and the initial signal terminal Vinit inputs an initial voltage Vt to the first node N1. In the second phase t2, the first control signal terminal AZn-1 and the second control signal terminal AZn output low-level signals, the fifth transistor T5, the second transistor T2, and the sixth transistor T6 are turned on, the initial signal terminal Vinit inputs an initial signal to the first electrode of the light-emitting unit OLED, and the first power supply terminal VDD inputs a voltage Vdd+Vth to the first node N1, where Vdd is the voltage of the first power supply terminal and Vth is the threshold voltage of the first driver transistor DT1. In the third phase t3, the first enable signal terminal EM1 outputs a low-level signal, the eighth transistor T8, the seventh transistor T7, and the ninth transistor T9 are turned on, and the voltage of the third node N3 changes from Vdata to Vf, where Vf is the voltage of the reference voltage terminal Vref. Under the coupling effect of the first capacitor C1 and the second capacitor C2, the voltage of the first node N1 changes to Vdd+Vth+Vf-Vdata. At the same time, the first driver transistor DT1 and the second driver transistor DT2 output current under the action of the first node N1 to drive the light-emitting unit OLED to emit light.

[0070] like Figure 15, which is a structural diagram of another exemplary embodiment of the pixel driving circuit of the present invention. The pixel driving circuit includes a second transistor T2, a third transistor T3, a ninth transistor T9, a first driving transistor DT1, a second driving transistor DT2, and a capacitor C. Among them, the second transistor T2, the third transistor T3, the ninth transistor T9, the first driving transistor DT1, and the second driving transistor DT2 can all be P-type transistors. The driving method of the pixel driving circuit may include a data writing phase and a light emitting phase. In the data writing phase, the gate driving signal terminal Gate outputs a low-level signal, the second transistor T2 is turned on, and the data signal terminal Data writes a data signal to the first node N1; in the light emitting phase, the first enable signal terminal EM1 outputs a low-level signal, the third transistor T3 and the ninth transistor T9 are turned on, and the first driving transistor DT1 and the second driving transistor DT2 input a driving current to the light emitting unit OLED under the action of the first node N1.

[0071] It should be understood that in other exemplary embodiments, Figure 15 The pixel driving circuit shown may not include the ninth transistor T9. The threshold voltages of the first driving transistor DT1 and the second driving transistor DT2 may also be different.

[0072] like Figure 16 FIG. 1 is a schematic diagram of another exemplary embodiment of a pixel driving circuit according to the present disclosure. The current compensation circuit 1 may include: one or more parallel-connected tenth transistors T10, wherein a first electrode of the tenth transistor T10 is connected to the first power supply terminal VDD, a second electrode is connected to the first electrode of the light-emitting unit OLED, and a gate is connected to the second enable signal terminal EM2.

[0073] The pixel driving circuit provided by this exemplary embodiment adds a tenth transistor T10 on the basis of the 7T1C pixel driving circuit architecture. When the display panel is driven normally, the tenth transistor T10 is turned off, and the timing of each control signal in the 7T1C pixel driving circuit can be as follows: Figure 10 As shown, the display panel is driven normally. When the display panel requires burn-in, all transistors in the 7T1C pixel drive circuit are turned off, the tenth transistor T10 is turned on, and the first power supply terminal VDD provides a drive current to the light-emitting element OLED through the tenth transistor T10. In this exemplary embodiment, the width-to-length ratio of the channel region of the tenth transistor T10 can be greater than the width-to-length ratio of the channel region of the first drive transistor DT1. This means that the tenth transistor T10 can provide a larger drive current to the light-emitting element OLED.

[0074] It should be noted that Figure 16The pixel driving circuit shown includes two tenth transistors T10. It should be understood that in other exemplary embodiments, the number of the tenth transistors T10 can also be other values, for example, the number of the tenth transistors T10 can also be 1, 3, 5, 8, etc.

[0075] It should be understood that in other exemplary embodiments, when the display panel needs to be aged, the tenth transistor T10 and the first driving transistor DT1 can also be turned on at the same time, and the first power supply terminal VDD can simultaneously provide a driving current to the light-emitting unit OLED through the tenth transistor T10 and the first driving transistor DT1. In addition, in other exemplary embodiments, the method of adding the tenth transistor T10 can also be applied to pixel driving circuits of any other architecture. As long as the first electrode of the tenth transistor T10 is directly connected to the first power supply terminal and the second electrode is directly connected to the light-emitting unit, the effect of increasing the maximum output current of the pixel driving circuit can be achieved. At the same time, the solution of adding a second driving transistor, a second light-emitting control circuit, a fourth light-emitting control circuit, and a tenth transistor can also be applied to the same pixel driving circuit.

[0076] According to one aspect of the present disclosure, a display panel is further provided, comprising the above-mentioned pixel driving circuit.

[0077] This exemplary embodiment also provides a display device including the above-mentioned display panel. The display device may be a mobile phone, a tablet computer, a television, or other display device.

[0078] Other embodiments of the present disclosure will readily occur to those skilled in the art after considering the specification and practicing what is disclosed herein. This application is intended to cover any variations, uses, or adaptations of the present disclosure that follow the general principles of the present disclosure and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered as exemplary only, with the true scope and spirit of the present disclosure being indicated by the claims.

[0079] The drawings in this disclosure only relate to the structures involved in this disclosure, and other structures may refer to the general design. In the absence of conflict, the embodiments of this disclosure and the features in the embodiments may be combined with each other to obtain new embodiments. It should be understood by those skilled in the art that the technical solutions of this disclosure may be modified or replaced by equivalents without departing from the spirit and scope of the technical solutions of this disclosure, and should be included in the scope of the claims of this disclosure.

[0080] It should be understood that the present disclosure is not limited to the exact structures that have been described above and shown in the drawings, and that various modifications and changes may be made without departing from the scope thereof. The scope of the present disclosure is limited only by the appended claims.

Claims

1. A pixel driving circuit, wherein: The pixel driving circuit is used to drive the light-emitting unit to emit light, and the pixel driving circuit includes: a first driving transistor, wherein a first electrode of the first driving transistor is connected to the first power supply terminal, a second electrode is connected to the first electrode of the light emitting unit, and a gate is connected to the first node; a current compensation circuit connected in parallel with the first driving transistor between the first power supply terminal and the first electrode of the light-emitting unit, the current compensation circuit being configured to respond to a control signal to provide a driving current to the light-emitting unit through the first power supply terminal; The current compensation circuit includes: one or more tenth transistors connected in parallel, wherein a first electrode of the tenth transistor is connected to the first power supply terminal, a second electrode is connected to the first electrode of the light-emitting unit, and a gate is connected to the second enable signal terminal; The width-to-length ratio of the channel region of the tenth transistor is greater than the width-to-length ratio of the channel region of the first driving transistor; The pixel driving circuit further includes: a first light emitting control circuit, the first light emitting control circuit being connected to the first power supply terminal and the first electrode of the first driving transistor and being configured to connect the first power supply terminal and the first electrode of the first driving transistor in response to a control signal; a third light emitting control circuit, the third light emitting control circuit being connected to the first electrode of the light emitting unit and the second electrode of the first driving transistor, and being configured to connect the second electrode of the first driving transistor and the first electrode of the light emitting unit in response to a control signal; When the display panel is driven normally, the tenth transistor is turned off; When the display panel undergoes aging processing, the tenth transistor is turned on, and the first light-emitting control circuit disconnects the first power supply terminal and the first electrode of the first driving transistor, and the third light-emitting control circuit disconnects the second electrode of the first driving transistor and the first electrode of the light-emitting unit.

2. The pixel driving circuit according to claim 1, wherein: The current compensation circuit includes: One or more second driving transistors connected in parallel, wherein a first electrode of the second driving transistor is connected to the first electrode of the first driving transistor, a second electrode is connected to the second electrode of the first driving transistor, and a gate is connected to the first node.

3. The pixel driving circuit according to claim 2, wherein: The pixel driving circuit further includes: The second light emitting control circuit is connected to the first power supply terminal and the first electrode of the first driving transistor, and is used for responding to a control signal to connect the first power supply terminal and the first electrode of the first driving transistor.

4. The pixel driving circuit according to claim 2 or 3, wherein: The pixel driving circuit further includes: A fourth light-emitting control circuit is connected to the first electrode of the light-emitting unit and the second electrode of the first driving transistor, and is used to respond to a control signal to connect the second electrode of the first driving transistor and the first electrode of the light-emitting unit.

5. The pixel driving circuit according to claim 4, wherein: When the pixel driving circuit further includes a first light emitting control circuit and a second light emitting control circuit; The first light emitting control circuit is further connected to a first enable signal terminal, and is configured to connect the first power supply terminal and the first electrode of the first driving transistor in response to a signal from the first enable signal terminal; The second light emitting control circuit is further connected to the first enable signal terminal, and is configured to connect the second electrode of the first driving transistor and the first electrode of the light emitting unit in response to a signal from the first enable signal terminal; The third light emitting control circuit is further connected to the first enable signal terminal, and is configured to connect the first power supply terminal and the first electrode of the first driving transistor in response to a signal from the first enable signal terminal; The fourth light emitting control circuit is also connected to the first enable signal terminal, and is used to respond to the signal of the first enable signal terminal to connect the second electrode of the first driving transistor and the first electrode of the light emitting unit.

6. The pixel driving circuit according to claim 5, wherein: The first light emitting control circuit includes: a fifth transistor, having a first electrode connected to the first power supply terminal, a second electrode connected to the first electrode of the first driving transistor, and a gate connected to the first enable signal terminal; The second light emitting control circuit includes: one or more eighth transistors connected in parallel, wherein a first electrode of the eighth transistor is connected to the first electrode of the fifth transistor, a second electrode is connected to the second electrode of the fifth transistor, and a gate is connected to the first enable signal terminal; The third light emitting control circuit includes: a sixth transistor, wherein a first electrode of the sixth transistor is connected to the second electrode of the first driving transistor, a second electrode of the sixth transistor is connected to the first electrode of the light-emitting unit, and a gate of the sixth transistor is connected to the first enable signal terminal; The fourth light emitting control circuit includes: One or more ninth transistors connected in parallel, wherein a first electrode of the ninth transistor is connected to the first electrode of the sixth transistor, a second electrode is connected to the second electrode of the sixth transistor, and a gate is connected to the first enable signal terminal.

7. The pixel driving circuit according to claim 6, wherein: The width-to-length ratios of the channel regions of the fifth transistor, the sixth transistor, the eighth transistor, and the ninth transistor are substantially the same, and the width-to-length ratios of the channel regions of the first driving transistor and the second driving transistor are substantially the same; The width-to-length ratio of the channel region of any transistor among the fifth transistor, the sixth transistor, the eighth transistor, and the ninth transistor is greater than the width-to-length ratio of the channel region of any transistor among the first driving transistor and the second driving transistor.

8. The pixel driving circuit according to claim 1, wherein: The pixel driving circuit further includes: a data writing circuit connected to the first electrode of the first driving transistor, the data signal terminal, and the gate driving signal terminal, and configured to transmit the signal of the data signal terminal to the first electrode of the first driving transistor in response to the signal of the gate driving signal terminal; a first light-emitting control circuit, the first light-emitting control circuit being connected to the first power supply terminal, the first electrode of the first driving transistor, and a first enable signal terminal, and being configured to connect the first power supply terminal and the first electrode of the first driving transistor in response to a signal from the first enable signal terminal; a third light-emitting control circuit, the third light-emitting control circuit being connected to the first electrode of the light-emitting unit, the second electrode of the first driving transistor, and the first enable signal terminal, and being configured to connect the second electrode of the first driving transistor and the first electrode of the light-emitting unit in response to a signal at the first enable signal terminal; a compensation circuit connected to the first node, the second electrode of the first driving transistor, and a gate driving signal terminal, and configured to connect the first node and the second electrode of the first driving transistor in response to a signal from the gate driving signal terminal; a first reset circuit connected to the first initial signal terminal, the first node, and the first reset signal terminal, and configured to transmit the signal of the first initial signal terminal to the first node in response to the signal of the first reset signal terminal; a second reset circuit, connected to the first electrode of the light-emitting unit, the second initial signal terminal, and the second reset signal terminal, for transmitting the signal of the second initial signal terminal to the first electrode of the light-emitting unit in response to the signal of the second reset signal terminal; The storage circuit is connected between the first node and the first power supply terminal.

9. The pixel driving circuit according to claim 8, wherein: The data writing circuit includes: a fourth transistor, having a first electrode connected to the data signal terminal, a second electrode connected to the first electrode of the first driving transistor, and a gate connected to the gate driving signal terminal; The first light emitting control circuit includes: a fifth transistor, having a first electrode connected to the first power supply terminal, a second electrode connected to the first electrode of the first driving transistor, and a gate connected to the first enable signal terminal; The third light emitting control circuit includes: a sixth transistor, a first electrode connected to the second electrode of the first driving transistor, a second electrode connected to the first electrode of the light-emitting unit, and a gate connected to the first enable signal terminal; The compensation circuit comprises: a second transistor, having a first electrode connected to the first node, a second electrode connected to the second electrode of the first driving transistor, and a gate connected to the gate driving signal terminal; The first reset circuit includes: a first transistor, having a first electrode connected to the first initial signal terminal, a second electrode connected to the first node, and a gate connected to the first reset signal terminal; The second reset circuit includes: a seventh transistor, a first electrode connected to the second initial signal terminal, a second electrode connected to the first electrode of the light emitting unit, and a gate connected to the second reset signal terminal; The storage circuit includes: A capacitor is connected between the first node and the first power supply terminal.

10. A pixel driving circuit driving method, wherein: Used to drive the pixel driving circuit according to claim 1, the driving method comprising: In a first light-emitting stage, the light-emitting unit is driven to emit light by the first driving transistor; In the second light-emitting stage, the current compensation circuit is used to drive the light-emitting unit to emit light.

11. A display panel, wherein: The display panel comprises the pixel driving circuit according to any one of claims 1 to 9.

12. A display device, wherein: The display device includes the display panel according to claim 11.

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