Chip testing method and device, electronic equipment and storage medium

Abstract

The application provides a chip testing method and device, electronic equipment and storage medium. After the testing equipment obtains the first current data when the chip executes the testing instruction, the compensation parameter corresponding to the testing environment of the chip is determined, and the first current data is compensated based on the compensation parameter to obtain the second current data. Finally, the chip is analyzed according to the more accurate second current data after the repair to obtain the testing result. Therefore, when the testing equipment tests the chip, the first current data is compensated by the compensation parameter, thereby eliminating the influence of the testing environment of the chip on the first current data. Since the second current data obtained after the compensation can more accurately reflect the actual current change of the chip, the testing equipment can more effectively test the chip according to the second current data.

Description

Technical Field

[0001] This application relates to the technical field of chip testing, and more particularly to a chip testing method, apparatus, electronic device, and storage medium. Background Technology

[0002] After a chip supplier designs a chip, it must be tested according to a test plan. Only after the chip passes the test will it be manufactured and provided to users. For example, for chips in electronic devices such as mobile phones and tablets, after the chip is installed inside the device, testers simulate real user operations and send operation commands to the chip according to the requirements of the test plan. The chip then receives and executes these commands. Simultaneously, during the chip's execution of the operation commands, testers use current acquisition devices such as ammeters to collect the chip's current data. After the chip has executed all operation commands, testers can perform subsequent processing such as power analysis based on the current data.

[0003] However, changes in the testing environment of a chip can cause variations in the current data collected by the current acquisition device. Even when multiple chips of the same model are tested separately, different current data may appear, making accurate chip testing impossible. Therefore, overcoming the influence of the chip's testing environment on its current data is a technical problem that needs to be solved in this field. Summary of the Invention

[0004] This application provides a chip testing method, apparatus, electronic device, and storage medium to solve the technical problem in the prior art where the test environment of the chip affects the chip's current data, making it impossible to accurately test the chip.

[0005] The first aspect of this application provides a chip testing method, comprising: acquiring first current data when the chip executes a test instruction; determining compensation parameters corresponding to the test environment in which the chip is located; the compensation parameters being used to characterize the influence of the test environment on the current data; compensating the first current data based on the compensation parameters to obtain second current data; and performing power analysis on the chip based on the second current data to obtain test results.

[0006] In one embodiment of the first aspect of this application, determining the compensation parameters corresponding to the test environment where the chip is located includes: determining at least one environmental factor of the test environment where the chip is located; the environmental factor includes: the screen brightness of the electronic device where the chip is located, the volume of the electronic device, the signal strength of the electronic device, the current value of the device that obtains the first current data, and the standby status of the electronic device; determining the compensation level corresponding to each of the at least one environmental factor according to a mapping relationship; the mapping relationship includes multiple environmental factors, and the correspondence between multiple environmental factor levels and multiple compensation levels for each environmental factor; and determining the compensation parameters according to the compensation level of the at least one environmental factor.

[0007] In one embodiment of the first aspect of this application, determining compensation parameters based on the compensation level of at least one environmental factor includes: weighted summation of the compensation levels of at least one environmental factor to obtain compensation parameters.

[0008] In one embodiment of the first aspect of this application, determining a compensation parameter based on the compensation level of at least one environmental factor includes: calculating the product of the compensation level of each environmental factor and the duration of the environmental factor; and obtaining the compensation parameter by weighted summation of the products of the compensation levels and durations of all at least one environmental factor.

[0009] In one embodiment of the first aspect of this application, the method further includes: acquiring standard current data of the chip under a standard test environment; acquiring measurement current data of the chip under multiple measurement test environments; wherein the multiple measurement test environments include at least one measurement test environment with environmental factors respectively taking values ​​of different environmental factor levels; and obtaining a mapping relationship based on the standard current data and the multiple measurement current data.

[0010] In one embodiment of the first aspect of this application, the method further includes: obtaining a mapping relationship input by a tester; or, when it is determined that the test environment where the chip is located is different from the standard test environment, sending a mapping relationship acquisition request to the server and receiving the mapping relationship sent by the server.

[0011] In one embodiment of the first aspect of this application, the second current data is obtained by compensating the first current data based on the compensation parameter, which includes: calculating the product of the first current data and the compensation parameter to obtain the second current data.

[0012] A second aspect of this application provides a chip testing apparatus for performing a chip testing method as provided in any of the first aspects of this application. The apparatus includes: an acquisition module for acquiring first current data when the chip executes a test instruction; a determination module for determining compensation parameters corresponding to the test environment in which the chip is located; the compensation parameters being used to characterize the influence of the test environment on the current data; a compensation module for compensating the first current data based on the compensation parameters to obtain second current data; and an analysis module for performing power analysis on the chip based on the second current data to obtain test results.

[0013] A third aspect of this application provides an electronic device, including: a processor and a memory connected in communication; wherein the memory stores a computer program, and when the processor executes the computer program, the processor performs the method as described in any of the first aspects of this application.

[0014] A fourth aspect of this application provides a storage medium storing computer instructions, which, when executed, are used to implement the method as described in any of the first aspects of this application.

[0015] This application provides a chip testing method, apparatus, electronic device, and storage medium. The testing equipment acquires first current data when the chip executes a test instruction, determines compensation parameters corresponding to the chip's test environment, and compensates the first current data based on these parameters to obtain second current data. Finally, the chip is analyzed based on the more accurate second current data to obtain the test results. Therefore, when testing a chip, the compensation of the first current data using compensation parameters eliminates the influence of the chip's test environment on the first current data. Because the compensated second current data more accurately reflects the actual current changes of the chip, the testing equipment can test the chip more effectively based on the second current data. Attached Figure Description

[0016] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0017] Figure 1 This is a schematic diagram illustrating the application scenario of this application;

[0018] Figure 2 This is a schematic diagram showing the current data of a chip.

[0019] Figure 3 A schematic flowchart of an embodiment of the chip testing method provided in this application;

[0020] Figure 4 A flowchart illustrating an embodiment of determining compensation parameters provided in this application;

[0021] Figure 5 A schematic diagram of a chip testing device provided in this application;

[0022] Figure 6 A schematic diagram of the structure of an embodiment of the electronic device provided in this application. Detailed Implementation

[0023] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0024] The terms “first,” “second,” “third,” “fourth,” etc. (if present) in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a particular order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of this application described herein can be implemented, for example, in orders other than those illustrated or described herein. Furthermore, the terms “comprising” and “having,” and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0025] Figure 1 This is a schematic diagram illustrating the application scenario of this application. For example... Figure 1 In one scenario, the supplier of chip 30 manufactures chip 30 and places it within electronic device 40 via step ①. A battery within electronic device 40 provides the rated operating voltage to chip 30, and the current supplied by the battery to chip 30 is related to the operational instructions executed by chip 30. To determine the power consumption of chip 30 within electronic device 40, tester 10 needs to perform step ② using a specific test plan to determine parameters such as the current when chip 30 executes operational instructions within electronic device 40, thereby determining the power consumption of chip 30 and its associated electronic device 40. Electronic device 40 can be a mobile phone, tablet computer, or similar device.

[0026] In one scenario, tester 20, following the requirements of the test plan corresponding to chip 30, simulates a user of electronic device 40 and issues operation commands to chip 30 of electronic device 40. These operation commands include turning on the screen of electronic device 40, opening applications within electronic device 40, and configuring settings on electronic device 40. Upon receiving the operation commands, chip 30 executes them.

[0027] Simultaneously, during the execution of operation instructions by chip 30, tester 10 can also use test equipment 20 to collect operating parameters of chip 30, such as current data, through step ③. For example, Figure 2 This is a schematic diagram of the current data of a chip, such as... Figure 2 The horizontal axis represents time, and the vertical axis represents the current intensity. Each point on the current data curve represents the current intensity of chip 30 at the time corresponding to the horizontal axis. It can be seen that at each of the time intervals t1, t2, ..., t10, chip 30 receives and executes an operation command, and at these times, the current intensity of chip 30 changes to D1. At other times, the current intensity of chip 30 remains around D5.

[0028] After chip 30 executes all the operation instructions corresponding to the test plan, test equipment 20 collects the current data of chip 30 during the execution of all operation instructions within the corresponding time period of the test plan. Subsequently, test equipment 20 or test personnel can perform power analysis and other processing on chip 30 based on the collected current data to obtain the test results. Based on the test results, it can be determined whether chip 30 can perform the relevant functions within electronic device 40, and further adjustments and processing can be made to chip 30 and the electronic device 40.

[0029] In one scenario, the test device 20 can be any electronic device with relevant data processing capabilities, such as a computer, server, or workstation. The test device 20 can collect current data when the chip 30 executes an operation command via a connected current acquisition device such as an ammeter. The current data includes the current intensity value. It is understood that when the battery in the electronic device 40 provides voltage to the chip 30, the current between the battery and the chip 30 changes according to the operation command currently executed by the chip 30. For example, when the chip 30 executes an operation command such as turning on the screen, the current required by the chip 30 is relatively large, resulting in a large current intensity value during the time period when the chip 30 executes that operation command in the current data. The intensity value can reach a high level, such as... Figure 2 As shown in the diagram, D1 and other parameters show significant changes; when chip 30 executes operation commands such as screen-off, the current required by chip 30 is relatively small, resulting in a smaller current intensity value during the time period when chip 30 executes the operation command in the current data. The intensity value can only reach a value such as... Figure 2 The changes in D3, etc., shown are less obvious compared to D1.

[0030] However, in Figure 1 In the scenario shown, when testing chip 30, it is necessary to configure the electronic device 40 where chip 30 is located and the test device 20 to ensure that chip 30 is in a standard test environment before the tester 10 issues test commands to chip 30. The standard test environment includes standard screen brightness, standard volume, standard signal strength of electronic device 40, and current value of test device 20. When the test environment of chip 30 changes, the current data of chip 30 collected by test device 20 will change. For example, the current data of chip 30 collected under the standard test environment may change as follows: Figure 2 As shown, when the test command is executed between t1 and t5, the intensity value of the current data will change to around D1. If the chip 30 is not in a standard test environment, for example, when the screen brightness of the electronic device 40 is lower than that of the standard test environment and the power consumption is lower, the intensity value of the current data of the chip 30 at these times will change to around D3, which is smaller than the change in D1.

[0031] Therefore, when chip 30 is in a non-standard environment, the current data of chip 30 collected by test equipment 20 includes current data errors caused by the difference between the actual test environment and the standard test environment. Even when multiple chips 30 of the same model are tested in different test environments, multiple chips 30 will exhibit various different current data. It is understandable that the test environment will cause changes in the current data of chip 30. When the current data of chip 30 collected by test equipment 20 is itself inaccurate, test equipment 20 cannot accurately perform power analysis and obtain test results based on inaccurate current data, thus reducing the effectiveness of testing chip 30.

[0032] Based on this, and addressing the technical problem that existing technologies cannot accurately analyze chip power based on current data, resulting in low effectiveness of chip testing, this application provides a chip testing method. After the testing device 20 acquires the first current data when the chip 30 executes a test command, it further determines the compensation parameters corresponding to the current test environment of the chip 30, and compensates the first current data based on the compensation parameters to obtain second current data. Finally, the chip is analyzed based on the more accurate second current data to obtain the test results. Therefore, when testing the chip 30, the testing device 20 provided in this embodiment compensates the first current data using compensation parameters, eliminating the influence of the test environment on the first current data. Since the compensated second current data more accurately reflects the actual current changes of the chip 30, the testing device 20 can more effectively test the chip 30 based on the second current data. The technical solution of this application will be described in detail below with specific embodiments. These specific embodiments can be combined with each other, and the same or similar concepts or processes may not be repeated in some embodiments.

[0033] Figure 3 A flowchart illustrating an embodiment of the chip testing method provided in this application is shown below. Figure 3 The testing method for the chip shown can be applied to, for example... Figure 1 In the scenario shown, the test is performed by test device 20. Specifically, as... Figure 3 The testing methods for the chip shown include:

[0034] S101: Test device 20 acquires the first current data when chip 30 executes test instructions.

[0035] Specifically, when testing chip 30, the tester 10 can issue operation commands to chip 30 according to the corresponding test plan. For example, the operation command could be to turn on the screen. Within a preset time period, the operator could repeatedly tap the display screen of electronic device 40 with a certain time interval between each tap, causing chip 30 to receive and execute the screen-on command multiple times within this preset time period. Alternatively, the operation command could be to return to the homepage. The operator could long-press the display screen of electronic device 40 for a certain period within a preset time period, causing chip 30 to receive and execute the homepage return command within this time period.

[0036] S102: Test equipment 20 determines the compensation parameters corresponding to the test environment where chip 30 is located.

[0037] Specifically, the compensation parameter is used to characterize the impact of the test environment on the current data of chip 30. In this embodiment, the compensation parameter is specifically used to characterize the impact of the test environment on the first current data.

[0038] In one embodiment, Figure 4 A flowchart illustrating an embodiment of determining compensation parameters provided in this application is shown below. Figure 4 It shows Figure 3 The test equipment 20 in the middle is a specific implementation method for determining compensation parameters. For example... Figure 4 As shown, the compensation parameters determined by the test equipment 20 include:

[0039] S1021: Determine multiple environmental factors of the test environment where the chip is located. These multiple environmental factors include: the screen brightness of the electronic device 40 where the chip 30 is located, the volume of the electronic device 40 where the chip 30 is located, the signal strength of the electronic device 40 where the chip 30 is located, the current value of the device that obtained the first current data, and the standby status of the electronic device where the chip 30 is located, etc.

[0040] S1022: Determine the compensation level corresponding to each of the multiple environmental factors based on the mapping relationship. The mapping relationship includes multiple environmental factors, and the correspondence between multiple environmental factor levels and multiple compensation levels for each environmental factor.

[0041] In one embodiment, the mapping relationship provided by this application can be represented by Tables 1-5 below.

[0042] Table 1

[0043]

[0044] As shown in Table 1, the environmental factor is the screen brightness of the electronic device 40 where the chip 30 is located. The mapping relationship includes N environmental factor levels 1, 2...N of the environmental factor, as well as the correspondence between each environmental factor level and the compensation level a1, a2...aN.

[0045] Table 2

[0046]

[0047] As shown in Table 2, the environmental factor is the volume of the electronic device 40 where the chip 30 is located. The mapping relationship includes multiple environmental factor levels 1, 2...M of the environmental factor, as well as the correspondence between each environmental factor level and the compensation level b1, b2...bM.

[0048] Table 3

[0049]

[0050] As shown in Table 3, the environmental factors are the signal strength of the electronic device 40 where the chip 30 is located. The mapping relationship includes multiple environmental factor levels 1, 2...P, and the correspondence between each environmental factor level and the compensation level c1, c2...cN.

[0051] Table 4

[0052]

[0053] As shown in Table 4, the environmental factors are the current values ​​of the test equipment that collects the first current data, i.e., the differences of measuring instruments such as ammeters. The mapping relationship includes P environmental factor levels for each environmental factor: low current compensation, medium current compensation, and high current compensation, as well as the correspondence between each environmental factor level and the compensation levels d1, d2, and d3.

[0054] Table 5

[0055]

[0056] As shown in Table 5, the environmental factors are the standby status of the electronic device 40 where the chip 30 is located, i.e. the standby difference of the electronic device 40. The mapping relationship includes multiple environmental factor levels: screen off standby compensation, screen off usage compensation and screen on standby compensation, as well as the correspondence between each environmental factor level and the compensation levels e1, e2 and e3.

[0057] Based on Tables 1-5 above, assuming the environmental factor level of screen brightness in the test environment where the chip is located is 1, then the compensation level corresponding to the environmental factor of screen brightness determined according to Table 1 is a1; the environmental factor level of volume is 2, then the compensation level corresponding to the environmental factor of volume determined according to Table 2 is b2; the environmental factor level of signal strength is 3, then the compensation level corresponding to the environmental factor of signal strength determined according to Table 3 is c3; the environmental factor level of the test equipment is low current compensation, then the compensation level corresponding to the environmental factor of the test equipment determined according to Table 4 is d1; and the environmental factor level of the electronic device is screen-on standby compensation, then the compensation level corresponding to the environmental factor of the electronic device determined according to Table 5 is e3.

[0058] S1023: The test equipment 20 determines the compensation parameters of the test environment where the chip is located based on the multiple compensation levels corresponding to the multiple environmental factors determined in S1022. This allows for a more effective measurement of the impact of each environmental factor on the current data.

[0059] In one embodiment, the testing equipment 20 can perform a weighted summation of multiple compensation levels corresponding to all environmental factors, for example, by using the formula K = A*a1 + B*b1 + C*c3 + D*d1 + E*e3 to obtain the compensation parameter K. Here, A, B, C, D, and E are the weights corresponding to the multiple environmental factors, which can be pre-set or specified by the tester 10 according to different testing environments. In one embodiment, the sum of A, B, C, D, and E can be 1. In a specific implementation, A, B, C, D, and E can each be set to 1.

[0060] In another embodiment, the testing device 20 can calculate the product of the compensation level and the duration of each environmental factor, and then perform a weighted sum based on the products of the compensation levels and durations of all environmental factors. For example, the compensation parameter K can be obtained using the formula K = t1*a1 + t2*b1 + t3*c3 + t4*d1 + t5*e3. Here, t1, t2, t3, t4, and t5 represent the durations of the multiple environmental factors, in seconds (s). In another embodiment, the testing device 20 can also obtain the compensation parameter K by combining the weights and durations of multiple environmental factors, for example, using the formula K = A*t1*a1 + B*t2*b1 + C*t3*c3 + D*t4*d1 + E*t5*e3.

[0061] S103: Based on the compensation parameters determined in S102, the test equipment 20 performs compensation processing on the first current data obtained in S101 to obtain the second current data.

[0062] Specifically, after determining the compensation parameters, the testing equipment 20 can perform compensation processing on the first current data according to the compensation parameters to compensate for the error in the current data caused by the difference in the test environment where the chip 30 is located, thus obtaining the second current data. It can be understood that the error in the current data caused by the test environment where the chip 30 is located has been eliminated in the second current data.

[0063] In one embodiment, the test device 20 can specifically multiply the first current data with the compensation parameter K to obtain the second current data.

[0064] S104: Test equipment 20 performs power analysis on the chip based on the second current data obtained in S103 and obtains the test results.

[0065] Specifically, since the second current data is obtained by the test equipment after compensating the first current data, the second current data can more accurately reflect the actual current change of the chip 30 after the second current data eliminates the influence of the difference in the test environment of the chip 30 on the current data, so that the test equipment 20 can more effectively test the chip 30 based on the second current data.

[0066] In this embodiment of the application, the test performed by the test device 20 after obtaining the second current data is not limited. For example, the test device 20 can determine the power and other test results when the chip 30 executes at least one test instruction within a preset time period based on the second current data, and then perform power analysis on the chip 30 and the electronic device 40 in which it is located based on the power change of the chip 30.

[0067] In one embodiment, the mapping relationship used by the test device 20 to repair the first current data in this application embodiment can be pre-stored in the test device 20, or it can be input by the tester 10. The test device 20 then receives and stores the mapping relationship input by the tester 10. Alternatively, when the test device 20 is testing the chip 30 and determines that the test environment of the chip 30 is different from the standard test environment, it sends a mapping relationship retrieval request to the server via the network, thereby receiving and storing the mapping relationship sent by the server. Furthermore, the mapping relationship can be deleted after use, thus reducing the storage space occupied by the test device 20. The mapping relationship on the server can also be updated and modified in real time, improving the timeliness of the mapping relationship. The server can be provided by the chip 30 supplier or by the tester 10.

[0068] In one embodiment, this application also provides a method for determining a mapping relationship. This method can be executed by test equipment 20 or other devices, and this application does not limit the executing entity for obtaining the mapping relationship. Specifically, the method for obtaining the mapping relationship includes: firstly, acquiring standard current data of chip 30 under a standard test environment; then, based on the environmental factors and environmental factor levels provided in Tables 1-5, sequentially modifying the environmental factor level of each environmental factor in the standard test environment to obtain multiple different measurement test environments; subsequently, measuring the measurement current data of chip 30 under multiple measurement test environments, and obtaining the mapping relationship based on the standard data and the measurement current data under each measurement test environment.

[0069] For example, suppose the environmental factor levels of multiple environmental factors in the standard test environment are as follows: screen brightness environmental factor level is 2; volume environmental factor level is 2; signal strength environmental factor level is 2; the test equipment environmental factor level is medium current compensation; and the electronic device environmental factor level is screen-off usage compensation. In the standard test environment, standard current data can be measured when the chip executes at least one test instruction corresponding to the test scheme. Then, by modifying the screen brightness environmental factor level in the standard test environment to 1, while keeping the environmental factor levels of other environmental factors unchanged, a measured current data point 1 can be obtained; by modifying the screen brightness environmental factor level in the standard test environment to 3, while keeping the environmental factor levels of other environmental factors unchanged, a measured current data point 2 can be obtained… and so on, modifying one environmental factor level for each environmental factor each time. Then, based on the ratio of measured current data point 1 to standard current data, the value of compensation level a1 in Table 1 can be obtained; based on the ratio of measured current data point 1 to standard current data, the value of compensation level a3 in Table 1 can be obtained… and so on, the compensation level for each environmental factor at each environmental factor level can be obtained in Tables 1-5. It is understandable that, corresponding to the standard test environment, the compensation level a2 in Table 1 is 1, the compensation level b2 in Table 2 is 1, the compensation level c2 in Table 3 is 1, the compensation level d2 in Table 4 is 1, and the compensation level e2 in Table 5 is 1.

[0070] In the foregoing embodiments, the methods and steps executed by the test equipment provided in the embodiments of this application have been described. To achieve the functions of the methods provided in the embodiments of this application, the test equipment, as the executing entity, may include hardware structures and / or software modules, implementing the above functions in the form of hardware structures, software modules, or a combination of hardware structures and software modules. Whether a particular function is executed in the form of hardware structures, software modules, or a combination of hardware structures and software modules depends on the specific application and design constraints of the technical solution.

[0071] For example, Figure 5 A schematic diagram of a chip testing apparatus provided in this application is shown below. Figure 5 The chip testing apparatus 1000 shown can be used to perform, for example... Figure 3 The test method for the chip shown is as follows: Figure 5The chip testing apparatus 1000 shown includes an acquisition module 1001, a determination module 1002, a compensation module 1003, and an analysis module 1004. The acquisition module 1001 acquires first current data when the chip executes a test command; the determination module 1002 determines the compensation parameters corresponding to the test environment in which the chip is located; the compensation parameters characterize the impact of the test environment on the current data; the compensation module 1003 compensates the first current data based on the compensation parameters to obtain second current data; and the analysis module 1004 performs power analysis on the chip based on the second current data to obtain test results.

[0072] In one embodiment, the determining module 1002 is specifically used to determine at least one environmental factor of the test environment in which the chip is located; the environmental factor includes: the screen brightness of the electronic device in which the chip is located, the volume of the electronic device, the signal strength of the electronic device, the current value of the device that obtains the first current data, and the standby status of the electronic device; determine the compensation level corresponding to each of the at least one environmental factor according to the mapping relationship; the mapping relationship includes multiple environmental factors, and the correspondence between multiple environmental factor levels and multiple compensation levels for each environmental factor; and determine compensation parameters according to the compensation level of at least one environmental factor.

[0073] In one embodiment, the determining module 1002 is specifically used to perform a weighted summation of the compensation levels of at least one environmental factor to obtain compensation parameters.

[0074] In one embodiment, the determining module 1002 is specifically used to calculate the product of the compensation level and the duration of each environmental factor; and to obtain the compensation parameter by weighted summation of the products of the compensation level and duration of all at least one environmental factor.

[0075] In one embodiment, such as Figure 5 The chip testing apparatus 1000 shown further includes a mapping relationship determination module, used to acquire standard current data of the chip under a standard test environment; acquire measurement current data of the chip under multiple measurement test environments; wherein the multiple measurement test environments include at least one measurement test environment with environmental factors respectively taking values ​​of different environmental factor levels; and obtain a mapping relationship based on the standard current data and the multiple measurement current data.

[0076] In one embodiment, the mapping relationship determination module is also used to obtain the mapping relationship input by the tester; or, when it is determined that the test environment where the chip is located is different from the standard test environment, it sends a mapping relationship acquisition request to the server and receives the mapping relationship sent by the server.

[0077] In one embodiment, the compensation module 1003 is specifically used to calculate the product of the first current data and the compensation parameter to obtain the second current data.

[0078] The implementation method and principle of the chip testing device provided in this application embodiment can be referred to the description in the aforementioned chip testing method, and will not be repeated here.

[0079] It should be noted that the division of the various modules in the above device is merely a logical functional division. In actual implementation, they can be fully or partially integrated into a single physical entity, or they can be physically separated. These modules can be implemented entirely in software via processing element calls; they can be fully implemented in hardware; or some modules can be implemented by processing element calls to software, while others are implemented in hardware. They can be separate processing elements, integrated into a chip within the device, or stored as program code in the device's memory, invoked and executed by a processing element. The implementation of other modules is similar. Furthermore, these modules can be fully or partially integrated together, or implemented independently. The processing element described here can be an integrated circuit with signal processing capabilities. In the implementation process, each step of the above method or each of the above modules can be completed through integrated logic circuits in the hardware of the processor element or through software instructions.

[0080] For example, these modules can be one or more integrated circuits configured to implement the above methods, such as one or more application-specific integrated circuits (ASICs), one or more digital signal processors (DSPs), or one or more field-programmable gate arrays (FPGAs). As another example, when a module is implemented by a processing element calling program code, that processing element can be a general-purpose processor, such as a central processing unit (CPU) or other processor capable of calling program code. Furthermore, these modules can be integrated together to implement a system-on-a-chip (SOC).

[0081] In the above embodiments, the steps performed by the testing device can be implemented entirely or partially through software, hardware, firmware, or any combination thereof. When implemented using software, it can be implemented entirely or partially in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, all or part of the processes or functions described in the embodiments of this application are generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired (e.g., coaxial cable, fiber optic, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center that integrates one or more available media. The available media can be magnetic media (e.g., floppy disks, hard disks, magnetic tapes), optical media (e.g., DVDs), or semiconductor media (e.g., solid-state disks (SSDs)).

[0082] For example, Figure 6 A schematic diagram of the structure of an embodiment of the electronic device provided in this application is shown below. Figure 6 The illustrated electronic device 2000 includes a processor 2001 and a memory 2002. The processor 2001 and memory 2002 are communicatively connected. The memory 2002 stores a computer program. When the processor 2001 executes the computer program, it can perform the steps of a chip testing method executed by a testing device as described in any of the foregoing embodiments of this application. In one embodiment, the electronic device 2000 further includes a communication interface 2003, which can be used to acquire first current data, etc.

[0083] This application also provides a computer-readable storage medium storing computer instructions that, when executed, can be used to perform the steps of a chip testing method executed by a test device as described in any of the foregoing embodiments of this application.

[0084] This application also provides a chip for executing instructions, the chip being used to perform the steps of any of the chip testing methods executed by a testing device as described above.

[0085] This application also provides a computer program product, which includes a computer program stored in a storage medium. At least one processor can read the computer program from the storage medium. When the at least one processor executes the computer program, it can implement the steps of any of the chip testing methods executed by the testing equipment described above in this application.

[0086] Those skilled in the art will understand that all or part of the steps of the above embodiments can be implemented by hardware related to program instructions. The aforementioned program can be stored in a computer-readable storage medium. When the program is executed, it performs the steps of the above method embodiments; and the aforementioned storage medium includes various media capable of storing program code, such as ROM, magnetic disk, or optical disk.

[0087] Those skilled in the art will understand that, for the purpose of illustrating the technical solution of this application, the embodiments of this application are described separately by functional modules, and the circuit devices in each module may partially or completely overlap, which is not intended to limit the scope of protection of this application.

[0088] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.

Claims

1. A method for testing a chip, characterized in that, include: Obtain the first current data when the chip executes the test command; Determine multiple environmental factors of the test environment in which the chip is located; The multiple environmental factors include: the screen brightness of the electronic device in which the chip is located, the volume of the electronic device, the signal strength of the electronic device, the current value of the device that obtained the first current data, and the standby status of the electronic device; The compensation level corresponding to each of the plurality of environmental factors is determined according to the mapping relationship; the mapping relationship includes multiple environmental factors, and the correspondence between multiple environmental factor levels and multiple compensation levels for each environmental factor; The compensation parameters are determined based on the compensation levels of the multiple environmental factors; the compensation parameters are used to characterize the impact of the test environment on the first current data. The second current data is obtained by compensating the first current data based on the compensation parameters. The power analysis of the chip is performed based on the second current data to obtain the test results.

2. The method according to claim 1, characterized in that, Determining the compensation parameters based on the compensation levels of the multiple environmental factors includes: The compensation parameters are obtained by weighted summation of the compensation levels of the multiple environmental factors.

3. The method according to claim 1, characterized in that, Determining the compensation parameters based on the compensation levels of the multiple environmental factors includes: Calculate the product of the compensation level for each environmental factor and the duration of the environmental factor; The compensation parameters are obtained by weighted summation of the products of the compensation levels and durations of all multiple environmental factors.

4. The method according to claim 2 or 3, characterized in that, The mapping relationship is determined through the following steps: Obtain the standard current data of the chip under a standard test environment; Acquire measurement current data of the chip under multiple measurement and testing environments; wherein the multiple measurement and testing environments include multiple environmental factors with values ​​of different environmental factor levels; The mapping relationship is obtained based on the standard current data and the multiple measured current data.

5. The method according to claim 4, characterized in that, Also includes: Obtain the mapping relationship input by the tester; Alternatively, when it is determined that the test environment in which the chip is located is different from the standard test environment, a mapping relationship acquisition request is sent to the server, and the mapping relationship sent by the server is received.

6. The method according to claim 1, characterized in that, The second current data is obtained by compensating the first current data based on the compensation parameters, including: The second current data is obtained by multiplying the first current data by the compensation parameter.

7. A chip testing apparatus, characterized in that, include: The acquisition module is used to acquire the first current data when the chip executes the test instruction; The determination module is used to determine multiple environmental factors of the test environment in which the chip is located; The multiple environmental factors include: the screen brightness of the electronic device where the chip is located, the volume of the electronic device, the signal strength of the electronic device, the current value of the device that obtained the first current data, and the standby status of the electronic device; a compensation level is determined for each of the multiple environmental factors according to a mapping relationship; the mapping relationship includes multiple environmental factors, and the correspondence between multiple environmental factor levels and multiple compensation levels for each environmental factor; compensation parameters are determined according to the compensation levels of the multiple environmental factors; the compensation parameters are used to characterize the impact of the test environment on the first current data; The compensation module is used to compensate the first current data based on the compensation parameters to obtain the second current data; The analysis module is used to perform power analysis on the chip based on the second current data to obtain test results.

8. An electronic device, characterized in that, include: A processor and a memory connected in communication; wherein the memory stores a computer program, and when the processor executes the computer program, the processor performs the method as described in any one of claims 1-6.

9. A storage medium, characterized in that, The device stores computer instructions that, when executed, are used to implement the method as described in any one of claims 1-6.

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