Control Circuit and Display Device

Abstract

The present application provides a control circuit and a display device. Among them, the control circuit is electrically coupled to a light-emitting element of a pixel circuit. The control circuit includes a signal selection module and a signal addition module. The signal selection module is configured to receive at least two input signals and select one of the at least two input signals as an initial control signal according to a control signal and input it to the signal addition module. The signal addition module is configured to receive the initial control signal and a voltage signal of the second pole of the light-emitting element, and provide a control signal to the first pole of the light-emitting element according to the initial control signal and the voltage signal of the second pole of the light-emitting element. The control circuit provided by the present application avoids the brightness difference between the refresh frame and the hold frame of the light-emitting element by providing different anode voltages to the light-emitting element. At the same time, the cathode voltage of the light-emitting element is introduced to realize the dynamic tracking of the cathode voltage, and further solve the problem of flicker of the display panel.

Description

Technical Field

[0001] This application relates to the field of display technologies, and in particular, to a control circuit and a display device. Background Art

[0002] For AMOLED (Active-matrix organic light-emitting diode) display products, in order to reduce product power consumption, an alternating display function of high refresh rate and low refresh rate is adopted. In the low-frequency driving mode, a frame of display image is displayed in one refresh frame and multiple hold frames. Since the operating parameters of each module in the pixel circuit are different in the refresh frame and the hold frame, there is a brightness difference in the light-emitting element in the pixel circuit between the refresh frame and the hold frame, resulting in a flicker problem in the display panel. Summary of the Invention

[0003] In view of this, the purpose of this application is to provide a control circuit and a display device.

[0004] Based on the above purpose, this application provides a control circuit, electrically coupled to a pixel circuit, where the pixel circuit includes a light-emitting element, and the control circuit includes a signal selection module and a signal addition module, where: the signal selection module is configured to receive at least two input signals, and select one of the at least two input signals as an initial control signal according to a control signal and input it to the signal addition module; the signal addition module is configured to receive the initial control signal and the voltage signal of the second pole of the light-emitting element, and provide a second control signal to the first pole of the light-emitting element according to the initial control signal and the voltage signal of the second pole of the light-emitting element.

[0005] Optionally, the signal selection module includes a first signal input terminal, a second signal input terminal, a signal control terminal, and a signal output terminal, where: the first signal input terminal is configured to receive a first input signal, the second signal input terminal is configured to receive a second input signal, the signal control terminal is configured to receive the control signal, the signal output terminal is connected to the signal addition module, and the signal selection module is further configured to: select one of the first input signal and the second input signal as the initial control signal according to the control signal and input it to the signal addition module.

[0006] Optionally, the signal selection module further includes a first transistor and a second transistor, where the types of the first transistor and the second transistor are different. A first pole of the first transistor is connected to the first signal input terminal and configured to receive the first input signal, and a first pole of the second transistor is connected to the second signal input terminal and configured to receive the second input signal; control poles of the first transistor and the second transistor are both connected to the signal control terminal and configured to receive the control signal, and second poles of the first transistor and the second transistor are both connected to the signal output terminal and configured to input the first input signal or the second input signal as the initial control signal into the signal addition module.

[0007] Optionally, the signal addition module further includes an adder unit and an operational amplifier unit, where: the adder unit is connected to the signal selection module and the second pole of the light-emitting element, and is configured to receive the initial control signal and the voltage signal of the second pole of the light-emitting element, and provide an addition signal to the operational amplifier unit according to the initial control signal and the voltage signal of the second pole of the light-emitting element; the operational amplifier unit is connected to the adder unit and the first pole of the light-emitting element, and is configured to receive the addition signal and provide the second control signal to the first pole of the light-emitting element according to the addition signal.

[0008] Optionally, the adder unit includes a first input terminal, a second input terminal, and an output terminal, where: the first input terminal of the adder unit is connected to the signal selection module and configured to receive the initial control signal, the second input terminal of the adder unit is connected to the second pole of the light-emitting element and configured to receive the voltage signal of the second pole of the light-emitting element, and the output terminal of the adder unit is connected to the operational amplifier unit and configured to output the addition signal to the operational amplifier unit.

[0009] Optionally, the operational amplifier unit includes an input terminal, a control terminal, and an output terminal, where: the input terminal of the operational amplifier unit is connected to the adder unit and configured to receive the addition signal, the control terminal of the operational amplifier unit is connected to the output terminal, and the output terminal of the operational amplifier unit is connected to the first pole of the light-emitting element and configured to provide the second control signal to the first pole of the light-emitting element.

[0010] Optionally, the operational amplifier unit further includes a first voltage regulating resistor and a second voltage regulating resistor, where: the first voltage regulating resistor is located on the loop between the control terminal and the output terminal of the operational amplifier unit, a first end of the first voltage regulating resistor is connected to the control terminal of the operational amplifier unit, and a second end is connected to the output terminal of the operational amplifier unit; a first end of the second voltage regulating resistor is connected to the first end of the first voltage regulating resistor, and a second end is grounded.

[0011] Optionally, the signal addition module further includes a third voltage regulating resistor and a fourth voltage regulating resistor, where: the third voltage regulating resistor is located on the loop between the second input end of the adder unit and the second pole of the light emitting element, the first end of the third voltage regulating resistor is connected to the second input end of the adder unit, and the second end is connected to the second pole of the light emitting element; the first end of the fourth voltage regulating resistor is connected to the first end of the third voltage regulating resistor, and the second end is grounded.

[0012] Optionally, the input end of the operational amplifier unit is the non-inverting input end, and the control end of the operational amplifier unit is the inverting input end.

[0013] Optionally, the first pole of the light emitting element is the anode, and the second pole is the cathode.

[0014] Optionally, the second control signal is configured to reset the anode voltage of the light emitting element.

[0015] Based on the same inventive concept, the present application further provides a display device, including a pixel circuit and any one of the control circuits described above.

[0016] As can be seen from the above, for the control circuit and the display device provided by the present application, the control circuit is electrically coupled to the pixel circuit, the pixel circuit includes a light emitting element, and the control circuit includes a signal selection module and a signal addition module, where: the signal selection module is configured to receive at least two input signals, and select one of the at least two input signals as an initial control signal according to a control signal and input it to the signal addition module; the signal addition module is configured to receive the initial control signal and the voltage signal of the second pole of the light emitting element, and provide a second control signal to the first pole of the light emitting element according to the initial control signal and the voltage signal of the second pole of the light emitting element. By providing different anode voltages to the light emitting element, the control circuit provided by the present application avoids the brightness difference between the refresh frame and the hold frame of the light emitting element, and at the same time introduces the cathode voltage of the light emitting element, realizing the dynamic tracking of the cathode voltage and further solving the problem of flicker of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the technical solutions in the present application or related technologies, the following will briefly introduce the drawings required for use in the embodiments or related technology descriptions. Obviously, the drawings in the following description are only embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0018] Figure 1 It is a schematic diagram of a pixel circuit in related technologies;

[0019] Figure 2 is a schematic diagram of the module structure of the control circuit according to an embodiment of the present application;

[0020] Figure 3 is a schematic diagram of the circuit structure of the control circuit according to an embodiment of the present application. Detailed implementation manners

[0021] To make the objectives, technical solutions and advantages of the present application more clear and understandable, the present application will be further described in detail below with reference to specific embodiments and the accompanying drawings.

[0022] It should be noted that, unless otherwise defined, the technical terms or scientific terms used in the embodiments of the present application should have the ordinary meanings understood by those of ordinary skill in the art to which the present application belongs. The "first", "second" and similar terms used in the embodiments of the present application do not denote any order, quantity or importance, but are only used to distinguish different components. The terms such as "including" or "comprising" mean that the elements or objects appearing before this term cover the elements or objects listed after this term and their equivalents, without excluding other elements or objects. The terms such as "connected" or "coupled" are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. The terms such as "upper", "lower", "left" and "right" are only used to represent relative positional relationships, and when the absolute position of the object being described changes, the relative positional relationship may also change accordingly.

[0023] The pixel circuit in the related art is as Figure 1 shown. In the refresh frame, the transistor T1 is first turned on to reset the storage capacitor Cst, then the transistors T2, T3, and T4 are turned on, and the data is written into the storage capacitor Cst by the transistor T4. Then, the transistor T7 is turned on to reset the anode voltage of the light-emitting element by using Vint2. Finally, the transistors T5 and T6 are turned on, and the light-emitting element is lit. Since the data does not need to be rewritten, in the hold frame, only the process of turning on the transistor T7 to reset the anode voltage of the light-emitting element by using Vint2, and finally turning on the transistors T5 and T6 to light the light-emitting element is repeated.

[0024] That is to say, since the working modes of the transistors T1 and T2 are different in the refresh frame and the hold frame, Figure 1 the voltages at the points N1 and N3 in are also different in the refresh frame and the hold frame. The voltage at the point N3 in the hold frame is greater than the voltage at the point N3 in the refresh frame, which causes the transistor T6 to turn on in advance, resulting in an increase in the anode voltage of the light-emitting element. At this time, if the same Vint2 is used, it will cause insufficient reset and the problem of flicker of the display panel.

[0025] Moreover, during actual use, the ELVSS may fluctuate due to external interference, resulting in fluctuations in the voltage drop across the light-emitting element, which further causes the display panel to flicker.

[0026] In view of this, an embodiment of the present application provides a control circuit, electrically coupled to a pixel circuit, where the pixel circuit includes a light-emitting element, as Figure 2 shown, the control circuit includes a signal selection module 10 and a signal addition module 20, where:

[0027] The signal selection module 10 is configured to receive at least two input signals and select one of the at least two input signals as an initial control signal DAC according to a control signal SW_R / S and input it to the signal addition module 20;

[0028] The signal addition module 20 is configured to receive the initial control signal DAC and the voltage signal ELVSS of the second pole of the light-emitting element, and provide a second control signal Vint2 to the first pole of the light-emitting element according to the initial control signal DAC and the voltage signal ELVSS of the second pole of the light-emitting element.

[0029] The control circuit provided by the present application avoids the brightness difference between the refresh frame and the hold frame by providing different anode voltages to the light-emitting element, and at the same time introduces the cathode voltage of the light-emitting element, realizing dynamic tracking of the cathode voltage, and further solving the problem of flicker of the display panel.

[0030] Specifically, the control signal SW_R / S is a GPIO (General Purpose Input Output) signal of a Tcon IC (Timing control IC). In the related art, although it is also possible to directly output different voltages of Vint2 at different display times by using the Tcon (Timing controller) through the I2c (Two-Wire Serial Bus) instruction mode, this method has drawbacks. First, when switching from the refresh frame to the hold frame, there is a time interval of V_Blank, and the switching of the Vint2 voltage also needs to be completed within the time of V_Blank. However, the Tcon I2c instruction mode needs to go through links such as sending the device address and register address, acknowledgment, confirmation, instruction progressive & regressive, etc. On high-resolution and high-refresh-rate display screens, it is very easy to exceed V_Blank, resulting in screen flicker.

[0031] In the embodiments of the present application, the above control signal is essentially a digital signal. By simply sending a high-level or low-level control signal to select the operation of the module, multiple pre-set input signals can be input into the subsequent signal addition circuit. When sending the above control signal, there is no need to go through the analog signal sending link of the above Tcon I2c instruction mode, saving communication time and thus avoiding the problem that the voltage switching exceeds V_Blank.

[0032] In a specific embodiment, the first pole of the light-emitting element is the anode, and the second pole is the cathode, and the control signal is configured to reset the anode voltage of the light-emitting element.

[0033] In some embodiments, as Figure 2 shown, the signal selection module 10 includes a first signal input terminal, a second signal input terminal, a signal control terminal, and a signal output terminal, where:

[0034] The first signal input terminal is configured to receive a first input signal DAC1, the second signal input terminal is configured to receive a second input signal DAC2, the signal control terminal is configured to receive the control signal SW_R / S, the signal output terminal is connected to the signal addition module 20, and the signal selection module 10 is further configured to:

[0035] According to the control signal SW_R / S, select one of the first input signal DAC1 and the second input signal DAC2 as the initial control signal DAC and input it into the signal addition module 20.

[0036] In a specific embodiment, the signal selection module 10 is further configured to: in response to the level of DAC1 being higher than that of DAC2, select DAC2 as the initial control signal DAC and input it into the signal addition module 20 in the refresh frame of the pixel circuit, and select DAC1 as the initial control signal DAC and input it into the signal addition module 20 in the hold frame of the pixel circuit. In another specific embodiment, the signal selection module 10 is further configured to: in response to the level of DAC1 being lower than that of DAC2, select DAC1 as the initial control signal DAC and input it into the signal addition module 20 in the refresh frame of the pixel circuit, and select DAC2 as the initial control signal DAC and input it into the signal addition module 20 in the hold frame of the pixel circuit.

[0037] In some embodiments, as Figure 3As shown, the signal selection module 10 further includes a first transistor T11 and a second transistor T12. The types of the first transistor T11 and the second transistor T12 are different. The first pole of the first transistor T11 is connected to the first signal input terminal and is configured to receive the first input signal DAC1, and the first pole of the second transistor T12 is connected to the second signal input terminal and is configured to receive the second input signal DAC2.

[0038] The control poles of the first transistor T11 and the second transistor T12 are both connected to the signal control terminal and are configured to receive the control signal SW_R / S. The second poles of the first transistor and the second transistor are both connected to the signal output terminal and are configured to input the first input signal DAC1 or the second input signal DAC2 as the initial control signal DAC to the signal addition module.

[0039] Since the types of the first transistor T11 and the second transistor T12 are different, regardless of whether the input control signal is high level or low level, only one transistor is always in the on state, and the input signal received by the first pole of this transistor is used as the initial control signal to input to the signal addition module, realizing the signal selection function with a digital signal.

[0040] In a specific embodiment, the first transistor T11 is an N-type transistor, and the second transistor T12 is a P-type transistor. In response to the control signal SW_R / S being high level, T11 is turned on and T12 is turned off, and the first input signal DAC1 is input to the signal addition module as the initial control signal DAC; in response to the control signal SW_R / S being low level, T11 is turned off and T12 is turned on, and the second input signal DAC2 is input to the signal addition module as the initial control signal DAC. In another specific embodiment, the first transistor T11 is a P-type transistor, and the second transistor T12 is an N-type transistor. In response to the control signal SW_R / S being low level, T11 is turned on and T12 is turned off, and the first input signal DAC1 is input to the signal addition module as the initial control signal DAC; in response to the control signal SW_R / S being high level, T11 is turned off and T12 is turned on, and the second input signal DAC2 is input to the signal addition module as the initial control signal DAC.

[0041] It should be noted that Figure 3 the models of T11 and T12 are only exemplary and do not limit the models of T11 and T12.

[0042] In some embodiments, as Figure 3 shown, the signal addition module 20 further includes an adder unit 21 and an operational amplifier unit 22, where:

[0043] The adder unit 21 is connected to the signal selection module 10 and the second pole of the light-emitting element, and is configured to receive the initial control signal DAC and the voltage signal ELVSS of the second pole of the light-emitting element, and provide an addition signal Vi to the operational amplifier unit 22 according to the initial control signal DAC and the voltage signal ELVSS of the second pole of the light-emitting element;

[0044] The operational amplifier unit 22 is connected to the adder unit 21 and the first pole of the light-emitting element, and is configured to receive the addition signal Vi, and provide the second control signal Vint2 to the first pole of the light-emitting element according to the addition signal Vi.

[0045] In some embodiments, the adder unit includes a first input terminal, a second input terminal, and an output terminal, where:

[0046] The first input terminal of the adder unit is connected to the signal selection module and is configured to receive the initial control signal, the second input terminal of the adder unit is connected to the second pole of the light-emitting element and is configured to receive the voltage signal of the second pole of the light-emitting element, and the output terminal of the adder unit is connected to the operational amplifier unit and is configured to output the addition signal to the operational amplifier unit.

[0047] Specifically, the adder unit uses an analog adder, and the added Vi = a×ELVSS + b×VDAC, where a and b are both parameters of the analog amplifier. Those skilled in the art can set a and b according to the actual situation by adjusting the resistance or other component values in the analog amplifier, and will not elaborate here.

[0048] In some embodiments, as Figure 3 shown, the operational amplifier unit includes a non-inverting input terminal +, an inverting input terminal -, and an output terminal, where:

[0049] The non-inverting input terminal + of the operational amplifier unit 22 is connected to the adder unit 21 and is configured to receive the addition signal Vi, the inverting input terminal - of the operational amplifier unit 22 is connected to the output terminal, and the output terminal of the operational amplifier unit is connected to the first pole of the light-emitting element and is configured to provide the second control signal Vint2 to the first pole of the light-emitting element.

[0050] In a specific embodiment, the input terminal of the operational amplifier unit is a non-inverting input terminal, and the control terminal of the operational amplifier unit is an inverting input terminal.

[0051] In some embodiments, as Figure 3 shown, the operational amplifier unit further includes a first voltage regulating resistor R1 and a second voltage regulating resistor R2, where:

[0052] The first voltage regulating resistor R1 is located on the loop between the control terminal and the output terminal of the operational amplifier unit 22. The first end of the first voltage regulating resistor R1 is connected to the control terminal of the operational amplifier unit 22, and the second end is connected to the output terminal of the operational amplifier unit 22;

[0053] The first end of the second voltage regulating resistor R2 is connected to the first end of the first voltage regulating resistor R1, and the second end is grounded.

[0054] Figure 3 The shown operational amplifier unit constitutes a non-inverting amplifier. Based on the principle of the non-inverting amplifier, it can be obtained that Vint2 = Vi × [(R1 + R2) / R2]. Also, Vi = a × ELVSS + b × VDAC. At this time, by setting the resistance values of R1 and R2, the dynamic tracking of Vint2 to ELVSS can be achieved.

[0055] In some embodiments, as Figure 3 shown, the signal addition module further includes a third voltage regulating resistor R3 and a fourth voltage regulating resistor R4, where:

[0056] The third voltage regulating resistor R3 is located on the loop between the second input terminal of the adder unit 21 and the second pole of the light-emitting element. The first end of the third voltage regulating resistor R3 is connected to the second input terminal of the adder unit 21, and the second end is connected to the second pole of the light-emitting element;

[0057] The first end of the fourth voltage regulating resistor R4 is connected to the first end of the third voltage regulating resistor R3, and the second end is grounded.

[0058] After setting the third voltage regulating resistor R3 and the fourth voltage regulating resistor R4, the voltage ELVSS' actually connected to the second pole of the light-emitting element of the adder unit is ELVSS × [R4 / (R3 + R4)]. The dynamic tracking relationship between Vint2 and ELVSS can be further adjusted by setting the resistance values of R3 and R4.

[0059] For the convenience of description, when describing the above device, it is divided into various modules according to functions for separate description. Of course, when implementing the present application, the functions of each module can be implemented in one or more software and / or hardware.

[0060] Based on the same inventive concept, corresponding to the driving circuit in any of the above embodiments, the present application further provides a display device, including a pixel circuit and any one of the control circuits in the above embodiments.

[0061] The display device provided by the present application provides different anode voltages to the light-emitting elements through a control circuit, avoiding the brightness difference between the light-emitting elements in the refresh frame and the hold frame. At the same time, the cathode voltage of the light-emitting element is introduced to realize the dynamic tracking of the cathode voltage, further solving the problem of flicker in the display panel.

[0062] In a specific embodiment, the display device includes a plurality of pixel circuits arranged in an array. The pixel circuits are disposed in the display area of the display device, and the control circuit is disposed in the non-display area of the display device.

[0063] Moreover, in the display device provided by the present application, one control circuit can be simultaneously coupled to the light-emitting elements in a plurality of pixel circuits. The same signal line of the plurality of pixel circuits is connected and the same signal is provided by the control circuit, so as to realize the simultaneous adjustment of the reset voltages of the light-emitting elements in the plurality of pixel circuits.

[0064] In some embodiments, the display device is an organic light-emitting diode display device.

[0065] The display device provided in this embodiment can be applied to any product or component with a display function, such as an electronic paper, a mobile phone, a tablet computer, a television, a monitor, a laptop computer, a digital photo frame, a navigator, etc.

[0066] The display device in the above embodiment includes the corresponding control circuit in any of the foregoing embodiments and has the beneficial effects of the corresponding embodiments, which will not be elaborated here.

[0067] Those of ordinary skill in the art should understand that the discussion of any of the above embodiments is only exemplary and is not intended to imply that the scope of the present application (including the claims) is limited to these examples; under the concept of the present application, the technical features in the above embodiments or different embodiments can also be combined, the steps can be implemented in any order, and there are many other variations in different aspects of the embodiments of the present application as described above, which are not provided in detail for the sake of brevity.

[0068] In addition, for simplicity of explanation and discussion, and in order not to make the embodiments of the present application difficult to understand, well-known power / ground connections to integrated circuit (IC) chips and other components may or may not be shown in the provided drawings. Further, the devices may be shown in block diagram form in order to avoid making the embodiments of the present application difficult to understand, and this also takes into account the fact that details of the implementation of these block diagram devices are highly dependent on the platform on which the embodiments of the present application are to be implemented (i.e., these details should be fully within the understanding of those skilled in the art). In cases where specific details (such as circuits) are set forth to describe exemplary embodiments of the present application, it will be apparent to those skilled in the art that the embodiments of the present application may be practiced without these specific details or with variations of these specific details. Accordingly, these descriptions should be regarded as illustrative rather than restrictive.

[0069] Although the present application has been described in connection with specific embodiments thereof, many alternatives, modifications, and variations of these embodiments will be apparent to those of ordinary skill in the art in light of the foregoing description. For example, other memory architectures (such as dynamic RAM (DRAM)) may be used with the embodiments discussed.

[0070] Embodiments of the present application are intended to cover all such alternatives, modifications, and variations that fall within the broad scope of the appended claims. Therefore, any omissions, modifications, equivalent substitutions, improvements, etc., made within the spirit and principle of the embodiments of the present application shall be included within the protection scope of the present application.

Claims

1. A control circuit is electrically coupled to a pixel circuit, the pixel circuit includes a light-emitting element, and the control circuit includes a signal selection module and a signal addition module, wherein: The signal selection module is configured to receive at least two input signals, and select one of the at least two input signals as an initial control signal according to a control signal and input it to the signal addition module; The signal addition module is configured to receive the initial control signal and the voltage signal of the second pole of the light-emitting element, and provide a second control signal to the first pole of the light-emitting element according to the initial control signal and the voltage signal of the second pole of the light-emitting element; the first pole of the light-emitting element is the anode, and the second pole is the cathode.

2. The control circuit according to claim 1, wherein, The signal selection module includes a first signal input terminal, a second signal input terminal, a signal control terminal, and a signal output terminal, wherein: The first signal input terminal is configured to receive a first input signal, the second signal input terminal is configured to receive a second input signal, the signal control terminal is configured to receive the control signal, the signal output terminal is connected to the signal addition module, and the signal selection module is further configured to: Select one of the first input signal and the second input signal as the initial control signal according to the control signal and input it to the signal addition module.

3. The control circuit according to claim 2, wherein, The signal selection module further includes a first transistor and a second transistor, the types of the first transistor and the second transistor are different, the first pole of the first transistor is connected to the first signal input terminal and is configured to receive the first input signal, and the first pole of the second transistor is connected to the second signal input terminal and is configured to receive the second input signal; The control poles of the first transistor and the second transistor are both connected to the signal control terminal and are configured to receive the control signal, and the second poles of the first transistor and the second transistor are both connected to the signal output terminal and are configured to input the first input signal or the second input signal as the initial control signal to the signal addition module.

4. The control circuit according to claim 1, wherein the signal addition module further includes an adder unit and an operational amplifier unit, wherein: The adder unit is connected to the signal selection module and the second pole of the light-emitting element, and is configured to receive the initial control signal and the voltage signal of the second pole of the light-emitting element, and provide an addition signal to the operational amplifier unit according to the initial control signal and the voltage signal of the second pole of the light-emitting element; The operational amplifier unit is connected to the adder unit and the first pole of the light-emitting element, and is configured to receive the addition signal, and provide the second control signal to the first pole of the light-emitting element according to the addition signal.

5. The control circuit according to claim 4, wherein, The adder unit includes a first input terminal, a second input terminal, and an output terminal, wherein: The first input terminal of the adder unit is connected to the signal selection module and is configured to receive the initial control signal. The second input terminal of the adder unit is connected to the second pole of the light-emitting element and is configured to receive the voltage signal of the second pole of the light-emitting element. The output terminal of the adder unit is connected to the operational amplifier unit and is configured to output the addition signal to the operational amplifier unit.

6. The control circuit according to claim 4, wherein, The operational amplifier unit includes an input terminal, a control terminal, and an output terminal, where: The input terminal of the operational amplifier unit is connected to the adder unit and is configured to receive the addition signal. The control terminal of the operational amplifier unit is connected to the output terminal. The output terminal of the operational amplifier unit is connected to the first pole of the light-emitting element and is configured to provide the second control signal to the first pole of the light-emitting element.

7. The control circuit according to claim 6, wherein the operational amplifier unit further includes a first voltage regulating resistor and a second voltage regulating resistor, where: The first voltage regulating resistor is located on the loop between the control terminal and the output terminal of the operational amplifier unit. The first end of the first voltage regulating resistor is connected to the control terminal of the operational amplifier unit, and the second end is connected to the output terminal of the operational amplifier unit. The first end of the second voltage regulating resistor is connected to the first end of the first voltage regulating resistor, and the second end is grounded.

8. The control circuit according to claim 5, wherein the signal addition module further includes a third voltage regulating resistor and a fourth voltage regulating resistor, where: The third voltage regulating resistor is located on the loop between the second input terminal of the adder unit and the second pole of the light-emitting element. The first end of the third voltage regulating resistor is connected to the second input terminal of the adder unit, and the second end is connected to the second pole of the light-emitting element. The first end of the fourth voltage regulating resistor is connected to the first end of the third voltage regulating resistor, and the second end is grounded.

9. The control circuit according to claim 6, wherein, The input terminal of the operational amplifier unit is the non-inverting input terminal, and the control terminal of the operational amplifier unit is the inverting input terminal.

10. The control circuit according to claim 1, wherein, The second control signal is configured to reset the anode voltage of the light-emitting element.

11. A display device, including a pixel circuit and the control circuit according to any one of claims 1 to 10.

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