An inductive coupling power transmission adaptive control system and method for wireless three-dimensional stacked chip package

Abstract

The application discloses an inductive coupling power transmission adaptive control system and method for a wireless three-dimensional stacked chip package. The system comprises a daughter chip and a mother chip connected through inductive coupling. The power transmission adaptive control system of the application converts the load feedback voltage received by the daughter chip into a feedback voltage data code word through a level decision circuit. The system can load the feedback voltage data code word onto the data link of the system and feed back to the mother chip. The mother chip of the application comprises a DPID control circuit composed of an error calculation unit and a DPID controller. The energy control code word output by the DPID control circuit controls the VCO and the frequency divider to adjust the frequency of the input clock in the energy transmission system, so as to achieve adaptive control of the transmission power of the sending chip, improve the transmission efficiency of the system, shorten the response time of the system and prevent the waste of the transmission power.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of integrated circuit technology, in particular to a power transmission adaptive control system and method in an inductive coupling interconnection transmission system of a wireless three-dimensional stacked chip package. BACKGROUND

[0002] In recent years, the inter-chip wireless interconnection technology has been greatly developed. The three-dimensional stacked chip data link based on inductive coupling interconnection has been widely studied, but there are still many problems to be solved in inter-chip power transmission. Most of the existing power transmission schemes applied in the field of three-dimensional stacked chip packaging are open-loop systems. The missing feedback loop not only reduces the stability of the system and the transmission efficiency of inter-chip power, but also introduces a voltage stabilizing resistor at the load end, thereby wasting a large amount of energy during the operation of the chip. In order to solve this problem, a feedback control loop can be introduced between the chips, so that the receiving voltage can be fed back to the input end in the form of a digital signal through the data loop, to control the working state of the system, reduce the energy dissipation in the inter-chip energy transmission process, improve the energy transmission efficiency, and enhance the stability of the system.

[0003] Due to the difficulty of feeding back analog signals to the sending end through wireless transmission, in recent years, wireless inter-chip feedback signals are mostly in digital form, that is, the receiving voltage is processed through sampling and coding, and then fed back to the sending end in the form of a digital signal to form a feedback loop to enhance the stability of the system. In 2015, the paper "A 13.56MHz Wireless Power Transfer System With Reconfigurable Resonant Regulating Rectifier and Wireless Power Control for Implantable Medical Devices" published in IEEE Journal of Solid-State Circuits (JSSC) proposed a reconfigurable output rectifier through resonance regulation, which transmits a digital signal through a control loop to control the working state of the rectifier, realizing wireless power control. However, the inductor and digital control module of this technology are designed outside the chip, not applied to the inductive coupling strategy of three-dimensional stacked chip packaging. Moreover, when the control circuit is designed outside the chip, the signal transmission delay from the chip to the outside will significantly lengthen the system response time. Moreover, the control code word output by the digital control loop is fed back to the sending end, and pulse control is adopted at the transmitting end, which limits the control efficiency, accuracy, and variable range of the load. SUMMARY

[0004] In order to overcome the above-mentioned deficiencies of the prior art, a power transmission adaptive control system strategy for a wireless three-dimensional stacked chip package inductive coupling interconnection transmission system with high efficiency, low response time and low power consumption is needed. In view of this, the present application proposes an adaptive control system and method for inductive coupling power transmission of a wireless three-dimensional stacked chip package. The technical solution adopted by the present application is to change the system clock frequency of the energy transmission link to control the transmission power of the system. A level decision circuit is designed in the sub-chip (receiver) in the system to compare the received voltage with the preset reference voltage and convert it into a digital signal (feedback voltage data code word). The feedback voltage data code word is fed back to the mother chip (transmitter) in the system through the reverse transmission digital transmission link to control the power transmission of the system.

[0005] The technical solution of the present application is as follows:

[0006] The present application first provides a power transmission adaptive control system in an inductive coupling interconnection transmission system of a three-dimensional stacked chip package, which includes two chips connected by inductive coupling, wherein the two chips are a mother chip and a sub-chip, respectively. The mother chip includes an energy transmitter, a data receiver, a DPID control circuit, a voltage controlled oscillator (VCO) and a frequency divider. The sub-chip includes an energy receiver, a data transmitter and a level decision circuit. The energy transmitter and the energy receiver are connected by inductive coupling to form an energy transmission link, and the data receiver and the data transmitter are connected by inductive coupling to form a data transmission link. The energy transmitter includes an energy transmitter and an energy transmission inductor connected to each other. The energy receiver includes an energy receiver and an energy receiving inductor connected to each other. The data transmitter includes a data transmitter and a data transmission inductor connected to each other. The data receiver includes a data receiver and a data receiving inductor connected to each other.

[0007] The level decision circuit includes a comparator array and a level conversion array. The comparator array compares the load feedback voltage with the reference voltage, and then converts the voltage through the level conversion array to convert the load feedback voltage into a feedback voltage data code word. The DPID control circuit includes a DPID controller and an error calculation unit. The error calculation unit can subtract the feedback voltage data code word from the reference voltage data code word to obtain a voltage error signal. The DPID controller calculates the voltage error signal and its delay signal to obtain an energy control code word. The voltage controlled oscillator (VCO) outputs a clock signal with a stable frequency, and the frequency divider controls the frequency division ratio to obtain a controllable energy clock frequency through the energy control code word.

[0008] As a preferred embodiment of the present application, the load feedback voltage received by the energy receiving end is converted into a feedback voltage data code word through the level decision circuit, and the load feedback voltage data code word is transmitted between the two chips through data inductive coupling.

[0009] As a preferred scheme of the present application, the level decision circuit is realized by a comparator array and a level conversion array, each of which has a current less than 4μA, and the comparator output voltage is converted into a standard high level 1.2V for digital circuit operation through the level conversion array and fed back to the mother chip through the data transmission link.

[0010] As a preferred scheme of the present application, the DPID control circuit calculates the feedback voltage data code word received by the inductive coupling interconnection at the data receiving end into an energy control code word according to the DPID control algorithm.

[0011] As a preferred scheme of the present application, the energy control code word controls a voltage controlled oscillator (VCO) and a frequency divider, and the variable frequency clock obtained by the frequency divider controls the transmission efficiency of energy.

[0012] As a preferred scheme of the present application, the energy transmitter, the energy receiver, the data transmitter, the data receiver, the level decision circuit, the level conversion circuit, the voltage controlled oscillator (VCO), the frequency divider, the DPID control circuit, the energy transmitting inductor, the energy receiving inductor, the data transmitting inductor and the data receiving inductor are designed on a chip, and the sub-chip is powered by the energy transmission link between the chips.

[0013] The present application also provides a power transmission adaptive control method of the above system, which comprises the following steps:

[0014] 1) The energy transmitter on the mother chip sends energy to the sub-chip through the energy transmitting inductor, and the energy receiving inductor and the energy receiver on the sub-chip receive the energy, and a load feedback voltage signal is obtained on the feedback load of the energy receiver;

[0015] 2) The comparator array of the level decision circuit compares the load feedback voltage with a preset reference voltage, and then converts the load feedback voltage into a feedback voltage data code word through the level conversion array, and transmits the feedback voltage data code word to the mother chip through the data transmitter and the data transmitting inductor on the sub-chip;

[0016] 3) After the data receiver on the mother chip receives the feedback voltage control code word, the error calculation unit subtracts the feedback voltage data code word from a preset reference voltage data code word to obtain a voltage error signal, and the DPID controller calculates the voltage error signal and its delay signal to obtain an energy control code word;

[0017] 4) The energy control code word controls the frequency division ratio of the frequency divider, and the frequency divider divides the clock output by the voltage controlled oscillator (VCO) to obtain a controllable energy clock frequency;

[0018] 5) Controllable energy clock frequency variation regulates the energy emitted by the energy transmitter, i.e. the control of energy emission can be realized.

[0019] Compared with the prior art, the beneficial effect of the present application is that all the control modules designed outside the three-dimensional stacked chip in the prior art are integrated inside the chip. The present application overcomes the dependence on external circuits in the prior art by designing and integrating a control system that can adaptively adjust the system clock frequency on the chip, so that the chip system can realize high integration, low power consumption, high efficiency, low delay, and adaptive adjustment of inter-chip power transmission without relying on external circuits. BRIEF DESCRIPTION OF DRAWINGS

[0020] Figure 1 A schematic block diagram of the specific power transmission adaptive control system of the present application is shown.

[0021] Figure 2 A schematic module diagram of the DPID controller is shown.

[0022] Figure 3 A state transition diagram of the DPID multiplier-adder is shown.

[0023] Figure 4 A simulation effect diagram of the power transmission adaptive control system of the present application is shown. DETAILED DESCRIPTION

[0024] Below, the technical details of the power adaptive control system and its core DPID controller are pointed out according to the drawings.

[0025] REFERENCE Figure 1, depicts a specific power transmission adaptive control system schematic diagram according to the present disclosure. The wireless power adaptive control system of the present application uses inductive coupling interconnection technology, which comprises two chips connected by inductive coupling, wherein the two chips are a mother chip and a daughter chip, the mother chip comprises an energy transmitter, an energy transmission inductor, a data receiver, a data reception inductor, a DPID control circuit, a voltage controlled oscillator (VCO) and a frequency divider; the daughter chip comprises an energy receiver, an energy reception inductor, a data transmitter, a data transmission inductor and a level decision circuit; the energy transmitter and the energy receiver are connected by inductive coupling to form an energy transmission link, and the data receiver and the data transmitter are connected by inductive coupling to form a data transmission link, wherein the level decision circuit comprises a comparator array and a level conversion array, the comparator array compares the load feedback voltage with the reference voltage, and then the level conversion array converts the voltage to convert the load feedback voltage into a feedback voltage data code word, the DPID control circuit comprises a DPID controller and an error calculation unit, the error calculation unit can subtract the feedback voltage data code word from the reference voltage data code word to obtain a voltage error signal, and the DPID controller calculates the voltage error signal and its delay signal to obtain an energy control code word; the voltage controlled oscillator (VCO) outputs a clock signal with a stable frequency, and the frequency divider controls the frequency division ratio to obtain a controllable energy clock frequency through the energy control code word.

[0026] The energy transmitter, energy receiver, data transmitter, data receiver, level decision circuit, level conversion circuit, voltage controlled oscillator (VCO), frequency divider, DPID control circuit, energy transmission inductor, energy reception inductor, data transmission inductor and data reception inductor of the system of the present application are designed on a chip, and the daughter chip is powered by the energy transmitted by the mother chip. The load feedback voltage received by the energy receiver is converted into a feedback voltage data code word by the level decision circuit, the feedback voltage data code word is transmitted in reverse by the data transmission inductor after being transmitted to the sending end by the data transmitter, the data received by the data receiver of the sending end is received by the data reception inductor, and the voltage error signal is obtained by subtracting the reference voltage data code word. The voltage error signal is input into the DPID control circuit, and the energy control code word obtained by the DPID operation is used to control the frequency division ratio of the frequency divider to adjust the rapid change of the clock frequency of the energy transmission system, and finally realize the adaptive control of the transmission power of the system.

[0027] In a preferred embodiment of the present application, the load feedback voltage received by the energy receiving end is converted into a feedback voltage data code word by the level decision circuit, and the transmission of the load feedback voltage data code word between the two chips is carried out through data inductive coupling.

[0028] The level decision circuit is realized by a comparator array and a level conversion array, and the current of each path of the comparator array and the level conversion array is less than 4 mu A. The load feedback voltage and the reference voltage are compared by the comparator, and if the load feedback voltage is higher than the reference voltage, a high voltage is output; if the load feedback voltage is lower than the reference voltage, a low voltage is output. The high voltage output by the comparator is converted into a standard high level 1.2 V (the low voltage output by the comparator, i.e. 0 level, is not converted) for the digital circuit to work, and is fed back to the master chip through the data transmission link. The level conversion is realized by a level shift circuit.

[0029] The DPID controller comprises a delay module and a DPID multiplier-adder; the delay module delays the voltage error signal obtained by the error calculation unit to obtain a delay signal, and the DPID multiplier-adder performs multiplication and addition calculation on the voltage error signal obtained by the error calculation unit and the delay signal thereof to obtain an energy control code word.

[0030] The energy control code word controls a voltage-controlled oscillator (VCO) and a frequency divider, and the variable frequency clock obtained by the frequency divider controls the transmission efficiency of energy.

[0031] The main control flow of the system is as follows: once the load of the receiving end changes and causes the received voltage to change, the feedback voltage is compared with a preset reference voltage by a comparator array to obtain a voltage data code word, the voltage data code word is transmitted to the sending end through a data link, and then is subtracted from the reference digital signal to obtain a voltage error signal, the voltage error signal is input into a DPID control circuit, an energy control code word is obtained through DPID operation to control the output frequency of the VCO and the frequency divider, the rapid change of the clock frequency of the energy transmission system is adjusted, and finally the adaptive control of the system sending power is achieved.

[0032] Based on the above control flow, the application provides a power transmission adaptive control method of the above system, which comprises the following steps:

[0033] 1) the energy transmitter on the master chip sends energy to the sub-chip through an energy transmitting inductor, and the energy receiver inductor and the energy receiver on the sub-chip receive the energy, and a load feedback voltage signal is obtained on the feedback load of the energy receiver;

[0034] 2) the comparator array of the level decision circuit compares the load feedback voltage with a preset reference voltage, and then converts the load feedback voltage into a feedback voltage data code word through the level conversion array, and transmits the feedback voltage data code word to the master chip through the data transmitter and the data transmitting inductor on the sub-chip;

[0035] 3) After the data receiver on the mother sheet receives the feedback voltage control code, the error calculation unit can subtract the feedback voltage data code from the preset reference voltage data code to obtain a voltage error signal, and the DPID controller calculates the voltage error signal with its delay signal to obtain an energy control code;

[0036] 4) The energy control code controls the frequency division ratio of the frequency divider, and the frequency divider obtains the frequency division ratio to divide the clock output by the voltage controlled oscillator (VCO) to obtain a controllable energy clock frequency;

[0037] 5) The change of the controllable energy clock frequency adjusts the energy transmitted by the energy transmitter, that is, the control of the energy transmission can be realized.

[0038] The DPID control circuit of the application comprises an error calculation unit and a DPID controller, and the PID controller further comprises a delay module and a DPID multiplier.

[0039] The PID controller is a proportional-integral-derivative controller. The principle of the PID controller is as follows: the analog PID control signal u(t) is given by the following formula:

[0040]

[0041]

[0042] In formula (0.1), (0.2), K p is a proportional coefficient, T i and T d are integral and differential time constants respectively; K i is an integral coefficient, and K d is a differential coefficient.

[0043] The proportional coefficient K p , the integral coefficient K i , and the differential coefficient K d are multiplied by the proportional, integral, and differential terms of the error signal e(t) to obtain the control signal: when there is a difference between the output voltage and the reference voltage, the proportional term will amplify the error signal in proportion to produce a control effect at the sending end, quickly reduce the error between the two voltages, and improve the accuracy and speed of control. The main function of the PID integral term is to reduce the static error, so that the stable value of the output voltage is maintained near the given reference voltage when the system reaches stability; and the differential term reflects the trend of the error signal of the system, and through the differential term, the trend of the error signal can be adjusted to speed up the response speed of the system and reduce the response time of the system.

[0044] Digital PID (DPID) controller is usually obtained by discretization of analog PID controller. Compared with analog PID controller, DPID controller has the following advantages:

[0045] 1) only a little digital control theory is needed to apply;

[0046] 2) in integrated circuit, digital circuit consumes less power, occupies less area, responds faster and has higher control precision.

[0047] Common discretization methods of analog PID controller include backward difference method, forward difference method, bilinear transformation method, impulse response invariance method, step response invariance method and zero-pole correspondence method. The backward difference transformation method is adopted in the present scheme. The backward difference of the above formula (1.2) is as follows:

[0048]

[0049] Formula (0.3) is a PID position type control algorithm, in which k is a time after discretization, and the recursive expression of PID position type control algorithm can be obtained as follows:

[0050]

[0051] Therefore, the recursive expression of PID position type control algorithm can be expressed as:

[0052]

[0053] After arrangement, the following formula can be obtained:

[0054] u[k]=u[k-1]+K p [e[k]-e[k-1]]

[0055] +K i e[k]+K d [e[k]-2e[k-1]-e[k-2]](0.6)

[0056] In formula (0.6), the proportional coefficient is K p , the integral coefficient is K i , the differential coefficient is K d , and e[k] is the error signal quantity of discrete time. After further arrangement, the following formula can be obtained:

[0057] u[k]=u[k-1]+K0e[k]+K1e[k-1]+K2e[k-2](0.7) In formula (0.7), the coefficients K1, K2 and K3 can be expressed as:

[0058]

[0059] the proportional coefficient K in formula (0.7) p the integral coefficient K i the differential coefficient K d The order of adjustment is proportional, integral and differential, the proportional coefficient is determined first, increasing which can shorten the response time of the system and accelerate the response speed, thereby realizing the rapid adjustment of the output of the system. However, K p Setting too large will cause the system to produce a large overshoot, reducing the dynamic performance of the system; the integral time is inversely proportional to the integral effect, increasing the integral term will cause the accumulation of error, so the integral effect has serious hysteresis, leading to poor system stability. If the integral term is too large, it will increase the step size of each adjustment, leading to overshoot, which will have a certain impact on the dynamic performance of the system. And insufficient integral effect will slow down the speed of the system to eliminate static error. Increasing the differential term will cause the error to change faster, causing the output voltage to oscillate and reducing the stability of the system.

[0060] Reference Figure 2 , describes the signal transfer diagram of the DPID controller of the application. e[k] is the voltage error signal obtained by subtracting the reference voltage data code word from the feedback voltage data code word, and y[k] is the energy control code word output by the DPID control circuit. e[k] passes through the delay module to obtain delay signals e[k-1], e[k-2] which respectively retain one and two clock periods. y[k] passes through the delay module to obtain a delay signal y[k-1] which retains one clock period. These signals are input into the DPID multiplier-adder to obtain the final control signal.

[0061] The original calculation formula of the DPID multiplier-adder is given by formula (1.9),

[0062] y[k] = y[k-1] + K0e[k] + K1e[k-1] + K2e[k-2] (1.9) In formula (1.9), the coefficients K1, K2 and K3 can be represented as:

[0063]

[0064] the proportional coefficient K p , the integral coefficient K i , the differential coefficient K d The three coefficients can be input from the outside to adjust the performance of the system. Reference Figure 3 , describes Figure 2The state transition diagram of the DPID multiplier-adder. y_out represents the energy control codeword output by the multiplier-adder. The DPID state transition principle is shown in equation (1.9). When the rst_n signal is 0, the DPID multiplier-adder state is IDLE, i.e., y_out and y_comp signals are both zero. When rst_n is valid, the multiplier-adder state transitions to S1, and the multiplier-adder calculates x0_comp< = K0*e[k], x1_comp< = K1*e[k-1], x2_comp< = K1*e[k-1], where the intermediate variables x0_comp, x1_comp, and x2_comp are in the complement form for the convenience of subsequent addition calculations. Subsequently, the multiplier-adder state transitions to S2, and the complement form of the control signal y_comp< = x0_comp+x1_comp+x2_comp+y1_comp is calculated. Finally, the multiplier-adder transitions to S3, and y_comp is converted to y_out to obtain the original code form of the control signal in this state.

[0065] Reference Figure 4 The load feedback voltage on the sub-chip and the corresponding energy transmitter clock frequency under the control of the DPID control circuit are compared when the load of the energy transmission system changes at the 2μs time. When the load changes, the energy transmission system using the DPID control circuit can stabilize the load terminal receiving voltage on the sub-chip at 2.5V by adjusting the clock frequency of the energy transmitter, and the response time is about 1.5μs.

Claims

1. A power transfer adaptive control system in an inductively coupled interconnect transmission system of a three-dimensional stacked chip package, the system comprising: It includes two chips connected by inductive coupling, wherein the two chips are a mother chip and a daughter chip, the mother chip includes an energy sending end, a data receiving end, a DPID control circuit, a voltage controlled oscillator (VCO) and a frequency divider; the daughter chip includes an energy receiving end, a data transmitting end and a level decision circuit; the energy sending end and the energy receiving end are connected by inductive coupling to form an energy transmission link, the data receiving end and the data transmitting end are connected by inductive coupling to form a data transmission link, the energy sending end includes an energy transmitter and an energy transmitting inductor connected with each other, the energy receiving end includes an energy receiver and an energy receiving inductor connected with each other, the data sending end includes a data transmitter and a data transmitting inductor connected with each other, and the data receiving end includes a data receiver and a data receiving inductor connected with each other; The level decision circuit includes a comparator array and a level conversion array, the comparator array compares the load feedback voltage with the reference voltage to obtain a comparator array output voltage code word, and the level conversion array converts the comparator array output voltage code word into a feedback voltage data code word that can be sent to the data receiving end through the data transmitter, the DPID control circuit includes a DPID controller and an error calculation unit, the error calculation unit can subtract the feedback voltage data code word from the reference voltage data code word to obtain a voltage error signal, and the DPID controller calculates the voltage error signal and a delay signal thereof to obtain an energy control code word; the voltage controlled oscillator (VCO) outputs a clock signal with a stable frequency, and the energy control code word controls the frequency division ratio of the frequency divider to obtain a controllable energy clock frequency.

2. The power transfer adaptive control system of claim 1, wherein, The load feedback voltage received by the energy receiving end is converted into a feedback voltage data code word through the level decision circuit, and the load feedback voltage data code word is transmitted between the two chips through data inductive coupling.

3. The power transfer adaptive control system of claim 1, wherein, The level decision circuit is implemented by using a comparator array and a level conversion array, each current of the comparator array and the level conversion array is less than 4μA, the comparator output voltage is converted into a standard high level 1.2V for digital circuit operation through level conversion, and is fed back to the mother chip through the data transmission link.

4. The power transfer adaptive control system of claim 1, wherein, The DPID controller includes a delay module and a DPID multiplier-adder; the delay module delays the voltage error signal obtained by the error calculation unit to obtain a delay signal, and the DPID multiplier-adder multiplies and adds the voltage error signal obtained by the error calculation unit and the delay signal thereof to obtain an energy control code word.

5. The power transfer adaptive control system of claim 4, wherein, The energy control code word controls the voltage controlled oscillator (VCO) and the frequency divider, and the variable frequency clock obtained by the frequency divider controls the transmission efficiency of the energy.

6. The power transfer adaptive control system of claim 1, wherein, The energy transmitter, the energy receiver, the data transmitter, the data receiver, the level decision circuit, the level conversion circuit, the voltage controlled oscillator (VCO), the frequency divider, the DPID control circuit, the energy transmitting inductor, the energy receiving inductor, the data transmitting inductor and the data receiving inductor are designed on a chip, and the daughter chip is powered by the energy transmission link between the chips.

7. A method of power transfer adaptive control of the system of any of claims 1-6, characterized by, The method comprises the following steps: 1) The energy transmitter on the master chip sends energy to the slave chip through the energy transmitting inductor, and the energy receiver on the slave chip receives the energy through the energy receiving inductor, and a load feedback voltage signal is obtained on the feedback load of the energy receiver; 2) The comparator array of the level decision circuit compares the load feedback voltage with the preset reference voltage, then converts the load feedback voltage into a feedback voltage data code word through the level conversion array, and transmits the feedback voltage data code word to the master chip through the data transmitter and the data transmitting inductor on the slave chip; 3) After the data code word of the feedback voltage is received by the data receiver on the master chip, the error calculation unit subtracts the preset reference voltage data code word from the feedback voltage data code word to obtain a voltage error signal, and the DPID controller calculates the voltage error signal and its delay signal to obtain an energy control code word; 4) The energy control code word controls the frequency division ratio of the frequency divider, and the frequency divider obtains a controllable energy clock frequency by dividing the clock output by the voltage controlled oscillator (VCO) according to the frequency division ratio; 5) The change of the controllable energy clock frequency adjusts the energy transmitted by the energy transmitter, that is, the control of the energy transmission can be realized.

8. The method of claim 7, wherein, In step 3), the DPID controller calculates the voltage error signal and its delay signal to obtain an energy control code word, specifically: e[k] is the voltage error signal obtained by subtracting the reference voltage data code word from the feedback voltage data code word, and y[k] is the energy control code word output by the DPID control circuit; e[k] first passes through a delay module to obtain delay signals e[k-1] and e[k-2] which respectively retain one and two clock periods; y[k] passes through a delay module to obtain a delay signal y[k-1] which retains one clock period; these signals are input into the DPID multiplier-adder to obtain the final energy control code word; y[k] = y[k-1] + K0e[k] + K1e[k-1] + K2e[k-2] In the formula, the coefficients K1, K2 and K3 can be represented as: K p is a proportional coefficient, K i is an integral coefficient, K d is a derivative coefficient.

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