Test structures and methods of forming the same

Abstract

A test structure and a method for forming the same, wherein the test structure comprises: a substrate; a first dielectric layer on the substrate; a first conductive structure in the first dielectric layer, the first conductive structure comprising a first test terminal and a second test terminal; a second dielectric structure on a surface of the first dielectric layer and the first conductive structure; a to-be-tested plug and a second conductive structure in the second dielectric structure, the to-be-tested plug connecting the first conductive structure and the second conductive structure, the second conductive structure comprising a third test terminal and a fourth test terminal; a plurality of first resistance structures, a first end of one of the plurality of first resistance structures being connected to the first test terminal; and a plurality of second resistance structures, a third end of one of the plurality of second resistance structures being connected to the third test terminal. The to-be-tested plug in the test structure has a small risk of being damaged by static electricity, thereby improving the accuracy of wafer acceptance testing.

Description

Technical Field

[0001] This invention relates to the field of semiconductor manufacturing technology, and in particular to a test structure and its formation method. Background Technology

[0002] With the continuous advancement of semiconductor technology, the requirements for integrated circuit manufacturing processes are becoming increasingly stringent. During the integrated circuit manufacturing process, after the integrated circuit is manufactured but before the wafer leaves the factory, a wafer acceptance test (WAT) is typically performed on the wafer acceptance test key structure (hereinafter referred to as the WAT testkey structure) to detect the electrical performance of the wafer and prevent devices that do not meet customer requirements from leaving the factory, thus avoiding losses.

[0003] The Kelvin via Rc testkey structure in integrated circuits is the main WAT testkey structure used in backend of line (BEOL) processes to detect the electrical properties of vias and monitor process stability.

[0004] However, as integrated circuit process dimensions shrink, the size of metal interconnect layers and plugs becomes smaller and smaller. The Kelvin plugs in the Kelvin plug resistance test unit are easily damaged by electrostatic discharge, which can lead to abnormal test results in wafer acceptance testing. Summary of the Invention

[0005] The technical problem solved by this invention is to provide a test structure and its formation method to reduce the risk of electrostatic damage to the plug under test and improve the accuracy of wafer acceptance testing.

[0006] To address the aforementioned technical problems, the present invention provides a test structure comprising: a substrate; a first dielectric layer on the substrate; a first conductive structure within the first dielectric layer, wherein the first dielectric layer exposes the top surface of the first conductive structure, and the first conductive structure includes a first test terminal and a second test terminal; a second dielectric structure located on the surfaces of the first dielectric layer and the first conductive structure; a test plug and a second conductive structure located within the second dielectric structure, wherein the test plug is located between the first conductive structure and the second conductive structure, and the test plug connects the first conductive structure and the second conductive structure, and the second conductive structure includes a third test terminal and a fourth test terminal; a plurality of first resistive structures located within the first dielectric layer and the second dielectric structure, wherein each first resistive structure includes a first terminal and a second terminal, and a first terminal of one of the plurality of first resistive structures is connected to the first test terminal; and a plurality of second resistive structures located within the first dielectric layer and the second dielectric structure, wherein each second resistive structure includes a third terminal and a fourth terminal, and a third terminal of one of the plurality of second resistive structures is connected to the third test terminal.

[0007] Optionally, the first conductive structure extends along a first direction, the second conductive structure extends along a second direction, the second conductive structure is located above the first conductive structure, and the second conductive structure spans the first conductive structure, with the first direction and the second direction being perpendicular to each other.

[0008] Optionally, each first resistor structure includes: a plurality of third conductive structures, a plurality of fourth conductive structures, and a plurality of first plugs located between the plurality of third conductive structures and the plurality of fourth conductive structures. The plurality of third conductive structures and the plurality of fourth conductive structures are connected end to end through the plurality of first plugs to form a chain structure, one end of the chain structure being the second end; a first connecting plug is located between the chain structure and the first conductive structure, one end of the first connecting plug being the first end, and the other end of the first connecting plug being connected to the other end of the chain structure.

[0009] Optionally, the fourth conductive structure extends along a first direction, the third conductive structure extends along a second direction, and a plurality of third conductive structures are located above a plurality of fourth conductive structures, wherein the first direction and the second direction are perpendicular to each other.

[0010] Optionally, the fourth test terminal and the second terminal are used for electrical connection to a voltmeter.

[0011] Optionally, each second resistor structure includes: a plurality of fifth conductive structures, a plurality of sixth conductive structures, and a plurality of second plugs located between the plurality of fifth conductive structures and the plurality of sixth conductive structures. The plurality of fifth conductive structures and the plurality of sixth conductive structures are connected end to end through the plurality of second plugs to form a chain structure, one end of the chain structure being the fourth end; and a second connecting plug located between the chain structure and the second conductive structure, one end of the second connecting plug being the third end, and the other end of the second connecting plug being connected to the other end of the chain structure.

[0012] Optionally, the fifth conductive structure extends along a first direction, the sixth conductive structure extends along a second direction, and a plurality of sixth conductive structures are located above a plurality of fifth conductive structures, wherein the first direction and the second direction are perpendicular to each other.

[0013] Optionally, the second test terminal and the fourth terminal are used to electrically connect to a power source, which is a constant current source.

[0014] Optionally, there are two first resistor structures and two second resistor structures. The first end of one of the two first resistor structures is connected to the second test terminal, and the third end of the other of the two second resistor structures is connected to the fourth test terminal.

[0015] Optionally, the second end of the first resistor structure connected to the first test terminal and the fourth end of the second resistor structure connected to the fourth test terminal are used to electrically connect to a voltmeter, and the second end of the first resistor structure connected to the second test terminal and the fourth end of the second resistor structure connected to the third test terminal are used to electrically connect to a power supply, wherein the power supply is a constant current source.

[0016] Optionally, a first resistor structure connected to the first test terminal and a second resistor structure connected to the fourth test terminal are connected in series, and the sum of the resistances of the first and second resistor structures connected in series is 1000 ohms to 10000 ohms.

[0017] Optionally, the first resistor structure connected to the second test terminal and the second resistor structure connected to the third test terminal are connected in series, and the sum of the resistances of the first resistor structure and the second resistor structure connected in series is 10,000 ohms to 100,000 ohms.

[0018] Accordingly, the technical solution of the present invention also provides a method for forming a test structure, comprising: providing a substrate; forming a first dielectric layer on the substrate; forming a first conductive structure within the first dielectric layer, wherein the first dielectric layer exposes a top surface of the first conductive structure, the first conductive structure including a first test terminal and a second test terminal; forming a second dielectric structure on the surface of the first dielectric layer and the first conductive structure, and forming a plug to be tested and a second conductive structure within the second dielectric structure, the plug to be tested being located between the first conductive structure and the second conductive structure, the plug to be tested being connected to the first conductive structure and the second conductive structure, the second conductive structure including a third test terminal and a fourth test terminal; forming a plurality of first resistive structures within the first dielectric layer and the second dielectric structure, each first resistive structure including a first terminal and a second terminal, and a first terminal of one of the plurality of first resistive structures being connected to the first test terminal; forming a plurality of second resistive structures within the first dielectric layer and the second dielectric structure, each second resistive structure including a third terminal and a fourth terminal, and a third terminal of one of the plurality of second resistive structures being connected to the third test terminal.

[0019] Optionally, each first resistor structure includes: a plurality of third conductive structures, a plurality of fourth conductive structures, and a plurality of first plugs located between the plurality of third conductive structures and the plurality of fourth conductive structures. The plurality of third conductive structures and the plurality of fourth conductive structures are connected end to end through the plurality of first plugs to form a chain structure, one end of the chain structure being the second end; a first connecting plug is located between the chain structure and the first conductive structure, one end of the first connecting plug being the first end, and the other end of the first connecting plug being connected to the other end of the chain structure.

[0020] Optionally, the method of forming a plurality of first resistive structures includes: forming the fourth conductive structure while forming the first conductive structure; forming the first plug and the first connecting plug while forming the plug to be tested; and forming the third conductive structure while forming the second conductive structure.

[0021] Optionally, each second resistor structure includes: a plurality of fifth conductive structures, a plurality of sixth conductive structures, and a plurality of second plugs located between the plurality of fifth conductive structures and the plurality of sixth conductive structures. The plurality of fifth conductive structures and the plurality of sixth conductive structures are connected end to end through the plurality of second plugs to form a chain structure, one end of the chain structure being the fourth end; and a second connecting plug located between the chain structure and the second conductive structure, one end of the second connecting plug being the third end, and the other end of the second connecting plug being connected to the other end of the chain structure.

[0022] Optionally, the method of forming a plurality of second resistive structures includes: forming the fifth conductive structure while forming the first conductive structure; forming the second plug and the second connection plug while forming the plug to be tested; and forming the sixth conductive structure while forming the second conductive structure.

[0023] Optionally, the method of forming the first conductive structure includes: forming a first opening extending in a first direction on the first dielectric layer; and forming the first conductive structure within the first opening.

[0024] Optionally, the method for forming the plug to be tested includes: forming a second dielectric layer on the surface of the first dielectric layer and the first conductive structure; forming a second opening in the second dielectric layer, the bottom of the second opening exposing the top surface of the first conductive structure; and forming the plug to be tested in the second opening.

[0025] Optionally, the method for forming the second conductive structure includes: forming a third dielectric layer on the second dielectric layer and the surface of the plug to be tested, the second dielectric layer and the third dielectric layer constituting the second dielectric structure; forming a third opening extending along a second direction in the third dielectric layer, the bottom of the third opening exposing the surface of the plug to be tested; the projection of the third opening onto the substrate surface passing through the projection of the first conductive structure onto the substrate surface, the first direction being perpendicular to the second direction; and forming the second conductive structure within the third opening.

[0026] Optionally, the method for forming the plug to be tested and the second conductive structure includes: using a damascus process to form a second opening in the second dielectric structure and a third opening located on the second opening, the second opening exposing the top surface of the first conductive structure, and the second opening communicating with the third opening; after forming the second opening and the third opening, forming the plug to be tested in the second opening, and forming the second conductive structure in the third opening.

[0027] Compared with the prior art, the technical solution of the embodiments of the present invention has the following beneficial effects:

[0028] The test structure provided by the technical solution of the present invention is used to test the resistance of the plug under test in wafer acceptance testing. Since the first end of one of the plurality of first resistor structures is connected to the first test terminal, and the third end of one of the plurality of second resistor structures is connected to the third test terminal, when static electricity momentarily enters the circuit of the test structure, the first and second resistor structures can share the voltage applied to the plug under test, preventing the plug under test from being damaged by static electricity and improving the accuracy of wafer acceptance testing.

[0029] Furthermore, since there are two of each of the first and second resistor structures, and the first end of one of the two first resistor structures is connected to the second test terminal, and the third end of the other of the two second resistor structures is connected to the fourth test terminal, the resistor structures connected to the first, second, third, and fourth test terminals form a relatively symmetrical structure. This increases the uniformity of the test structure's pattern, avoiding the formation of isolated patterns. Consequently, the uniformity of the etching process is improved during the planarization process of forming the test structure, effectively reducing the height differences across the surface of the structure after chemical mechanical polishing, thus increasing the stability of the test structure. On the other hand, it helps reduce the wiring complexity between each second and fourth terminal and the solder pad. This increases the process window and reduces the process difficulty. Attached Figure Description

[0030] Figure 1 This is a circuit diagram of a Kelvin plug resistor test unit;

[0031] Figure 2 yes Figure 1 A top view of the Kelvin plug resistance testing unit;

[0032] Figures 3 to 8 This is a schematic diagram of the steps in the method for forming a test structure according to an embodiment of the present invention;

[0033] Figure 9 This is a test circuit diagram of a test structure according to an embodiment of the present invention;

[0034] Figure 10 This is a schematic diagram of the test structure according to another embodiment of the present invention;

[0035] Figure 11 This is a test circuit diagram of a test structure according to another embodiment of the present invention. Detailed Implementation

[0036] As described in the background section, with the miniaturization of integrated circuit process dimensions, the sizes of metal interconnect layers and plugs are becoming smaller and smaller. The Kelvin plugs in the Kelvin plug resistance test unit are easily damaged by electrostatic discharge, leading to abnormal test results in wafer acceptance testing. This is explained in detail below with reference to the accompanying drawings.

[0037] Figure 1 This is a circuit diagram of a Kelvin plug resistor test unit. Figure 2 yes Figure 1 A top view of the Kelvin plug resistance test unit.

[0038] Please refer to Figure 1 and Figure 2 The Kelvin plug resistance testing unit includes: a first conductive structure 110, which has a first test terminal 111 and a second test terminal 112; a second conductive structure 120 located on the first conductive structure 110, which has a third test terminal 121 and a fourth test terminal 122, the second conductive structure 120 spanning the first conductive structure 110, and the extension direction of the second conductive structure 120 being perpendicular to the extension direction of the first conductive structure 110; and a plug KV (Kelvin plug) to be tested located between the first conductive structure 110 and the second conductive structure 120, the bottom surface of the plug KV contacting the top surface of the first conductive structure 110, and the top surface of the plug KV contacting the bottom surface of the second conductive structure 120.

[0039] It should be noted that, in order to facilitate understanding of the position of the KV of the plug under test, Figure 2 The diagram schematically shows the projection 130 of the plug KV under test onto the top surface of the second conductive structure 120.

[0040] Please continue to refer to this. Figure 1 and Figure 2 The four-terminal method is used to measure the resistance Rc of the Kelvin plug resistance test unit to be tested, in order to measure the resistance of the plug KV under test.

[0041] Specifically, the first test terminal 111 is connected to the negative terminal of the power supply, and the third test terminal 121 is connected to the positive terminal of the power supply, forming a circuit to allow the current I to flow through the plug KV under test. Simultaneously, the second test terminal 112 is connected to the negative terminal of the voltmeter, and the fourth test terminal 122 is connected to the positive terminal of the voltmeter, forming a circuit to detect the voltage U across the plug KV under test. Therefore, the resistance Rc of the plug KV under test can be obtained from Rc = U / I.

[0042] However, when the wafer containing the Kelvin plug resistance test unit comes into contact with the WAT machine, or when the Kelvin plug resistance test unit is connected to a voltmeter, or when the Kelvin plug resistance test unit is connected to a power source, a momentary inrush of static electricity can cause a voltage of several hundred volts to be applied to a single plug under test (KV).

[0043] Generally, the smaller the size of the test plug (KV), the weaker its resistance to electrostatic discharge (ESD). As chip manufacturing processes shrink, interconnect dimensions become smaller, and consequently, the size of the test plug (KV) also decreases. Therefore, in advanced manufacturing processes, the intrusion of instantaneous static electricity often leads to ESD damage to the test plug (KV), making it impossible to accurately measure its resistance (Rc), resulting in abnormal wafer acceptance test results.

[0044] To address the aforementioned technical problems, the present invention provides a test structure and its formation method. By connecting the first end of one of a plurality of first resistor structures to the first test terminal and connecting the third end of one of a plurality of second resistor structures to the third test terminal, the voltage applied to the plug under test is shared, preventing the plug under test from being damaged by electrostatic discharge and improving the accuracy of wafer acceptance testing.

[0045] To make the above-mentioned objectives, features and beneficial effects of the present invention more apparent and understandable, specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0046] It should be noted that the terms "surface" and "on" in this specification are used to describe the relative spatial position and are not limited to whether there is direct contact.

[0047] Figures 3 to 8 This is a schematic diagram of the steps in the method for forming a test structure according to an embodiment of the present invention.

[0048] Please refer to Figure 3 and Figure 4 , Figure 3 yes Figure 4 A top view of the structure along the M3 direction. Figure 4 yes Figure 3 A schematic diagram of the cross-sectional structure along the M1-M2 direction is provided, with substrate 200.

[0049] In this embodiment, the substrate 200 includes a device layer (not shown in the figure), a conductive layer (not shown in the figure), and an interlayer dielectric layer (not shown in the figure) surrounding the device layer and the conductive layer. The device layer includes several device structures (not shown in the figure). The device structures include one or more combinations of transistors, diodes, triodes, capacitors, inductors, and conductive structures.

[0050] Next, in the backend of line (BEOL) process, a first conductive structure, a second conductive structure, a plug to be tested, several first resistor structures, and several second resistor structures are formed.

[0051] Please continue to refer to this. Figure 3 and Figure 4 A first dielectric layer 201 is formed on the substrate 200; a first conductive structure 210 is formed in the first dielectric layer 201, the first dielectric layer 201 exposes the top surface of the first conductive structure 210, and the first conductive structure 210 includes a first test terminal 210a and a second test terminal 210b.

[0052] In this embodiment, the first conductive structure 210 extends along the first direction X.

[0053] In this embodiment, the method for forming the first conductive structure 210 includes: forming a first opening (not shown) extending along a first direction X within the first dielectric layer 201; and forming the first conductive structure 210 within the first opening.

[0054] In this embodiment, the method for forming the first opening includes: forming a first mask layer (not shown) on the first dielectric layer 201, wherein the first mask layer exposes a portion of the surface of the first dielectric layer 201; using the first mask layer as a mask, etching the first dielectric layer 201 until the substrate 200 is exposed, thereby forming the first opening.

[0055] The etching process for the first dielectric layer 201 includes at least one of dry etching and wet etching.

[0056] In this embodiment, the method of forming a first conductive structure 210 in the first opening includes: forming a first conductive material layer (not shown) in the first opening and on the surface of the first dielectric layer 201; planarizing the first conductive material layer until the surface of the first dielectric layer 201 is exposed.

[0057] The process for forming the first conductive material layer includes metal electroplating, chemical vapor deposition, physical vapor deposition, etc.

[0058] In this embodiment, the material of the first conductive structure 210 includes: a conductive layer (not shown) and a barrier layer (not shown) between the conductive layer and the first dielectric layer 201.

[0059] The conductive layer is made of copper, and the barrier layer is used to prevent the diffusion of copper.

[0060] Next, a second dielectric structure is formed on the surfaces of the first dielectric layer 201 and the first conductive structure 210. A test plug and a second conductive structure are formed within the second dielectric structure. The test plug is located between the first conductive structure 210 and the second conductive structure, and connects the first conductive structure 210 and the second conductive structure. For the specific steps of forming the second dielectric structure, the test plug, and the second conductive structure in this embodiment, please refer to [reference needed]. Figures 5 to 8 .

[0061] Please refer to Figure 5 and Figure 6 , Figure 5 yes Figure 6 A top view of the structure along the M3 direction. Figure 6 yes Figure 5A cross-sectional structural diagram along the M1-M2 direction shows that a second dielectric layer 202 is formed on the surface of the first dielectric layer 201 and the first conductive structure 210; a second opening (not shown) is formed in the second dielectric layer 202, and the bottom of the second opening exposes the top surface of the first conductive structure 210; the plug to be tested 300 is formed in the second opening.

[0062] The plug to be tested 300 is located on the first conductive structure 210. The bottom surface of the plug to be tested 300 is in contact with the top surface of the first conductive structure 210.

[0063] In this embodiment, the method for forming the second opening includes: forming a second mask layer (not shown) on the second dielectric layer 202, wherein the second mask layer exposes a portion of the surface of the second dielectric layer 202; using the second mask layer as a mask, etching the second dielectric layer 202 until the first conductive structure is exposed, thereby forming the second opening.

[0064] The etching process for the second dielectric layer 202 includes at least one of dry etching and wet etching.

[0065] In this embodiment, the method of forming the plug to be tested 300 in the second opening includes: forming a second conductive material layer (not shown) in the second opening and on the surface of the second dielectric layer 202; planarizing the second conductive material layer until the surface of the second dielectric layer 202 is exposed.

[0066] The process for forming the second conductive material layer includes metal electroplating, chemical vapor deposition, physical vapor deposition, etc.

[0067] In this embodiment, the material of the plug to be tested 300 includes: a conductive layer (not shown) and a barrier layer (not shown) between the conductive layer and the second dielectric layer 202.

[0068] The conductive layer is made of copper, and the barrier layer is used to prevent the diffusion of copper.

[0069] Please refer to Figure 7 and Figure 8 , Figure 7 yes Figure 8 A top view of the structure along the M3 direction. Figure 8 yes Figure 7 A cross-sectional structural diagram along the M1-M2 direction is shown. A third dielectric layer 203 is formed on the surfaces of the second dielectric layer 202 and the plug under test 300. A third opening (not shown) extending along the second direction Y is formed in the third dielectric layer 203, and the bottom of the third opening exposes the surface of the plug under test 300. A second conductive structure 220 is formed in the third opening.

[0070] In this embodiment, the second dielectric layer and the third dielectric layer constitute a second dielectric structure (not shown in the figure).

[0071] The second conductive structure 220 is located on the plug under test 300. Specifically, the plug under test 300 is connected to the first conductive structure 210 and the second conductive structure 220.

[0072] The second conductive structure 220 includes a third test terminal 220a and a fourth test terminal 220b.

[0073] In this embodiment, the second conductive structure 220 is located above the first conductive structure 210, and the second conductive structure 220 spans the first conductive structure 210.

[0074] In this embodiment, the second conductive structure 220 extends along the second direction Y. The first direction X and the second direction Y are perpendicular to each other.

[0075] In some other embodiments, the extension directions of the first conductive structure and the second conductive structure may not be perpendicular.

[0076] Therefore, the plug to be tested 300 is located between the first conductive structure 210 and the second conductive structure 220, and the top surface of the plug to be tested 300 is in contact with the bottom surface of the second conductive structure 220.

[0077] In this embodiment, the projection of the third opening on the surface of the substrate 200 (not shown) passes through the projection of the first conductive structure 210 on the surface of the substrate (not shown), so that the second conductive structure 220 formed in the third opening can span the first conductive structure 210.

[0078] In this embodiment, the method for forming the third opening includes: forming a third mask layer (not shown) on the third dielectric layer 203, wherein the third mask layer exposes a portion of the surface of the third dielectric layer 203; using the third mask layer as a mask, etching the third dielectric layer 203 until the plug to be tested 300 is exposed, thereby forming the third opening.

[0079] The etching process for the third dielectric layer 203 includes at least one of dry etching and wet etching.

[0080] In this embodiment, the method of forming the second conductive structure 220 in the third opening includes: forming a third conductive material layer (not shown) in the third opening and on the surface of the third dielectric layer 203; planarizing the third conductive material layer until the surface of the third dielectric layer 203 is exposed.

[0081] The process for forming the third conductive material layer includes metal electroplating, chemical vapor deposition, physical vapor deposition, etc.

[0082] In this embodiment, the material of the second conductive structure 220 includes: a conductive layer (not shown) and a barrier layer (not shown) between the conductive layer and the third dielectric layer 203.

[0083] The conductive layer is made of copper, and the barrier layer is used to prevent the diffusion of copper.

[0084] It should be noted that, for ease of understanding, Figure 7 The substrate 200, the first dielectric layer 201, the second dielectric layer 202, and the third dielectric layer 303 are not shown in the diagram. Figure 7 The diagram also schematically shows the projection 301 of the plug 300 to be tested on the surface of the substrate 200.

[0085] In another embodiment, the method for forming the second dielectric structure, the plug to be tested, and the second conductive structure includes: forming a fourth dielectric layer on the surfaces of the first dielectric layer 201 and the first conductive structure 210; forming a second opening and a third opening on the second opening within the fourth dielectric layer using a damascus process, the second opening exposing the top surface of the first conductive structure 210, the second opening communicating with the third opening, and the projection of the third opening onto the surface of the substrate 200 penetrating the projection of the first conductive structure onto the surface of the substrate 200; forming a fourth conductive material layer within the second and third openings and on the surface of the fourth dielectric layer; planarizing the fourth conductive material layer until the surface of the fourth dielectric layer is exposed, thereby forming the plug to be tested within the second opening and the second conductive structure within the third opening. Specifically, the fourth dielectric layer is the second dielectric structure.

[0086] In this embodiment, while forming the first conductive structure 210, the plug to be tested 300, and the second conductive structure 220, a plurality of first resistive structures and a plurality of second resistive structures are formed within the first dielectric layer 201 and the second dielectric structure.

[0087] The first resistor structure includes a first end and a second end, and the first end of one of the plurality of first resistor structures is connected to the first test end 210a.

[0088] Each first resistor structure includes: a plurality of third conductive structures, a plurality of fourth conductive structures, a plurality of first plugs, and a first connection plug.

[0089] The second resistor structure includes a third terminal and a fourth terminal, and the third terminal of one of the second resistor structures is connected to the third test terminal 220a.

[0090] Each second resistor structure includes: a plurality of fifth conductive structures, a plurality of sixth conductive structures, a plurality of second plugs, and a second connection plug.

[0091] In this embodiment, there are two first resistor structures and two second resistor structures. The steps for forming the first resistor structure and the second resistor structure will be described below with reference to the accompanying drawings.

[0092] Please continue to refer to this. Figure 3 and Figure 4 While forming the first conductive structure 210, a plurality of fourth conductive structures 240 and a plurality of fifth conductive structures 250 are formed within the first dielectric layer 201.

[0093] In this embodiment, the first conductive structure 210, the fourth conductive structure 240, and the plurality of fifth conductive structures 250 are made of the same material.

[0094] In this embodiment, the fourth conductive structure 240 extends along the first direction X. The fifth conductive structure 250 extends along the first direction X.

[0095] By aligning the extension directions of the fourth conductive structures 240 and the fifth conductive structures 250 with the extension direction of the first conductive structure 210, the situation where the pattern size generated by the curved shape is smaller than the photolithographic limit is avoided. Furthermore, during exposure and etching to transfer the pattern, since the smaller size exists only in one direction (the second direction Y), the accuracy requirement for the size in the first direction X is reduced. This increases the process window.

[0096] In this embodiment, the method of forming a plurality of fourth conductive structures 240 and a plurality of fifth conductive structures 250 while forming the first conductive structure 210 includes: while forming the first opening, forming a plurality of fourth openings (not shown) and a plurality of fifth openings (not shown) within the first dielectric layer 201; while forming the first conductive material layer within the first opening, forming the first conductive material layer within the plurality of fourth openings and the plurality of fifth openings.

[0097] Specifically, the first mask layer is used not only to transmit the pattern of the first conductive structure 210, but also to transmit the patterns of a plurality of fourth conductive structures 240 and a plurality of fifth conductive structures 250. Therefore, while etching the first dielectric layer 201 with the first mask layer as a mask to form the first opening, a plurality of fourth openings and a plurality of fifth openings are also formed.

[0098] Thus, while planarizing the first conductive material layer to form the first conductive structure 210, a plurality of fourth conductive structures 240 are formed in a plurality of fourth openings, and a plurality of fifth conductive structures 250 are formed in a plurality of fifth openings.

[0099] In some other embodiments, the fourth conductive structure may be formed separately from the first conductive structure, and the fifth conductive structure may be formed separately from the first conductive structure.

[0100] Please continue to refer to this. Figure 5 and Figure 6 While forming the plug to be tested 300, a plurality of first plugs 310, a plurality of first connecting plugs 330, a plurality of second plugs 320, and a second connecting plug 340 are formed in the second dielectric layer 202.

[0101] In this embodiment, the test plug 300, the first plug 310, the first connecting plug 330, the several second plugs 320, and the second connecting plug 340 are made of the same material.

[0102] It should be noted that, since there are two first resistor structures in this embodiment, there are also two first connecting plugs 330. Similarly, since there are two second resistor structures in this embodiment, there are also two second connecting plugs 340.

[0103] In this embodiment, the method of forming a plurality of first plugs 310, a first connecting plug 330, a plurality of second plugs 320, and a second connecting plug 340 while forming the plug to be tested 300 includes: while forming the second opening, a plurality of first plug openings (not shown), a plurality of second plug openings (not shown), a first connecting plug opening (not shown), and a second connecting plug opening (not shown) are also formed in the second dielectric layer 202; while forming the second conductive material layer in the second opening, the second conductive material layer is also formed in the plurality of first plug openings, the plurality of second plug openings, the first connecting plug opening, and the second connecting plug opening.

[0104] Specifically, the second mask layer is used not only to transmit the pattern of the plug 300 to be tested, but also to transmit the patterns of a plurality of first plugs 310, a first connecting plug 330, a plurality of second plugs 320, and a second connecting plug 340.

[0105] Therefore, while etching the second dielectric layer 202 using the second mask layer as a mask to form the second opening, a plurality of first plug openings, a plurality of second plug openings, a first connecting plug opening and a second connecting plug opening are also formed.

[0106] Thus, while planarizing the second conductive material layer to form the plug to be tested 300, a plurality of first plugs 310 are formed in a plurality of first plug openings, a plurality of second plugs 320 are formed in a plurality of second plug openings, a first connecting plug 330 is formed in each first connecting plug opening, and a second connecting plug 340 is formed in each second connecting plug opening.

[0107] In this embodiment, the bottom of the two first connection plug openings exposes the surface of the first test end 210a and the surface of the second test end 210b, respectively.

[0108] Thus, the bottom surfaces of the two first connecting plugs 230 come into contact with the first test end 210a and the second test end 210b, respectively.

[0109] In this embodiment, the bottom of the first plug opening exposes the surface of the fourth conductive structure 240, the bottom of the second plug opening exposes the surface of the fifth conductive structure 250, and the bottom of each second connecting plug opening exposes one surface of the fifth conductive structure 250 adjacent to the first conductive structure 210.

[0110] Thus, the bottom surface of the first plug 310 contacts the top surface of the fourth conductive structure 240, the bottom surface of the second plug 320 contacts the top surface of the fifth conductive structure 250, and the bottom surface of each second connecting plug 340 contacts the top surface of the fifth conductive structure 250.

[0111] In some other embodiments, a plurality of first plugs, a first connecting plug, a plurality of second plugs, and a second connecting plug may be formed separately from the plug to be tested.

[0112] Please continue to refer to this. Figure 7 and Figure 8 While forming the second conductive structure 220, a plurality of third conductive structures 230 and a plurality of sixth conductive structures 260 are formed within the third dielectric layer 303. Thus, two first resistive structures R1 and two second resistive structures R2 are formed.

[0113] Since the first conductive structure 210, the second conductive structure 220, and the plug to be tested 300 are formed simultaneously, the first resistive structure R1 and the second resistive structure R2 are formed at the same time, the formation process of the test structure has fewer steps and lower complexity.

[0114] Specifically, the first resistive structure R1 and the second resistive structure R2 can be formed without additional etching, material filling, or other steps. Furthermore, the mask layers used to form the first resistive structure R1 and the second resistive structure R2 can be shared with the mask layers (first mask layer, second mask layer, and third mask layer) used to form the first conductive structure 210, the second conductive structure 220, and the plug under test 300. Therefore, the number of mask layers in forming the test structure is reduced, thereby further reducing the number of process steps and lowering the complexity of the test structure formation process.

[0115] The first resistor structure R1 includes a first terminal R1a (e.g., Figure 8 (as shown) and the second end R1b.

[0116] In this embodiment, the first terminal R1a of one of the two first resistor structures R1 is connected to the first test terminal 210a (e.g., Figure 3 and Figure 4 (As shown) connected, the first terminal R1a of the other of the two first resistor structures R1 is connected to the second test terminal 210b (as shown). Figure 3 and Figure 4 (As shown) connection.

[0117] The second resistor structure R2 includes a third terminal R2a and a fourth terminal R2b.

[0118] In this embodiment, the third terminal R2a of one of the two second resistor structures R2 is connected to the third test terminal 220a, and the third terminal R2a of the other two second resistor structures R2 is connected to the fourth test terminal 220b.

[0119] In this embodiment, the second terminal R1b of the first resistor structure R1 connected to the first test terminal 210a and the fourth terminal R2b of the second resistor structure R2 connected to the fourth test terminal 220b are used to electrically connect to the voltmeter.

[0120] Specifically, in the circuit formed by the voltmeter, the first resistor structure R1 connected to the first test terminal 210a and the second resistor structure R2 connected to the fourth test terminal 220b are connected in series.

[0121] In this embodiment, the second end R1b of the first resistor structure R1 connected to the second test terminal 210b and the fourth end R2b of the second resistor structure R2 connected to the third test terminal 220b are used to electrically connect to a power source, which is a constant current source.

[0122] Specifically, in the circuit formed by the power supply, the first resistor structure R1 connected to the second test terminal 210b and the second resistor structure R2 connected to the third test terminal 220b are connected in series.

[0123] The test structure is used to test the resistance of the plug under test 300 during wafer acceptance testing.

[0124] Since the first end R1a of one of the first resistor structures R1 is connected to the first test terminal 210a, and the third end R2a of one of the second resistor structures R2 is connected to the third test terminal 220a, when static electricity momentarily enters the circuit of the test structure, the voltage applied to the plug under test 300 can be shared by the first resistor structure R1 and the second resistor structure R2, preventing the plug under test 300 from being damaged by static electricity and improving the accuracy of wafer acceptance testing.

[0125] Furthermore, since there are two first resistor structures R1 and two second resistor structures R2, and the first end R1a of one of the two first resistor structures R1 is connected to the second test terminal 210b, and the third end R2a of the other of the two second resistor structures R2 is connected to the fourth test terminal 220b, the resistor structures (two first resistor structures R1 and two second resistor structures R2) connected to the first test terminal 210a, second test terminal 210b, third test terminal 220a, and fourth test terminal 220b constitute a relatively symmetrical structure. Therefore, on the one hand, the pattern uniformity of the test structure is increased, avoiding the formation of island structures. This improves the uniformity of the etching process during the planarization process of forming the test structure, effectively reducing the height differences across the surface of the structure after chemical mechanical polishing, thereby increasing the stability of the test structure. On the other hand, it helps to reduce the wiring complexity between each second end R1b and each fourth end R2b and the solder pads. This increases the process window and reduces the process difficulty.

[0126] In this embodiment, each first resistor structure R1 includes: a plurality of third conductive structures 230, a plurality of fourth conductive structures 240, a plurality of first plugs 310, and a first connection plug 330.

[0127] The resistance value of the first resistor structure R1 can be adjusted by adjusting the number of first plugs 310 in each first resistor structure R1 and the size of the first plugs 310 and the first connecting plugs 330.

[0128] Preferably, the resistance value of the first resistor structure R1 can be adjusted by adjusting the number of the first plugs 310 in each first resistor structure R1. As a result, the adjustment of the resistance value is less affected by the size limitations of the process node and the process difficulty is reduced.

[0129] Several third conductive structures 230 are located above several fourth conductive structures 240.

[0130] A plurality of first plugs 310 are located between a plurality of third conductive structures 230 and a plurality of fourth conductive structures 240, and the plurality of third conductive structures 230 and the plurality of fourth conductive structures 240 are connected end to end through the plurality of first plugs 310 to form a chain structure W1.

[0131] Specifically, the top surface of the first plug 310 is in contact with the bottom surface of the third conductive structure 230 connected to the first plug 310.

[0132] The first connecting plug 330 is located between the chain structure W1 and the first conductive structure 210.

[0133] Specifically, one end of the chain structure W1 is the second end R1b, one end of the first connecting plug 330 is the first end R1a, and the other end of the first connecting plug 330 is connected to the other end of the chain structure W1.

[0134] In this embodiment, each second resistor structure R2 includes: a plurality of fifth conductive structures 250, a plurality of sixth conductive structures 260, a plurality of second plugs 320, and a second connection plug 340.

[0135] The resistance value of the second resistor structure R2 can be adjusted by adjusting the number of second plugs 320 in each second resistor structure R2 and the size of the second plugs 320 and the second connecting plugs 340.

[0136] Preferably, the resistance value of the second resistor structure R2 can be adjusted by adjusting the number of the second plugs 320 in each second resistor structure R2. As a result, the adjustment of the resistance value is less affected by the size limitations of the process node and the process difficulty is reduced.

[0137] Several sixth conductive structures 260 are located above several fifth conductive structures 250.

[0138] A plurality of second plugs 320 are located between a plurality of fifth conductive structures 250 and a plurality of sixth conductive structures 260, and the plurality of fifth conductive structures 250 and the plurality of sixth conductive structures 260 are connected end to end through the plurality of second plugs 320 to form a chain structure W2.

[0139] Specifically, the top surface of the second plug 320 is in contact with the bottom surface of the sixth conductive structure 260 connected to the second plug 320.

[0140] The second connecting plug 340 is located between the chain structure W2 and the second conductive structure 220.

[0141] Specifically, one end of the chain structure W2 is the fourth end R2b, one end of the second connecting plug 340 is the third end R2a, and the other end of the second connecting plug 340 is connected to the other end of the chain structure W2.

[0142] In this embodiment, the third conductive structure 230 extends along the second direction Y, and the sixth conductive structure 260 extends along the second direction Y.

[0143] Since the extension directions of the third conductive structures 230 and the sixth conductive structures 260 are consistent with the extension direction of the second conductive structure 220, on the one hand, the situation where the pattern size generated by the shape with bends is smaller than the photolithography limit is avoided; on the other hand, during the exposure and etching process to transfer the pattern, since the smaller size exists only in one direction (the first direction X), the accuracy requirement for the size in the second direction Y is reduced. Thus, the process window is increased.

[0144] In this embodiment, the method of forming a plurality of third conductive structures 230 and a plurality of sixth conductive structures 260 while forming the second conductive structure 220 includes: while forming the third opening, forming a plurality of seventh openings (not shown) and a plurality of sixth openings (not shown) in the third dielectric layer 203; while forming the second conductive material layer in the third opening, forming the second conductive material layer in the plurality of seventh openings and the plurality of sixth openings.

[0145] Specifically, the third mask layer is used not only to transmit the pattern of the second conductive structure 220, but also to transmit the patterns of several third conductive structures 230 and several sixth conductive structures 260. Therefore, while etching the third dielectric layer 203 using the third mask layer as a mask to form the third opening, several seventh openings and several sixth openings are also formed.

[0146] The seventh opening provides space for forming the third conductive structure 230, and the sixth opening provides space for forming the sixth conductive structure 260.

[0147] Thus, while planarizing the second conductive material layer to form the second conductive structure 220, a plurality of third conductive structures 230 are formed in a plurality of seventh openings, and a plurality of sixth conductive structures 260 are formed in a plurality of sixth openings.

[0148] In this embodiment, the second conductive structure 220, the third conductive structure 230, and the sixth conductive structure 260 are made of the same material.

[0149] In some other embodiments, the third conductive structure may be formed separately from the second conductive structure, and the sixth conductive structure may be formed separately from the second conductive structure.

[0150] It should be noted that, for ease of understanding, Figure 7 The diagram also schematically shows the projection 311 of the first plug 310 on the surface of the substrate 200, the projection 331 of the first connecting plug 330 on the surface of the substrate 200, the projection 321 of the second plug 320 on the surface of the substrate 200, and the projection 341 of the second connecting plug 340 on the surface of the substrate 200.

[0151] In another embodiment, such as Figure 10 As shown, the number of first resistor structures R1 is one, and the number of second resistor structures R2 is one. Specifically, in another embodiment of the test structure formation method, the first resistor structure R1 connected to the second test terminal 210b and the second resistor structure R2 connected to the fourth test terminal 220b in this embodiment are not formed. The second test terminal 210b and the fourth terminal R2b of the second resistor structure R2 are used to electrically connect to a power supply, which is a constant current source. The fourth test terminal 220b and the second terminal R1b of the first resistor structure R1 are used to electrically connect to a voltmeter.

[0152] In another embodiment, the method of forming a plurality of first plugs, a first connecting plug, a plurality of second plugs, a second connecting plug, a plurality of third conductive structures, and a plurality of sixth conductive structures includes: while forming second openings and third openings using a damascus process, simultaneously forming a plurality of first plug openings, a plurality of second plug openings, a first connecting plug opening, a second connecting plug opening, a plurality of seventh openings located on the first connecting plug openings and the plurality of first plug openings, and a plurality of sixth openings located on the second connecting plug openings and the plurality of second plug openings using a damascus process within a fourth dielectric layer, wherein the plurality of seventh openings communicate with the first connecting plug openings and the plurality of first plug openings, and the plurality of sixth openings communicate with the second connecting plug openings and the plurality of second plug openings; within the second openings and third openings, While forming a fourth conductive material layer on the surface of the fourth dielectric layer, a fourth conductive material layer is also formed in a plurality of first plug openings, a plurality of second plug openings, a first connecting plug opening, a second connecting plug opening, a plurality of sixth openings, and a plurality of seventh openings; while planarizing the fourth conductive material layer until the surface of the fourth dielectric layer is exposed, a plug to be tested is formed in the second opening, and a second conductive structure is formed in the third opening, while a plurality of first plugs are formed in the plurality of first plug openings, a plurality of second plugs are formed in the plurality of second plug openings, a first connecting plug is formed in the first connecting plug opening, a second connecting plug is formed in the second connecting plug opening, a plurality of third conductive structures are formed in the plurality of seventh openings, and a plurality of sixth conductive structures are formed in the plurality of sixth openings.

[0153] Accordingly, one embodiment of the present invention also provides a test structure formed by the above method. Please refer to [further details]. Figure 7 and Figure 8 It includes: a first conductive structure 210, the first conductive structure 210 including a first test terminal 210a (e.g., Figure 3 and Figure 4 (as shown) and the second test terminal 210b (as shown) Figure 3 and Figure 4 (As shown); a second conductive structure 220, the second conductive structure 220 including a third test terminal 220a and a fourth test terminal 220b; a test plug 300 located between the first conductive structure 210 and the second conductive structure 220; a plurality of first resistor structures R1, the first resistor structure R1 including a first terminal R1a and a second terminal R2b, and the first terminal R1a of one of the plurality of first resistor structures R1 is connected to the first test terminal 210a; a plurality of second resistor structures R2, the second resistor structure R2 including a third terminal R2a and a fourth terminal R2b, and the third terminal R2a of one of the plurality of second resistor structures R2 is connected to the third test terminal 220a.

[0154] The test structure is used to test the resistance of the plug under test 300 during wafer acceptance testing.

[0155] Since the first end R1a of one of the first resistor structures R1 is connected to the first test terminal 210a, and the third end R2a of one of the second resistor structures R2 is connected to the third test terminal 220a, when static electricity momentarily enters the circuit of the test structure, the voltage applied to the plug under test 300 can be shared by the first resistor structure R1 and the second resistor structure R2, preventing the plug under test 300 from being damaged by static electricity and improving the accuracy of wafer acceptance testing.

[0156] In this embodiment, there are two first resistor structures R1 and two second resistor structures R2. The first end R1a of the other one of the two first resistor structures R1 is connected to the second test terminal 210b, and the third end R2a of the other one of the two second resistor structures R2 is connected to the fourth test terminal 220b.

[0157] Since there are two first resistor structures R1 and two second resistor structures R2, and the first end R1a of one of the two first resistor structures R1 is connected to the second test terminal 210b, and the third end R2a of the other of the two second resistor structures R2 is connected to the fourth test terminal 220b, the resistor structures (two first resistor structures R1 and two second resistor structures R2) connected to the first test terminal 210a, second test terminal 210b, third test terminal 220a, and fourth test terminal 220b constitute a relatively symmetrical structure. This increases the uniformity of the test structure pattern, avoids the formation of island structures, and improves the uniformity of the etching process during the planarization process of forming the test structure. It effectively reduces the height differences across the surface of the structure formed after chemical mechanical polishing, thereby increasing the stability of the test structure. Furthermore, it helps reduce the wiring complexity between each second end R1b and each fourth end R2b and the solder pads. This increases the process window and reduces the process difficulty.

[0158] In this embodiment, the second terminal R1b of the first resistor structure R1 connected to the first test terminal 210a and the fourth terminal R2b of the second resistor structure R2 connected to the fourth test terminal 220b are used to electrically connect to the voltmeter.

[0159] In this embodiment, the second end R1b of the first resistor structure R1 connected to the second test terminal 210b and the fourth end R2b of the second resistor structure R2 connected to the third test terminal 220b are used to electrically connect to a power source, which is a constant current source.

[0160] The first conductive structure 210 extends along the first direction X, and the second conductive structure 220 extends along the second direction Y. The second conductive structure 220 is located above the first conductive structure 210 and spans the first conductive structure 210. The first direction X and the second direction Y are perpendicular to each other.

[0161] In some other embodiments, the extension directions of the first conductive structure and the second conductive structure may not be perpendicular.

[0162] Specifically, the bottom surface of the plug under test 300 is in contact with the top surface of the first conductive structure 210, and the top surface of the plug under test 300 is in contact with the bottom surface of the second conductive structure 220.

[0163] In this embodiment, each first resistor structure R1 includes: a plurality of third conductive structures 230, a plurality of fourth conductive structures 240, and a plurality of first plugs 310 located between the plurality of third conductive structures 230 and the plurality of fourth conductive structures 240. The plurality of third conductive structures 230 and the plurality of fourth conductive structures 240 are connected end to end through the plurality of first plugs 310 to form a chain structure W1. One end of the chain structure W1 is the second end R1b. A first connecting plug 330 is located between the chain structure W1 and the first conductive structure 210. One end of the first connecting plug 330 is the first end R1a, and the other end of the first connecting plug 330 is connected to the other end of the chain structure W1.

[0164] Specifically, the fourth conductive structure 240 extends along the first direction X, the third conductive structure 230 extends along the second direction Y, and a plurality of third conductive structures 230 are located above a plurality of fourth conductive structures 240.

[0165] Specifically, the bottom surface of the first plug 310 is in contact with the top surface of the fourth conductive structure 240 connected to the first plug 310, and the top surface of the first plug 310 is in contact with the bottom surface of the third conductive structure 230 connected to the first plug 310.

[0166] In the first resistor structure R1, the target resistance value is mainly achieved through a number of first plugs 310 and first connecting plugs 330. By changing the number of first plugs 310, the size of the first plugs 310, and the size of the first connecting plugs 330 in the first resistor structure R1, the resistance value of the first resistor structure R1 can be adjusted.

[0167] It is important to understand that within each first resistor structure R1, the dimensions of each third conductive structure 230 can be the same or different. Similarly, the dimensions of each fourth conductive structure 240 can be the same or different. The dimensions of each first plug 310 can be the same or different. Furthermore, the number of first plugs 310 and the dimensions of first connecting plugs 330 in the two first resistor structures R1 can be the same or different. Specifically, the dimensions of each third conductive structure 230, each fourth conductive structure 240, each first plug 310, and each first connecting plug 330 are determined based on the layout design requirements and the resistance requirements of each first resistor structure R1 in actual operation.

[0168] Therefore, in this embodiment, the resistance values ​​of the two first resistor structures R1 can be the same or different.

[0169] In this embodiment, each second resistor structure R2 includes: a plurality of fifth conductive structures 250, a plurality of sixth conductive structures 260, and a plurality of second plugs 320 located between the plurality of fifth conductive structures 250 and the plurality of sixth conductive structures 260. The plurality of fifth conductive structures 250 and the plurality of sixth conductive structures 260 are connected end to end through the plurality of second plugs 320 to form a chain structure W2. One end of the chain structure W2 is the fourth end R2b. A second connecting plug 340 is located between the chain structure W2 and the second conductive structure 220. One end of the second connecting plug 340 is the third end R2a, and the other end of the second connecting plug 340 is connected to the other end of the chain structure W2.

[0170] Specifically, the fifth conductive structure 250 extends along the first direction X, the sixth conductive structure 260 extends along the second direction Y, and a plurality of sixth conductive structures 260 are located above a plurality of fifth conductive structures 250.

[0171] Specifically, the bottom surface of the second plug 320 is in contact with the top surface of the fifth conductive structure 250 connected to the second plug 320, and the top surface of the second plug 320 is in contact with the bottom surface of the sixth conductive structure 260 connected to the second plug 320.

[0172] In the second resistor structure R2, the target resistance value is mainly achieved through a number of second plugs 320 and a second connecting plug 340. By changing the number of second plugs 320, the size of the second plugs 320, and the size of the second connecting plug 340 in the second resistor structure R2, the resistance value of the second resistor structure R2 can be adjusted.

[0173] It is important to understand that within each second resistor structure R2, the dimensions of each fifth conductive structure 250 can be the same or different. Similarly, the dimensions of each sixth conductive structure 260 can be the same or different. The dimensions of each second plug 320 can be the same or different. Furthermore, the number of second plugs 320 and the dimensions of the second connecting plugs 340 in the two second resistor structures R2 can be the same or different. Specifically, the dimensions of each fifth conductive structure 250, each sixth conductive structure 260, each second plug 320 and its quantity, and each second connecting plug 340 are determined based on the layout design requirements and the actual resistance requirements of each second resistor structure R2 in practical operation.

[0174] Therefore, in this embodiment, the resistance values ​​of the two second resistor structures R2 can be the same or different.

[0175] The test method for the test structure is described below with reference to the accompanying drawings.

[0176] Figure 9 This is a test circuit diagram of a test structure according to an embodiment of the present invention.

[0177] Please refer to the reference. Figures 7 to 9 The second terminal R1b of the first resistor structure R1, which is connected to the first test terminal 210a, is connected to the negative terminal U of the voltmeter. - The fourth terminal R2b of the second resistor structure R2, which is connected to the fourth test terminal 220b, is connected to the positive terminal U of the voltmeter. + To form a loop to detect the voltage U across the test plug 300.

[0178] Specifically, in the circuit formed by the voltmeter, the first resistor structure R1 connected to the first test terminal 210a and the second resistor structure R2 connected to the fourth test terminal 220b are connected in series.

[0179] The internal resistance of the voltmeter is typically much greater than the sum of the resistances of the first resistor structure R1 and the second resistor structure R2 (in the circuit for detecting the voltage U across the test plug 300) in series. h1 Therefore, the first resistor structure R1 and the second resistor structure R2 in this circuit have minimal or no impact on the detection results.

[0180] In this embodiment, the voltmeter includes a digital voltmeter.

[0181] In this embodiment, the second terminal R1b of the first resistor structure R1, which is connected to the second test terminal 210b, is connected to the negative terminal I of the power supply. -The fourth terminal R2b of the second resistor structure R2, which is connected to the third test terminal 220b, is connected to the positive terminal I of the power supply. + This forms a circuit so that the plug under test 300 can carry a current I.

[0182] Specifically, in the circuit formed by the power supply, the first resistor structure R1 connected to the second test terminal 210b and the second resistor structure R2 connected to the third test terminal 220b are connected in series.

[0183] The power supply is a constant current source. Therefore, in the circuit that allows the plug under test 300 to pass current I, the first resistor structure R1 and the second resistor structure R2 will not affect the magnitude of the current I passing through the plug under test 300.

[0184] Therefore, the resistance Rc of the plug 300 to be tested can be obtained from Rc = U / I.

[0185] Meanwhile, in the event of instantaneous static electricity introduced when the wafer containing the test structure comes into contact with the WAT machine, when a voltmeter is connected to the test structure, or when a power supply is connected to the test structure, the voltage applied to the plug under test 300 can be divided because the first test terminal 210a is connected to the first resistor structure R1, the second test terminal 210b is connected to the second resistor structure R2, the third test terminal 220a is connected to the second resistor structure R2, and the fourth test terminal 220b is connected to the first resistor structure R1. This prevents the plug under test 300 from being damaged by static electricity.

[0186] It should be understood that, since the resistance values ​​of the two first resistor structures R1 in this embodiment can be the same or different, and the resistance values ​​of the two second resistor structures R2 can also be the same or different, the total resistance R of the first resistor structure R1 and the second resistor structure R2 connected in series in the circuit through which the plug under test 300 carries a current I is R. h2 The resistance value can be related to the total resistance R. h1 The resistance values ​​are the same, and the total resistance R is... h2 The resistance value can also be related to the total resistance R. h1 The resistance values ​​are different.

[0187] Preferably, in the circuit for detecting the voltage U across the test plug 300, the total resistance R of the first resistor structure R1 and the second resistor structure R2 connected in series is R. h1 Size ranges from 1000 ohms to 10000 ohms.

[0188] Specifically, the total resistance R h1 If the voltage is too small, it will be difficult to effectively divide the voltage applied to the test plug 300. The total resistance R... h1When it is too large, due to the total resistance R h1 If the resistance is no longer much smaller than the internal resistance of the voltmeter, it may affect the accuracy of the voltage U measured across the 300 plug under test. Therefore, choosing a suitable total resistance R is crucial. h1 That is, the total resistance R h1 When the value is between 1000 ohms and 10000 ohms, on the one hand, it can better divide the voltage applied to the plug under test 300, further preventing the plug under test 300 from being damaged by electrostatic discharge. On the other hand, it has little impact on the measurement accuracy of the voltage U across the plug under test 300, resulting in better accuracy of the test results.

[0189] Preferably, in the circuit through which the plug under test 300 passes current I, the sum of the resistances of the first resistor structure R1 and the second resistor structure R2 connected in series is R h2 Size ranges from 10,000 ohms to 100,000 ohms.

[0190] Specifically, the total resistance R h2 If the voltage is too small, it will be difficult to effectively divide the voltage applied to the test plug 300. The total resistance R... h2 If the voltage is too high, it will cause excessive voltage across the test plug 300 during testing, which may damage the test plug 300. Therefore, it is important to select a suitable total resistance R. h2 That is, the total resistance R h2 When the value is between 10,000 ohms and 100,000 ohms, on the one hand, it can better divide the voltage applied to the plug under test 300, further preventing the plug under test 300 from being damaged by electrostatic discharge. On the other hand, it reduces the risk of the plug under test 300 being damaged by excessive voltage across the plug under test 300 during the testing process.

[0191] Figure 10 This is a schematic diagram of the test structure according to another embodiment of the present invention.

[0192] Another embodiment of the present invention also provides a test structure, please refer to Figure 10 The system includes: a substrate 200; a first dielectric layer 201 located on the substrate 200; and a first conductive structure 210 located within the first dielectric layer 201, wherein the first dielectric layer 201 exposes the top surface of the first conductive structure 210, and the first conductive structure 210 includes a first test terminal 210a (e.g., ...). Figure 3 and Figure 4 (as shown) and the second test terminal 210b (as shown) Figure 3 and Figure 4(As shown); a second dielectric structure located on the surface of the first dielectric layer 201 and the first conductive structure 210; a test plug 300 and a second conductive structure 220 located within the second dielectric structure, the test plug 300 being located between the first conductive structure 210 and the second conductive structure 220, the test plug 300 being connected to the first conductive structure 210 and the second conductive structure 220, the second conductive structure 220 including a third test terminal 220a and a fourth test terminal 220b; a first resistor structure R1 located within the first dielectric layer 201 and the second dielectric structure, the first resistor structure R1 including a first terminal R1a and a second terminal R2b, the first terminal R1a being connected to the first test terminal 210a; a second resistor structure R2 located within the first dielectric layer 201 and the second dielectric structure, the second resistor structure R2 including a third terminal R2a and a fourth terminal R2b, the third terminal R2a being connected to the third test terminal 220a.

[0193] Since the first terminal R1a is connected to the first test terminal 210a and the third terminal R2a is connected to the third test terminal 220a, when static electricity momentarily enters the circuit of the test structure, the voltage applied to the plug under test 300 can be shared by the first resistor structure R1 and the second resistor structure R2, preventing the plug under test 300 from being damaged by static electricity and improving the accuracy of wafer acceptance testing.

[0194] In this embodiment, the substrate 200 includes a device layer (not shown in the figure), a conductive layer (not shown in the figure), and an interlayer dielectric layer (not shown in the figure) surrounding the device layer and the conductive layer. The device layer includes several device structures (not shown in the figure). The device structures include one or more combinations of transistors, diodes, triodes, capacitors, inductors, and conductive structures.

[0195] In this embodiment, the second dielectric layer 202 and the third dielectric layer 203 constitute the second dielectric structure.

[0196] In yet another embodiment, the second dielectric structure is a single-layer fourth dielectric layer.

[0197] For a detailed explanation of the terms 210 (first conductive structure), 220 (second conductive structure), and 300 (test plug) in this embodiment, please refer to [link / reference needed]. Figures 3 to 9 The relevant descriptions in the illustrated embodiments will not be repeated here.

[0198] In this embodiment, the fourth test terminal 220b and the second terminal R1b are used to electrically connect to a voltmeter.

[0199] In this embodiment, the second test terminal 210b and the fourth terminal R2b are used to electrically connect to a power source, which is a constant current source.

[0200] In this embodiment, each first resistor structure R1 includes: a plurality of third conductive structures 230, a plurality of fourth conductive structures 240, a plurality of first plugs 310, and a first connection plug 330.

[0201] Specifically, for the explanations of the terms "certain third conductive structures 230", "certain fourth conductive structures 240", "certain first plugs 310", and "first connecting plugs 330" in each first resistor structure R1 of this embodiment, please refer to... Figures 3 to 9 The relevant descriptions in the illustrated embodiments will not be repeated here.

[0202] In this embodiment, each second resistor structure R2 includes: a plurality of fifth conductive structures 250, a plurality of sixth conductive structures 260, a plurality of second plugs 320, and a second connection plug 340.

[0203] Specifically, for the explanations of the terms for the plurality of fifth conductive structures 250, the plurality of sixth conductive structures 260, the plurality of second plugs 320, and the second connecting plug 340 in each of the second resistor structures R2 in this embodiment, please refer to... Figures 3 to 9 The relevant descriptions in the illustrated embodiments will not be repeated here.

[0204] The test method for the test structure is described below with reference to the accompanying drawings.

[0205] Figure 11 This is a test circuit diagram of a test structure according to another embodiment of the present invention.

[0206] Please refer to the reference. Figure 10 and Figure 11 The second terminal R1b is connected to the negative terminal U of the voltmeter. - The fourth test terminal 220b is connected to the positive terminal U of the voltmeter. + To form a loop to detect the voltage U across the test plug 300.

[0207] The internal resistance of the voltmeter is usually much greater than the resistance of the first resistor structure R1. Therefore, the first resistor structure R1 in this circuit has little or no effect on the detection result.

[0208] In this embodiment, the voltmeter includes a digital voltmeter.

[0209] Please continue to refer to this. Figure 10 and Figure 11 The second test terminal 210b is connected to the negative terminal I of the power supply. - The fourth terminal R2b is connected to the positive terminal I of the power supply. + This forms a circuit so that the plug under test 300 can carry a current I.

[0210] The power supply is a constant current source. Therefore, the second resistor structure R2 in the circuit that allows the current I to pass through the plug under test 300 will not affect the magnitude of the current I passing through the plug under test 300.

[0211] Therefore, the resistance Rc of the plug to be tested (300Ω) can be obtained from Rc = U / I.

[0212] Meanwhile, in the event of instantaneous static electricity introduced when the wafer containing the test structure comes into contact with the WAT machine, when the voltmeter is connected to the test structure, or when the power supply is connected to the test structure, since the first test terminal 210a is connected to the first resistor structure R1 and the second test terminal 210b is connected to the second resistor structure R2, the voltage applied to the plug under test 300 can be divided, thereby preventing the plug under test 300 from being damaged by static electricity.

[0213] In this embodiment, the resistance of the first resistor structure R1 is 1000 ohms to 10000 ohms.

[0214] Specifically, if the resistance of the first resistor structure R1 is too small, it will be difficult to effectively divide the voltage applied to the test plug 300. If the resistance of the first resistor structure R1 is too large, since the resistance of the first resistor structure R1 is no longer much smaller than the internal resistance of the voltmeter, it may affect the measurement accuracy of the voltage U across the test plug 300. Therefore, choosing a suitable resistance value for the first resistor structure R1, i.e., a resistance value of 1000 ohms to 10000 ohms, will, on the one hand, enable better voltage division of the voltage applied to the test plug 300, further preventing the risk of electrostatic damage to the test plug 300; on the other hand, minimize the impact on the measurement accuracy of the voltage U across the test plug 300, resulting in better accuracy of the detection results.

[0215] In this embodiment, the resistance of the second resistor structure R2 is 10,000 ohms to 100,000 ohms.

[0216] Specifically, if the resistance of the second resistor structure R2 is too small, it will be difficult to effectively divide the voltage applied to the test plug 300. If the resistance of the second resistor structure R2 is too large, the voltage across the test plug 300 will be too high during the test, which may easily damage the test plug 300. Therefore, choosing a suitable resistance value for the second resistor structure R2, i.e., a resistance value of 10,000 ohms to 100,000 ohms, will, on the one hand, enable better voltage division of the voltage applied to the test plug 300, further preventing the risk of electrostatic damage to the test plug 300, and on the other hand, reduce the risk of damage to the test plug 300 due to excessive voltage across the test plug 300 during the testing process.

[0217] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.

Claims

1. A test structure, characterized in that, include: Substrate; The first dielectric layer located on the substrate; A first conductive structure located within a first dielectric layer, wherein the first dielectric layer exposes the top surface of the first conductive structure, and the first conductive structure includes a first test terminal and a second test terminal. A second dielectric structure located on the surface of the first dielectric layer and the first conductive structure; A test plug and a second conductive structure are located within a second dielectric structure. The test plug is located between a first conductive structure and a second conductive structure. The test plug is connected to the first conductive structure and the second conductive structure. The second conductive structure includes a third test terminal and a fourth test terminal. A plurality of first resistor structures are located within the first dielectric layer and the second dielectric structure. Each first resistor structure includes a first end and a second end, and the first end of one of the plurality of first resistor structures is connected to the first test end. A plurality of second resistor structures are located within the first dielectric layer and the second dielectric structure. Each second resistor structure includes a third terminal and a fourth terminal, and the third terminal of one of the plurality of second resistor structures is connected to the third test terminal.

2. The test structure as described in claim 1, characterized in that, The first conductive structure extends along a first direction, the second conductive structure extends along a second direction, the second conductive structure is located above the first conductive structure and spans the first conductive structure, and the first direction and the second direction are perpendicular to each other.

3. The test structure as described in claim 1, characterized in that, Each first resistor structure includes: a plurality of third conductive structures, a plurality of fourth conductive structures, and a plurality of first plugs located between the plurality of third conductive structures and the plurality of fourth conductive structures. The plurality of third conductive structures and the plurality of fourth conductive structures are connected end to end through the plurality of first plugs to form a chain structure, one end of the chain structure being the second end; a first connecting plug is located between the chain structure and the first conductive structure, one end of the first connecting plug being the first end, and the other end of the first connecting plug being connected to the other end of the chain structure.

4. The test structure as described in claim 3, characterized in that, The fourth conductive structure extends along the first direction, the third conductive structure extends along the second direction, and a plurality of third conductive structures are located above a plurality of fourth conductive structures, wherein the first direction and the second direction are perpendicular to each other.

5. The test structure as described in claim 3, characterized in that, The fourth test terminal and the second terminal are used for electrical connection of the voltmeter.

6. The test structure as described in claim 1, characterized in that, Each second resistor structure includes: a plurality of fifth conductive structures, a plurality of sixth conductive structures, and a plurality of second plugs located between the plurality of fifth conductive structures and the plurality of sixth conductive structures. The plurality of fifth conductive structures and the plurality of sixth conductive structures are connected end to end through the plurality of second plugs to form a chain structure, one end of the chain structure being the fourth end; a second connecting plug is located between the chain structure and the second conductive structure, one end of the second connecting plug being the third end, and the other end of the second connecting plug being connected to the other end of the chain structure.

7. The test structure as described in claim 6, characterized in that, The fifth conductive structure extends along a first direction, the sixth conductive structure extends along a second direction, and a plurality of sixth conductive structures are located above a plurality of fifth conductive structures, wherein the first direction and the second direction are perpendicular to each other.

8. The test structure as described in claim 6, characterized in that, The second test terminal and the fourth terminal are used to electrically connect to a power source, which is a constant current source.

9. The test structure as described in claim 1, characterized in that, The number of first resistor structures is two, the number of second resistor structures is two, and the first end of the other first resistor structure is connected to the second test terminal, and the third end of the other second resistor structure is connected to the fourth test terminal.

10. The test structure as described in claim 9, characterized in that, The second end of the first resistor structure connected to the first test terminal and the fourth end of the second resistor structure connected to the fourth test terminal are used to electrically connect to a voltmeter, and the second end of the first resistor structure connected to the second test terminal and the fourth end of the second resistor structure connected to the third test terminal are used to electrically connect to a power supply, wherein the power supply is a constant current source.

11. The test structure as described in claim 10, characterized in that, A first resistor structure connected to the first test terminal and a second resistor structure connected to the fourth test terminal are connected in series, and the total resistance of the first and second resistor structures connected in series is 1000 ohms to 10000 ohms.

12. The test structure as described in claim 10, characterized in that, The first resistor structure connected to the second test terminal and the second resistor structure connected to the third test terminal are connected in series, and the total resistance of the first resistor structure and the second resistor structure connected in series is 10,000 ohms to 100,000 ohms.

13. The method for forming the test structure as described in claim 1, characterized in that, include: Provide substrate; A first dielectric layer is formed on the substrate; A first conductive structure is formed within the first dielectric layer, the first dielectric layer exposes the top surface of the first conductive structure, and the first conductive structure includes a first test terminal and a second test terminal; A second dielectric structure is formed on the surface of a first dielectric layer and a first conductive structure, and a test plug and a second conductive structure are formed within the second dielectric structure. The test plug is located between the first conductive structure and the second conductive structure, and the test plug connects the first conductive structure and the second conductive structure. The second conductive structure includes a third test terminal and a fourth test terminal. A plurality of first resistor structures are formed within the first dielectric layer and the second dielectric structure. Each first resistor structure includes a first end and a second end, and the first end of one of the plurality of first resistor structures is connected to the first test end. A plurality of second resistor structures are formed within the first dielectric layer and the second dielectric structure. Each second resistor structure includes a third terminal and a fourth terminal, and the third terminal of one of the plurality of second resistor structures is connected to the third test terminal.

14. The method for forming the test structure as described in claim 13, characterized in that, Each first resistor structure includes: a plurality of third conductive structures, a plurality of fourth conductive structures, and a plurality of first plugs located between the plurality of third conductive structures and the plurality of fourth conductive structures. The plurality of third conductive structures and the plurality of fourth conductive structures are connected end to end through the plurality of first plugs to form a chain structure, one end of the chain structure being the second end; a first connecting plug is located between the chain structure and the first conductive structure, one end of the first connecting plug being the first end, and the other end of the first connecting plug being connected to the other end of the chain structure.

15. The method for forming the test structure as described in claim 14, characterized in that, The method of forming a plurality of first resistive structures includes: forming the fourth conductive structure while forming the first conductive structure; forming the first plug and the first connecting plug while forming the plug to be tested; and forming the third conductive structure while forming the second conductive structure.

16. The method for forming the test structure as described in claim 13, characterized in that, Each second resistor structure includes: a plurality of fifth conductive structures, a plurality of sixth conductive structures, and a plurality of second plugs located between the plurality of fifth conductive structures and the plurality of sixth conductive structures. The plurality of fifth conductive structures and the plurality of sixth conductive structures are connected end to end through the plurality of second plugs to form a chain structure, one end of the chain structure being the fourth end; a second connecting plug is located between the chain structure and the second conductive structure, one end of the second connecting plug being the third end, and the other end of the second connecting plug being connected to the other end of the chain structure.

17. The method for forming the test structure as described in claim 16, characterized in that, A method for forming a plurality of second resistive structures includes: forming the fifth conductive structure while forming the first conductive structure; forming the second plug and the second connection plug while forming the plug to be tested; and forming the sixth conductive structure while forming the second conductive structure.

18. The method for forming the test structure as described in claim 13, characterized in that, The method for forming the first conductive structure includes: forming a first opening extending in a first direction on the first dielectric layer; and forming the first conductive structure within the first opening.

19. The method for forming the test structure as described in claim 18, characterized in that, The method for forming the plug to be tested includes: forming a second dielectric layer on the surface of the first dielectric layer and the first conductive structure; forming a second opening in the second dielectric layer, the bottom of the second opening exposing the top surface of the first conductive structure; and forming the plug to be tested in the second opening.

20. The method for forming the test structure as described in claim 19, characterized in that, The method for forming the second conductive structure includes: forming a third dielectric layer on the second dielectric layer and the surface of the plug to be tested, the second dielectric layer and the third dielectric layer constituting the second dielectric structure; forming a third opening extending along a second direction in the third dielectric layer, the bottom of the third opening exposing the surface of the plug to be tested; the projection of the third opening onto the substrate surface passing through the projection of the first conductive structure onto the substrate surface, the first direction being perpendicular to the second direction; and forming the second conductive structure within the third opening.

21. The method for forming the test structure as described in claim 18, characterized in that, The method for forming the plug to be tested and the second conductive structure includes: using a damascus process to form a second opening and a third opening on the second opening within the second dielectric structure, wherein the second opening exposes the top surface of the first conductive structure and the second opening is connected to the third opening; after forming the second opening and the third opening, a plug to be tested is formed within the second opening, and a second conductive structure is formed within the third opening.

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