Light emitting diode and light emitting device
By incorporating vias and insulating layers into the LED chip, increasing the pad area, and optimizing electrical connections, the problems of insufficient heat dissipation and current driving capability caused by planarization design are solved, resulting in more efficient heat dissipation and photoelectric performance.
Patent Information
- Application Number
- CN202211206040.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-09-30
- Publication Date
- 2026-02-10
- Estimated Expiration
- 2042-09-30
AI Technical Summary
The planarization design of existing LED chips results in a reduction in the surface pad area, affecting heat dissipation and high current driving capacity, and failing to meet the requirements of low-voltage applications.
Through-holes and insulating layers are set in the LED chip, first and second pads are designed to increase the pad area ratio, and the current spreading capability and current distribution uniformity are improved by multiple uniformly distributed through-holes. A transparent conductive layer and a metal layer are combined to optimize the electrical connection.
It improves the heat dissipation and photoelectric performance of LED chips, meets the requirements of lower voltage applications, and enhances current expansion capability and luminous efficiency.
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Figure CN115939298B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of semiconductor manufacturing technology, and in particular to a light-emitting diode and a light-emitting device. Background Technology
[0002] Light-emitting diodes (LEDs) are widely used in automotive, backlighting, plant lighting, and high-power lighting applications due to their advantages such as low cost, high luminous efficiency, and energy saving. Because of requirements such as high drive current, high heat dissipation, low chip internal resistance, or high reflectivity in the yellow / red light band, Ag, the metal with the highest reflectivity, is typically used as the main material for the metal reflective layer.
[0003] Traditional LED chips employ a planar design, where the surface pads have a large contact area with the insulating layer. During subsequent encapsulation and reflow soldering, substrate warping can cause the surface pads to break or separate from the insulating layer, leading to short circuits due to interconnections between metal layers of different polarities. Current solutions involve planarizing the LED chip by separating the P-type and N-type electrodes and creating vias extending from the P-type to the N-type layer in localized areas of the epitaxial structure. This places the surface pads of the P-type and N-type electrodes on the same horizontal plane, preventing substrate warping that could cause insulation layer breakage, resulting in leakage or dead LEDs. However, to meet the planarization requirements and ensure the flatness of the surface pads, the pads are often placed away from vias, reducing their area. This directly impacts the LED chip's heat dissipation and high-current driving capability, failing to meet the requirements of low-voltage LED applications.
[0004] Therefore, how to provide a light-emitting diode that can further improve the photoelectric performance and heat dissipation capability of LED chips and meet the requirements of lower voltage applications has become an urgent problem to be solved in this field. Summary of the Invention
[0005] The purpose of this application is to provide a light-emitting diode and a light-emitting device that can further improve the photoelectric performance and heat dissipation capability of the light-emitting diode and meet the requirements of lower voltage applications.
[0006] In a first aspect, this application provides a light-emitting diode, which includes:
[0007] A semiconductor stack, comprising a first semiconductor layer, a light-emitting layer, and a second semiconductor layer stacked sequentially;
[0008] A via, passing through the second semiconductor layer and the light-emitting layer, exposes a portion of the surface of the first semiconductor layer;
[0009] A first insulating layer is disposed on the semiconductor stack and includes a first insulating portion and a second insulating portion; the first insulating portion surrounds the second insulating portion and is spaced apart by an annular second opening; the first insulating portion further includes a first opening.
[0010] A first pad and a second pad, wherein the first pad is located on the first insulating portion and contacts the first semiconductor layer through the first opening; the second pad is located on the second insulating portion and extends into the second opening to be electrically connected to the second semiconductor layer, and the second pad does not overlap with the vertical projection of the first insulating portion on the semiconductor stack.
[0011] In one possible real-time configuration, the light-emitting diode further includes a metal layer comprising a reflective layer and a blocking layer. The reflective layer is disposed on the second semiconductor layer, and the blocking layer covers the reflective layer. A first insulating layer covers the blocking layer and exposes a portion of the blocking layer at a second opening. The second pad is electrically connected to the blocking layer through the second opening.
[0012] In one possible real-time implementation, the light-emitting diode further includes a second insulating layer that covers the edges and part of the surface of the semiconductor stack and is located between the second semiconductor layer and the reflective layer, having a plurality of discontinuous third openings through which the reflective layer is electrically connected to the second semiconductor layer.
[0013] In one possible real-time implementation, the light-emitting diode further includes a second insulating layer formed only on the upper surface of the semiconductor stack and located between the second semiconductor layer and the reflective layer, having a plurality of discontinuous third openings through which the reflective layer is electrically connected to the second semiconductor layer.
[0014] In one possible real-time implementation, the light-emitting diode further includes a transparent conductive layer located between the second semiconductor layer and the second insulating layer.
[0015] In one possible real-time configuration, the vertical projected area of the transparent conductive layer is larger than the vertical projected area of the reflective layer.
[0016] In one possible real-time configuration, the transparent conductive layer, the reflective layer, and the blocking layer are all located within the vertical projection plane of the second semiconductor layer.
[0017] In one possible real-time configuration, the light-emitting diode includes two first pads, with a second pad located between the two symmetrically distributed first pads.
[0018] In one possible real-time configuration, the second insulating portion is located at the center of the light-emitting diode, and the second pad covers the second insulating portion.
[0019] In one possible real-time configuration, the minimum spacing of the second opening ranges from 15 μm to 25 μm.
[0020] In one possible real-time configuration, the minimum distance between the first pad and the second pad is between 30 μm and 100 μm.
[0021] In one possible real-time configuration, the second opening has an outer edge near the first insulating portion and an inner edge near the second insulating portion, wherein the minimum distance between the first pad and the outer edge is between 5 μm and 15 μm, and the minimum distance between the second pad and the inner edge is between 5 μm and 15 μm.
[0022] In one possible real-time configuration, the ratio of the total vertical projection area of the first pad and the second pad covering the vertical projection area of the LED is greater than 70%.
[0023] In one possible real-time implementation, the reflective layer comprises a silver metal reflective layer.
[0024] Secondly, this application also provides a light-emitting diode, which includes:
[0025] A semiconductor stack, comprising a first semiconductor layer, a light-emitting layer, and a second semiconductor layer stacked sequentially;
[0026] A via is provided, passing through the second semiconductor layer and the light-emitting layer, to expose a portion of the surface of the first semiconductor layer; the semiconductor stack may include a first region, a second region, and a third region, the via being distributed in the first region and the third region, and the second region being located between the first region and the third region;
[0027] First pad and second pad, the first pad is electrically contacted with the first semiconductor layer, and the second pad is electrically contacted with the second semiconductor layer;
[0028] Wherein, the first pad overlaps with the vertical projection of the first region and the third region on the semiconductor stack, and the second pad overlaps with the projection of the second region on the semiconductor stack.
[0029] In one possible real-time configuration, the light-emitting diode includes two first pads, with a second pad located between the two symmetrically distributed first pads.
[0030] In one possible real-time solution, the number of through holes is multiple, and they are distributed in the first and third regions at preset intervals.
[0031] In one possible real-time implementation, the number of vias on the light-emitting diode is no less than 20 per mm. 2 .
[0032] Thirdly, this application also provides a light-emitting diode, comprising:
[0033] A semiconductor stack, comprising a first semiconductor layer, a light-emitting layer, and a second semiconductor layer stacked sequentially;
[0034] A via, passing through the second semiconductor layer and the light-emitting layer, exposes a portion of the surface of the first semiconductor layer;
[0035] A metal layer, located above the second semiconductor layer, wherein the metal layer comprises silver;
[0036] A first insulating layer is located on the semiconductor stack and covers the metal layer. The first insulating layer has a first opening to expose a portion of the surface of the first semiconductor layer and a second opening to expose a portion of the surface of the metal layer.
[0037] The first pad and the second pad are in direct contact with the first semiconductor layer through the first opening, and the second pad is in direct contact with the metal layer through the second opening. In the vertical projection direction on the semiconductor stack, the projected area of the metal layer is larger than the projected area of the first pad and the projected area of the second pad, respectively.
[0038] In one possible real-time configuration, the metal layer includes a reflective layer and a barrier layer. The reflective layer is disposed on the second semiconductor layer, and the barrier layer covers the reflective layer. The first insulating layer covers the barrier layer and exposes a portion of the barrier layer at the second opening. The second pad is electrically connected to the barrier layer through the second opening.
[0039] In one possible real-time implementation, the light-emitting diode further includes a second insulating layer that covers the edges and part of the surface of the semiconductor stack and is located between the second semiconductor layer and the reflective layer, having a plurality of discontinuous third openings through which the reflective layer is electrically connected to the second semiconductor layer.
[0040] In one possible real-time implementation, the light-emitting diode further includes a transparent conductive layer located between the second semiconductor layer and the second insulating layer.
[0041] Fourthly, another light-emitting diode according to this application is characterized by comprising:
[0042] A semiconductor stack, comprising a first semiconductor layer, a light-emitting layer, and a second semiconductor layer stacked sequentially;
[0043] A first insulating layer is located on the semiconductor stack, and the first insulating layer has a first opening and a second opening;
[0044] First pad and second pad, the first pad is in contact with the first semiconductor layer through the first opening, and the second pad is electrically connected to the second semiconductor layer through the second opening;
[0045] Wherein, the ratio of the total vertical projection area of the first pad and the second pad covering the vertical projection area of the light-emitting diode is greater than 70%, and the area of the first pad is greater than or equal to twice the area of the second pad.
[0046] In one possible real-time configuration, the minimum distance between the first pad and the second pad is between 30 μm and 100 μm.
[0047] In one possible real-time configuration, the minimum spacing of the second opening ranges from 15 μm to 25 μm.
[0048] Fifthly, this application also provides a light-emitting device, characterized in that it comprises:
[0049] Multiple light-emitting diodes, including a first pad and a second pad;
[0050] The packaging substrate includes a plurality of first electrode pads and second electrode pads, wherein the number of first electrode pads is twice the number of second electrode pads; the first electrode pads are bonded to first pads, and the second electrode pads are bonded to second pads;
[0051] Wherein, the light-emitting diode is a light-emitting diode including any one of the above-mentioned light-emitting diodes.
[0052] In one possible real-time configuration, the minimum distance between the first electrode pad and the second electrode pad is between 30 μm and 100 μm.
[0053] Compared with the prior art, the beneficial effects of this application are at least as follows:
[0054] This application provides a light-emitting diode and a light-emitting device, including a semiconductor stack, a via disposed on the semiconductor stack, a first insulating layer, and a first pad and a second pad disposed on the first insulating layer. The semiconductor stack includes a first semiconductor layer, a light-emitting layer, and a second semiconductor layer. The first insulating layer includes a first opening and a second opening. The first pad is electrically connected to the first semiconductor layer through the first opening and the bottom of the via. The second pad is electrically connected to the second semiconductor layer through the second opening, without having to avoid the via location. This increases the area ratio of the first pad and the second pad on the light-emitting diode, improves the contact area between the first pad and the second pad and the packaging substrate during subsequent packaging, and enhances the heat dissipation capability of the light-emitting diode.
[0055] This application provides a light-emitting diode and a light-emitting device. The first insulating layer is divided into a first insulating part and a second insulating part through a second opening. The second insulating part is located at the center of the light-emitting diode. The second pad covers the second insulating part, so that the second pad can not only play the role of current injection, but also play the role of preventing pins.
[0056] This application provides a light-emitting diode and a light-emitting device. By setting multiple uniformly distributed through holes, the current expansion capability and the uniformity of current distribution can be further improved. At the same time, the contact area between the first pad and the first semiconductor layer is increased, thereby reducing the voltage and improving the luminous efficiency of the light-emitting diode. Attached Figure Description
[0057] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.
[0058] Figure 1 This is a top view schematic diagram of a light-emitting diode according to an embodiment of this application.
[0059] Figure 2 This is a schematic cross-sectional view of a light-emitting diode according to an embodiment of this application.
[0060] Figures 3 to 17 This is a schematic diagram illustrating a light-emitting diode fabrication process according to an embodiment of this application.
[0061] Figure 18 This is a schematic cross-sectional view of a light-emitting diode according to the prior art.
[0062] Illustration:
[0063] 100 Semiconductor substrate; 110 Semiconductor stack; 110a Through-hole; 111 First semiconductor layer; 112 Light-emitting layer; 113 Second semiconductor layer; 120 First insulating layer; 121 First insulating portion; 122 Second insulating portion; 1201 Outer edge; 1202 Inner edge; 131 First pad; 132 Second pad; 140 Reflective layer; 150 Barrier layer; 160 Second insulating layer; 170 Transparent conductive layer; 210 First region; 220 Second region; 230 Third region; OP1 First opening; OP2 Second opening; OP3 Third opening. Detailed Implementation
[0064] The following specific embodiments illustrate the implementation of this application. Those skilled in the art can easily understand other advantages and effects of this application from the content disclosed in this specification. This application can also be implemented or operated through other different specific embodiments, and various details in this application can also be modified or changed based on different viewpoints and applications without departing from the spirit of this application.
[0065] In the description of this application, it should be noted that, unless otherwise expressly specified and limited, the term "connection" should be interpreted broadly. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium; it can be a connection within two components. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances. Furthermore, the terms "first" and "second," etc., are used only for distinguishing descriptions and should not be construed as indicating or implying relative importance.
[0066] According to one aspect of this application, a light-emitting diode (LED) is provided. See also... Figure 1 and Figure 2 , Figure 1 This is a top view schematic diagram of the light-emitting diode structure provided in an embodiment of this application. Figure 2 It is along Figure 1 A schematic diagram of the cross section cut by the intercept line AA.
[0067] See Figure 2 The light-emitting diode provided in this application embodiment includes: a semiconductor substrate 100, a semiconductor stack 110 disposed on the semiconductor substrate 100, a through hole 110a and a first insulating layer 120 disposed on the semiconductor stack 110, and a first pad 131 and a second pad 132 disposed on the first insulating layer 120.
[0068] The semiconductor stack 110 includes a first semiconductor layer 111, a light-emitting layer 112, and a second semiconductor layer 113 stacked sequentially from bottom to top. The via 110a is a hole structure that extends downward from the surface of the second semiconductor layer 113 and penetrates the light-emitting layer 112 until a portion of the surface of the first semiconductor layer 111 is exposed.
[0069] A first insulating layer 120 is disposed on the upper surface of the semiconductor stack 110, the edge steps of the semiconductor stack 110, and a portion of the surface of the semiconductor substrate 100 near the semiconductor stack 110. The first insulating layer 120 includes a first insulating portion 121 and a second insulating portion 122. The first insulating portion 121 surrounds the second insulating portion 122 and is spaced apart by an annular second opening OP2. The first insulating portion 121 also includes a first opening OP1 disposed at the center of the through hole 110a, exposing a portion of the surface of the first semiconductor layer 111.
[0070] The first pad 131 is located on the first insulating portion 121 and contacts the first semiconductor layer 111 through the first opening OP1. The second pad 132 is located on the second insulating portion 122 and extends into the second opening OP2 to be electrically connected to the second semiconductor layer 113. The vertical projections of the second pad 132 and the first insulating portion 121 on the semiconductor stack 110 do not overlap to avoid short circuit between the second pad 132 and the first pad 131. At the same time, the second pad 132 and the first pad 131 maintain a preset gap to reserve space for subsequent packaging.
[0071] In one embodiment, the semiconductor substrate 100 serves as the growth substrate for the semiconductor stack 110 and can be a conductive material, insulating material, or light-transmitting material with excellent thermal conductivity, such as any one of sapphire substrate, silicon carbide substrate, gallium nitride substrate, zinc oxide substrate, silicon substrate, gallium arsenide substrate, or gallium phosphide substrate, wherein sapphire substrate is the preferred substrate material for growing the semiconductor stack 110.
[0072] Preferably, the semiconductor substrate 100 can also be removed in subsequent processes using a separation process. For example, the semiconductor substrate 100 can be removed using laser lift-off (LLO) or chemical lift-off (CLO).
[0073] See Figure 3 and Figure 4In one embodiment, the semiconductor stack 110 can be formed on the semiconductor substrate 100 using methods including metal-organic chemical vapor deposition (MOCVD), hydride vapor phase epitaxy (HVPE), and molecular beam epitaxy (MBE). The first semiconductor layer 111, the light-emitting layer 112, and the second semiconductor layer 113 are formed from group III gallium nitride (GaN) compound semiconductors, such as GaN, AlN, InGaN, AlGaN, InAlGaN, and at least one of these groups. The first semiconductor layer 111, connected to the semiconductor substrate 100, can be an N-type doped semiconductor layer, such as Si, Ge, Se, Te, C, etc., dopants used to provide electrons. The second semiconductor layer 113 can be a P-type doped semiconductor layer, such as Mg, Zn, Be, Ca, Sr, Ba, etc., dopants used to provide holes. The light-emitting layer 112 is located between the first semiconductor layer 111 and the second semiconductor layer 113. It is a layer that recombines the electrons provided by the first semiconductor layer 111 and the holes provided by the second semiconductor layer 113 and outputs light of a constant wavelength. It can be composed of alternating stacked potential well layers and potential barrier layers, or a semiconductor thin film with a multilayer quantum well structure.
[0074] When no voltage is applied to the LED, a PN junction with a high potential barrier is formed between the first semiconductor layer 111 and the second semiconductor layer 113. This barrier prevents electrons in the first semiconductor layer 111 from diffusing into the second semiconductor layer 113, and similarly prevents holes in the second semiconductor layer 113 from diffusing into the first semiconductor layer 111. When a forward bias voltage, i.e., the operating voltage, is applied to the LED, the potential barrier of the PN junction formed by the first semiconductor layer 111 and the second semiconductor layer 113 decreases. Electrons in the first semiconductor layer 111 and holes in the second semiconductor layer 113 migrate and diffuse towards each other. Electrons and holes recombine in the light-emitting layer 112 and release energy in the form of light, thus enabling the LED to emit light.
[0075] In one embodiment, the number of vias 110a includes multiple vias, and their shapes include, but are not limited to, polygons such as circles, rectangles, or hexagons, and they can be distributed in a uniform or non-uniform spacing manner. In this embodiment, the vias 110a are circular in shape and are distributed on the light-emitting diode at constant intervals. After power is applied, the externally injected current passes through the first pad 131 and is electrically connected to the first semiconductor layer 111 within the vias 110a. The multiple uniformly distributed vias 110a can improve the current spread capability and the uniformity of current distribution, and also increase the contact area between the first pad 131 and the first semiconductor layer 111, thereby reducing the voltage and improving the luminous efficiency of the light-emitting diode.
[0076] Preferably, the number of vias 110a within the light-emitting diode is not less than 20 per mm. 2 By setting multiple uniformly distributed vias 110 to increase the contact area between the first pad 131 and the first semiconductor layer 111, the voltage can be reduced.
[0077] In another embodiment, the semiconductor stack 110 may include a first region 210, a second region 220, and a third region 230, with the second region 220 located between the first region 210 and the third region 230. Vias 110a are distributed at constant intervals between the first region 210 and the third region 230. The first pad 131 overlaps with the vertical projection of the first region 210 and the third region 230 onto the semiconductor stack 110, and the second pad 132 overlaps with the projection of the second region 220 onto the semiconductor stack 110. This further increases the area ratio of the first pad 131 and the second pad 132 on the light-emitting diode (LED), enhancing the LED's heat dissipation capability and current expansion capability.
[0078] See Figure 5 and Figure 6 In one embodiment, the light-emitting diode further includes a transparent conductive layer 170. The transparent conductive layer 170 is formed on the second semiconductor layer 113 by physical vapor deposition or chemical vapor deposition, forming an ohmic contact with the second semiconductor layer 113 to distribute externally injected current horizontally to the surface of the contacting second semiconductor layer 113. The transparent conductive layer 170 has excellent light transmittance, and the light emitted by the light-emitting layer 112 passes through the transparent conductive layer 170 with minimal energy loss. Materials include indium tin oxide, zinc indium tin oxide, zinc tin oxide, gallium indium tin oxide, indium gallium oxide, fluorine-doped tin oxide, and aluminum-doped zinc oxide.
[0079] Preferably, the transparent conductive layer 170 is located within the vertical projection area of the second semiconductor layer 113, and its vertical projection area relative to the second semiconductor layer 113 is between 80% and 95%, almost covering the entire second semiconductor layer 113. Increasing the contact area between the transparent conductive layer 170 and the second semiconductor layer 113 allows the externally injected current to be more evenly distributed throughout the second semiconductor layer 113 of the light-emitting diode, thereby further reducing the voltage. Since the transparent conductive layer 170 is located within the vertical projection area of the second semiconductor layer 113, its coverage does not extend into the via 110a or the edge steps of the semiconductor stack 110, thus avoiding the risk of short circuit caused by direct contact between the first semiconductor layer 111 and the second semiconductor layer 113. The via 110a avoids the central region of the light-emitting diode, also reserving space for the subsequent formation of the second pad 132.
[0080] Preferably, the reserved space of the second pad 132 is between 100μm and 300μm. While meeting the space requirements of the first pad 131 and the second pad 132 in the subsequent packaging and die bonding process, the area of the second pad 132 is further increased to enhance the heat dissipation capability of the light-emitting diode.
[0081] See Figure 7 and Figure 8 In one embodiment, the light-emitting diode further includes a second insulating layer 160. The second insulating layer 160 may be a current-blocking layer formed on the semiconductor stack 110, comprising a first portion completely covering the transparent conductive layer 170, and a second portion extending and covering the edge steps and vias 110a of the semiconductor stack 110. The first and second portions are continuous. The first insulating layer 120 directly contacts the second portion within the edge steps and vias 110a of the semiconductor stack 110 and is located above the second portion. Within the vertical projection range of the transparent conductive layer 170, the first portion may have multiple discontinuous third openings OP3 to expose portions of the surface of the transparent conductive layer 170. The third openings OP3 may be circular or polygonal in shape, or distributed in parallel or alternating patterns.
[0082] In another implementation, see Figure 9 The second insulating layer 160 only covers the transparent conductive layer 170 and covers the side of the transparent conductive layer 170, i.e. the first part. The subsequently formed first insulating layer 120 directly contacts the edge step of the semiconductor stack 110 and the second semiconductor layer 113 located at the bottom of the via 110a.
[0083] Preferably, the first portion of the second insulating layer 160 can be patterned to form the third opening OP3 by photolithography and etching. The second insulating layer 160 may include a multi-layer structure, for example, by alternatingly stacking dielectric layer materials with different refractive indices using physical vapor deposition or chemical vapor deposition to form an omnidirectional reflective layer (ODR) to improve light extraction efficiency. The material of the second insulating layer 160 may include at least one of SiO2, SiN, SiOxNy, TiO2, Si3N4, Al2O3, TiN, AlN, ZrO2, TiAlN, TiSiN, HfO, TaO2, and MgF2.
[0084] It should be noted that ODR is only a preferred structure of the second insulating layer 160 and is not limited to it. Any insulating layer structure that can improve the light extraction efficiency of the light-emitting diode can be applied to this embodiment.
[0085] See Figures 10-13In one embodiment, the light-emitting diode further includes a metal layer composed of a reflective layer 140 and a blocking layer 150. The reflective layer 140 is disposed on the second insulating layer 160 and serves to reflect light, thereby further improving the light extraction efficiency of the light-emitting diode. The blocking layer 150 is disposed on the reflective layer 140 and covers the edge of the reflective layer 140 to prevent oxidation of the surface of the reflective layer 140 and thus deterioration of the reflectivity of the reflective layer 140, while also blocking the migration of ions in the reflective layer 140. The edge of the reflective layer 140 may be disposed outside, inside, or coincide with the edge of the transparent conductive layer 170, and forms an ohmic contact with the transparent conductive layer 170 through the third opening OP3, allowing current to diffuse through the transparent conductive layer 170 to the second semiconductor layer 113.
[0086] Preferably, the reflective layer 140 is located within the vertical projection range of the transparent conductive layer 170, that is, the edge of the reflective layer 140 is located inside the transparent conductive layer 170, in order to further increase the contact area between the transparent conductive layer 170 and the second semiconductor layer 113, thereby reducing the voltage. The blocking layer 150 covers the edge of the reflective layer 140 and is also located within the vertical projection range of the transparent conductive layer 170. In other words, the transparent conductive layer 170, the reflective layer 140, and the blocking layer 150 are all located within the vertical projection plane of the second semiconductor layer 113. The reflective layer 140 and the blocking layer 150 are composed of metallic materials. The material of the reflective layer 140 may include one or more combinations of metals such as silver, aluminum, titanium, tungsten, and nickel, and has the characteristic of reflecting light. The light reflectivity of the reflective layer 140 is as high as 90% or more. Preferably, the reflective layer 140 is formed of metallic silver. The material of the blocking layer 150 includes one or more combinations of metals such as chromium, titanium, nickel, gold, aluminum, and platinum, and has the characteristic of blocking ion migration and diffusion.
[0087] Specifically, when silver is used as the material for the reflective layer 140 and an electric current is applied, the silver reflective layer 140 will undergo ion migration due to factors such as heat or electric current. These migrating silver ions, whether in a disordered or ordered state, may diffuse into the interior of the semiconductor stack 110, causing localized leakage and ultimately leading to the failure of the light-emitting diode (LED). Simultaneously, the silver reflective layer 140 is also susceptible to corrosion and oxidation by moisture, resulting in a deterioration in its reflectivity. Therefore, a barrier layer 150 is needed to cover the surface and edges of the reflective layer 140 to protect it. In other words, the conductive combination of the transparent conductive layer 170, the reflective layer 140, and the barrier layer 150 effectively prevents silver ions from diffusing into the LED, utilizes the good conductivity of silver to reduce the voltage drop of the transparent conductive layer 170, and leverages the high reflectivity of silver to improve the light extraction efficiency of the LED.
[0088] In another embodiment, the first opening OP1 of the first insulating layer 120 exposes a portion of the surface of the first semiconductor layer 111, and the second opening OP2 of the first insulating layer 120 exposes a portion of the surface of the metal layer. A first pad 131 and a second pad 132 are formed on the first insulating layer 120. The first pad 131 is in direct contact with the first semiconductor layer 111 through the first opening OP1, and the second pad 132 is in direct contact with the metal layer through the second opening OP2. In the vertical projection direction on the semiconductor stack 110, the projected area of the metal layer is larger than the projected areas of the first pad and the second pad, respectively. Compared with conventional LED fabrication processes, this embodiment reduces the fabrication process of an insulating filling layer and an internal connection electrode by one step, further optimizing the LED fabrication method and improving the LED fabrication efficiency.
[0089] See Figures 14-17 In one embodiment, the first insulating layer 120 is formed on the barrier layer 150, and the first pad 131 and the second pad 132 are formed on the first insulating layer 120. It is no longer necessary to avoid the position of the via 110a, and the area ratio of the first pad 131 and the second pad 132 on the light-emitting diode is directly increased.
[0090] In another embodiment, the ratio of the vertical projected area of the pad 130 to the vertical projected area of the LED is greater than 70%, and the area of the first pad 131 is greater than or equal to twice the area of the second pad 132. Compared with conventional LED fabrication processes, this embodiment further increases the area ratio of the first pad 131 and the second pad 132 on the LED. The larger area ratio of the pad 130 structure can increase the contact area between the first pad 131 and the second pad 132 and the packaging substrate during subsequent packaging processes, thereby improving the heat dissipation capacity of the LED-packaging substrate contact surface.
[0091] See Figure 14 and Figure 15 In one embodiment, the first insulating layer 120 is patterned by photolithography and etching to form an annular second opening OP2 and a plurality of first openings OP1. The annular second opening OP2 divides the first insulating layer 120 into a first insulating portion 121 and a second insulating portion 122, and exposes a portion of the barrier layer 150.
[0092] The first pad 131 is located on the first insulating portion 121, and its vertical projection area on the light-emitting diode is smaller than that of the first insulating portion 121, so that the first pad 131 is electrically insulated from the barrier layer 150 and the edge steps of the semiconductor stack 110 covered by the first insulating portion 121. The first opening OP1 vertically penetrates the first insulating portion 121 filled inside the via 110a and the insulating layer 160 covering the bottom of the via 110a, so as to expose part of the second semiconductor layer 113. The first pad 131 contacts the first semiconductor layer 111 through the first opening OP1 to form an electrical connection. The second pad 132 is located on the second insulating portion, and its vertical projection area on the light-emitting diode is larger than that of the second insulating portion 122, so that the second pad 132 can cover the second insulating portion 122 and extend into the second opening OP2, contacting the barrier layer 150, and thus forming an electrical connection with the second semiconductor layer 113. The second insulating portion 122 is located at the center of the light-emitting diode, enabling the second pad 132 to not only be used for current injection into the light-emitting diode but also to act as an anti-spin device. The second pad 132 has its maximum width at the center of the light-emitting diode.
[0093] Better, see Figure 16 , Figure 16 for Figure 2 A partial enlarged view of region B shows that the second opening OP2 has an outer edge 1201 near the first insulating portion 121 and an inner edge 1202 near the second insulating portion 122. The edge of the first pad 131 is located outside the outer edge 1201 of the second opening OP2, with a minimum distance of D1 from the outer edge 1201, ranging from 5μm to 15μm. The second pad 132 partially fills the second opening, with a minimum distance of D2 from the inner edge 1202, also ranging from 5μm to 15μm. Therefore, the first pad 131 and the second pad 132 do not overlap in the second opening OP2. The minimum spacing D3 of the second opening OP2 ranges from 15μm to 25μm.
[0094] Preferably, the first insulating layer 120 is patterned by photolithography and etching to form a plurality of annular second openings OP2. The plurality of annular second openings OP2 divide the first insulating layer 120 into a first insulating portion 121 and a plurality of spaced second insulating portions 122, and expose a portion of the barrier layer 150.
[0095] See Figure 17In one embodiment, the light-emitting diode includes two first pads 131 and a second pad 132, with the second pad 132 located between the two first pads 131. The materials of the first pads 131 and the second pads 132 include metallic materials, such as chromium (Cr), titanium (Ti), tungsten (W), gold (Au), aluminum (Al), indium (In), tin (Sn), nickel (Ni), platinum (Pt), or alloys of the above materials.
[0096] Preferably, the second pad 132 is located between two symmetrically distributed first pads 131, and the minimum distance between the first pads 131 and the second pads 132 is between 30μm and 100μm. The smaller distance between the first pads 131 and the second pads 132 can further increase the overall area of the first pads 131 and the second pads 132, and further improve the heat dissipation capacity of the contact surface between the light-emitting diode and the packaging substrate.
[0097] It should be noted that, compared with conventional fabrication processes, this application utilizes a first pad 131 to directly contact the first semiconductor layer 111 through a first opening OP1, and a second pad 132 to directly contact the metal layer through a second opening OP2. In contrast, in existing processes, see [link to previous section]. Figure 18 The first pad 131 and the second pad 132 typically contact the pre-formed internal connection electrode PAD1, indirectly forming an electrical connection with the first semiconductor layer or metal layer through PAD1. An insulating filler layer PV1 is pre-formed between PAD1 and the metal layer to provide electrical insulation, ensuring electrical contact between PAD1 and the metal layer only at predetermined locations. Therefore, compared to the prior art, this application reduces the fabrication process of the insulating filler layer and the internal connection electrode by one step, further optimizing the fabrication method of the light-emitting diode and improving its fabrication efficiency.
[0098] On the other hand, this application also provides a light-emitting device, including:
[0099] Multiple light-emitting diodes, each light-emitting diode including a first pad 131 and a second pad 132;
[0100] The packaging substrate includes a plurality of first electrode pads and second electrode pads, wherein the number of first electrode pads is twice the number of second electrode pads; the first electrode pads are used for bonding to first pads 131, and the second electrode pads are used for bonding to second pads 132. The light-emitting diode is a light-emitting diode as described in any of the above embodiments.
[0101] In one embodiment, the minimum distance between the first electrode pad and the second electrode pad is between 30 μm and 100 μm.
[0102] This application provides a light-emitting diode and a light-emitting device, including a semiconductor stack 110, a via 110a disposed on the semiconductor stack 110, a first insulating layer 120, and a first pad 131 and a second pad 132 disposed on the first insulating layer 120. The semiconductor stack 110 includes a first semiconductor layer 111, a light-emitting layer 112, and a second semiconductor layer 113. The first insulating layer 120 includes a first opening OP1 and a second opening OP2. The first pad 131 contacts the first semiconductor layer 111 through the first opening OP1, and the second pad 132 is electrically connected to the second semiconductor layer 132 through the second opening OP2, without having to avoid the via 110a. This increases the area ratio of the first pad 131 and the second pad 132 on the light-emitting diode, improves the contact area between the first pad 131 and the second pad 132 and the packaging substrate during subsequent packaging, and thus improves the heat dissipation capability of the light-emitting diode.
[0103] This application provides a light-emitting diode and a light-emitting device. The first insulating layer 120 is divided into a first insulating part 121 and a second insulating part 122 by the second opening OP2. The second insulating part 122 is located at the center of the light-emitting diode. The second pad 132 covers the second insulating part 122, so that the second pad 132 can not only play the role of current injection, but also play the role of preventing pins.
[0104] This application provides a light-emitting diode and a light-emitting device. By setting multiple uniformly distributed through holes 110a, the current expansion capability and the uniformity of current distribution can be further improved. At the same time, the contact area between the first pad 131 and the first semiconductor layer 111 is increased, thereby reducing the voltage and improving the luminous efficiency of the light-emitting diode.
[0105] This application provides a light-emitting diode and a light-emitting device. Compared with the conventional light-emitting diode fabrication process, the first pad 131 is in direct contact with the first semiconductor layer 111 through the first opening OP1, and the second pad 132 is in direct contact with the metal layer through the second opening OP2. This eliminates one step of the insulating filling layer and one step of the internal connection electrode fabrication process, thereby further optimizing the light-emitting diode fabrication method and improving the fabrication efficiency of the light-emitting diode.
[0106] In addition to the embodiments described above, the light-emitting diodes and light-emitting devices provided in this application can also be used in fields including, but not limited to, general indoor lighting and automotive applications. The reliability requirements for light-emitting diodes are particularly high in the field of automotive lighting.
[0107] The above description is only a preferred embodiment of this application. It should be noted that for those skilled in the art, several improvements and substitutions can be made without departing from the technical principles of this application, and these improvements and substitutions should also be considered within the scope of protection of this application.
Claims
1. A light-emitting diode, characterized in that, include: A semiconductor stack, comprising a first semiconductor layer, a light-emitting layer, and a second semiconductor layer stacked sequentially; A via, passing through the second semiconductor layer and the light-emitting layer, exposes a portion of the surface of the first semiconductor layer; A first insulating layer is disposed on the semiconductor stack and includes a first insulating portion and a second insulating portion; the first insulating portion surrounds the second insulating portion and is spaced apart by an annular second opening; the first insulating portion further includes a first opening. A first pad and a second pad, wherein the first pad is located on the first insulating portion and directly contacts the first semiconductor layer through the first opening; the second pad is located on the second insulating portion and extends into the second opening to be electrically connected to the second semiconductor layer, and the second pad does not overlap with the vertical projection of the first insulating portion on the semiconductor stack.
2. The light-emitting diode according to claim 1, characterized in that, It also includes a metal layer comprising a reflective layer and a barrier layer. The reflective layer is disposed on the second semiconductor layer, and the barrier layer covers the reflective layer. The first insulating layer covers the barrier layer and exposes a portion of the barrier layer at the second opening. The second pad is electrically connected to the barrier layer through the second opening.
3. The light-emitting diode according to claim 2, characterized in that, It also includes a second insulating layer that covers the edges and part of the surface of the semiconductor stack and is located between the second semiconductor layer and the reflective layer, and has a plurality of discontinuous third openings through which the reflective layer is electrically connected to the second semiconductor layer.
4. The light-emitting diode according to claim 2, characterized in that, It also includes a second insulating layer, which is formed only on the upper surface of the semiconductor stack and located between the second semiconductor layer and the reflective layer. The second insulating layer has a plurality of discontinuous third openings, through which the reflective layer is electrically connected to the second semiconductor layer.
5. The light-emitting diode according to any one of claims 3 and 4, characterized in that, It also includes a transparent conductive layer, which is located between the second semiconductor layer and the second insulating layer.
6. The light-emitting diode according to claim 5, characterized in that, The vertical projected area of the transparent conductive layer is greater than the vertical projected area of the reflective layer.
7. The light-emitting diode according to claim 5, characterized in that, The transparent conductive layer, reflective layer, and barrier layer are all located within the vertical projection plane of the second semiconductor layer.
8. The light-emitting diode according to claim 1, characterized in that, The light-emitting diode includes two first pads, and the second pad is located between the two symmetrically distributed first pads.
9. The light-emitting diode according to claim 8, characterized in that, The second insulating portion is located at the center of the light-emitting diode, and the second pad covers the second insulating portion.
10. The light-emitting diode according to claim 1, characterized in that, The minimum spacing of the second opening ranges from 10μm to 25μm.
11. The light-emitting diode according to claim 1, characterized in that, The minimum distance between the first pad and the second pad is between 30μm and 100μm.
12. The light-emitting diode according to claim 1, characterized in that, The second opening has an outer edge near the first insulating portion and an inner edge near the second insulating portion. The minimum distance between the first pad and the outer edge is between 5μm and 15μm, and the minimum distance between the second pad and the inner edge is between 5μm and 15μm.
13. The light-emitting diode according to claim 1, characterized in that, The ratio of the total vertical projection area of the first pad and the second pad to the vertical projection area of the light-emitting diode is greater than 70%.
14. The light-emitting diode according to claim 2, characterized in that, The reflective layer includes a silver metal reflective layer.
15. A light-emitting diode, characterized in that, include: A semiconductor stack, comprising a first semiconductor layer, a light-emitting layer, and a second semiconductor layer stacked sequentially; A via, passing through the second semiconductor layer and the light-emitting layer, exposes a portion of the surface of the first semiconductor layer. The semiconductor stack includes a first region, a second region, and a third region. The via is distributed in the first region and the third region, and the second region is located between the first region and the third region. A first insulating layer is disposed on the semiconductor stack and includes a first insulating portion and a second insulating portion; the first insulating portion surrounds the second insulating portion and is spaced apart by an annular second opening; First pad and second pad, the first pad is in direct electrical contact with the first semiconductor layer, and the second pad is located on the second insulating portion and extends into the second opening to be electrically connected to the second semiconductor layer; Wherein, the first pad overlaps with the vertical projection of the first region and the third region on the semiconductor stack, and the second pad overlaps with the projection of the second region on the semiconductor stack.
16. The light-emitting diode according to claim 15, characterized in that, The light-emitting diode includes two first pads, and the second pad is located between the two symmetrically distributed first pads.
17. The light-emitting diode according to claim 15, characterized in that, The number of through holes is multiple, and they are distributed in the first region and the third region in a cross-interval manner at a preset distance.
18. The light-emitting diode according to claim 15, characterized in that, The number of through holes on the light-emitting diode is not less than 20 per mm. 2 .
19. A light-emitting diode, characterized in that, include: A semiconductor stack, comprising a first semiconductor layer, a light-emitting layer, and a second semiconductor layer stacked sequentially; A via, passing through the second semiconductor layer and the light-emitting layer, exposes a portion of the surface of the first semiconductor layer; A metal layer, located above the second semiconductor layer, wherein the metal layer comprises silver; A first insulating layer is located on the semiconductor stack and covers the metal layer. The first insulating layer has a first opening to expose a portion of the surface of the first semiconductor layer and a second opening to expose a portion of the surface of the metal layer. The first pad and the second pad are in direct contact with the first semiconductor layer through the first opening, and the second pad is in direct contact with the metal layer through the second opening. In the vertical projection direction on the semiconductor stack, the projected area of the metal layer is larger than the projected area of the first pad and the projected area of the second pad, respectively.
20. The light-emitting diode according to claim 19, characterized in that, The metal layer includes a reflective layer and a barrier layer. The reflective layer is disposed on the second semiconductor layer. The barrier layer covers the reflective layer. The first insulating layer covers the barrier layer and exposes a portion of the barrier layer at the second opening. The second pad is electrically connected to the barrier layer through the second opening.
21. The light-emitting diode according to claim 20, characterized in that, It also includes a second insulating layer that covers the edges and part of the surface of the semiconductor stack and is located between the second semiconductor layer and the reflective layer, and has a plurality of discontinuous third openings through which the reflective layer is electrically connected to the second semiconductor layer.
22. The light-emitting diode according to claim 21, characterized in that, It also includes a transparent conductive layer, which is located between the second semiconductor layer and the second insulating layer.
23. A light-emitting diode, characterized in that, include: A semiconductor stack, comprising a first semiconductor layer, a light-emitting layer, and a second semiconductor layer stacked sequentially; A metal layer, located above the second semiconductor layer, wherein the metal layer comprises silver; A first insulating layer is located on the semiconductor stack and covers the metal layer. The first insulating layer has a first opening to expose a portion of the surface of the first semiconductor layer and a second opening to expose a portion of the surface of the metal layer. First pad and second pad, the first pad is in direct contact with the first semiconductor layer through the first opening, and the second pad is in direct contact with the metal layer through the second opening; Wherein, the ratio of the total vertical projection area of the first pad and the second pad covering the vertical projection area of the light-emitting diode is greater than 70%, and the area of the first pad is greater than or equal to twice the area of the second pad.
24. The light-emitting diode according to claim 23, characterized in that, The minimum distance between the first pad and the second pad is between 30μm and 100μm.
25. The light-emitting diode according to claim 23, characterized in that, The minimum spacing of the second opening ranges from 10μm to 25μm.
26. A light-emitting device, characterized in that, include: Multiple light-emitting diodes, including a first pad and a second pad; The packaging substrate includes a plurality of first electrode pads and second electrode pads, wherein the number of first electrode pads is twice the number of second electrode pads; the first electrode pads are bonded to first pads, and the second electrode pads are bonded to second pads; The light-emitting diode is an example of a light-emitting diode as described in any one of claims 1 to 25.
27. The light-emitting device according to claim 26, characterized in that, The minimum distance between the first electrode pad and the second electrode pad is between 30 μm and 100 μm.
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