Voltage control circuit, method and terminal

Abstract

The embodiment of the present application discloses a voltage control circuit, method and terminal, which can reduce the power consumption of the terminal. The voltage control circuit includes: a power supply module, a voltage regulation control module, a power interface main module and a power interface slave module, the voltage regulation control module is connected to the power interface main module; the power supply module is connected to the power interface slave module, and the power interface main module is connected to the power interface slave module; wherein the voltage regulation control module is used to send a target voltage corresponding to at least one load to the power supply module through the power interface main module and the power interface slave module; the power supply module is used to adjust the current voltage provided on at least one load according to the target voltage, and when the current voltage reaches the target voltage, send a first write register instruction to the voltage regulation control module through the power interface slave module and the power interface main module; the voltage regulation control module is also used to send a voltage regulation completion signal to at least one load according to the first write register instruction.

Description

Technical Field

[0001] The present application relates to the field of terminal technology, and in particular to a voltage control circuit, method and terminal. Background Art

[0002] At present, Dynamic Voltage Frequency Scaling (DVFS) is a common low-power strategy, which dynamically adjusts the supply voltage according to the actual needs of the digital circuit. For example, the voltage is increased when the chip works at a high frequency; the voltage is reduced when the chip works at a low frequency, so as to minimize the power consumption of the chip. However, in the current DVFS adjustment strategy, the load needs to wait for a long time to ensure that the voltage regulation is completed, and then work on the adjusted voltage, which increases the high voltage time, increases the terminal power consumption, and reduces the terminal response speed. Summary of the invention

[0003] The embodiments of the present application are intended to provide a voltage control circuit, method and terminal, which can reduce the power consumption of the terminal and improve the response speed of the terminal.

[0004] The technical solution of this application is implemented as follows:

[0005] The present application provides a voltage control circuit, including:

[0006] A power supply module, a voltage regulation control module, a power interface master module and a power interface slave module, wherein the voltage regulation control module is connected to the power interface master module; the power supply module is connected to the power interface slave module, and the power interface master module is connected to the power interface slave module; wherein,

[0007] The voltage regulation control module is used to send a target voltage corresponding to at least one load to the power supply module through the power interface master module and the power interface slave module;

[0008] The power supply module is used to adjust the current voltage provided on the at least one load according to the target voltage, and send a first write register instruction to the voltage regulation control module through the power interface slave module and the power interface master module when the current voltage reaches the target voltage;

[0009] The voltage regulation control module is further configured to send a voltage regulation completion signal to the at least one load according to the first write register instruction.

[0010] The present application provides a voltage control method, which is applied to a power management chip, wherein the power management chip comprises: a power supply module and a power supply interface slave module connected to the power supply module; the power supply module is used to supply power to at least one load; the power supply interface slave module is connected to a power supply interface master module on a system-level chip; the power supply interface master module is connected to a voltage regulation control module on the system-level chip; the voltage regulation control module is connected to the at least one load; the method comprises:

[0011] Receiving, through the power interface slave module, a target voltage corresponding to the at least one load sent by the voltage regulation control module through the power interface master module;

[0012] Through the power supply module, the current voltage provided on the at least one load is adjusted according to the target voltage, and when the current voltage reaches the target voltage, a first write register instruction is sent to the power interface main module through the power interface slave module, so that the voltage regulation control module sends a voltage regulation completion signal to the at least one load according to the first write register instruction received from the power interface main module.

[0013] The present application provides a voltage control method, which is applied to a system-level chip, wherein the system-level chip comprises: a voltage regulation control module and a power interface master module connected to the voltage regulation control module; the voltage regulation control module is connected to at least one load, the power interface master module is connected to a power interface slave module on a power management chip; the power interface slave module is connected to a power supply module of a power management chip; the power supply module is used to supply power to the at least one load; the method comprises:

[0014] Sending a target voltage corresponding to the at least one load to the power interface slave module through the power interface master module, so as to send the target voltage to the power supply module through the power interface slave module;

[0015] The first register write instruction sent by the power supply module is received through the power supply interface main module, and the first register write instruction is sent to the voltage regulation control module; the first register write instruction is sent to the power supply interface main module through the power supply interface slave module when the power supply module adjusts the current voltage provided by the at least one load to the target voltage;

[0016] A voltage regulation completion signal is sent to the at least one load through the voltage regulation control module according to the first write register instruction.

[0017] The embodiment of the present application provides a power management chip, comprising: a power supply module, a power supply interface slave module connected to the power supply module; the power supply module is used to supply power to at least one load; the power supply interface slave module is connected to a power supply interface master module on a system-level chip; the power supply interface master module is connected to a voltage regulation control module on the system-level chip; the voltage regulation control module is connected to the at least one load; wherein,

[0018] The power interface slave module is used to receive the target voltage corresponding to the at least one load sent by the voltage regulation control module through the power interface master module, and send the target voltage to the power supply module;

[0019] The power supply module is used to adjust the current voltage provided on the at least one load according to the target voltage, and when the current voltage reaches the target voltage, send a first write register instruction to the voltage regulation control module through the power interface slave module and the power interface master module, so that the voltage regulation control module sends a voltage regulation completion signal to the at least one load according to the first write register instruction.

[0020] The embodiment of the present application provides a system-level chip, comprising: a voltage regulation control module, a power interface main module connected to the voltage regulation control module; the voltage regulation control module is connected to at least one load; the power interface main module is connected to a power interface slave module on a power management chip; the power interface slave module is connected to a power supply module of the power management chip; the power supply module is used to supply power to the at least one load; wherein,

[0021] The voltage regulation control module is used to send the target voltage corresponding to the at least one load to the power supply module through the power interface master module and the power interface slave module, so that the power supply module adjusts the current voltage provided on the at least one load according to the target voltage, and sends a first write register instruction to the power interface master module through the power interface slave module when the current voltage reaches the target voltage;

[0022] The power interface main module is used to send the first write register instruction to the voltage regulation control module;

[0023] The voltage regulation control module is further configured to send a voltage regulation completion signal to the at least one load according to the first write register instruction.

[0024] The embodiment of the present application provides a terminal, comprising: a power management chip and a system-level chip; wherein the power management chip comprises: a power supply module and a power interface slave module connected to the power supply module; the power supply module is used to supply power to at least one load; the system-level chip comprises: a voltage regulation control module and a power interface master module connected to the voltage regulation control module; the voltage regulation control module is connected to the at least one load; the power interface slave module is connected to the power interface master module;

[0025] The system-level chip is used to determine the target voltage corresponding to at least one load through the voltage regulation control module; and send the target voltage to the power interface slave module through the power interface master module;

[0026] The power management chip is used to adjust the current voltage provided on the at least one load according to the target voltage through the power supply module; when the current voltage reaches the target voltage, send a first write register instruction to the power interface master module through the power interface slave module;

[0027] The system-level chip is also used to send the first write register instruction to the voltage regulation control module through the power interface main module; and send a voltage regulation completion signal to at least one load through the voltage regulation control module according to the first write register instruction.

[0028] The embodiment of the present application provides a voltage control circuit, method and terminal. When the power supply module adjusts the current voltage provided on at least one load to the target voltage according to the target voltage sent by the voltage regulation control module, the power supply module sends a first write register instruction to the voltage regulation control module through the power interface slave module and the power interface master module. In this way, when the voltage regulation control module receives the first write register instruction, it determines that the voltage regulation is completed and sends a voltage regulation completion signal to at least one load to notify the load that the operating frequency can be adjusted to the target voltage to run the service in time. Thereby, the blind waiting time of the load after initiating the voltage regulation application and the high voltage duration are shortened, the terminal response speed is improved, and the terminal power consumption is reduced. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 It is a schematic diagram of an optional structure of a current DVFS control system;

[0030] Figure 2 A schematic diagram of an optional timing flow of a current DVFS control system;

[0031] Figure 3 An optional structural diagram of a voltage control circuit provided in an embodiment of the present application;

[0032] Figure 4 An optional structural diagram of a voltage control circuit provided in an embodiment of the present application;

[0033] Figure 5 An optional structural diagram of a voltage control circuit provided in an embodiment of the present application;

[0034] Figure 6 An optional structural diagram of a voltage control circuit provided in an embodiment of the present application;

[0035] Figure 7 An optional flow chart of a voltage control method provided in an embodiment of the present application;

[0036] Figure 8 An optional flow chart of a voltage control method provided in an embodiment of the present application;

[0037] Fig. 9 An optional structural diagram of a voltage control circuit provided in an embodiment of the present application applied to a practical scenario;

[0038] Fig.10 An optional flow chart of a voltage control method provided in an embodiment of the present application applied to an actual scenario;

[0039] Fig.11 A timing flow chart of a voltage control circuit and a voltage control method provided in an embodiment of the present application;

[0040] Fig.12 An optional structural diagram of a power management chip provided in an embodiment of the present application;

[0041] Fig.13 An optional structural diagram of a system-on-chip provided in an embodiment of the present application. DETAILED DESCRIPTION

[0042] In order to make the purpose, technical solutions and advantages of the present application clearer, the present application will be further described in detail below in conjunction with the accompanying drawings. The described embodiments should not be regarded as limiting the present application. All other embodiments obtained by ordinary technicians in the field without making creative work are within the scope of protection of this application.

[0043] In the following description, reference is made to “some embodiments”, which describe a subset of all possible embodiments, but it will be understood that “some embodiments” may be the same subset or different subsets of all possible embodiments and may be combined with each other without conflict.

[0044] In the following description, the terms "first\second\third" involved are merely used to distinguish similar objects and do not represent a specific ordering of the objects. It can be understood that "first\second\third" can be interchanged with a specific order or sequence where permitted, so that the embodiments of the present application described here can be implemented in an order other than that illustrated or described here.

[0045] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein are only for the purpose of describing the embodiments of this application and are not intended to limit this application.

[0046] At present, the operating frequency of digital circuits is positively correlated with the required voltage. The higher the operating frequency, the higher the required voltage. Higher voltage means higher power consumption. In the low-power design of digital circuits, a current DVFS control circuit is Figure 1 As shown, it includes a power management chip (Power Management IC, PMIC) and a system-on-chip (System On Chip, SOC). Among them, PMIC includes a direct current converter (Direct Current-Direct Current, DCDC), and PMIC exchanges data with SOC through the PMIC interface; DCDC is used to provide power VDD for SOC; N subsystems (subsystem 1, subsystem 2...subsystem N) are mounted under the power supply VDD. Here, the N subsystems are N digital circuit modules mounted under the same power domain VDD, and each subsystem is powered by the power supply VDD. At the same time, the working status of each subsystem is different, so the N voltage values ​​corresponding to the N subsystems (that is, voltage value 1, voltage value 2...voltage value N) are also different. In order to meet the voltage requirements of all subsystems, VDD needs to be greater than or equal to the highest voltage value among the N voltage values. Here, Figure 1 The voting manager in is used to select the highest voltage value among the N voltage values, and send the highest voltage value to the PMIC through the PMIC interface, so that the PMIC supplies power to the N subsystems according to the highest voltage value.

[0047] based on Figure 1 The DVFS control circuit of the DVFS can be shown as Figure 2 As shown, it includes T1-T7 moments, among which:

[0048] At time T1, when a subsystem is about to start a business and needs to run at a higher frequency, it will initiate a voltage boost request and send the voltage value it needs to the voting manager. The voting manager receives the voltage values ​​sent by each subsystem and selects the highest voltage value V2. The voting manager sends the voltage value V2 to the PMIC through the PMIC interface. After receiving the voltage value V2, the PMIC sends the voltage value V2 to the DCDC.

[0049] At time T2, DCDC receives voltage value V2 and starts to boost voltage according to voltage value V2.

[0050] At time T3, after the voltage adjustment from time T2 to time T3, the voltage on VDD is adjusted from V1 to V2, and the voltage boost is completed.

[0051] However, since the subsystem does not know when the voltage on VDD reaches V2, after the subsystem initiates the voltage regulation application at time T1, it will wait for a fixed period of time Tw to ensure that the voltage regulation is completed. Therefore, the subsystem will not increase the operating frequency and start the corresponding business until time T4.

[0052] Here, because the period from the subsystem initiating a boost request to the completion of the boost, that is, from T1 to T3, will fluctuate or change with different PMIC load conditions, the fixed waiting time Tw usually takes into account a certain time margin (such as the period from T3 to T4) to ensure that Tw must be greater than the period from T1 to T3. In this way, the subsystem can start to increase the frequency after the VDD1 boost is completed to ensure that the subsystem works normally.

[0053] At time T5, the subsystem service ends, the frequency is reduced, and a voltage reduction application is initiated, sending the required voltage value to the voting manager. The voting manager will also select the maximum value of each subsystem voltage at time T5. For example, the maximum voltage selected by the voting manager at time T5 can be V1. The voting manager sends the voltage value V1 to DCDC1 in the PMIC for voltage regulation.

[0054] At time T6 , DCDC1 starts to adjust the voltage according to the voltage value V1 .

[0055] At time T7, VDD1 voltage regulation ends, completing the entire DVFS process.

[0056] In summary, the entire control process of the current DVFS solution is open-loop. After the subsystem initiates a voltage adjustment application and sends the required voltage value to the voting manager, it will enter a blind waiting stage. The subsystem does not know when the voltage can actually be adjusted to the target voltage value, and needs to wait for a fixed period of time before starting the service, thereby increasing the time working at high voltage, thereby increasing power consumption and reducing the response speed of the terminal. In addition, when the subsystem initiates a voltage increase application, but the PMIC does not perform the voltage increase correctly due to some faults, the subsystem in the SOC is also unaware of the voltage abnormality and will continue to increase the frequency, so that the subsystem will work abnormally, thereby reducing the stability of the terminal service.

[0057] In this application, by analyzing the above timing process, it can be seen that the actual business time Tr of the subsystem is the time period between T4 and T5, and the time period Th during which the high voltage actually lasts is the time period from T3 to T6. To ensure the normal operation of the subsystem business, Th must be greater than or equal to Tr. When Th is greater than or equal to Tr, the shorter the high voltage time Th, the lower the power consumption of the terminal. As for Th, that is, the time period from T3 to T6, where T4 to T5 is the actual business time, if it is shortened, it will cause business anomalies; T5 to T6 is the time for the voting manager to vote and send commands to the PMIC, which is also a relatively fixed time period. Therefore, the high voltage time Th can be shortened by shortening the time margin from T3 to T4, thereby reducing power consumption and improving the response speed of the terminal.

[0058] Based on the above technical ideas, the embodiments of the present application provide a voltage control method, a terminal and a computer-readable storage medium, which can reduce the power consumption of the terminal and improve the response speed of the terminal.

[0059] See also Figure 3 , Figure 3 is an optional structural diagram of a voltage control circuit provided in an embodiment of the present application, which is combined with Figure 3 Provide explanation.

[0060] The voltage control circuit 100 provided in the embodiment of the present application includes: a power supply module 10, a voltage regulation control module 30, a power supply interface main module 210 and a power supply interface slave module 220, the power supply module 10 is connected to the power supply interface slave module 220, and the power supply interface main module 210 is connected to the power supply interface slave module 220; wherein,

[0061] The voltage regulation control module 30 is used to send a target voltage corresponding to at least one load 40 to the power supply module 10 through the power interface master module 210 and the power interface slave module 220;

[0062] The power supply module 10 is used to adjust the current voltage provided on at least one load 40 according to the target voltage, and send a first write register instruction to the voltage regulation control module 30 through the power interface slave module 220 and the power interface master module 210 when the current voltage reaches the target voltage;

[0063] The voltage regulation control module 30 is used to send a voltage regulation completion signal to at least one load 40 according to the first write register instruction.

[0064] In an embodiment of the present application, at least one load is in the same power domain, and the power supply module is used to supply power to at least one load. In some embodiments, at least one load may be at least one subsystem on a system-on-chip of a terminal. Exemplarily, at least one subsystem may be at least one core in a central processing unit (CPU) chip. Alternatively, at least one load may also be a subsystem of other chips on the terminal, connected to the voltage control circuit of an embodiment of the present application, so that the voltage control circuit can supply power to at least one load through the power supply module, and determine the target voltage corresponding to at least one load through the voltage regulation control module, and send a voltage regulation completion signal to at least one load when the power supply module adjusts the current voltage to the target voltage.

[0065] In an embodiment of the present application, the power interface master module and the power interface slave module may include a power management protocol interface for connecting the power supply module and the voltage regulation control module, and realize the signal transmission between the power supply module and the voltage regulation control module through preset register operation instructions.

[0066] In some embodiments, the power interface master module may include an SPMI (System Power Management Interface) protocol master interface; the power interface slave module may include an SPMI protocol slave interface. Exemplarily, the hardware implementation of the SPMI protocol may include a two-wire serial port of an SPMI clock line and an SPMI data line. Among them, the SPMI clock line is used to synchronize the clock between the master device and the slave device of the SPMI protocol, and the SPMI clock line is used to transmit data between the master device and the slave device of the SPMI protocol, including the transmission of signals or instructions. In some embodiments of the present application, the master device of the SPMI protocol may be a system-level chip including a voltage regulation control module, and the slave device of the SPMI protocol may be a PMIC chip including a power supply module. Here, in some embodiments of actual application, the power interface slave module may also include an interface circuit for docking the SPMI protocol master interface with the power supply module, and the power interface master module may also include an interface circuit for docking the SPMI protocol slave interface with the voltage regulation control module.

[0067] In some embodiments, the power supply module may include a voltage converter; illustratively, it may include a DC converter or other power supply circuits or devices with voltage regulation functions, etc., which are selected according to actual conditions and are not limited in the embodiments of the present application. When the target voltage is greater than the current voltage, the power supply module may boost the current voltage through the voltage converter until the target voltage is reached; when the target voltage is less than the current voltage, the power supply module may step down the current voltage through the voltage converter until the target voltage is reached.

[0068] In some embodiments, the power supply module can directly use the target voltage as the target value for voltage adjustment, and adjust the current voltage to the target voltage through the voltage adjustment process. Alternatively, the power supply module can also add a certain margin to the target voltage as the target value for actual voltage adjustment to prevent the impact of voltage fluctuations on load services. The specific selection is made according to the actual situation, and the embodiments of the present application are not limited thereto.

[0069] In the embodiment of the present application, it takes a certain amount of time for the power supply module to adjust the voltage according to the target voltage, such as Figure 2 The T2-T3 time period corresponding to the boost process, or the T2-T3 time period corresponding to the step-down process. When the power supply module adjusts the current voltage to the target voltage through the voltage adjustment process, the power supply module sends a first write register instruction to the voltage regulation control module through the power interface slave module and the power interface master module.

[0070] In an embodiment of the present application, the first write register instruction may include: a preset first register address and a first preset value corresponding to the preset first register address. Here, the preset first register address and the first preset value may be a register address and a register value pre-agreed by the voltage regulation control module and the power supply module, which are used to characterize that the power supply module has completed voltage regulation. In this way, when the voltage regulation control module receives the first write register instruction containing the pre-agreed register address and register value, it can determine that the power supply module has completed voltage regulation and send a voltage regulation completion signal to at least one load. In this way, by utilizing the connected power interface slave module and the power interface master module, as well as the pre-agreed register operation instructions, the voltage regulation completion signal is transmitted from the power supply module to the voltage regulation control module.

[0071] It can be understood that in the embodiment of the present application, the power supply module sends a first write register instruction to the voltage regulation control module through the power interface slave module and the power interface master module when adjusting the current voltage provided on at least one load to the target voltage according to the target voltage sent by the voltage regulation control module. In this way, when the voltage regulation control module receives the first write register instruction, it determines that the voltage regulation is completed and sends a voltage regulation completion signal to at least one load to notify the load that the operating frequency can be adjusted to the target voltage to run the business in time. Thereby, the blind waiting time of the load after initiating the voltage regulation application and the high voltage duration are shortened, the terminal response speed is improved, and the terminal power consumption is reduced.

[0072] In some embodiments, upon receiving the first write register instruction, the voltage regulation control module may send a voltage regulation completion signal to at least one load to notify each load that the voltage currently provided by the power supply module has been adjusted to the target voltage; or, the voltage regulation completion signal may be sent to the first load that initiates the voltage regulation application. Here, the voltage regulation completion signal may include the value of the target voltage. In this way, upon receiving the voltage regulation completion signal, the first load may adjust its operating frequency to the target frequency corresponding to the target voltage according to the target voltage, so as to use the target voltage for business operation.

[0073] It is understandable that the first load starts to adjust the operating frequency only after receiving the voltage regulation completion signal, which avoids the failure of voltage regulation due to a fault in the power supply module. However, the load is unaware of the voltage regulation failure and blindly waits for a period of time before adjusting the operating frequency, resulting in business failure or abnormal operation, thereby improving the stability of the terminal business.

[0074] In some embodiments, Figure 4 As shown, the power supply module 10 includes: a voltage comparison module 110; wherein the voltage comparison module 110 is used to compare the current voltage with the target voltage, and when the current voltage reaches the target voltage, sends an initial voltage regulation completion signal to the power interface slave module 220; the power interface slave module 220 is used to send a first write register instruction to the voltage regulation control module 30 when receiving the initial voltage regulation completion signal.

[0075] In some embodiments, the voltage comparison module may include a first input terminal, a second input terminal and an output terminal. The first input terminal is connected to the output terminal of the power supply module, and is used to obtain the current voltage of the output terminal of the power supply module, so as to detect the current output voltage value in real time during the voltage adjustment process of the power supply module. The second input terminal is used to input the target voltage; the output terminal of the voltage comparison module is connected to the power interface slave module. In this way, the voltage comparison module can compare the current input voltage with the target voltage, and when the current voltage reaches the target voltage, send an initial voltage regulation completion signal to the power interface slave module. Exemplarily, the initial voltage regulation completion signal can be a high-level signal.

[0076] In some embodiments, when the signal forms of the current voltage and the target voltage are inconsistent, the current voltage or the target voltage can also be converted into digital-to-analog through a digital-to-analog conversion module to obtain the converted current voltage or the target voltage; and the voltage comparison module can be used to compare the voltage based on the converted current voltage or the target voltage. Exemplarily, the target voltage can be the digital signal value output by the voting manager, and the current voltage can be the analog signal value detected by the analog circuit in the voltage comparison module. Before the target voltage is transmitted to the voltage comparator, the target voltage can be converted into digital-to-analog through a digital-to-analog converter (DAC), and the analog signal value of the target voltage obtained can be transmitted to the voltage comparator, and the analog signal value of the target voltage can be compared with the current voltage through the voltage comparator. The same is true in reverse, which will not be repeated here.

[0077] Exemplarily, in the case where the power supply module is a DCDC, since the DCDC is internally closed-loop feedback controlled, there is a voltage comparator in the voltage feedback circuit of its analog part, and the current voltage output by the DCDC can be compared with the target voltage in real time through the voltage comparator. When the current voltage reaches the target voltage, the voltage comparator will output a level signal. In other words, the voltage comparator in the DCDC can be used as the voltage comparison module in the embodiment of the present application, and the signal output by the voltage comparator in the DCDC when the current voltage reaches the target voltage is sent to the power interface slave module as the initial voltage regulation completion signal, so that the power interface slave module sends the first write register instruction to the voltage regulation control module when receiving the initial voltage regulation completion signal.

[0078] It can be understood that in the embodiment of the present application, the voltage comparison module in the power supply module is utilized to realize real-time detection of the voltage output of the power supply module. When the current voltage reaches the target voltage, the voltage comparison module can promptly send a notification of voltage regulation completion to the voltage regulation control module through the power interface slave module and the power interface master module, thereby reducing terminal power consumption and improving business response speed.

[0079] In some embodiments, based on Figure 3 or Figure 4 The voltage regulation control module is also used to determine the target voltage according to the voltage regulation application initiated by the first load among the at least one load; and send the target voltage to the power interface main module.

[0080] The power interface master module is used to generate a second write register instruction according to the target voltage, and send the second write register instruction to the power interface slave module.

[0081] The power interface slave module is used to send the target voltage to the power supply module through the second write register instruction.

[0082] In some embodiments, the voltage regulation control module records at least one current load voltage corresponding to at least one load. When the first load among the at least one load needs to change the working voltage during business operation, the voltage regulation application is initiated to the voltage regulation control module, and the voltage regulation application includes the first voltage required for the first load to run the business. When the voltage regulation control module receives the voltage regulation application sent by the first load, it can determine whether to send the target voltage to the power supply module by comparing the first voltage in the voltage regulation application with the maximum value of at least one current load voltage.

[0083] In some embodiments, the voltage regulation control module is also used to determine whether the first voltage in the voltage regulation application is the maximum value of at least one current load voltage when a voltage regulation application is received from the first load; when the first voltage is the maximum value of at least one current load voltage, determine the target voltage based on the first voltage, and send the target voltage to the power supply module through the power interface main module and the power interface slave module.

[0084] Exemplarily, the voltage regulation control module may be a voting manager, which is connected to at least one load and records the current load voltage corresponding to each load. When receiving a voltage regulation application initiated by the first load, the voting manager may compare the first voltage in the voltage regulation application with at least one current load voltage, and when the first voltage is the maximum value of at least one current load voltage, determine the first voltage as the target voltage, and send the target voltage to the power interface slave module through the power interface master module, and then the power interface slave module sends the target voltage to the power supply module.

[0085] It should be noted that when the voting manager receives the voltage regulation completion signal, it indicates that the power supply module has completed the voltage regulation on at least one load. The voting manager sends the voltage regulation completion signal to at least one load. In addition, the voting manager uses the target voltage as the current load voltage corresponding to the first load, and updates the current load voltage corresponding to the first load in the at least one current load voltage recorded by itself to the target voltage.

[0086] In some embodiments, since the power interface main module realizes data or signal interaction through register operation instructions, when the power interface main module receives the target voltage sent by the voltage regulation control module, it can generate a second write register instruction according to the target voltage in accordance with the data transmission protocol requirements, include the target voltage in the second write register instruction, and send the target voltage to the power supply module by sending the second write register instruction to the power supply module.

[0087] In some embodiments, the power interface master module can send a second write register instruction containing the target voltage to the power interface slave module, and the power interface slave module directly sends the second write register instruction containing the target voltage to the power supply module, and the power supply module obtains the target voltage from the second write register instruction. Alternatively, the power interface slave module can also write the target voltage into the second register corresponding to the power supply module according to the second register address in the second write register instruction, and the power supply module reads the target voltage from the second register address. Here, the second register is a register connected internally or externally to the power supply module. The specific selection is made according to the actual situation, and the embodiments of the present application are not limited.

[0088] It can be understood that by using the power interface slave module to send the first write register instruction, the voltage regulation completion signal can be transmitted between the power supply module and the voltage regulation control module; and the power interface master module can also be used to send the second write register instruction to achieve the target voltage transmission between the power supply module and the voltage regulation control module, thereby realizing the closed-loop regulation process of voltage control, ensuring the uniformity of signal and data transmission in the voltage control circuit, reducing circuit complexity, and improving system maintainability.

[0089] In some embodiments, the voltage regulation control module is further used to send a voltage regulation completion signal to the first load when it is determined that the first voltage in the voltage regulation application is not the maximum value of the at least one current load voltage based on the voltage regulation application received from the first load.

[0090] Exemplarily, a voltage regulation request may include a boost request. The voltage regulation control module receives a boost request sent by the first load. When the first voltage in the boost request is not the maximum value of the at least one current load voltage, since the current voltage on the power domain where the first load is located is determined by the maximum value of at least one current load voltage, it means that the current voltage on the power domain where the first load is located is higher than the first voltage required by the first load, which can directly meet the needs of the first load. There is no need for the power supply module to boost the current voltage provided on the power domain. The voltage regulation control module directly sends a voltage regulation completion signal to the first load.

[0091] For example, after load 1 sends a voltage value of 1 to the voting manager, if other loads connected to the voting manager in the same power domain as load 1 run at a higher voltage, that is, the current load voltage of other loads is higher than the voltage value 1 required by subsystem 1, the power supply module does not need to boost the voltage. At this time, the voting manager can directly send a voltage regulation completion signal to load 1, and load 1 can immediately start to increase the frequency to start business without waiting.

[0092] It can be understood that in the embodiment of the present application, when the voltage regulation control module determines that no voltage regulation is required based on the first voltage and at least one recorded current load voltage, it can directly send a voltage regulation completion signal to the first load, thereby improving the voltage control efficiency, thereby further reducing the terminal power consumption and improving the terminal response speed.

[0093] In some embodiments, Figure 5 As shown, the power interface master module 210 may include: a system power management interface master module 211, namely, an SPMI master module 211; the power interface slave module 220 may include: a system power management interface slave module 221, namely, an SPMI slave module 221; and the first write register instruction includes: a write master device instruction.

[0094] In some embodiments, the master device in the write master device instruction may refer to the master device defined in the SPMI protocol. The system power management interface master module and the voltage regulation control module connected thereto are deployed on the system-level chip, and the system-level chip can be used as the master device of the SPMI protocol. The system power management interface slave module and the power supply module connected thereto are deployed on the power management chip, and the power management chip can be used as the slave device of the SPMI protocol. The register operation instructions supported by the SPMI standard protocol can be shown in Table 1, as follows:

[0095] Table 1

[0096] Order: direction: Write register instruction Sent from the master device to the slave device Master Write Command Sent from the slave device to the master device

[0097] The write register instruction in Table 1 is equivalent to the second write register instruction in the embodiment of the present application, and the write master device (Master Write) instruction in Table 1 is equivalent to the first write register instruction in the embodiment of the present application. The Master Write instruction is used in the SPMI protocol for writing a certain value from a slave device to a certain register of a master device. The embodiment of the present application can use the Master Write instruction as the first write register instruction, and according to the preset first register address and the first preset value pre-agreed by the master device and the slave device, generate the corresponding Master Write instruction as the signal of completing the voltage regulation of the power supply module in the slave device, and send it to the SPMI master module in the master device through the SPMI slave module; the SPMI master module sends the Master Write instruction to the voltage regulation control module connected thereto; the voltage regulation control module sends a voltage regulation completion signal to at least one load when receiving the Master Write instruction.

[0098] It can be understood that by transmitting the write master device instruction between the master and slave modules of the system power management interface, it is possible to send a signal to the master device in a timely manner when the voltage regulation of the slave device is completed, so that the master device can promptly notify the load of the voltage regulation completion signal, thereby reducing the blind waiting time of the load, reducing terminal power consumption, and improving business response speed.

[0099] In some embodiments, based on Figure 5 ,like Figure 6 As shown, the system power management interface slave module 221 is used to send a write master device instruction to the system power management interface master module 211 when receiving the initial voltage regulation completion signal sent by the voltage comparison module 110;

[0100] The system power management interface main module 211 is also used to send the write master device instruction to the voltage regulation control module 30;

[0101] The voltage regulation control module 30 is further configured to send a voltage regulation completion signal to at least one load 40 according to a write master device instruction.

[0102] In some embodiments, when the system power management interface slave module receives the initial voltage regulation signal sent by the voltage comparison module, such as receiving the high level signal output by the voltage comparator in the DCDC, the system power management interface slave module generates a write master device instruction according to the preset first register address and the first preset value. The first register is a register corresponding to the voltage regulation control module, that is, a register on the master device system-level chip, and the first preset value is a register value corresponding to the first register. The first register can be connected to the voltage regulation control module internally or externally.

[0103] In some embodiments, the system power management interface slave module sends a write master device instruction to the system power management interface main module. The system power management interface main module can directly send the write master device instruction to the voltage regulation control module through a connection line such as a data bus. When the voltage regulation control module receives the write master device instruction containing a preset first register address and a first preset value, it can determine that the power supply module voltage regulation is completed and send a voltage regulation completion signal to at least one load.

[0104] In some embodiments, the system power management interface main module is further used to write a first preset value in a first register corresponding to the voltage regulation control module according to a write master device instruction; the voltage regulation control module is further used to send a voltage regulation completion signal to at least one load when the value of the first register is the first preset value. Here, the first register can be a register connected internally or externally to the voltage regulation control module.

[0105] In some embodiments, when the system power management interface master module receives a write master device instruction sent by the system power management interface slave module, it can perform a write master device operation according to a preset first register address and a first preset value in the write master device instruction, and write the first preset value in the first register. In this way, when the voltage regulation control module detects that the value of the first register is the first preset value, it can determine that the voltage regulation of the power supply module is completed, and send a voltage regulation completion signal to at least one load.

[0106] It can be understood that, using the first write register instruction with a preset first register address and a first preset value as a signal for the completion of voltage regulation, the first write register instruction is sent from the system power management interface slave module to the system power management interface master module in accordance with the interface protocol between the system power management interface master module and the system power management interface slave module, thereby realizing the transmission of the voltage regulation completion signal, reducing the time that the load blindly waits for the voltage regulation to be completed, thereby reducing the terminal power consumption and improving the terminal response speed.

[0107] In some embodiments, the system power management interface master module is further used to generate a second write register instruction based on the target voltage and send it to the system power management interface slave module; the system power management interface slave module is used to send the target voltage to the power supply module through the second write register instruction.

[0108] In some embodiments, when the system power management interface master module receives the target voltage sent by the voltage regulation control module, it can encapsulate the target voltage, generate a second write register instruction, and send the second write register instruction to the system power management interface slave module. Here, the second write register instruction may include the target voltage and a preset second register address. The preset second register address is the address of the second register corresponding to the power supply module, and the target voltage is used as the register value corresponding to the preset second register address in the second write register instruction.

[0109] In some embodiments, the system power management interface slave module can send the second write register instruction directly to the power supply module through a link such as a data bus. When the power supply module receives the second write register instruction, it can directly read the target voltage from the second write register instruction and adjust the voltage according to the target voltage.

[0110] In some embodiments, the system power management interface slave module is further configured to write the target voltage into a second register corresponding to the power supply module according to a second write register instruction.

[0111] In some embodiments, when the system power management interface slave module receives the second write register instruction sent by the system power management interface master module, it can perform a write slave device operation according to the preset second register address and target voltage in the second write register instruction, and write the target voltage in the second register. In this way, the power supply module can read the target voltage from the second register to adjust the voltage according to the target voltage.

[0112] It can be understood that the system power management interface master module generates a second write register instruction according to the target voltage, and uses the second write register instruction to send the target voltage to the system power management interface slave module, and then sends the target voltage to the power supply module through the system power management interface slave module. In this way, the target voltage required by the load is sent to the power supply end through the write register instruction between the system power management interface master and slave modules, which is similar to the transmission of the voltage regulation completion signal, thereby ensuring the uniformity of signal and data transmission in the voltage control circuit, reducing circuit complexity, and improving system maintainability.

[0113] The present application provides a voltage control method, which is applied to a power management chip on a terminal. The power management chip includes: a power supply module and a power interface slave module connected to the power supply module; the power supply module is used to supply power to at least one load; the power interface slave module is connected to the power interface master module on the system-level chip; the power interface master module is connected to the voltage regulation control module on the system-level chip; the voltage regulation control module is connected to at least one load. Figure 7 As shown, the voltage control method provided in the embodiment of the present application can be implemented by executing the process of S101-S102 as follows:

[0114] S101. Receive, through a power interface slave module, a target voltage corresponding to at least one load that is sent by a voltage regulation control module through a power interface master module.

[0115] S102. Adjust the current voltage provided on at least one load according to the target voltage through the power supply module, and when the current voltage reaches the target voltage, send a first write register instruction to the power interface main module through the power interface slave module, so that the voltage regulation control module sends a voltage regulation completion signal to at least one load according to the first write register instruction received from the power interface main module.

[0116] Here, the process of S101-S102 is consistent with the description of the corresponding working process in the above-mentioned voltage control circuit, and will not be repeated here.

[0117] In some embodiments, the power supply module includes: a voltage comparison module; the process of "sending a first write register instruction to the voltage regulation control module through the power interface slave module and the power interface master module when the current voltage reaches the target voltage" in the above S102 may include:

[0118] The voltage comparison module compares the current voltage with the target voltage, and when the current voltage reaches the target voltage, sends an initial voltage regulation completion signal to the power interface slave module;

[0119] The power interface slave module, when receiving the initial voltage regulation completion signal, sends a first write register instruction to the power interface master module, so as to send the first write register instruction to the voltage regulation control module through the power interface master module.

[0120] In some embodiments, before "adjusting the current voltage provided on at least one load according to the target voltage through the power supply module" in S102, it may also include: sending the target voltage to the power supply module through the power interface slave module.

[0121] In some embodiments, the above process of S101 may be implemented by the following process, including:

[0122] The second register write instruction sent by the voltage regulation control module through the power interface master module is received through the power interface slave module; the second register write instruction includes a target voltage.

[0123] In some embodiments, the above-mentioned “sending the target voltage to the power supply module via the power interface slave module” includes: sending the target voltage to the power supply module via the power interface slave module according to the second write register instruction.

[0124] In some embodiments, the power interface master module includes: a system power management interface master module; the power interface slave module includes: a system power management interface slave module; the first write register instruction includes: a write master device instruction; the process of "sending the first write register instruction to the power interface master module through the power interface slave module when the current voltage reaches the target voltage" in S102 may include:

[0125] When the initial voltage regulation completion signal sent by the voltage comparison module is received from the system power management interface slave module, a write master device instruction is sent to the system power management interface master module.

[0126] In some embodiments, the above-mentioned process of "sending the target voltage to the power supply module through the power interface slave module according to the second write register instruction" may include: writing the target voltage to the second register corresponding to the power supply module through the system power management interface slave module according to the second write register instruction.

[0127] The above voltage control process is consistent with the description of the corresponding working process in the above voltage control circuit, and will not be repeated here.

[0128] It can be understood that the power supply module sends a first write register instruction to the voltage regulation control module through the power interface slave module and the power interface master module when adjusting the current voltage provided on at least one load to the target voltage according to the target voltage sent by the voltage regulation control module. In this way, the voltage regulation control module determines that the voltage regulation is completed when receiving the first write register instruction, and sends a voltage regulation completion signal to at least one load to notify the load that the operating frequency can be adjusted to the target voltage to run the service in time. Thereby, the blind waiting time of the load after initiating the voltage regulation application and the high voltage duration are shortened, the terminal response speed is improved, and the terminal power consumption is reduced. In addition, the load starts to adjust the operating frequency only when it receives the voltage regulation completion signal, thereby solving the problem in the current related technical solution that the power supply module fails to regulate the voltage due to some faults, the load does not know the voltage regulation failure, and blindly waits for a period of time before adjusting the operating frequency, resulting in service failure or abnormal operation, thereby improving the stability of the terminal service.

[0129] The embodiment of the present application provides a voltage control method, which is applied to a system-level chip on a terminal. The system-level chip includes: a voltage regulation control module and a power interface main module connected to the voltage regulation control module; the voltage regulation control module is connected to at least one load, the power interface main module is connected to a power interface slave module on a power management chip; the power interface slave module is connected to a power supply module of the power management chip; the power supply module is used to supply power to at least one load. Figure 8 As shown, the voltage control method provided in the embodiment of the present application can be implemented by executing the process of S201-S203 as follows:

[0130] S201. Send at least one target voltage corresponding to a load to a power interface slave module through a power interface master module, so as to send the target voltage to a power supply module through the power interface slave module.

[0131] S202. Receive a first write register instruction sent by the power supply module through the power interface main module, and send the first write register instruction to the voltage regulation control module; the first write register instruction is sent by the power supply module to the power interface main module through the power interface slave module when the power supply module adjusts the current voltage provided on at least one load to the target voltage.

[0132] S203: Send a voltage regulation completion signal to at least one load through the voltage regulation control module according to the first write register instruction.

[0133] The above voltage control process is consistent with the description of the corresponding working process in the above voltage control circuit, and will not be repeated here.

[0134] In some embodiments, before S201, the following steps may also be included:

[0135] The target voltage is determined by the voltage regulation control module according to the voltage regulation request initiated by the first load among the at least one load; and the target voltage is sent to the power interface main module.

[0136] The above S201 includes: generating a second write register instruction according to the target voltage through the power interface master module, and sending the second write register instruction to the power interface slave module, so that the power interface slave module sends the target voltage to the power supply module through the second write register instruction.

[0137] In some embodiments, the power interface master module includes: a system power management interface master module; the power interface slave module includes: a system power management interface slave module; the first write register instruction includes: a write master device instruction; the above S202 may include:

[0138] The write master device instruction is sent to the voltage regulation control module through the system power management interface master module; the write master device instruction is sent to the system power management interface master module by the system power management interface slave module when receiving the initial voltage regulation completion signal sent by the voltage comparison module;

[0139] The above S203 may include: sending a voltage regulation completion signal to at least one load through the voltage regulation control module according to the write master device instruction.

[0140] In some embodiments, the above-mentioned "sending a voltage regulation completion signal to at least one load through the voltage regulation control module according to the instruction of writing the master device" includes: writing a first preset value in a first register corresponding to the voltage regulation control module through the system power management interface main module according to the instruction of writing the master device; sending a voltage regulation completion signal to at least one load through the voltage regulation control module when the value of the first register is the first preset value.

[0141] In some embodiments, the voltage regulation control module records at least one current load voltage corresponding to at least one load; the above “determining the target voltage through the voltage regulation control module according to the voltage regulation application initiated by the first load among the at least one load” includes:

[0142] When receiving a voltage regulation request sent by a first load, determine whether the first voltage in the voltage regulation request is the maximum value of at least one current load voltage; when the first voltage is the maximum value of at least one current load voltage, determine the target voltage based on the first voltage.

[0143] In some embodiments, the method further includes: sending a voltage regulation completion signal to the first load through the voltage regulation control module when the first voltage is not the maximum value of at least one current load voltage.

[0144] It can be understood that, when the power supply module adjusts the current voltage provided on at least one load to the target voltage according to the target voltage sent by the voltage regulation control module, the power supply module sends a first write register instruction to the voltage regulation control module through the power interface slave module and the power interface main module. In this way, when the voltage regulation control module receives the first write register instruction, it determines that the voltage regulation is completed, and sends a voltage regulation completion signal to at least one load to notify the load that the operating frequency can be adjusted to the target voltage to run the service in time. Thereby, the blind waiting time of the load after initiating the voltage regulation application and the high voltage duration are shortened, the terminal response speed is improved, and the terminal power consumption is reduced. In addition, the load starts to adjust the operating frequency only when it receives the voltage regulation completion signal, thereby solving the problem in the current related technical solution that the power supply module fails to regulate the voltage due to some faults, the load does not know the voltage regulation failure, and blindly waits for a period of time before adjusting the operating frequency, resulting in service failure or abnormal operation, thereby improving the stability of the terminal service.

[0145] Next, we will combine Fig. 9 and Fig.10 , illustrating an exemplary application of the voltage control circuit and the voltage control method in the embodiments of the present application in a practical application scenario.

[0146] The present application embodiment provides a DVFS control circuit, such as Fig. 9As shown, it includes PMIC and SOC chips. Here, the PMIC chip is equivalent to the power management chip, and the DCDC1 in the PMIC chip is equivalent to the power supply module; the SOC chip is equivalent to the system-level chip, and the voting manager in the SOC chip is equivalent to the voltage regulation control module. The SOC chip also includes at least one subsystem (subsystem 1, subsystem 2...subsystem N), which is equivalent to at least one load. At least one subsystem is in the same power domain VDD1, and DCDC1 is used to power the power domain VDD1. In some embodiments, as Fig. 9 As shown, the analog voltage signal output by DCDC1 can also be filtered by the first inductor L1 and the first capacitor C1. Fig. 9 The voltage control method provided in the embodiment of the present application can be as follows: Fig.10 As shown below:

[0147] S401 , the first subsystem initiates a voltage boost and sends a voltage value 1 to a voting manager.

[0148] In S401, the first subsystem may be any one of subsystems 1 to N, which is equivalent to the first load mentioned above. The voltage boost application is equivalent to the voltage regulation application mentioned above. The voltage value 1 is equivalent to the first voltage.

[0149] S402: The voting manager determines whether voltage adjustment is required. If yes, execute S403; if no, execute S407.

[0150] In S402, upon receiving the voltage boost request, the voting manager determines whether voltage regulation is required based on voltage value 1 and the current load voltage of at least one subsystem. If the first voltage is greater than the maximum value of at least one current load voltage, the voting manager determines that voltage regulation is required, determines the target voltage and executes S403; if the first voltage is less than or equal to the maximum value of at least one current load voltage, the voting manager determines that voltage regulation is not required and executes S407.

[0151] S403: The voting manager sends the target voltage to the PMIC via the SPMI.

[0152] In S403, the voting manager generates a second write register instruction according to the target voltage through the SPMI master module, and sends the second write register instruction to the SPMI slave module. The SPMI slave module sends the target voltage to DCDC1 in the PMIC, and DCDC1 starts voltage regulation according to the target voltage.

[0153] S404 , after the voltage adjustment of the DCDC1 module is completed, an initial voltage adjustment completion signal is sent to the SPMI slave module.

[0154] S405. The SPMI slave module sends a master device instruction to the SPMI master module.

[0155] S406. The SPMI main module sends a main device instruction to the voting manager.

[0156] In S406, the SPMI main module can directly send the write master device instruction to the voting manager to notify the voting manager that the voltage adjustment is completed, or write the first preset value to the preset first register address according to the write master device instruction to notify the voting manager that the voltage adjustment is completed.

[0157] S407: The voting manager sends a voltage regulation completion signal to the first subsystem.

[0158] In S407, when the voting manager receives the write master device instruction sent by the SPMI master module, it sends a voltage adjustment completion signal to the first subsystem. Alternatively, when the voting manager determines that voltage adjustment is not required in S402, it sends a voltage adjustment completion signal to the first subsystem.

[0159] S408: The first subsystem increases the operating frequency and starts the service.

[0160] It can be seen that through the voltage control circuit provided in the embodiment of the present application, once the power supply module adjusts the current voltage to the target voltage, the voltage comparator in the power supply module can send an initial voltage regulation completion signal to the SPMI slave module, and the SPMI slave module generates a write master device instruction based on the initial voltage regulation completion signal and sends it to the SPMI master module; the SPMI master module sends the write master device instruction to the voting manager, and the voting manager sends a voltage regulation completion signal to the subsystem when receiving the write master device instruction. The subsystem can immediately know that the voltage regulation is completed, increase the frequency to start the business, and there is no need to wait for a while.

[0161] In some embodiments, the timing flow chart of the DVFS control circuit of the embodiment of the present application can be as follows: Fig.11 As shown. Among them, time T1' is the time when the first subsystem initiates a voltage boost application and sends the first voltage to the voting manager; time T2' is the time when DCDC1 receives the target voltage sent by the voting manager and starts to boost the voltage according to the target voltage; time T3' is the time when the boost is completed, the first subsystem receives the voltage regulation completion signal, and starts to run the business at the target voltage; time T4' is the time when the first subsystem ends the business and sends a voltage reduction application to the voting manager; time T5' is the time when DCDC1 starts to reduce the voltage according to the target voltage of the voltage reduction application; time T6' is the time when the voltage reduction is completed.

[0162] It can be seen that when the DVFS control circuit of the embodiment of the present application boosts the voltage to the target voltage at time T3', the first subsystem can immediately receive the voltage regulation completion signal and start the service. Figure 2 , saving Figure 2In the fixed waiting time period T3-T4 at a high level, under the condition of ensuring the subsystem service running time Tr, the high level duration Th' in the embodiment of the present application is shorter than the high level duration Th in the current related art. Thus, the terminal response speed is improved and the terminal power consumption is reduced.

[0163] It can be understood that the embodiment of the present application detects the completion of voltage regulation by utilizing the voltage comparator in the DCDC module, and at the same time utilizes the Master Write instruction of the SPMI so that the PMIC can transmit the indication signal of the completion of voltage regulation to the SOC to notify the SOC that the voltage regulation is completed, thereby optimizing the DVFS process from an open-loop control process in which the subsystem issues a voltage regulation application in the related technology, the subsystem blindly waits for a fixed time until the subsystem increases the frequency, to a closed-loop control process in which the subsystem issues a voltage regulation application, the subsystem waits for the voltage regulation completion signal feedback, and the subsystem increases the frequency, thereby improving the terminal response speed and reducing the terminal power consumption.

[0164] The present application embodiment provides a power management chip, such as Fig.12 As shown, the power management chip 2 includes: a power supply module 21, a power interface slave module 22 connected to the power supply module 21; the power supply module 21 is used to supply power to at least one load; the power interface slave module 22 is connected to the power interface master module 32 on the system-level chip 3; the power interface master module 32 is connected to the voltage regulation control module 31 on the system-level chip 3; the voltage regulation control module 31 is connected to the at least one load; wherein,

[0165] The power interface slave module 22 is used to receive the target voltage corresponding to the at least one load sent by the voltage regulation control module 31 through the power interface master module 32, and send the target voltage to the power supply module 21;

[0166] The power supply module 21 is used to adjust the current voltage provided on the at least one load according to the target voltage, and when the current voltage reaches the target voltage, send a first write register instruction to the voltage regulation control module 31 through the power interface slave module 22 and the power interface master module 32, so that the voltage regulation control module 31 sends a voltage regulation completion signal to the at least one load according to the first write register instruction.

[0167] The present application embodiment provides a system-level chip, such as Fig.12As shown, it includes: a voltage regulation control module 31, a power interface main module 32 connected to the voltage regulation control module 31; the voltage regulation control module 31 is connected to at least one load; the power interface main module 32 is connected to the power interface slave module 22 on the power management chip 2; the power interface slave module 22 is connected to the power supply module 21 of the power management chip 2; the power supply module 21 is used to supply power to the at least one load; wherein,

[0168] The voltage regulation control module 31 is used to send the target voltage corresponding to the at least one load to the power supply module 21 through the power interface master module 32 and the power interface slave module 22, so that the power supply module 21 adjusts the current voltage provided on the at least one load according to the target voltage, and sends a first write register instruction to the power interface master module 32 through the power interface slave module 22 when the current voltage reaches the target voltage;

[0169] The power interface main module 32 is used to send the first write register instruction to the voltage regulation control module 31;

[0170] The voltage regulation control module 31 is further configured to send a voltage regulation completion signal to the at least one load according to the first register write instruction.

[0171] The present application also provides a terminal in which the power management chip 2 and the system-level chip 3 provided in the above embodiment can be integrated. Fig.12 ,like Fig.13 As shown, the terminal 4 may include: a power management chip 2 and a system-level chip 3; wherein the power management chip 2 includes: a power supply module 21 and a power interface slave module 22 connected to the power supply module 21; the power supply module 21 is used to supply power to at least one load; the system-level chip 3 includes: a voltage regulation control module 31 and a power interface master module 32 connected to the voltage regulation control module 31; the voltage regulation control module 31 is connected to the at least one load; the power interface slave module 22 is connected to the power interface master module 32;

[0172] The system-level chip 3 is used to determine the target voltage corresponding to at least one load through the voltage regulation control module 31; and send the target voltage to the power interface slave module 22 through the power interface master module 32;

[0173] The power management chip 2 is used to adjust the current voltage provided on the at least one load according to the target voltage through the power supply module 21; when the current voltage reaches the target voltage, send a first write register instruction to the power interface master module 32 through the power interface slave module 22;

[0174] The system-level chip is also used to send the first write register instruction to the voltage regulation control module 31 through the power interface main module 32; and send a voltage regulation completion signal to at least one load through the voltage regulation control module 31 according to the first write register instruction.

[0175] In some embodiments, the terminal provided in the embodiments of the present application can be implemented as various types of user terminals such as laptop computers, tablet computers, desktop computers, set-top boxes, mobile devices (e.g., mobile phones, portable music players, personal digital assistants, dedicated messaging devices, portable gaming devices), etc. The specific selection is made according to the actual situation, and the embodiments of the present application are not limited.

[0176] Those skilled in the art will appreciate that the embodiments of the present application may be provided as methods, systems, or computer program products. Therefore, the present application may adopt the form of hardware embodiments, software embodiments, or embodiments in combination with software and hardware. Moreover, the present application may adopt the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage and optical storage, etc.) that contain computer-usable program code.

[0177] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0178] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0179] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process in the computer or other programmable device. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0180] The above is only a preferred embodiment of the present application and is not intended to limit the protection scope of the present application. Any modifications, equivalent substitutions and improvements made within the spirit and scope of the present application are included in the protection scope of the present application.

Claims

1. A voltage control circuit, characterized in that: include: A power supply module, a voltage regulation control module, a power interface master module and a power interface slave module, wherein the voltage regulation control module is connected to the power interface master module; The power supply module is connected to the power interface slave module, and the power interface master module is connected to the power interface slave module; wherein, The voltage regulation control module is used to send a target voltage corresponding to at least one load to the power supply module through the power interface master module and the power interface slave module; The power supply module is used to adjust the current voltage provided on the at least one load according to the target voltage, and when the current voltage reaches the target voltage, send a first write register instruction to the voltage regulation control module through the power interface slave module and the power interface master module; the first write register instruction includes: a preset first register address and a first preset value; the preset first register address and the first preset value are used to indicate that the power supply module completes voltage regulation; The voltage regulation control module is further configured to send a voltage regulation completion signal to the at least one load according to the first write register instruction.

2. The circuit according to claim 1, characterized in that The power supply module includes: a voltage comparison module; The voltage comparison module is used to compare the current voltage with the target voltage, and send an initial voltage regulation completion signal to the power interface slave module when the current voltage reaches the target voltage; The power interface slave module is used to send the first register write instruction to the voltage regulation control module through the power interface master module when receiving the initial voltage regulation completion signal.

3. The circuit according to claim 1, characterized in that The voltage regulation control module is connected to the at least one load; The voltage regulation control module is further used to determine a target voltage according to a voltage regulation application initiated by a first load among the at least one load; and send the target voltage to the power interface main module; The power interface master module is used to generate a second write register instruction according to the target voltage, and send the second write register instruction to the power interface slave module; The power interface slave module is used to send the target voltage to the power supply module through the second write register instruction.

4. The circuit according to any one of claims 1 to 3, characterized in that: The power interface master module includes: a system power management interface master module; the power interface slave module includes: a system power management interface slave module; the first write register instruction includes: a write master device instruction.

5. The circuit according to claim 4, characterized in that The system power management interface slave module is used to send the write master device instruction to the system power management interface master module when receiving the initial voltage regulation completion signal sent by the voltage comparison module; The system power management interface main module is used to send the write master device instruction to the voltage regulation control module; The voltage regulation control module is further configured to send a voltage regulation completion signal to the at least one load according to the write master device instruction.

6. The circuit according to claim 5, characterized in that The system power management interface main module is further used to write a first preset value into a first register corresponding to the voltage regulation control module according to the write master device instruction; The voltage regulation control module is further configured to send a voltage regulation completion signal to the at least one load when the value of the first register is the first preset value.

7. The circuit according to claim 4, characterized in that The system power management interface slave module is used to write the target voltage into a second register corresponding to the power supply module according to a second write register instruction.

8. The circuit according to any one of claims 1 to 3 or any one of claims 5 to 7, characterized in that: At least one current load voltage corresponding to the at least one load is recorded in the voltage regulation control module; The voltage regulation control module is further used to, when receiving a voltage regulation application sent by a first load, determine whether a first voltage in the voltage regulation application is a maximum value among the at least one current load voltage; when the first voltage is the maximum value among the at least one current load voltage, determine the target voltage according to the first voltage, and send the target voltage to the power supply module through the power interface master module and the power interface slave module; The first load is used to operate the service at the target operating frequency corresponding to the target voltage when receiving the voltage regulation completion signal.

9. The circuit according to claim 8, characterized in that The voltage regulation control module is further configured to send the voltage regulation completion signal to the first load when the first voltage is not a maximum value among the at least one current load voltage.

10. A voltage control method, applied to a power management chip, characterized in that: The power management chip comprises: a power supply module and a power supply interface slave module connected to the power supply module; the power supply module is used to supply power to at least one load; the power supply interface slave module is connected to a power supply interface master module on a system-level chip; the power supply interface master module is connected to a voltage regulation control module on the system-level chip; the voltage regulation control module is connected to the at least one load; the method comprises: Receiving, through the power interface slave module, a target voltage corresponding to the at least one load sent by the voltage regulation control module through the power interface master module; Through the power supply module, the current voltage provided on the at least one load is adjusted according to the target voltage, and when the current voltage reaches the target voltage, a first write register instruction is sent to the power interface main module through the power interface slave module, so that the voltage regulation control module sends a voltage regulation completion signal to the at least one load according to the first write register instruction received from the power interface main module; the first write register instruction includes: a preset first register address and a first preset value; the preset first register address and the first preset value are used to indicate that the power supply module has completed the voltage regulation.

11. A voltage control method, characterized in that: Applied to a system-level chip, the system-level chip comprises: a voltage regulation control module and a power interface main module connected to the voltage regulation control module; the voltage regulation control module is connected to at least one load, the power interface main module is connected to a power interface slave module on a power management chip; the power interface slave module is connected to a power supply module of a power management chip; the power supply module is used to supply power to the at least one load; the method comprises: Sending a target voltage corresponding to the at least one load to the power interface slave module through the power interface master module, so as to send the target voltage to the power supply module through the power interface slave module; The first write register instruction sent by the power supply module is received through the power interface main module, and the first write register instruction is sent to the voltage regulation control module; the first write register instruction is sent to the power interface main module through the power interface slave module when the power supply module adjusts the current voltage provided by the at least one load to the target voltage; the first write register instruction includes: a preset first register address and a first preset value; the preset first register address and the first preset value are used to indicate that the power supply module has completed voltage regulation; A voltage regulation completion signal is sent to the at least one load through the voltage regulation control module according to the first write register instruction.

12. A power management chip, characterized in that: include: A power supply module, a power supply interface slave module connected to the power supply module; the power supply module is used to supply power to at least one load; the power supply interface slave module is connected to the power supply interface master module on the system-level chip; the power supply interface master module is connected to the voltage regulation control module on the system-level chip; the voltage regulation control module is connected to the at least one load; wherein, The power interface slave module is used to receive the target voltage corresponding to the at least one load sent by the voltage regulation control module through the power interface master module, and send the target voltage to the power supply module; The power supply module is used to adjust the current voltage provided on the at least one load according to the target voltage, and when the current voltage reaches the target voltage, send a first write register instruction to the voltage regulation control module through the power interface slave module and the power interface master module, so that the voltage regulation control module sends a voltage regulation completion signal to the at least one load according to the first write register instruction; the first write register instruction includes: a preset first register address and a first preset value; the preset first register address and the first preset value are used to indicate that the power supply module has completed voltage regulation.

13. A system-on-chip, characterized in that: include: A voltage regulation control module, a power interface main module connected to the voltage regulation control module; the voltage regulation control module is connected to at least one load; the power interface main module is connected to the power interface slave module on the power management chip; the power interface slave module is connected to the power supply module of the power management chip; the power supply module is used to supply power to the at least one load; wherein, The voltage regulation control module is used to send the target voltage corresponding to the at least one load to the power supply module through the power interface master module and the power interface slave module, so that the power supply module adjusts the current voltage provided on the at least one load according to the target voltage, and sends a first write register instruction to the power interface master module through the power interface slave module when the current voltage reaches the target voltage; the first write register instruction includes: a preset first register address and a first preset value; the preset first register address and the first preset value are used to indicate that the power supply module completes voltage regulation; The power interface main module is used to send the first write register instruction to the voltage regulation control module; The voltage regulation control module is further configured to send a voltage regulation completion signal to the at least one load according to the first write register instruction.

14. A terminal, characterized in that: include: A power management chip and a system-level chip; wherein the power management chip comprises: a power supply module and a power interface slave module connected to the power supply module; the power supply module is used to supply power to at least one load; the system-level chip comprises: a voltage regulation control module and a power interface master module connected to the voltage regulation control module; the voltage regulation control module is connected to the at least one load; the power interface slave module is connected to the power interface master module; The system-level chip is used to determine the target voltage corresponding to at least one load through the voltage regulation control module; and send the target voltage to the power interface slave module through the power interface master module; The power management chip is used to adjust the current voltage provided on the at least one load according to the target voltage through the power supply module; when the current voltage reaches the target voltage, send a first write register instruction to the power interface master module through the power interface slave module; the first write register instruction includes: a preset first register address and a first preset value; the preset first register address and the first preset value are used to indicate that the power supply module has completed voltage regulation; The system-level chip is also used to send the first write register instruction to the voltage regulation control module through the power interface main module; and send a voltage regulation completion signal to at least one load through the voltage regulation control module according to the first write register instruction.

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