Direct conversion receiver

Abstract

This invention provides a direct conversion receiver, comprising a low-noise amplifier, a first single-balanced passive mixer, a first transimpedance amplifier, a first programmable gain amplifier, a second single-balanced passive mixer, a second transimpedance amplifier, and a second programmable gain amplifier. The direct conversion receiver is designed based on a single-balanced passive mixer, which achieves a 25% duty cycle local oscillator signal drive effect using an initial local oscillator signal with a 50% duty cycle. Compared to a direct conversion receiver designed based on a double-balanced passive mixer with a 25% duty cycle local oscillator signal, it offers higher gain, lower power consumption, and lower noise. It does not require additional logic devices to implement the duty cycle conversion of the local oscillator signal, thus reducing the phase noise of the local oscillator signal. Simultaneously, the subsequent transimpedance amplifier and programmable gain amplifier form a combined filter circuit, which has high out-of-band rejection capability, improving the linearity and anti-interference capability of the direct conversion receiver.

Description

Technical Field

[0001] This invention relates to the field of wireless communication technology, and more particularly to a direct conversion receiver. Background Technology

[0002] In recent years, the demand for multi-standard compatibility, low power consumption and high linearity in wireless communication receivers has become increasingly urgent. Direct conversion receiver architecture has attracted widespread attention due to its simple structure, ease of integration with baseband circuits, low power consumption and potential low cost. However, it also has internal drawbacks such as DC offset and flicker noise. Passive mixers, on the other hand, have become the preferred choice in direct conversion receiver design due to their superior linearity, power consumption and flicker noise performance.

[0003] Double-balanced passive mixers are widely used as downconverters in direct-conversion receivers due to their lower output harmonic composition. Their local oscillator signal is generated by pairwise ANDing of four-phase signals from a divide-by-two circuit, ultimately yielding a quadrature local oscillator signal with a 25% duty cycle. However, double-balanced passive mixers suffer from negative conversion gain and higher noise, while single-balanced passive mixers achieve a voltage conversion gain greater than 1 and have lower noise. For the same differential output, a double-balanced passive mixer requires twice the input signal of a single-balanced passive mixer. Keeping the input signal constant increases the input impedance of the transimpedance stage, affecting linearity. Furthermore, since the AND gate operates in the radio frequency band, it consumes a larger current to meet switching requirements, which is unsuitable for low-power designs. Additionally, the extra logic operations worsen the phase noise of the local oscillator signal.

[0004] Therefore, there is an urgent need for a direct conversion receiver technology solution based on a single balanced passive mixer with a 25% duty cycle. Summary of the Invention

[0005] In view of the shortcomings of the prior art described above, the purpose of this invention is to provide a direct conversion receiver technical solution based on a single-balanced passive mixer. In the single-balanced passive mixer, the driving effect of a 25% duty cycle local oscillator signal can be achieved using only a 50% duty cycle local oscillator signal, thereby reducing the power consumption and noise of the direct conversion receiver and improving its linearity and anti-interference capability.

[0006] To achieve the above and other objectives, the detailed technical solutions provided by this invention are as follows.

[0007] A direct conversion receiver, comprising:

[0008] A low-noise amplifier receives radio frequency signals and converts the radio frequency signals into an initial current signal;

[0009] The first single-balanced passive mixer receives the initial current signal and performs mixing processing on the initial current signal to obtain the first intermediate frequency current signal.

[0010] The first transimpedance amplifier receives the first intermediate frequency current signal and performs current-to-voltage conversion processing on the first intermediate frequency current signal to obtain the first initial voltage signal;

[0011] A first programmable gain amplifier receives the first initial voltage signal and amplifies the first initial voltage signal to obtain a first intermediate frequency voltage signal.

[0012] The second single-balanced passive mixer receives the initial current signal and performs mixing processing on the initial current signal to obtain the second intermediate frequency current signal.

[0013] The second transimpedance amplifier receives the second intermediate frequency current signal and performs current-to-voltage conversion processing on the second intermediate frequency current signal to obtain the second initial voltage signal;

[0014] The second programmable gain amplifier receives the second initial voltage signal and amplifies the second initial voltage signal to obtain the second intermediate frequency voltage signal;

[0015] The first single-balanced passive mixer and the second single-balanced passive mixer achieve a local oscillator signal driving effect with a duty cycle of 25% by using an initial local oscillator signal with a duty cycle of 50%.

[0016] Optionally, the initial local oscillator signal includes a first local oscillator signal, a second local oscillator signal, a third local oscillator signal, and a fourth local oscillator signal. The phase of the first local oscillator signal is opposite to the phase of the second local oscillator signal, the phase of the third local oscillator signal is opposite to the phase of the fourth local oscillator signal, and the phase of the third local oscillator signal lags behind the phase of the first local oscillator signal by 90°.

[0017] Optionally, the first single-balanced passive mixer includes a first NMOS transistor, a second NMOS transistor, a fifth NMOS transistor, and a sixth NMOS transistor. The source of the first NMOS transistor is connected to the initial current signal, the gate of the first NMOS transistor is connected to the first local oscillator signal, the drain of the first NMOS transistor is connected to the source of the fifth NMOS transistor, and the gate of the fifth NMOS transistor is connected to the fourth local oscillator signal. The source of the second NMOS transistor is connected to the initial current signal, the gate of the second NMOS transistor is connected to the second local oscillator signal, the drain of the second NMOS transistor is connected to the source of the sixth NMOS transistor, and the gate of the sixth NMOS transistor is connected to the third local oscillator signal. The drains of the fifth and sixth NMOS transistors cooperate to output the first intermediate frequency current signal.

[0018] Optionally, the second single-balanced passive mixer includes a third NMOS transistor, a fourth NMOS transistor, a seventh NMOS transistor, and an eighth NMOS transistor. The source of the third NMOS transistor is connected to the initial current signal, the gate of the third NMOS transistor is connected to the third local oscillator signal, the drain of the third NMOS transistor is connected to the source of the seventh NMOS transistor, and the gate of the seventh NMOS transistor is connected to the first local oscillator signal. The source of the fourth NMOS transistor is connected to the initial current signal, the gate of the fourth NMOS transistor is connected to the fourth local oscillator signal, the drain of the fourth NMOS transistor is connected to the source of the eighth NMOS transistor, and the gate of the eighth NMOS transistor is connected to the second local oscillator signal. The drains of the seventh and eighth NMOS transistors cooperate to output the second intermediate frequency current signal.

[0019] Optionally, the first transimpedance amplifier is a transimpedance amplifier with a Tow-Thomas II filter structure. The positive differential input terminal of the first transimpedance amplifier is connected to the drain of the fifth NMOS transistor, the negative differential input terminal of the first transimpedance amplifier is connected to the drain of the sixth NMOS transistor, and the negative differential output terminal of the first transimpedance amplifier cooperates with the positive differential output terminal of the first transimpedance amplifier to output the first initial voltage signal.

[0020] Optionally, the first programmable gain amplifier is a programmable gain amplifier with a multiple feedback filter structure. The positive differential input terminal of the first programmable gain amplifier is connected to the negative differential output terminal of the first transimpedance amplifier, and the negative differential input terminal of the first programmable gain amplifier is connected to the positive differential output terminal of the first transimpedance amplifier. The negative differential output terminal of the first programmable gain amplifier and the positive differential output terminal of the first programmable gain amplifier cooperate to output the first intermediate frequency voltage signal.

[0021] Optionally, the second transimpedance amplifier is a transimpedance amplifier with a Tow-Thomas II filter structure. The positive differential input terminal of the second transimpedance amplifier is connected to the drain of the seventh NMOS transistor, and the negative differential input terminal of the second transimpedance amplifier is connected to the drain of the eighth NMOS transistor. The negative differential output terminal of the second transimpedance amplifier cooperates with the positive differential output terminal of the second transimpedance amplifier to output the second initial voltage signal.

[0022] Optionally, the second programmable gain amplifier is a programmable gain amplifier with a multiple feedback filter structure. The positive differential input terminal of the second programmable gain amplifier is connected to the negative differential output terminal of the second transimpedance amplifier, and the negative differential input terminal of the second programmable gain amplifier is connected to the positive differential output terminal of the second transimpedance amplifier. The negative differential output terminal of the second programmable gain amplifier and the positive differential output terminal of the second programmable gain amplifier cooperate to output the second intermediate frequency voltage signal.

[0023] Optionally, the phase of the first intermediate frequency voltage signal differs from the phase of the second intermediate frequency voltage signal by 90°.

[0024] As described above, the direct conversion receiver of the present invention has at least the following beneficial effects:

[0025] A direct conversion receiver is designed based on a first and a second single-balanced passive mixer. Both mixers achieve a 25% duty cycle local oscillator signal drive effect using an initial local oscillator signal with a 50% duty cycle. Compared to a direct conversion receiver designed based on a double-balanced passive mixer with a 25% duty cycle local oscillator signal, this design offers higher gain, lower power consumption, and lower noise. It eliminates the need for additional logic devices to implement the duty cycle conversion of the local oscillator signal, further reducing the phase noise of the local oscillator signal and the entire direct conversion receiver. Simultaneously, the first transimpedance amplifier and the first programmable gain amplifier, as well as the second transimpedance amplifier and the second programmable gain amplifier, constitute a combined filter circuit with high out-of-band rejection capability, improving the linearity and anti-interference ability of the direct conversion receiver. Attached Figure Description

[0026] Figure 1 The diagram shown is a circuit diagram of a dual-balanced passive mixer and its 25% duty cycle local oscillator signal generation circuit in the prior art.

[0027] Figure 2 The diagram shown is a circuit diagram of the direct conversion receiver in this invention.

[0028] Figure 3 Displayed as Figure 2 Equivalent diagrams of the local oscillator duty cycle of the first and second single-balanced passive mixers. Detailed Implementation

[0029] The following specific examples illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.

[0030] Please see Figures 1 to 3 It should be noted that the illustrations provided in this embodiment are only schematic representations of the basic concept of the present invention. Therefore, the drawings only show components relevant to the present invention and are not drawn according to the actual number, shape, and size of the components in implementation. In actual implementation, the form, quantity, and proportion of each component can be arbitrarily changed, and the component layout may be more complex. The structures, proportions, sizes, etc., depicted in the accompanying drawings are only for illustrative purposes to aid those skilled in the art and are not intended to limit the implementation conditions of the present invention. Therefore, they have no substantial technical significance. Any modifications to the structure, changes in proportions, or adjustments to size, without affecting the effects and objectives of the present invention, should still fall within the scope of the technical content disclosed in the present invention.

[0031] As described in the background section, the inventors have discovered that double-balanced passive mixers, due to their lower output combined harmonic components, are widely used as downconverters in direct conversion receivers, such as... Figure 1 As shown, its local oscillator signal is generated by the pairwise AND operation of four-phase signals IP, QP, IN, and QN produced by the frequency divider circuit, ultimately yielding quadrature local oscillator signals LOIP, LOQP, LOIN, and LOQN with a 25% duty cycle. However, the disadvantages of a double-balanced passive mixer are negative conversion gain and high noise, while a single-balanced passive mixer can achieve a voltage conversion gain greater than 1 and has lower noise. For the same differential output, the input signal required by a double-balanced passive mixer is twice that of a single-balanced passive mixer. If the input signal remains unchanged, the input impedance of the transimpedance stage will increase, affecting linearity. At the same time, since the logic AND gate operates in the radio frequency band, it needs to consume a large current to meet the switching requirements, which is also unsuitable in low-power design. In addition, the extra logic operation will worsen the phase noise of the local oscillator signal.

[0032] Based on this, the inventors of this invention provide a direct conversion receiver technical solution based on a single-balanced passive mixer: in the single-balanced passive mixer, a local oscillator signal with a duty cycle of only 50% can achieve the driving effect of a local oscillator signal with a duty cycle of 25%, thereby reducing the power consumption and noise of the direct conversion receiver; at the same time, a combined filter circuit is formed by a transimpedance amplifier with a Tow-Thomas II filter structure and a programmable gain amplifier with a multiple feedback filter structure to improve out-of-band rejection capability, thereby improving the linearity and anti-interference capability of the direct conversion receiver.

[0033] In detail, such as Figure 2 As shown, the present invention provides a direct conversion receiver, which includes:

[0034] The low-noise amplifier (LNA) receives the radio frequency signal RFIN and converts it into an initial current signal (not shown in the figure).

[0035] The first single-balanced passive mixer receives the initial current signal and performs mixing processing on the initial current signal to obtain the first intermediate frequency current signal (not shown in the figure).

[0036] The first transimpedance amplifier receives the first intermediate frequency current signal and performs current-to-voltage conversion processing on the first intermediate frequency current signal to obtain the first initial voltage signal (not shown in the figure);

[0037] A first programmable gain amplifier receives a first initial voltage signal and amplifies the first initial voltage signal to obtain a first intermediate frequency voltage signal (not shown in the figure);

[0038] The second single-balanced passive mixer receives the initial current signal and performs mixing processing on the initial current signal to obtain the second intermediate frequency current signal (not shown in the figure).

[0039] The second transimpedance amplifier receives the second intermediate frequency current signal and performs current-to-voltage conversion processing on the second intermediate frequency current signal to obtain the second initial voltage signal (not shown in the figure);

[0040] The second programmable gain amplifier receives the second initial voltage signal and amplifies the second initial voltage signal to obtain the second intermediate frequency voltage signal (not shown in the figure);

[0041] The first single-balanced passive mixer and the second single-balanced passive mixer achieve the effect of a local oscillator signal with a duty cycle of 25% by using an initial local oscillator signal with a duty cycle of 50%.

[0042] More in detail, such as Figures 2-3 As shown, the initial local oscillator signal with a duty cycle of 50% further includes a first local oscillator signal LOIP, a second local oscillator signal LOIN, a third local oscillator signal LOQP, and a fourth local oscillator signal LOQN; as Figure 3 As shown, the phase of the first local oscillator signal LOIP is opposite to the phase of the second local oscillator signal LOIN, the phase of the third local oscillator signal LOQP is opposite to the phase of the fourth local oscillator signal LOQN, and the phase of the third local oscillator signal LOQP lags behind the phase of the first local oscillator signal LOIP by 90°.

[0043] More in detail, such as Figure 2As shown, the low-noise amplifier (LNA), located in the first stage of the direct-conversion receiver, requires a very low noise figure, sufficient gain (transconductance), and high output impedance to effectively suppress noise contributed by subsequent stages and enhance overall linearity. The high-output-impedance LNA converts the input RF signal RFIN into a small-signal current output, i.e., the initial current signal (not shown in the figure). Detailed structures of the LNA can be found in existing technologies and will not be repeated here.

[0044] More in detail, such as Figure 2 As shown, the first single-balanced passive mixer includes a first NMOS transistor M1, a second NMOS transistor M2, a fifth NMOS transistor M5, and a sixth NMOS transistor M6. The source of the first NMOS transistor M1 is connected to the initial current signal, and the gate of the first NMOS transistor M1 is connected to the first local oscillator signal LOIP. The drain of the first NMOS transistor M1 is connected to the source of the fifth NMOS transistor M5, and the gate of the fifth NMOS transistor M5 is connected to the fourth local oscillator signal LOQN. The source of the second NMOS transistor M2 is connected to the initial current signal, and the gate of the second NMOS transistor M2 is connected to the second local oscillator signal LOIN. The drain of the second NMOS transistor M2 is connected to the source of the sixth NMOS transistor M6, and the gate of the sixth NMOS transistor M6 is connected to the third local oscillator signal LOQP. The drains of the fifth NMOS transistor M5 and the sixth NMOS transistor M6 work together to output the first intermediate frequency current signal (not shown in the figure).

[0045] More in detail, such as Figure 2 As shown, the second single-balanced passive mixer includes a third NMOS transistor M3, a fourth NMOS transistor M4, a seventh NMOS transistor M7, and an eighth NMOS transistor M8. The source of the third NMOS transistor M3 is connected to the initial current signal, the gate of the third NMOS transistor M3 is connected to the third local oscillator signal LOQP, the drain of the third NMOS transistor M3 is connected to the source of the seventh NMOS transistor M7, and the gate of the seventh NMOS transistor M7 is connected to the first local oscillator signal LOIP. The source of the fourth NMOS transistor M4 is connected to the initial current signal, the gate of the fourth NMOS transistor M4 is connected to the fourth local oscillator signal LOQN, the drain of the fourth NMOS transistor M4 is connected to the source of the eighth NMOS transistor M8, and the gate of the eighth NMOS transistor M8 is connected to the second local oscillator signal LOIN. The drains of the seventh NMOS transistor M7 and the eighth NMOS transistor M8 work together to output a second intermediate frequency current signal (not shown in the figure).

[0046] For the initial local oscillator signal with a 50% duty cycle, the first branch (i.e., the I-path, the branch where the first single-balanced passive mixer is located) and the second branch (i.e., the Q-path, the branch where the second single-balanced passive mixer is located) cannot be shorted together. This is because at any given time, the NMOS transistors of the first and second branches will have overlapping conduction states. For the local oscillator signal with the other 25% duty cycle, only one NMOS transistor is in the conducting state, thus avoiding the IQ crosstalk problem caused by the overlapping conduction of the NMOS transistors of the first and second branches.

[0047] More in detail, such as Figures 2-3 As shown, the first single-balanced passive mixer in the first branch consists of a first NMOS transistor M1, a second NMOS transistor M2, and additionally connected in series a fifth NMOS transistor M5 and a sixth NMOS transistor M6. The second single-balanced passive mixer in the second branch consists of a third NMOS transistor M3, a fourth NMOS transistor M4, and additionally connected in series a seventh NMOS transistor M7 and an eighth NMOS transistor M8. The switches in the series branches are driven by the I-channel initial local oscillator signal (first local oscillator signal LOIP and second local oscillator signal LOIN) and the Q-channel initial local oscillator signal (third local oscillator signal LOQP and fourth local oscillator signal LOQN) with a 50% duty cycle, respectively, to achieve a single-balanced passive mixer with a 25% duty cycle local oscillator signal driving effect.

[0048] More in detail, such as Figures 2-3 As shown, since the NMOS switch conducts when the gate voltage is high, in the first single-balanced passive mixer, when the first local oscillator signal LOIP and the fourth local oscillator signal LOQN with a 50% duty cycle drive the series branch composed of the first NMOS transistor M1 and the fifth NMOS transistor M5 respectively, the switch only conducts when both LOIP and LOQN are high. Therefore, the conduction time of this series branch is only 25% of the local oscillator cycle. When the 25% duty cycle local oscillator signal obtained by ANDing the first and fourth local oscillator signals LOIP and LOQN with a 50% duty cycle drives a single NMOS switch, the conduction time of that single switch is also only 25% of the local oscillator cycle. This shows that the conduction characteristics of the series branch are the same as those of a single switch. Similarly, other series branches composed of switches will also only conduct within 25% of the local oscillator cycle, thus achieving a passive mixer with a 25% duty cycle local oscillator signal drive effect, such as... Figure 3 As shown, since the local oscillator signal driving each switch is still at a 50% duty cycle, the local oscillator buffer can increase the local oscillator driving capability using a simple inverter structure.

[0049] More in detail, such as Figure 2As shown, an AC coupling capacitor C is connected in series between the low-noise amplifier (LNA) and the first and second single-balanced passive mixers. X The input signals of the first and second single-balanced passive mixers are single-ended signals. The radio frequency signal can be passed through the low-noise amplifier (LNA) and the mixer switch through AC coupling. This effectively eliminates the low-frequency intermodulation components generated by DC bias current and transconductance nonlinearity, thereby suppressing the flicker noise of the mixer switch.

[0050] More in detail, such as Figure 2 As shown, the first transimpedance amplifier is a transimpedance amplifier with a Tow-Thomas II filter structure. The positive terminal of the differential input of the first transimpedance amplifier is connected to the drain of the fifth NMOS transistor M5, and the negative terminal of the differential input of the first transimpedance amplifier is connected to the drain of the sixth NMOS transistor M6. The negative terminal of the differential output of the first transimpedance amplifier and the positive terminal of the differential output of the first transimpedance amplifier cooperate to output the first initial voltage signal.

[0051] More in detail, such as Figure 2 As shown, the first programmable gain amplifier is a programmable gain amplifier with a multiple feedback filter structure. The positive differential input terminal of the first programmable gain amplifier is connected to the negative differential output terminal of the first transimpedance amplifier, and the negative differential input terminal of the first programmable gain amplifier is connected to the positive differential output terminal of the first transimpedance amplifier. The negative differential output terminal and the positive differential output terminal of the first programmable gain amplifier work together to output the first intermediate frequency voltage signal.

[0052] More in detail, such as Figure 2 As shown, the second transimpedance amplifier is a transimpedance amplifier with a Tow-Thomas II filter structure. The positive terminal of the differential input of the second transimpedance amplifier is connected to the drain of the seventh NMOS transistor M7, and the negative terminal of the differential input of the second transimpedance amplifier is connected to the drain of the eighth NMOS transistor M8. The negative terminal of the differential output of the second transimpedance amplifier and the positive terminal of the differential output of the second transimpedance amplifier cooperate to output the second initial voltage signal.

[0053] More in detail, such as Figure 2 As shown, the second programmable gain amplifier is a programmable gain amplifier with a multiple feedback filter structure. The positive terminal of the differential input of the second programmable gain amplifier is connected to the negative terminal of the differential output of the second transimpedance amplifier, and the negative terminal of the differential input of the second programmable gain amplifier is connected to the positive terminal of the differential output of the second transimpedance amplifier. The negative terminal of the differential output of the second programmable gain amplifier and the positive terminal of the differential output of the second programmable gain amplifier cooperate to output the second intermediate frequency voltage signal.

[0054] More in detail, such as Figure 2As shown, the first transimpedance amplifier in the first branch and the second transimpedance amplifier in the second branch are both transimpedance amplifiers with a Tow-Thomas II filter structure. They convert the intermediate frequency current signal after switching mixing into the initial voltage signal. Since there are two poles in its transfer function, it can provide an attenuation of approximately 40dB / decade, which can better filter out out-of-band interference signals and reduce the linearity requirements of the subsequent circuit. At the same time, the resistor and capacitor parameters in this structure can be adjusted, which can design better filtering performance and more flexible intermediate frequency bandwidth, and realize the reconfigurability of intermediate frequency gain and bandwidth.

[0055] Among them, such as Figure 2 As shown, the first transimpedance amplifier and the second transimpedance amplifier have the same structure, each including two differential operational amplifiers cascaded in sequence and external resistors and capacitors, forming a transimpedance amplifier with a Tow-Thomas II filter structure. For detailed structure, please refer to the prior art, which will not be repeated here.

[0056] More in detail, such as Figure 2 As shown, the first programmable gain amplifier in the first branch and the second programmable gain amplifier in the second branch are both programmable gain amplifiers with a multiple feedback filter structure. They amplify the transimpedance stage output to a suitable level of intermediate frequency signal and provide a certain gain dynamic range. This structure has better high-frequency attenuation and less large signal input distortion.

[0057] Among them, such as Figure 2 As shown, the first programmable gain amplifier and the second programmable gain amplifier have the same structure, each including a differential operational amplifier and external resistors and capacitors, forming a programmable gain amplifier with a multiple feedback filter structure. For detailed structure, please refer to the prior art, which will not be repeated here.

[0058] More in detail, such as Figure 2 As shown, the phase of the first intermediate frequency voltage signal output by the first branch is 90° out of phase with the phase of the second intermediate frequency voltage signal output by the second branch, which will not be elaborated further here.

[0059] Finally, the first and second intermediate frequency voltage signals, which are stabilized within a certain amplitude range, are given to the analog-to-digital converter (not shown in the figure) for digital quantization. The quantized output is then sent to the digital baseband for decoding. By integrating a frequency synthesizer and power management within the circuit, a complete SOC receiver can be formed.

[0060] In summary, the direct conversion receiver of this invention is based on two single-balanced passive mixers. Each single-balanced passive mixer achieves a local oscillator signal driving effect with a duty cycle of 25% using an initial local oscillator signal with a duty cycle of 50%. Compared to a direct conversion receiver designed based on a double-balanced passive mixer with a local oscillator signal of 25% duty cycle, it has higher gain, lower power consumption, and lower noise. It does not require additional logic devices to implement the duty cycle conversion of the local oscillator signal, further reducing the phase noise of the local oscillator signal and the entire direct conversion receiver. At the same time, the transimpedance amplifier and programmable gain amplifier in the later stages of the two branches constitute a combined filter circuit with high out-of-band rejection capability, improving the linearity and anti-interference capability of the direct conversion receiver.

[0061] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in the present invention should still be covered by the claims of the present invention.

Claims

1. A direct conversion receiver, characterized by The application relates to a low noise amplifier, which comprises the following components: a low noise amplifier receiving a radio frequency signal and converting the radio frequency signal into an initial current signal; a first single-balance passive mixer receiving the initial current signal and mixing the initial current signal to obtain a first intermediate frequency current signal; a first trans-impedance amplifier receiving the first intermediate frequency current signal and performing current-voltage conversion processing on the first intermediate frequency current signal to obtain a first initial voltage signal; a first programmable gain amplifier receiving the first initial voltage signal and performing amplification processing on the first initial voltage signal to obtain a first intermediate frequency voltage signal; a second single-balance passive mixer receiving the initial current signal and mixing the initial current signal to obtain a second intermediate frequency current signal; a second trans-impedance amplifier receiving the second intermediate frequency current signal and performing current-voltage conversion processing on the second intermediate frequency current signal to obtain a second initial voltage signal; a second programmable gain amplifier receiving the second initial voltage signal and performing amplification processing on the second initial voltage signal to obtain a second intermediate frequency voltage signal; the first programmable gain amplifier and the second programmable gain amplifier are both programmable gain amplifiers with a multiple feedback filter structure to perform high-frequency end attenuation; wherein the first single-balance passive mixer and the second single-balance passive mixer are driven by an initial local oscillator signal with a duty cycle of 50% to obtain a local oscillator signal with a duty cycle of 25%; the initial local oscillator signal comprises a first local oscillator signal, a second local oscillator signal, a third local oscillator signal and a fourth local oscillator signal, the phase of the first local oscillator signal is opposite to the phase of the second local oscillator signal, the phase of the third local oscillator signal is opposite to the phase of the fourth local oscillator signal, and the phase of the third local oscillator signal lags behind the phase of the first local oscillator signal by 90 degrees; the first single-balance passive mixer comprises a first NMOS tube, a second NMOS tube, a fifth NMOS tube and a sixth NMOS tube, the source of the first NMOS tube is connected to the initial current signal, the gate of the first NMOS tube is connected to the first local oscillator signal, the drain of the first NMOS tube is connected to the source of the fifth NMOS tube, the gate of the fifth NMOS tube is connected to the fourth local oscillator signal, the source of the second NMOS tube is connected to the initial current signal, the gate of the second NMOS tube is connected to the second local oscillator signal, the drain of the second NMOS tube is connected to the source of the sixth NMOS tube, the gate of the sixth NMOS tube is connected to the third local oscillator signal, and the drain of the fifth NMOS tube and the drain of the sixth NMOS tube cooperate to output the first intermediate frequency current signal.

2. A direct conversion receiver as claimed in claim 1, characterized in that The second single balanced passive mixer comprises a third NMOS transistor, a fourth NMOS transistor, a seventh NMOS transistor and an eighth NMOS transistor, the source of the third NMOS transistor is connected to the initial current signal, the gate of the third NMOS transistor is connected to the third local oscillator signal, the drain of the third NMOS transistor is connected to the source of the seventh NMOS transistor, the gate of the seventh NMOS transistor is connected to the first local oscillator signal, the source of the fourth NMOS transistor is connected to the initial current signal, the gate of the fourth NMOS transistor is connected to the fourth local oscillator signal, the drain of the fourth NMOS transistor is connected to the source of the eighth NMOS transistor, the gate of the eighth NMOS transistor is connected to the second local oscillator signal, and the drain of the seventh NMOS transistor and the drain of the eighth NMOS transistor cooperate to output the second intermediate frequency current signal.

3. The direct conversion receiver of claim 1, wherein, The first transimpedance amplifier is a transimpedance amplifier of a Tow-Thomas II type filter structure, the differential positive input end of the first transimpedance amplifier is connected to the drain of the fifth NMOS transistor, the differential negative input end of the first transimpedance amplifier is connected to the drain of the sixth NMOS transistor, and the differential negative output end of the first transimpedance amplifier and the differential positive output end of the first transimpedance amplifier cooperate to output the first initial voltage signal.

4. A direct conversion receiver as claimed in claim 3, characterized in that The differential positive input end of the first programmable gain amplifier is connected to the differential negative output end of the first transimpedance amplifier, the differential negative input end of the first programmable gain amplifier is connected to the differential positive output end of the first transimpedance amplifier, and the differential negative output end of the first programmable gain amplifier and the differential positive output end of the first programmable gain amplifier cooperate to output the first intermediate frequency voltage signal.

5. The direct conversion receiver of claim 2, wherein, The second transimpedance amplifier is a transimpedance amplifier of a Tow-Thomas II type filter structure, the differential positive input end of the second transimpedance amplifier is connected to the drain of the seventh NMOS transistor, the differential negative input end of the second transimpedance amplifier is connected to the drain of the eighth NMOS transistor, and the differential negative output end of the second transimpedance amplifier and the differential positive output end of the second transimpedance amplifier cooperate to output the second initial voltage signal.

6. A direct conversion receiver as claimed in claim 5, characterized in that The differential positive input end of the second programmable gain amplifier is connected to the differential negative output end of the second transimpedance amplifier, the differential negative input end of the second programmable gain amplifier is connected to the differential positive output end of the second transimpedance amplifier, and the differential negative output end of the second programmable gain amplifier and the differential positive output end of the second programmable gain amplifier cooperate to output the second intermediate frequency voltage signal.

7. The direct conversion receiver of claim 1, wherein, The phase of the first intermediate frequency voltage signal and the phase of the second intermediate frequency voltage signal are different by 90 degrees.

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