A small portable underwater positioning signal generating device
By designing a small, portable underwater positioning signal generator, and utilizing a signal generation and transmission circuit combining logic gates and transistors, the portability and positioning accuracy issues of existing devices were solved, achieving low-cost, high-precision positioning of the location of someone falling into the water and shortening rescue time.
Patent Information
- Application Number
- CN202211546346.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-12-05
- Publication Date
- 2026-02-06
- Estimated Expiration
- 2042-12-05
AI Technical Summary
Existing underwater positioning signal generators are inadequate in terms of miniaturization and low cost, making them difficult for personnel and small objects to carry, and their positioning accuracy is not high, resulting in prolonged rescue time after a person falls into the water.
A small, portable underwater positioning signal generator was designed. It employs a signal generation and transmission circuit, including logic gates, capacitors, resistors, transistors, transformers, and an ultrasonic transducer. The signal generation and amplification are achieved through the combination of logic gates and transistors. The signal transmission is triggered by a water entry detection sensor, avoiding complex programming and high-cost microprocessors. It also adopts a low-power design and self-excited oscillation technology.
It achieves miniaturization, low cost, and portability, and has high positioning accuracy, which can quickly provide the coordinates of the location of the person falling into the water, shorten the rescue time, and improve the rescue success rate.
Smart Images

Figure CN116008995B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to underwater positioning signal generating device, especially to a small portable underwater positioning signal generating device. BACKGROUND
[0002] After the ship, aircraft and other accidents on the sea, the need to carry out search and rescue work to obtain the coordinates of the accident site and the coordinates of the search and rescue target. At present, the coordinates of the accident site and the coordinates of the search and rescue target are mainly provided by the emergency position indicating system and the black box carried by the ship, aircraft. The emergency position indicating system uses radio communication method to provide the approximate position of the underwater search and rescue target by transmitting radio distress signal; the black box transmits ultrasonic signal by the underwater beacon system carried by it to provide the approximate position of the underwater search and rescue target. However, these two search and rescue methods are mainly aimed at large carriers such as ships and aircrafts, and are not helpful for the search and rescue of the fallen personnel and small target objects which fall from the large carriers such as ships and aircrafts to other places. From the personnel casualties and missing persons caused by some tragic water and air traffic accidents in recent years, it is urgent to improve the search and rescue ability of the fallen personnel.
[0003] In recent years, some search and rescue equipment designed for fallen personnel has appeared. These search and rescue equipment are mostly evolved from the miniaturization of the ship emergency position indicating system, and also provide the position coordinate information of the fallen personnel to the nearby ship by sending radio distress signal to carry out search and rescue work. These search and rescue equipment can realize miniaturization and low cost, and are convenient for personnel and small target objects to carry. Because the electromagnetic wave generated by radio will be greatly attenuated in water, it cannot be communicated for a long distance. In order to communicate for a long distance, these types of search and rescue equipment are usually equipped with a long antenna that can extend out of the water; and the sea is often accompanied by wind and waves, the antenna will sway with the wind and waves, and the antenna emission angle is greatly affected, so that the radio signal emitted by the antenna is attenuated, and the positioning accuracy of these types of search and rescue equipment still has a large space for improvement.
[0004] Sound wave belongs to mechanical wave, and is less attenuated in water than electromagnetic wave, and can propagate a long distance. By equipping a positioning system for transmitting ultrasonic signals, the above-mentioned shortcomings of the radio search and rescue equipment can be effectively compensated, the success rate of rescue can be improved, and the number of missing and dead people can be reduced. The underwater beacon system is the main functional equipment of the black box. The underwater beacon system drives the ultrasonic transducer through a circuit to emit ultrasonic signals, and the rescue ship can detect the ultrasonic signals emitted by the black box through the sonar to locate the target. Although the positioning accuracy of the underwater beacon system is higher than that of the emergency marker system, the black box used by the ship and the airplane is not only large in size and heavy in weight, but also the underwater beacon system of the black box weighs more than 1 kg, which is obviously not portable. In addition, the underwater beacon system of the black box is designed to use a microprocessor, and the production and debugging need to write codes and burn, which is not only complex, but also very dangerous once the processor crashes. In addition, the black box is designed for large ship and airplane rescue, and the overall cost is high, a complete set of equipment costs more than 100,000 yuan, which is obviously not suitable for mass civilian use. SUMMARY
[0005] The technical problem to be solved by the present application is to provide a portable underwater positioning signal generating device which has the advantages of miniaturization and low cost, is convenient for personnel and small target objects to carry, has high positioning accuracy, can provide high-precision water-falling position coordinates after personnel and small target objects fall into water, and can shorten the rescue time and improve the success rate of rescue.
[0006] The application solves the above technical problems by adopting the technical scheme of a small portable underwater positioning signal generating device, which comprises a signal generating and transmitting circuit, wherein the signal generating and transmitting circuit comprises a first logic gate, a second logic gate, a third logic gate, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, an eighth transistor, a ninth transistor, a tenth transistor, an eleventh transistor, a twelfth transistor, a thirteenth transistor, a fourteenth transistor, a fifteenth transistor, a sixteenth transistor, a seventeenth transistor, an eighteenth transistor, a nineteenth transistor, a power supply, a water entry detection sensor, a transformer and an ultrasonic transducer; the first capacitor, the second capacitor, the third capacitor and the fourth capacitor are all charging capacitors; the fourth resistor and the eighth resistor are adjustable resistors; the first transistor is a PNP type transistor; the second transistor, the third transistor, the fourth transistor, the seventh transistor, the tenth transistor, the eleventh transistor, the twelfth transistor, the thirteenth transistor and the seventeenth transistor are all enhancement mode PMOS transistors; the fifth transistor, the sixth transistor, the eighth transistor, the ninth transistor, the fourteenth transistor, the fifteenth transistor, the sixteenth transistor, the eighteenth transistor and the nineteenth transistor are all enhancement mode NMOS transistors; the transformer has a primary coil and a secondary coil; the first logic gate is a two-input XOR gate and has two input ends and one output end; the second logic gate and the third logic gate are both two-input AND gates and have two input ends and one output end; the two input ends of the first logic gate, the second logic gate and the third logic gate are both referred to as first input ends and second input ends; one end of the water entry detection sensor is connected with the base of the first transistor; the collector of the first transistor, one end of the first resistor and the first input end of the first logic gate are connected; the other end of the first resistor, the positive electrode of the first capacitor, one end of the third resistor, the second input end of the first logic gate and the second input end of the second logic gate are connected; the output end of the first logic gate is connected with the first input end of the second logic gate; the other end of the third resistor and the source of the tenth transistor are respectively connected with the positive electrode of the power supply.An output terminal of the second logic gate is connected with one end of the second resistor, one end of the fourth resistor, a source electrode of the second transistor, a source electrode of the third transistor, a source electrode of the fourth transistor, one end of the sixth resistor, one end of the seventh resistor, one end of the eighth resistor, a source electrode of the seventh transistor, a source electrode of the eleventh transistor, a source electrode of the twelfth transistor, a source electrode of the thirteenth transistor, a source electrode of the seventeenth transistor and a drain electrode of the eighteenth transistor, the other end of the fourth resistor, one end of the fifth resistor and a drain electrode of the eighth transistor are connected, a gate electrode of the second transistor, a gate electrode of the third transistor, a drain electrode of the third transistor and a drain electrode of the fifth transistor are connected, a drain electrode of the second transistor, a drain electrode of the sixth transistor and a gate electrode of the fourth transistor are connected, a drain electrode of the fourth transistor, a gate electrode of the eighth transistor, a drain electrode of the ninth transistor and a first input terminal of the third logic gate are connected, a gate electrode of the fifth transistor and the other end of the second resistor are connected, a gate electrode of the sixth transistor, the other end of the fifth resistor, a positive electrode of the second capacitor and a gate electrode of the seventh transistor are connected, a drain electrode of the seventh transistor and a gate electrode of the ninth transistor are connected, a gate electrode of the eleventh transistor, a gate electrode of the twelfth transistor, a drain electrode of the twelfth transistor and a drain electrode of the fifteenth transistor are connected, a drain electrode of the eleventh transistor, a drain electrode of the sixteenth transistor and a gate electrode of the thirteenth transistor are connected, a drain electrode of the thirteenth transistor, a gate electrode of the eighteenth transistor, a drain electrode of the nineteenth transistor and a second input terminal of the third logic gate are connected, a gate electrode of the fifteenth transistor and the other end of the seventh resistor are connected, a gate electrode of the sixteenth transistor, the other end of the eighth resistor, a positive electrode of the fourth capacitor and a gate electrode of the seventeenth transistor are connected, a drain electrode of the seventeenth transistor and a gate electrode of the nineteenth transistor are connected, the other end of the sixth resistor, an output terminal of the third logic gate, a gate electrode of the tenth transistor and a gate electrode of the fourteenth transistor are connected, a drain electrode of the tenth transistor, a drain electrode of the fourteenth transistor and a positive electrode of the third capacitor are connected, a negative electrode of the third capacitor and one end of a primary winding of the transformer are connected,The other end of the water entry detection sensor, the emitter of the first transistor, the negative pole of the first capacitor, the negative pole of the power supply, the negative pole of the second capacitor, the negative pole of the fourth capacitor, the source of the fifth transistor, the source of the sixth transistor, the source of the eighth transistor, the source of the ninth transistor, the source of the fourteenth transistor, the source of the fifteenth transistor, the source of the sixteenth transistor, the source of the eighteenth transistor, the source of the nineteenth transistor and the other end of the primary coil of the transformer are all grounded.
[0007] Compared with the prior art, the application has the advantages that the signal generation and emission circuit is composed of a first logic gate, a second logic gate, a third logic gate, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, an eighth transistor, a ninth transistor, a tenth transistor, an eleventh transistor, a twelfth transistor, a thirteenth transistor, a fourteenth transistor, a fifteenth transistor, a sixteenth transistor, a seventeenth transistor, an eighteenth transistor, a nineteenth transistor, a power supply, a water entry detection sensor, a transformer, and an ultrasonic transducer; the first logic gate, the second logic gate, the first resistor, the third resistor, the first transistor, the first capacitor, the water entry detection sensor, and the power supply constitute a power supply module of the signal generation and emission circuit; the water entry detection sensor, the first transistor, the first resistor, the first capacitor, and the first logic gate jointly constitute a water entry detection module of the signal generation and emission circuit; the second transistor, the third transistor, the fourth transistor, the second resistor, the fourth resistor, the fifth transistor, the sixth transistor, the fifth resistor, the second capacitor, the seventh transistor, the eighth transistor, and the ninth transistor constitute a first amplification module of the signal generation and emission circuit, the second transistor and the third transistor constitute a current source of the first amplification module, the second resistor and the fifth transistor constitute a control switch of the first amplification module, which is used for controlling the on-off of the first current source, the fourth resistor, the fifth resistor, the second capacitor, and the sixth transistor constitute an amplification circuit of the first amplification module, the fourth transistor, the seventh transistor, and the ninth transistor constitute an output circuit of the first amplification module, the eighth transistor constitutes a feedback circuit of the first amplification module, the current source of the first amplification module is used for providing static current for the amplification circuit of the first amplification module, the eleventh transistor, the twelfth transistor, the seventh resistor, the fifteenth transistor, the eighth resistor, the fourth capacitor, the sixteenth transistor, the thirteenth transistor, the seventeenth transistor, the eighteenth transistor, and the nineteenth transistor constitute a second amplification module of the signal generation and emission circuit, the eleventh transistor and the twelfth transistor constitute a current source of the second amplification module, the seventh resistor and the fifteenth transistor constitute a control switch of the second amplification module, which is used for controlling the on-off of the current source of the second amplification module, the eighth resistor, the fourth capacitor, and the sixteenth transistor constitute an amplification circuit of the second amplification module, the current source of the second amplification module is used for providing static current for the amplification circuit of the second amplification module, the thirteenth transistor, the seventeenth transistor, and the nineteenth transistor constitute an output circuit of the second amplification module, and the eighteenth transistor constitutes a feedback circuit of the second amplification module; the third logic gate, the sixth resistor, the tenth transistor, the fourteenth transistor, the third capacitor, the transformer, and the ultrasonic transducer constitute an output module of the signal generation and emission circuit.When the small portable underwater positioning signal generating device enters the water, the water detection sensor detects the water pressure signal, and one end of the water detection sensor outputs a low level signal equivalent to logic 0, at this time the first transistor is turned on, and since the collector of the first transistor is connected with the first input end of the first logic gate, at this time the signal Us1 inputted into the first input end of the first logic gate is low level, and the power supply supplies power, and through the third resistor and the first capacitor, the signal Us2 is generated at the second input end of the first logic gate and the second output end of the second logic gate, the signal Us2 is high level, the first logic gate performs exclusive or logic operation on the signals Us1 and Us2 inputted into the two input ends, and generates the signal Us3 outputted at the output end, the second logic gate performs and logic operation on the signals Us2 and Us3 inputted into the two input ends, and generates the signal Us4 outputted at the output end, which supplies power for the first amplification module and the second amplification module, at this time the current source of the first amplification module and the current source of the second amplification circuit start to supply power; when the current source of the first amplification module starts to supply power, the current outputted by the current source of the first amplification module generates high level at the gate of the fifth transistor through the second resistor, so that the fifth transistor is turned on, the source and the drain of the fifth transistor are turned on, the gate of the second transistor and the gate of the third transistor connected with the fifth transistor are low level, and the second transistor and the third transistor are turned on, the second transistor and the sixth transistor form a direct current path, and the third transistor and the fifth transistor form a direct current path, since the second capacitor is charged, the positive electrode of the second capacitor generates the alternating current signal Ui1, which is inputted into the gate of the sixth transistor and the gate of the seventh transistor at the same time, the alternating current signal Ui1 is amplified through the sixth transistor, and is outputted from the drain of the sixth transistor to the output circuit of the first amplification module, at this time the output voltage Uo1 of the output circuit of the first amplification module is outputted to the first input end of the third logic gate, since the amplification circuit of the first amplification module is open loop, the gain is great, and the sixth transistor works in the saturation region, so the alternating current signal Ui1 can be amplified to saturation in a very short time and outputted to the gate of the fourth transistor through the source of the sixth transistor, so that the drain of the fourth transistor outputs the voltage Uo1, the voltage Uo1 is fed back to the fifth resistor through the eighth transistor, and the feedback signal Ui1’ is generated, the feedback signal Ui1’ is derived from the discharging of the second capacitor, when the charge of the second capacitor is completely released, the gate voltage of the sixth transistor becomes low level, the amplification circuit of the first amplification module is closed, the drain of the fourth transistor outputs low level, and the eighth transistor is closed, so that the second capacitor is charged again, since the feedback signal Ui1’ and the alternating current signal Ui1 are opposite in direction and have a phase difference of 90°, the periodic oscillation signal can be obtained by superimposing the feedback signal Ui1’ and the alternating current signal Ui1, and since the sixth transistor works in the saturation region, the obtained voltage Uo1 is square wave.Similarly, when the current source of the second amplification module starts to supply power, the current output by the current source of the second amplification module generates a high level on the gate of the fifteenth transistor through the seventh resistor, so that the fifteenth transistor is turned on, the source and the drain of the fifteenth transistor are turned on, the gate of the eleventh transistor and the gate of the twelfth transistor connected with the fifteenth transistor are low, and the eleventh transistor and the twelfth transistor are turned on, the eleventh transistor and the sixteenth transistor form a direct current path, and the twelfth transistor and the fifteenth transistor form a direct current path, due to the charging of the fourth capacitor, a hysteresis effect is generated, and an alternating current signal Ui2 is generated at the positive electrode of the fourth capacitor, the alternating current signal Ui2 is input to the gate of the sixteenth transistor and the gate of the seventeenth transistor at the same time, the alternating current signal Ui2 is amplified through the sixteenth transistor and is output from the drain of the sixteenth transistor to the output circuit of the second amplification module, at this time, the output voltage Uo2 of the output circuit of the second amplification module is output to the second input end of the third logic gate, since the amplification circuit of the second amplification module is open-loop itself, the gain is great, and the sixteenth transistor works in the saturation region, so the alternating current signal Ui2 can be amplified to saturation in a very short time and output to the gate of the thirteenth transistor through the source of the sixteenth transistor, so that the drain of the thirteenth transistor outputs the voltage Uo2, and the voltage Uo2 is fed back to the eighth resistor through the eighteenth transistor to generate a feedback signal Ui2', the feedback signal Ui2' is derived from the discharging effect of the fourth capacitor, when the second capacitor is discharged, the voltage at the gate of the sixteenth transistor becomes low, the amplification circuit of the second amplification module is closed, the drain of the thirteenth transistor outputs low, and the eighteenth transistor is closed, so that the fourth capacitor is charged again, since the feedback signal Ui2' and the alternating current signal Ui2 are opposite in direction and have a phase difference of 90°, the periodic oscillation signal can be obtained by superimposing the feedback signal Ui2' and the alternating current signal Ui2, since the sixteenth transistor works in the saturation region, the obtained voltage Uo2 is a square wave; the third logic gate performs AND logic operation on the voltages Uo1 and Uo2 input to the two input ends to obtain the voltage Uo3 output at the output end, and the sixth resistor provides a stable pull-up voltage for the output of the third logic gate, since the tenth transistor is an enhancement mode PMOS transistor and the fourteenth transistor is an enhancement mode NMOS transistor, the tenth transistor and the fourteenth transistor are alternately turned on under the drive of the voltage Uo3 to form a push-pull drive circuit, and the third capacitor and the primary coil of the transformer form a drive front stage, when the tenth transistor is turned on and the fourteenth transistor is turned off, the third capacitor is charged, when the tenth transistor is turned off and the fourteenth transistor is turned on, the third capacitor is discharged, the current is conducted to the secondary coil of the transformer through the primary coil of the transformer, the secondary coil of the transformer drives the ultrasonic transducer, and the ultrasonic transducer generates and emits ultrasonic signals; the present application can generate the required pulse train signal (i.e. ultrasonic signal) without using complex circuits such as programmable processors and crystal oscillators, the overall use of devices is less, and small size and light weight can be achieved.Without complex programming and burning work, the production process is simple, meanwhile, the pulse frequency and the transmission frequency of the pulse train signal can be quickly tuned through the fourth resistor and the eighth resistor, so as to adjust the scene with different frequency requirements, in addition, low-power design is adopted in multiple places: the water entry detection module only has the leakage current between the emitter and the source of the first transistor when it is not in water; the generation of the pulse train signal is a current impact signal at the moment of power-on, since the feedback circuit composed of the eighth transistor and the feedback circuit composed of the eighteenth transistor is positive feedback, after the two amplification modules of the signal generation and transmission circuit start periodic oscillation, the required signal amount can be achieved through self-oscillation, without additional crystal oscillator to stabilize the frequency; the output module of the signal generation and transmission circuit adopts a direct current isolation design method, which is different from the general non-isolated design, the primary coil of the transformer will not be directly connected with the power supply, so as to cause instantaneous short circuit and reduce power loss, thereby protecting the service life of the power supply, thus, the present application has the advantages of miniaturization and low cost, and is convenient for personnel and small target objects to carry, at the same time, the positioning is carried out through the transmission of ultrasonic signals, and the positioning precision is high, after the personnel and small target objects fall into water, the high-precision falling position coordinates can be provided, so as to shorten the rescue time and improve the rescue success rate. BRIEF DESCRIPTION OF DRAWINGS
[0008] Figure 1 Circuit diagram of the small portable underwater positioning signal generating device of the present application;
[0009] Figure 2 Signal timing diagram of the small portable underwater positioning signal generating device of the present application. DETAILED DESCRIPTION
[0010] The present application will be further described in detail below in combination with the embodiments of the drawings.
[0011] Embodiment: as Figure 1The small portable underwater positioning signal generating device shown, including signal generating and transmitting circuit, signal generating and transmitting circuit including first logic gate U1, second logic gate U2, third logic gate U3, first capacitor C1, second capacitor C2, third capacitor C3, fourth capacitor C4, first resistor R1, second resistor R2, third resistor R3, fourth resistor R4, fifth resistor R5, sixth resistor R6, seventh resistor R7, eighth resistor R8, first transistor Q1, second transistor Q2, third transistor Q3, fourth transistor Q4, fifth transistor Q5, sixth transistor Q6, seventh transistor Q7, eighth transistor Q8, ninth transistor Q9, tenth transistor Q10, eleventh transistor Q11, twelfth transistor Q12, thirteenth transistor Q13, fourteenth transistor Q14, fifteenth transistor Q15, sixteenth transistor Q16, seventeenth transistor Q17, eighteenth transistor Q18, nineteenth transistor Q19, power supply B1, water detection sensor S1, transformer T1 and ultrasonic transducer T2; the first capacitor C1, the second capacitor C2, the third capacitor C3 and the fourth capacitor C4 are charging capacitors, the fourth resistor R4 and the eighth resistor R8 are adjustable resistors, the first transistor Q1 is a PNP type transistor, the second transistor Q2, the third transistor Q3, the fourth transistor Q4, the seventh transistor Q7, the tenth transistor Q10, the eleventh transistor Q11, the twelfth transistor Q12, the thirteenth transistor Q13 and the seventeenth transistor Q17 are enhancement mode PMOS transistors, the fifth transistor Q5, the sixth transistor Q6, the eighth transistor Q8, the ninth transistor Q9, the fourteenth transistor Q14, the fifteenth transistor Q15, the sixteenth transistor Q16, the eighteenth transistor Q18 and the nineteenth transistor Q19 are enhancement mode NMOS transistors, the transformer T1 has a primary coil and a secondary coil, the first logic gate U1 is a two-input XOR gate with two input terminals and an output terminal, the second logic gate U2 and the third logic gate U3 are both two-input AND gates with two input terminals and an output terminal, the two input terminals of the first logic gate U1, the second logic gate U2 and the third logic gate U3 are called the first input terminal and the second input terminal; one end of the water detection sensor S1 and the base of the first transistor Q1 are connected, the collector of the first transistor Q1, one end of the first resistor R1 and the first input terminal of the first logic gate U1 are connected, the other end of the first resistor R1, the positive electrode of the first capacitor C1, one end of the third resistor R3, the second input terminal of the first logic gate U1 and the second input terminal of the second logic gate U2 are connected, the output terminal of the first logic gate U1 and the first input terminal of the second logic gate U2 are connected, the other end of the third resistor R3 and the source electrode of the tenth transistor Q10 are respectively connected with the positive electrode of the power supply B1,The output end of the second logic gate U2 is connected with one end of the second resistor R2, one end of the fourth resistor R4, the source electrode of the second transistor Q2, the source electrode of the third transistor Q3, the source electrode of the fourth transistor Q4, one end of the sixth resistor R6, one end of the seventh resistor R7, one end of the eighth resistor R8, the source electrode of the seventh transistor Q7, the source electrode of the eleventh transistor Q11, the source electrode of the twelfth transistor Q12, the source electrode of the thirteenth transistor Q13, the source electrode of the seventeenth transistor Q17 and the drain electrode of the eighteenth transistor Q18 respectively, the other end of the fourth resistor R4, one end of the fifth resistor R5 and the drain electrode of the eighth transistor Q8 are connected, the gate electrode of the second transistor Q2, the gate electrode of the third transistor Q3, the drain electrode of the third transistor Q3 and the drain electrode of the fifth transistor Q5 are connected, the drain electrode of the second transistor Q2, the drain electrode of the sixth transistor Q6 and the gate electrode of the fourth transistor Q4 are connected, the drain electrode of the fourth transistor Q4, the gate electrode of the eighth transistor Q8, the drain electrode of the ninth transistor Q9 and the first input end of the third logic gate U3 are connected, the gate electrode of the fifth transistor Q5 and the other end of the second resistor R2 are connected, the gate electrode of the sixth transistor Q6, the other end of the fifth resistor R5, the positive electrode of the second capacitor C2 and the gate electrode of the seventh transistor Q7 are connected, the drain electrode of the seventh transistor Q7 and the gate electrode of the ninth transistor Q9 are connected, the gate electrode of the eleventh transistor Q11, the gate electrode of the twelfth transistor Q12, the drain electrode of the twelfth transistor Q12 and the drain electrode of the fifteenth transistor Q15 are connected, the drain electrode of the eleventh transistor Q11, the drain electrode of the sixteenth transistor Q16 and the gate electrode of the thirteenth transistor Q13 are connected, the drain electrode of the thirteenth transistor Q13, the gate electrode of the eighteenth transistor Q18, the drain electrode of the nineteenth transistor Q19 and the second input end of the third logic gate U3 are connected, the gate electrode of the fifteenth transistor Q15 and the other end of the seventh resistor R7 are connected, the gate electrode of the sixteenth transistor Q16, the other end of the eighth resistor R8, the positive electrode of the fourth capacitor C4 and the gate electrode of the seventeenth transistor Q17 are connected, the drain electrode of the seventeenth transistor Q17 and the gate electrode of the nineteenth transistor Q19 are connected, the other end of the sixth resistor R6, the output end of the third logic gate U3, the gate electrode of the tenth transistor Q10 and the gate electrode of the fourteenth transistor Q14 are connected, the drain electrode of the tenth transistor Q10, the drain electrode of the fourteenth transistor Q14 and the positive electrode of the third capacitor C3 are connected, the negative electrode of the third capacitor C3 and one end of the primary coil of the transformer T1 are connected,The other end of the water entry detection sensor S1, the emitter of the first transistor Q1, the negative pole of the first capacitor C1, the negative pole of the power supply B1, the negative pole of the second capacitor C2, the negative pole of the fourth capacitor C4, the source of the fifth transistor Q5, the source of the sixth transistor Q6, the source of the eighth transistor Q8, the source of the ninth transistor Q9, the source of the fourteenth transistor Q14, the source of the fifteenth transistor Q15, the source of the sixteenth transistor Q16, the source of the eighteenth transistor Q18, the source of the nineteenth transistor Q19 and the other end of the primary coil of the transformer T1 are all grounded.
[0012] In this embodiment, the power supply B1 is a battery pack.
[0013] In the embodiment, the first logic gate U1, the second logic gate U2, the first resistor R1, the third resistor R3, the first transistor Q1, the first capacitor C1, the water entry detection sensor S1 and the power supply B1 constitute a power supply module of the signal generation and transmission circuit; the water entry detection sensor S1, the first transistor Q1, the first resistor R1, the first capacitor C1 and the first logic gate U1 jointly constitute a water entry detection module of the signal generation and transmission circuit; the second transistor Q2, the third transistor Q3, the fourth transistor Q4, the second resistor R2, the fourth resistor R4, the fifth transistor Q5, the sixth transistor Q6, the fifth resistor R5, the second capacitor C2, the seventh transistor Q7, the eighth transistor Q8 and the ninth transistor Q9 constitute a first amplification module of the signal generation and transmission circuit, the second transistor Q2 and the third transistor Q3 constitute a current source of the first amplification module, the second resistor R2 and the fifth transistor Q5 constitute a control switch of the first amplification module, which is used for controlling the on-off of the first current source, the fourth resistor R4, the fifth resistor R5, the second capacitor C2 and the sixth transistor Q6 constitute an amplification circuit of the first amplification module, the fourth transistor Q4, the seventh transistor Q7 and the ninth transistor Q9 constitute an output circuit of the first amplification module, the eighth transistor Q8 constitutes a feedback circuit of the first amplification module, the current source of the first amplification module is used for providing a static current for the amplification circuit of the first amplification module, the eleventh transistor Q11, the twelfth transistor Q12, the seventh resistor R7, the fifteenth transistor Q15, the eighth resistor R8, the fourth capacitor C4, the sixteenth transistor Q16, the thirteenth transistor Q13, the seventeenth transistor Q17, the eighteenth transistor Q18 and the nineteenth transistor Q19 constitute a second amplification module of the signal generation and transmission circuit, the eleventh transistor Q11 and the twelfth transistor Q12 constitute a current source of the second amplification module, the seventh resistor R7 and the fifteenth transistor Q15 constitute a control switch of the second amplification module, which is used for controlling the on-off of the current source of the second amplification module, the eighth resistor R8, the fourth capacitor C4 and the sixteenth transistor Q16 constitute an amplification circuit of the second amplification module, the current source of the second amplification module is used for providing a static current for the amplification circuit of the second amplification module, the thirteenth transistor Q13, the seventeenth transistor Q17 and the nineteenth transistor Q19 constitute an output circuit of the second amplification module, and the eighteenth transistor Q18 constitutes a feedback circuit of the second amplification module; the third logic gate U3, the sixth resistor R6, the tenth transistor Q10, the fourteenth transistor Q14, the third capacitor C3, the transformer T1 and the ultrasonic transducer T2 constitute an output module of the signal generation and transmission circuit.When the small portable underwater positioning signal generating device enters the water, the water detection sensor S1 detects the water pressure signal, and one end of the water detection sensor S1 outputs a low-level signal equivalent to logic 0. At this time, the first transistor Q1 is turned on, and since the collector of the first transistor Q1 is connected to the first input end of the first logic gate U1, the signal Us1 inputted into the first input end of the first logic gate U1 is low level at this time. The power supply B1 supplies power through the third resistor R3 and the first capacitor C1 to generate a signal Us2 at the second input end of the first logic gate U1 and the second output end of the second logic gate U2. The signal Us2 is high level. The first logic gate U1 performs exclusive or logic operation on the signals Us1 and Us2 inputted into its two input ends to generate a signal Us3 outputted at its output end. The second logic gate U2 performs and logic operation on the signals Us2 and Us3 inputted into its two input ends to generate a signal Us4 outputted at its output end to supply power to the first amplification module and the second amplification module. At this time, the current source of the first amplification module and the current source of the second amplification circuit both start to supply power.When the current source of the first amplification module starts to supply power, the current output by the current source of the first amplification module generates a high level on the gate of the fifth transistor Q5 through the second resistor R2, so that the fifth transistor Q5 is turned on, the source and the drain of the fifth transistor Q5 are turned on, the gate of the second transistor Q2 and the gate of the third transistor Q3 connected with the fifth transistor Q5 are low, and the second transistor Q2 and the third transistor Q3 are turned on, the second transistor Q2 and the sixth transistor Q6 form a direct current path, and the third transistor Q3 and the fifth transistor Q5 form a direct current path. Since the second capacitor C2 is charged, a hysteresis effect is generated, and an alternating current signal Ui1 is generated at the positive electrode of the second capacitor C2. The alternating current signal Ui1 is input to the gate of the sixth transistor Q6 and the gate of the seventh transistor Q7 at the same time. The alternating current signal Ui1 is amplified through the sixth transistor Q6 and output from the drain of the sixth transistor Q6 to the output circuit of the first amplification module. At this time, the output voltage Uo1 of the output circuit of the first amplification module is output to the first input end of the third logic gate U3. Since the amplification circuit of the first amplification module is open-loop, its gain is very large, and the sixth transistor Q6 works in the saturation region, so the alternating current signal Ui1 can be amplified to saturation in a very short time and output to the gate of the fourth transistor Q4 through the source of the sixth transistor Q6, so that the drain output voltage Uo1 of the fourth transistor Q4 is output. The voltage Uo1 is fed back to the fifth resistor R5 through the eighth transistor Q8, and a feedback signal Ui1' is generated. The feedback signal Ui1' is derived from the discharging effect of the second capacitor C2. When the charge of the second capacitor C2 is completely released, the gate voltage of the sixth transistor Q6 becomes low, the amplification circuit of the first amplification module is closed, the drain output of the fourth transistor Q4 is low, and the eighth transistor Q8 is closed. Thus, the charging of the second capacitor C2 is restarted. Since the feedback signal Ui1' and the alternating current signal Ui1 are in opposite directions and have a phase difference of 90°, the feedback signal Ui1' and the alternating current signal Ui1 can obtain a periodic oscillation signal after superposition. Since the sixth transistor Q6 works in the saturation region, the obtained voltage Uo1 is a square wave.Similarly, when the current source of the second amplification module starts to supply power, the current output by the current source of the second amplification module generates a high level on the gate of the fifteenth transistor Q15 through the seventh resistor R7, so that the fifteenth transistor Q15 is turned on, the source and the drain of the fifteenth transistor Q15 are turned on, the gate of the eleventh transistor Q11 and the gate of the twelfth transistor Q12 connected with the fifteenth transistor Q15 are low, and the eleventh transistor Q11 and the twelfth transistor Q12 are turned on. The eleventh transistor Q11 and the sixteenth transistor Q16 form a direct current path, and the twelfth transistor Q12 and the fifteenth transistor Q15 form a direct current path. Since the fourth capacitor C4 is charged, a hysteresis effect is generated, and an alternating current signal Ui2 is generated at the positive electrode of the fourth capacitor C4. The alternating current signal Ui2 is input to the gate of the sixteenth transistor Q16 and the gate of the seventeenth transistor Q17 at the same time. The alternating current signal Ui2 is amplified through the sixteenth transistor Q16 and output from the drain of the sixteenth transistor Q16 to the output circuit of the second amplification module. At this time, the output voltage Uo2 of the output circuit of the second amplification module is output to the second input end of the third logic gate U3. Since the amplification circuit of the second amplification module is open-loop, its gain is very large, and the sixteenth transistor Q16 works in the saturation region, so the alternating current signal Ui2 can be amplified to saturation in a very short time and output to the gate of the thirteenth transistor Q13 through the source of the sixteenth transistor Q16, so that the drain of the thirteenth transistor Q13 outputs the voltage Uo2. The voltage Uo2 is fed back to the eighth resistor R8 through the eighteenth transistor Q18, and a feedback signal Ui2' is generated. The feedback signal Ui2' is derived from the discharging effect of the fourth capacitor C4. When the charge of the second capacitor C2 is completely released, the gate voltage of the sixteenth transistor Q16 becomes low, the amplification circuit of the second amplification module is closed, the drain of the thirteenth transistor Q13 outputs a low level, and the eighteenth transistor Q18 is closed. Thus, the charging of the fourth capacitor C4 is restarted. Since the feedback signal Ui2' and the alternating current signal Ui2 are in opposite directions and have a phase difference of 90°, the feedback signal Ui2' and the alternating current signal Ui2 are superimposed to obtain a periodic oscillation signal. Since the sixteenth transistor Q16 works in the saturation region, the obtained voltage Uo2 is a square wave.The third logic gate U3 performs AND logic operation on the voltages Uo1 and Uo2 inputted to its two input ends, and outputs the voltage Uo3 at its output end. The sixth resistor R6 provides a stable pull-up voltage for the output of the third logic gate U3. Since the tenth transistor Q10 is an enhancement mode PMOS transistor and the fourteenth transistor Q14 is an enhancement mode NMOS transistor, the tenth transistor Q10 and the fourteenth transistor Q14 are alternately turned on under the drive of the voltage Uo3, thereby forming a push-pull drive circuit. The third capacitor C3 and the primary coil of the transformer T1 form a drive front stage. When the tenth transistor Q10 is turned on and the fourteenth transistor Q14 is turned off, the third capacitor C3 is charged. When the tenth transistor Q10 is turned off and the fourteenth transistor Q14 is turned on, the third capacitor C3 is discharged. The current is conducted to the secondary coil of the transformer T1 through the primary coil of the transformer T1. The secondary coil of the transformer T1 drives the ultrasonic transducer T2. The ultrasonic transducer T2 generates and emits ultrasonic signals.
[0014] To verify the function of the small portable underwater positioning signal generating device, the signal stream output is analyzed as follows:
[0015] 1. The water entry detection logic is expressed by formula (1):
[0016]
[0017] In formula (1), is an exclusive or operator, and · is an and operator.
[0018] When the power supply is normal: Us2=Us3=1, when the water entry detection sensor S1 enters water, the water entry detection sensor S1 detects the water pressure signal, and outputs a low voltage signal equivalent to logic 0 at one end of the water entry detection sensor S1, that is, Us1=0. Substituting formula (1) can obtain: when Us4=1, the power supply module of the small portable underwater positioning signal generating device starts to supply power, and the small portable underwater positioning signal generating device enters the working state, otherwise the small portable underwater positioning signal generating device is in a power-off sleep state.
[0019] 2. The fourth resistor R4, the fifth resistor R5 and the second capacitor C2 form an RC oscillation circuit. The alternating current signal Ui1 outputted by the RC oscillation circuit is the voltage between the positive electrode and the negative electrode of the second capacitor C2. According to the capacitor charging time characteristic, the calculation formula of the oscillation frequency f1 and the period t1 of the alternating current signal Ui1 are respectively:
[0020]
[0021]
[0022] Wherein, τ = RC = (R4 + R5)C2, R4 represents the resistance value of the fourth resistor R4, R5 represents the resistance value of the fifth resistor R5, C2 represents the capacitance value of the second capacitor C2, π represents the circular constant.
[0023] The feedback loop introduced by the eighth transistor Q8 is composed of the fifth resistor R5 and the second capacitor C2 to form an oscillation circuit, in which the calculation formulas of the oscillation frequency f2 and the oscillation period t2 of the feedback signal Ui1' are respectively:
[0024]
[0025]
[0026] The feedback signal Ui1' of the eighth transistor Q8 has a phase difference of 90° on the second capacitor C2, so the calculation formulas of the period T1 and the duty cycle D1 of the output voltage Uo1 are respectively
[0027] T1 = t1 + t2 (6)
[0028]
[0029] Substituting formulas (3) and (5) into formulas (6) and (7), the formulas of the period T1, the frequency fo1 and the duty cycle D1 of the output voltage Uo1 are:
[0030] T1 = 2π(R4 + 2R5)C2 (8)
[0031]
[0032]
[0033] Therefore, by changing the resistance value of the fourth resistor R4, the frequency and the duty cycle of the oscillation signal can be quickly adjusted.
[0034] Similarly, the eighth resistor R8 and the fourth capacitor C4 also form an RC oscillation circuit, and the calculation formulas of the frequency fo2 and the duty cycle D2 of the output voltage Uo2 are:
[0035]
[0036]
[0037] 3. The voltage Uo1 and the voltage Uo2 are input to the third logic gate U3, and the output voltage Uo3 is obtained after the AND logic operation, and the calculation formula of the voltage Uo3 is:
[0038] Uo3 = Uo1·Uo2 (13)
[0039] Uo3 is the required square wave pulse train, that is, the ultrasonic signal.
[0040] The signal timing diagram of the small portable underwater positioning signal generator of the present invention is as follows: Figure 2 As shown, analysis Figure 2 It is understood that the small portable underwater positioning signal generator of the present invention has the correct logical function and can realize the generation and transmission of ultrasonic signals.
[0041] In summary, the small portable underwater positioning signal generator of the present invention combines miniaturization and low cost, making it easy for personnel and small targets to carry. It achieves high positioning accuracy by emitting ultrasonic signals, providing precise coordinates of the location of personnel and small targets that have fallen into the water, thereby shortening rescue time and increasing the success rate of rescue. Furthermore, due to its small overall size and extremely low power consumption, the required power supply size can be greatly reduced. Therefore, the device can be mounted on a life jacket or externally on a water-entry device. Without affecting its original rescue function, it can also add additional functions to expand its application range, such as providing detectable signals in the water (water pressure detection function, etc.).
Claims
1. A small portable underwater positioning signal generating device comprising a signal generating transmitting circuit, characterized in that The signal generating transmitting circuit comprises a first logic gate, a second logic gate, a third logic gate, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, an eighth transistor, a ninth transistor, a tenth transistor, an eleventh transistor, a twelfth transistor, a thirteenth transistor, a fourteenth transistor, a fifteenth transistor, a sixteenth transistor, a seventeenth transistor, an eighteenth transistor, a nineteenth transistor, a power supply, a water inlet detection sensor, a transformer and an ultrasonic transducer; the first capacitor, the second capacitor, the third capacitor and the fourth capacitor are charging capacitors; the fourth resistor and the eighth resistor are adjustable resistors; the first transistor is a PNP type triode; the second transistor, the third transistor, the fourth transistor, the seventh transistor, the tenth transistor, the eleventh transistor, the twelfth transistor, the thirteenth transistor and the seventeenth transistor are all enhancement mode PMOS transistors; the fifth transistor, the sixth transistor, the eighth transistor, the ninth transistor, the fourteenth transistor, the fifteenth transistor, the sixteenth transistor, the eighteenth transistor and the nineteenth transistor are all enhancement mode NMOS transistors; the transformer has a primary coil and a secondary coil; the first logic gate is a two-input XOR gate, having two input ends and one output end; the second logic gate and the third logic gate are both two-input AND gates, having two input ends and one output end; the two input ends of the first logic gate, the second logic gate and the third logic gate are both referred to as first input ends and second input ends. One end of the water entry detection sensor is connected to the base of the first transistor, the collector of the first transistor, one end of the first resistor and the first input end of the first logic gate are connected, the other end of the first resistor, the positive electrode of the first capacitor, one end of the third resistor, the second input end of the first logic gate and the second input end of the second logic gate are connected, the output end of the first logic gate is connected to the first input end of the second logic gate, the other end of the third resistor and the source electrode of the tenth transistor are respectively connected to the positive electrode of the power supply, the output end of the second logic gate is connected to one end of the second resistor, one end of the fourth resistor, the source electrode of the second transistor, the source electrode of the third transistor, the source electrode of the fourth transistor, one end of the sixth resistor, one end of the seventh resistor, one end of the eighth resistor, the source electrode of the seventh transistor, the source electrode of the eleventh transistor, the source electrode of the twelfth transistor, the source electrode of the thirteenth transistor, the source electrode of the seventeenth transistor and the drain electrode of the eighteenth transistor, the other end of the fourth resistor, one end of the fifth resistor and the drain electrode of the eighth transistor are connected, the gate electrode of the second transistor, the gate electrode of the third transistor, the drain electrode of the third transistor and the drain electrode of the fifth transistor are connected, the drain electrode of the second transistor, the drain electrode of the sixth transistor and the gate electrode of the fourth transistor are connected, the drain electrode of the fourth transistor, the gate electrode of the eighth transistor, the drain electrode of the ninth transistor and the first input end of the third logic gate are connected, the gate electrode of the fifth transistor and the other end of the second resistor are connected, the gate electrode of the sixth transistor, the other end of the fifth resistor, the positive electrode of the second capacitor and the gate electrode of the seventh transistor are connected, the drain electrode of the seventh transistor and the gate electrode of the ninth transistor are connected, the gate electrode of the eleventh transistor, the gate electrode of the twelfth transistor, the drain electrode of the twelfth transistor and the drain electrode of the fifteenth transistor are connected, the drain electrode of the eleventh transistor, the drain electrode of the sixteenth transistor and the gate electrode of the thirteenth transistor are connected, the drain electrode of the thirteenth transistor, the gate electrode of the eighteenth transistor, the drain electrode of the nineteenth transistor and the second input end of the third logic gate are connected, the gate electrode of the fifteenth transistor and the other end of the seventh resistor are connected, the gate electrode of the sixteenth transistor, the other end of the eighth resistor, the positive electrode of the fourth capacitor and the gate electrode of the seventeenth transistor are connected, the drain electrode of the seventeenth transistor and the gate electrode of the nineteenth transistor are connected, the other end of the sixth resistor, the output end of the third logic gate, the gate electrode of the tenth transistor and the gate electrode of the fourteenth transistor are connected,The drain of the tenth transistor, the drain of the fourteenth transistor and the positive electrode of the third capacitor are connected, the negative electrode of the third capacitor and one end of the primary coil of the transformer are connected, the two ends of the secondary coil of the transformer and the two ends of the ultrasonic transducer are connected; the other end of the water inlet detection sensor, the emitter of the first transistor, the negative electrode of the first capacitor, the negative electrode of the power supply, the negative electrode of the second capacitor, the negative electrode of the fourth capacitor, the source of the fifth transistor, the source of the sixth transistor, the source of the eighth transistor, the source of the ninth transistor, the source of the fourteenth transistor, the source of the fifteenth transistor, the source of the sixteenth transistor, the source of the eighteenth transistor, the source of the nineteenth transistor and the other end of the primary coil of the transformer are grounded.
2. A small portable underwater positioning signal generating device according to claim 1, characterized in that The power supply is a battery pack.
Citation Information
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