Superconducting qubit coupling structure and superconducting quantum chip

Abstract

The present disclosure provides a superconducting qubit coupling structure and a superconducting quantum chip, relating to the field of quantum computing technology, specifically to the field of superconducting quantum chip technology. It includes: two superconducting qubit units, where each superconducting qubit unit includes a first metal plate and four second metal plates. The first metal plate is arranged in an "X" shape and forms openings facing four directions; the four second metal plates are respectively located in the openings in four different directions, and the structural dimensions of the coupling ports formed by the four second metal plates for coupling with the qubits are the same; the coupling ports in the oppositely arranged openings in the two superconducting qubit units are connected to each other to form the capacitor layout structure of the coupler, and the geometric centers of the first metal plates in the two superconducting qubit units are spaced within a range of positive and negative deviations from a first preset value centered on 385 μm.

Description

Technical Field

[0001] The present disclosure relates to the field of quantum computing technology, particularly to the field of superconducting quantum chip technology, and specifically to a superconducting qubit coupling structure and a superconducting quantum chip. Background Art

[0002] Superconducting qubits are the core components in superconducting quantum chips. To implement a two-qubit quantum gate, it is usually necessary to couple two qubits. An adjustable-frequency coupler can be placed between the two qubits. By adjusting the coupler frequency, the opening and closing of the equivalent coupling strength between the two qubits can be achieved. Such a coupling architecture can be "qubit-coupler-qubit (QCQ)", simply referred to as the QCQ structure.

[0003] Currently, the layout of the QCQ structure requires designers to carefully debug the distance between two qubits, and to etch a complete coupler to implement the expansion of qubits in the QCQ module. Summary of the Invention

[0004] The present disclosure provides a superconducting qubit coupling structure and a superconducting quantum chip.

[0005] According to a first aspect of the present disclosure, there is provided a superconducting qubit coupling structure, comprising:

[0006] Two superconducting qubit units, the two superconducting qubit units are symmetrically arranged. The superconducting qubit unit includes a first metal plate and four second metal plates. The first metal plate is arranged in an "X" shape and forms openings facing four directions. The four second metal plates are respectively located in the openings in four different directions, and each second metal plate forms a coupling port for coupling with the qubit represented by the first metal plate. The structural dimensions of the coupling ports formed by the four second metal plates for coupling with the qubit are the same;

[0007] Wherein, the coupling ports in the oppositely arranged openings in the two superconducting qubit units are connected to each other to form a capacitor layout structure of the coupler. The coupler is used to couple the two qubits in the two superconducting qubit units, and the geometric centers of the first metal plates in the two superconducting qubit units are spaced within a first value range. The first value range is: a value range that deviates positively and negatively from 385 um by a first preset value.

[0008] According to a second aspect of the present disclosure, there is provided a superconducting quantum chip, comprising the superconducting qubit coupling structure as described in the first aspect.

[0009] The technology according to the present disclosure solves the problem in the related art that the expansion efficiency of qubits by the QCQ module is relatively low, enabling the QCQ module to efficiently expand qubits as an independent module.

[0010] It should be understood that the content described in this part is not intended to identify the key or important features of the embodiments of the present disclosure, nor is it used to limit the scope of the present disclosure. Other features of the present disclosure will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] The drawings are used to better understand the solution and do not constitute a limitation to the present disclosure. Among them:

[0012] Figure 1 is the three-dimensional configuration of a superconducting quantum chip;

[0013] Figure 2 is the schematic structural diagram of the superconducting qubit coupling structure according to the first embodiment of the present disclosure;

[0014] Figure 3 is the schematic structural diagram of a superconducting quantum chip in an example of this embodiment;

[0015] Figure 4 is the schematic structural diagram of a qubit metal plate in an example of this embodiment;

[0016] Figure 5 is the schematic structural diagram of a coupling port metal plate in an example of this embodiment;

[0017] Figure 6 is the schematic structural diagram of a coupler metal plate in an example of this embodiment;

[0018] Figure 7 is used to implement the schematic diagram of the SQUID position distribution in a superconducting qubit coupling structure in an example;

[0019] Figure 8 is the performance simulation curve graph of a fixed QCQ structure layout in an example of this embodiment. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0020] The following describes exemplary embodiments of the present disclosure with reference to the drawings. Various details of the embodiments of the present disclosure are included to facilitate understanding, and they should be considered merely exemplary. Therefore, those of ordinary skill in the art should recognize that various changes and modifications can be made to the embodiments described herein without departing from the scope and spirit of the present disclosure. Similarly, for clarity and conciseness, the description of well-known functions and structures is omitted below.

[0021] First Embodiment

[0022] First, the three-dimensional configuration of the superconducting quantum chip is described. For example, Figure 1 As shown, the superconducting quantum chip includes a substrate 101 and a superconducting metal plate 102, which are mainly divided into two layers, namely, the base layer and the superconducting metal layer. The base layer (corresponding to the substrate) is generally made of silicon or sapphire material. Compared with the base layer, the superconducting metal layer is very thin in thickness and can be regarded as a two-dimensional plane. By etching the superconducting metal layer, various different component structures can be formed. Therefore, usually, the chip layout using a specific substrate material is concerned, that is, the top view of the chip structure.

[0023] The chip structure may include a superconducting qubit coupling structure. For example, Figure 2 As shown, the present disclosure provides a superconducting qubit coupling structure, including:

[0024] Two superconducting qubit units, the two superconducting qubit units are symmetrically arranged. The superconducting qubit unit includes a first metal plate 2011 and four second metal plates 2012. The first metal plate is arranged in an "X" shape, and the first metal plate 2011 forms openings facing four directions; the four second metal plates are respectively located in the openings in four different directions, and each second metal plate forms a coupling port coupled to the qubit represented by the first metal plate. The structural dimensions of the coupling ports formed by the four second metal plates coupled to the qubit are the same;

[0025] Among them, the coupling ports in the oppositely arranged openings in the two superconducting qubit units are connected to each other to form the capacitor layout structure 202 of the coupler. The coupler is used to couple the two qubits in the two superconducting qubit units, and the geometric centers of the first metal plates in the two superconducting qubit units are spaced within a first value range. The first value range is: a value range with 385um as the center and a positive and negative deviation from the first preset value.

[0026] In this embodiment, the superconducting qubit coupling structure relates to the field of quantum computing technology, especially to the field of superconducting quantum chip technology, and it can be widely applied to the design scenario of superconducting quantum chips.

[0027] In this embodiment, the superconducting qubit coupling structure includes a capacitor layout structure, which is composed of each metal plate etched on the superconducting metal layer. For example, Figure 2 As shown, the gray part includes the superconducting metal layer, and the white part represents the area etched off on the superconducting metal layer. Correspondingly, each metal plate and the ground metal plate 203 can be formed on the superconducting metal layer. The internal superconducting metal is the isolated metal plate, and the external superconducting metal is the ground metal plate.

[0028] Capacitances can be formed between metal plates and between metal plates and grounded metal plates. Therefore, each metal plate can represent a capacitor of a component, and the capacitor layout structure is composed of capacitors of various components etched on a superconducting metal layer.

[0029] The superconducting qubit coupling structure can include two superconducting qubit units. The superconducting qubit unit can include a first metal plate 2011 and four second metal plates 2012 etched on a superconducting metal layer. The two superconducting qubit units are symmetrically arranged along the horizontal axis and the vertical axis.

[0030] Among them, the first metal plate 2011 is arranged in an "X" shape, and the first metal plate forms openings facing four directions. The four second metal plates are respectively located in the openings in four different directions. As Figure 2 shown, the first metal plate can represent a capacitor of a qubit.

[0031] Each second metal plate forms a coupling port coupled to the qubit represented by the first metal plate. And the coupling ports in the relatively arranged openings in the two superconducting qubit units are connected to each other to form the capacitor layout structure 202 of the coupler, and this coupler is used to couple the two qubits represented by the two "X"-shaped metal plates.

[0032] As Figure 2 shown, the coupling port etched in the opening of the "X"-shaped metal plate on the left facing the right end is connected to the coupling port etched in the opening of the "X"-shaped metal plate on the right facing the left end, thereby forming the capacitor layout structure 202 of the coupler. The two connected coupling ports can be etched on one metal plate, representing the capacitor of the coupler.

[0033] The structural dimensions of the four second metal plates forming the coupling ports coupled to the qubits are the same. Therefore, the coupling ports can be extended into a complete coupler from any of the four directions of up, down, left, and right. For example, by connecting the coupling ports in the relatively arranged openings, in this way, the expansion of the QCQ module can be realized, and the expansion of qubits can be realized more efficiently as an independent module, which can make the quantum chip designed based on this superconducting qubit coupling structure expected to achieve a larger scale and improve the scale of qubits in the quantum chip. As Figure 3 shown, this figure shows the capacitor layout of the 3*3 checkerboard-shaped superconducting quantum chip structure expanded from the QCQ module. By further supplementing the superconducting quantum interference device (SQUID) device, the core device part of the superconducting quantum chip layout can be formed.

[0034] It should be noted that in practical applications, due to etching errors, there may be slight differences in the structural dimensions of the coupling ports formed by the four second metal plates that couple to the qubits. This situation can also be considered as having the same structural dimensions for the coupling ports.

[0035] In addition, the first metal plates in the two superconducting qubit units, that is, the geometric center spacing between the two qubits, is within a first value range. The first value range is: a value range centered at 385um with positive and negative deviations from a first preset value. Among them, the first preset value can be the etching error, which is determined by the etching process. Different etching processes may result in different etching errors, and accordingly, the first preset value can also be different.

[0036] When the geometric center spacing between the two qubits is within the value range centered at 385um with positive and negative deviations from the etching error, the superconducting qubit coupling structure can achieve similar performance, that is, the performance gap is not too large. Among them, the performance requirement of the QCQ structure is to be able to turn off the coupling between the qubits and provide a strong coupling strength when the coupling is turned on.

[0037] For example, if the etching error is 1%, then the first preset value is 3.85um, and the first value range is 381.15um to 388.85um. In an optional implementation, the geometric center spacing of the first metal plates in the two superconducting qubit units is 385um.

[0038] In this way, a QCQ structure layout with a fixed spacing between the two qubits can be provided, thereby providing a fixed QCQ structure layout, in order to meet the performance requirements. In this way, it is not necessary for the designer to debug the spacing between the two qubits, simplifying the design process of the QCQ structure layout and greatly improving the design efficiency of the superconducting quantum chip, which has important guiding significance and value for the research and development of the superconducting quantum chip.

[0039] Optionally, the opening angle of the opening is set at 90 degrees to fix the structure of the "X"-shaped metal plate.

[0040] Optionally, the first metal plate includes a first metal strip and a second metal strip that are cross-set, and the widths of the first metal strip and the second metal strip are both within a second value range, and the lengths of the first metal strip and the second metal strip are both within a third value range. The second value range is: a value range centered at 15um with positive and negative deviations from a second preset value, and the third value range is: a value range centered at 295um with positive and negative deviations from a third preset value.

[0041] As Figure 4 shown, the first metal plate includes a first metal strip 401 and a second metal strip 402 that are cross-set.

[0042] The second preset value may be an etching error, which is determined by the etching process. Different etching processes may result in different etching errors, and accordingly, the second preset value may also be different. For example, if the etching error is 1%, the second preset value is 0.15 um, and the second value range is 14.85 um to 15.15 um. In an alternative embodiment, the widths of the first metal strip and the second metal strip are the same, which is 15 um, as Figure 4 shown.

[0043] The third preset value may be an etching error, which is determined by the etching process. Different etching processes may result in different etching errors, and accordingly, the third preset value may also be different. For example, if the etching error is 1%, the third preset value is 2.95 um, and the third value range is 292.05 um to 297.95 um. In an alternative embodiment, the lengths of the first metal strip and the second metal strip are the same, which is 295 um, as Figure 4 shown.

[0044] In this way, a QCQ structure layout that can fix the structural dimensions of qubits can be provided, thereby providing a fixed QCQ structure layout, in order to meet the performance requirements. In this way, it is not necessary for the designer to debug the structural dimensions of the qubits, simplifying the design process of the QCQ structure layout.

[0045] Optionally, the second metal plate includes a third metal strip, a fourth metal strip, and a fifth metal strip. Among them, the third metal strip, the fourth metal strip, and the fifth metal strip are connected in an arrow shape, and the third metal strip and the fifth metal strip are vertically arranged, and the fourth metal strip is located between the third metal strip and the fifth metal strip;

[0046] Among them, the coupling ports connected to each other in the two superconducting qubit units are connected through the fourth metal strip.

[0047] In this embodiment, as Figure 5 shown, the second metal plate includes a third metal strip 501, a fourth metal strip 502, and a fifth metal strip 503. The third metal strip, the fourth metal strip, and the fifth metal strip are connected in an arrow shape, that is, the second metal plate has a single-arrow shape, and the third metal strip and the fifth metal strip are vertically arranged, and the fourth metal strip is located between the third metal strip and the fifth metal strip. The metal plate with a single-arrow shape represents the capacitor of the coupling port.

[0048] As Figure 6 shown, the coupling ports connected to each other in the two superconducting qubit units are connected through the fourth metal strip 502, forming a metal plate with a double-arrow shape. The metal plate with a double-arrow shape represents the capacitor of the coupler.

[0049] In this way, a layout of the QCQ structure for fixing the coupling port and the coupler structure can be provided.

[0050] Optionally, the widths of the third metal strip and the fifth metal strip are both within a fourth value range, and the fourth value range is: a value range that deviates positively and negatively from a fourth preset value centered on 10 um. The lengths of the third metal strip and the fifth metal strip are both within a fifth value range, and the fifth value range is: a value range that deviates positively and negatively from a fifth preset value centered on 40 um.

[0051] The fourth preset value can be an etching error, which is determined by the etching process. Different etching processes may result in different etching errors, and accordingly, the fourth preset value may also be different. For example, if the etching error is 1%, the fourth preset value is 0.1 um, and the fourth value range is 9.9 - 10.1 um. In an optional embodiment, the widths of the third metal strip and the fifth metal strip are the same, which is 10 um, as Figure 5 shown.

[0052] The fifth preset value can be an etching error, which is determined by the etching process. Different etching processes may result in different etching errors, and accordingly, the fifth preset value may also be different. For example, if the etching error is 1%, the fifth preset value is 0.4 um, and the fifth value range is 39.6 um - 40.4 um. In an optional embodiment, the lengths of the third metal strip and the fifth metal strip are the same, which is 40 um, as Figure 5 shown.

[0053] Optionally, the width of the fourth metal strip is within a sixth value range, and the sixth value range is: a value range that deviates positively and negatively from a sixth preset value centered on 7 um.

[0054] The sixth preset value can be an etching error, which is determined by the etching process. Different etching processes may result in different etching errors, and accordingly, the sixth preset value may also be different. For example, if the etching error is 1%, the sixth preset value is 0.07 um, and the sixth value range is 6.93 um - 7.07 um. In an optional embodiment, the width of the fourth metal strip is 7 um, as Figure 5 shown.

[0055] In this way, a layout of the QCQ structure for fixing the structural dimensions of the coupling port can be provided, thereby providing a fixed layout of the QCQ structure, in order to meet the performance requirements. In this way, it is not necessary for the designer to debug the structural dimensions of the coupling port, which simplifies the design process of the QCQ structure layout.

[0056] Optionally, the length of the capacitor layout structure of the coupler is within a seventh value range, and the seventh value range is: a value range that deviates positively and negatively from a seventh preset value centered on 325 um.

[0057] The seventh preset value may be an etching error, which is determined by the etching process. Different etching processes may result in different etching errors, and correspondingly, different seventh preset values. For example, if the etching error is 1%, the seventh preset value is 3.25 um, and the sixth value range is 321.75 um to 328.25 um. In an alternative embodiment, the length of the capacitor layout structure of the coupler is 325 um, as Figure 6 shown.

[0058] In this way, a QCQ structure layout that fixes the size of the capacitor layout structure of the coupler can be provided, thereby providing a fixed QCQ structure layout, in order to meet the performance requirements. In this way, the designer does not need to debug the size of the capacitor layout structure of the coupler, simplifying the design process of the QCQ structure layout.

[0059] Optionally, as Figure 2 shown, a grounding metal plate 203 is further provided on the superconducting metal layer of the first metal plate 2011 and the second metal plate 2012. The grounding metal plate is separately arranged from the first metal plate and the second metal plate, that is, separated by the etched white area. The grounding metal plate surrounds the first metal plate and the second metal plate, and the gap between the first metal plate and the grounding metal plate is within the eighth value range. The eighth value range is: a value range that deviates positively and negatively from the eighth preset value with 15 um as the center.

[0060] The eighth preset value may be an etching error, which is determined by the etching process. Different etching processes may result in different etching errors, and correspondingly, different eighth preset values. For example, if the etching error is 1%, the eighth preset value is 0.15 um, and the eighth value range is 14.85 um to 15.15 um. In an alternative embodiment, the gap between the first metal plate and the grounding metal plate is 15 um, as Figure 4 shown.

[0061] In this way, a QCQ structure layout that fixes the gap size between the metal plate of the qubit and the grounding metal plate can be provided, thereby providing a fixed QCQ structure layout, in order to meet the performance requirements. In this way, the designer does not need to debug the etching gap between the metal plate of the qubit and the grounding metal plate, simplifying the design process of the QCQ structure layout.

[0062] Optionally, the gaps between the third metal strip and the fifth metal strip and the ground metal plate in the width direction are within a ninth value range, and the ninth value range is: a value range centered on 5um and deviating positively and negatively from a ninth preset value. The gaps between the third metal strip and the fifth metal strip and the ground metal plate in the length direction are within a tenth value range, and the tenth value range is: a value range centered on 5um and deviating positively and negatively from a tenth preset value.

[0063] The ninth preset value can be an etching error, which is determined by the etching process. Different etching processes may result in different etching errors, and accordingly, different ninth preset values. For example, if the etching error is 1%, the ninth preset value is 0.05um, and the ninth value range is 4.95um to 5.05um. In an alternative embodiment, the gaps between the third metal strip and the fifth metal strip and the ground metal plate in the width direction are the same, both being 5um, as Figure 5 shown.

[0064] The tenth preset value can be an etching error, which is determined by the etching process. Different etching processes may result in different etching errors, and accordingly, different tenth preset values. For example, if the etching error is 1%, the tenth preset value is 0.05um, and the tenth value range is 4.95um to 5.05um. In an alternative embodiment, the gaps between the third metal strip and the fifth metal strip and the ground metal plate in the length direction are the same, both being 5um, as Figure 5 shown.

[0065] Optionally, the gap between the fourth metal strip and the ground metal plate in the width direction is within an eleventh value range, and the eleventh value range is: a value range centered on 5um and deviating positively and negatively from an eleventh preset value.

[0066] The eleventh preset value can be an etching error, which is determined by the etching process. Different etching processes may result in different etching errors, and accordingly, different eleventh preset values. For example, if the etching error is 1%, the eleventh preset value is 0.05um, and the eleventh value range is 4.95um to 5.05um. In an alternative embodiment, the gap between the fourth metal strip and the ground metal plate in the width direction is 5um, as Figure 5 shown.

[0067] In this way, a QCQ structure layout for fixing the gap size between the metal plate of the coupling port and the ground metal plate can be provided, thereby providing a fixed QCQ structure layout, in order to meet the performance requirements. In this case, it is not necessary for the designer to debug the etching gap between the metal plate of the coupling port and the ground metal plate, which simplifies the design process of the QCQ structure layout.

[0068] Optionally, the gap between the capacitor layout structure of the coupler and the grounding metal plate in the length direction is within a twelfth value range, and the twelfth value range is: a value range that deviates positively and negatively from a twelfth preset value with 10um as the center.

[0069] The twelfth preset value can be an etching error, which is determined by the etching process. Different etching processes may result in different etching errors, and accordingly, the twelfth preset value may also be different. For example, if the etching error is 1%, the twelfth preset value is 0.1um, and the twelfth value range is 9.9um to 10.1um. In an alternative embodiment, the gap between the capacitor layout structure of the coupler and the grounding metal plate in the length direction is 10um, as Figure 6 shown.

[0070] In this way, a QCQ structure layout can be provided to fix the gap size between the capacitor structure layout of the coupler and the grounding metal plate in the length direction, thereby providing a fixed QCQ structure layout to meet the performance requirements. In this way, the designer does not need to debug the etching gap between the capacitor structure layout of the coupler and the grounding metal plate, simplifying the design process of the QCQ structure layout.

[0071] Optionally, the gaps between the first metal plate and the third metal strip and the fifth metal strip respectively are within a thirteenth value range, and the thirteenth value range is: a value range that deviates positively and negatively from a thirteenth preset value with 15um as the center.

[0072] The thirteenth preset value can be an etching error, which is determined by the etching process. Different etching processes may result in different etching errors, and accordingly, the thirteenth preset value may also be different. For example, if the etching error is 1%, the thirteenth preset value is 0.15um, and the thirteenth value range is 14.85um to 15.15um. In an alternative embodiment, the gaps between the first metal plate and the third metal strip and the fifth metal strip respectively are the same, which is 15um, as Figure 4 shown.

[0073] In this way, a QCQ structure layout can be provided to fix the gap size between the qubit and the coupling port, thereby providing a fixed QCQ structure layout to meet the performance requirements. In this way, the designer does not need to debug the etching gap between the qubit and the coupling port, simplifying the design process of the QCQ structure layout.

[0074] Optionally, the superconducting qubit coupling structure further includes: two first superconducting quantum interferometers, and a second superconducting quantum interferometer;

[0075] Among them, one of the first superconducting quantum interference devices is connected between one of the first metal plates and the grounded metal plate, and the second superconducting interference device is connected between the capacitor layout structure of the coupler and the grounded metal plate.

[0076] In addition to the capacitor structure layout, the superconducting qubit coupling structure may further include a superconducting quantum interference device (SQUID), which is formed by paralleling two Josephson junctions and can be used to adjust the intrinsic frequency of the component.

[0077] The capacitor structure layouts of the qubit and the coupler may have SQUID structures, and the six coupling ports may not have SQUID structures. After the capacitor structure layout in the superconducting qubit coupling structure is determined, the SQUID of the component can be set at any position according to specific design requirements, but it must be ensured that the SQUID of the component is connected between the metal plate of the component and the grounded metal plate.

[0078] As Figure 7 shown, the position distributions of the SQUIDs of the qubit and the coupler are presented. The black double "X" - shaped structure is the SQUID, SQUID701 is the first superconducting quantum interference device, and SQUID702 is the second superconducting quantum interference device.

[0079] In this way, the design of the SQUID in the superconducting qubit coupling structure can be realized.

[0080] The performance of the fixed QCQ structure layout of the specific example of the first embodiment is analyzed and presented from two aspects: scalability and coupling strength.

[0081] In this example, in the layout of the QCQ structure, the geometric centers of the first metal plates in the two superconducting qubit units are separated by 385 μm. The opening angle of the first metal plate is set at 90 degrees. The widths of the first metal strip and the second metal strip are the same, which is 15 μm, and the lengths of the first metal strip and the second metal strip are the same, which is 295 μm. The widths of the third metal strip and the fifth metal strip are the same, which is 10 μm, and the lengths of the third metal strip and the fifth metal strip are the same, which is 40 μm. The width of the fourth metal strip is 7 μm. The length of the capacitor layout structure of the coupler is 325 μm. The gap between the first metal plate and the ground metal plate is 15 μm. The gaps between the third metal strip and the fifth metal strip and the ground metal plate in the width direction are the same, both are 5 μm. The gaps between the third metal strip and the fifth metal strip and the ground metal plate in the length direction are the same, both are 5 μm. The gap between the fourth metal strip and the ground metal plate in the width direction is 5 μm. The gap between the capacitor layout structure of the coupler and the ground metal plate in the length direction is 10 μm. The gaps between the first metal plate and the third metal strip and the fifth metal strip are the same, which is 15 μm.

[0082] 1) Scalability

[0083] The structural dimensions of the arrow coupling ports of the coupler and the six independent single-arrow coupling ports are the same. Therefore, the single-arrow coupling ports can be extended to complete couplers from any of the four directions: up, down, left, and right, thus enabling the expansion of the QCQ module.

[0084] 2) Coupling strength

[0085] By adjusting the coupler frequency, the coupling can be turned off, and a strong coupling strength can be provided when the coupling is turned on.

[0086] First, a prerequisite limitation for coupling adjustment is briefly introduced, namely the dispersive coupling limitation. The tunable coupler architecture requires that there must be dispersive coupling between the qubit and the coupler, that is, the coupling strength g qc should be much smaller than the frequency difference |ω c - ω q | (ω c is the coupler frequency, ω q is the qubit frequency). The dispersive ratio β is defined as shown in the following formula (1):

[0087]

[0088] Then it must satisfy β >> 1. Without loss of generality, usually a lower limit of the dispersive ratio β s is taken. When β > β s , it is considered that the two satisfy dispersive coupling. Since the operating frequency range of the components satisfies ω c > ω q , so when ωc The smaller it is, the closer the dispersion ratio is to the lower limit β s .

[0089] As an example, take the lower limit of the dispersion ratio as β s = 8, and fix the qubit frequency at 6.418 GHz (gigahertz). Use electromagnetic simulation software to perform detailed simulation verification on the layout of this structure. The performance curves can be obtained as Figure 8 shown. The horizontal axis is the coupler frequency, the left vertical axis is the equivalent coupling strength between qubits, and the right vertical axis is the dispersion coupling ratio between the qubit and the coupler. The solid line is the curve of the equivalent coupling strength changing with the coupler frequency, and the dash-dotted line is the curve of the dispersion coupling ratio changing with the coupler frequency (β 1 and β 2 are the dispersion coupling ratios of the left and right qubits to the coupler respectively. Since the qubits are identical, the curve representing β 1 coincides with the curve representing β 2 ), the "x" point is a special frequency point, including the coupling off point and the on point, and the dotted line is the auxiliary identification line corresponding to the special frequency point.

[0090] It can be clearly seen from the figure that the layout of this QCQ structure can meet the requirement of turning off the coupling (i.e., the equivalent coupling strength is 0) when the coupler frequency is about 15 GHz, and at the lower limit of the dispersion ratio β s = 8, a strong coupling strength of 18.5 megahertz (MHz) is achieved.

[0091] This can prove that the layout of this QCQ structure not only has excellent scalability but also has relatively strong coupling performance, which can improve the gating speed of two-qubit quantum gates, is expected to achieve faster and higher-fidelity qubit gates, and improve the performance of quantum chips. Therefore, the superconducting quantum chip designed based on the layout of this QCQ structure is expected to achieve stronger performance and larger scale, which has important guiding significance and value for the research and development of superconducting quantum chips.

[0092] Moreover, by fixing the structural dimensions of the QCQ module, only batch modular expansion according to specific requirements is needed to efficiently realize the design of a superconducting quantum chip.

[0093] Second Embodiment

[0094] This embodiment provides a superconducting quantum chip, including the superconducting qubit coupling structure described in the first embodiment, and can achieve the same beneficial effects. To avoid repetition, it will not be elaborated here.

[0095] Optionally, the superconducting quantum chip includes at least three superconducting qubit units distributed in an array, and two adjacent superconducting qubit units among the at least three superconducting qubit units form the superconducting qubit coupling structure, that is, the superconducting quantum chip may include multiple superconducting qubit coupling structures. In this way, the scalable performance of the superconducting qubit coupling structure can be utilized for batch modular expansion, that is, the design of a superconducting quantum chip can be efficiently realized.

[0096] In the technical solution of the present disclosure, the processing of the user's personal information involved in collection, storage, use, processing, transmission, provision, and disclosure all comply with the provisions of relevant laws and regulations and do not violate public order and good customs.

[0097] The above specific embodiments do not constitute a limitation on the protection scope of the present disclosure. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principle of the present disclosure should be included within the protection scope of the present disclosure.

Claims

1. A superconducting qubit coupling structure, comprising: Two superconducting qubit units, which are symmetrically arranged. Each superconducting qubit unit includes a first metal plate and four second metal plates. The first metal plate is arranged in an "X" shape and forms openings facing four directions; the four second metal plates are respectively located in the openings in four different directions, and each second metal plate forms a coupling port for coupling with the qubit represented by the first metal plate. The structural dimensions of the coupling ports formed by the four second metal plates for coupling with the qubit are the same; Wherein, the coupling ports in the oppositely arranged openings of the two superconducting qubit units are connected to form the capacitor layout structure of the coupler. The coupler is used to couple the two qubits in the two superconducting qubit units, and the geometric centers of the first metal plates in the two superconducting qubit units are spaced within a first value range. The first value range is: a value range centered on 385um with a positive and negative deviation from a first preset value; Wherein, the second metal plate includes a third metal strip, a fourth metal strip and a fifth metal strip. The third metal strip, the fourth metal strip and the fifth metal strip are connected in an arrow shape, and the third metal strip and the fifth metal strip are perpendicular to each other. The fourth metal strip is located between the third metal strip and the fifth metal strip; Wherein, the mutually connected coupling ports in the two superconducting qubit units are connected through the fourth metal strip.

2. The superconducting qubit coupling structure according to claim 1, wherein, The opening angle of the opening is set at 90 degrees.

3. The superconducting qubit coupling structure according to claim 1, wherein, The first metal plate includes a first metal strip and a second metal strip arranged in a cross shape, and the widths of the first metal strip and the second metal strip are both within a second value range. The second value range is: a value range centered on 15um with a positive and negative deviation from a second preset value. The lengths of the first metal strip and the second metal strip are both within a third value range. The third value range is: a value range centered on 295um with a positive and negative deviation from a third preset value.

4. The superconducting qubit coupling structure according to claim 1, wherein, The widths of the third metal strip and the fifth metal strip are both within a fourth value range. The fourth value range is: a value range centered on 10um with a positive and negative deviation from a fourth preset value. The lengths of the third metal strip and the fifth metal strip are both within a fifth value range. The fifth value range is: a value range centered on 40um with a positive and negative deviation from a fifth preset value.

5. The superconducting qubit coupling structure according to claim 1, wherein, The width of the fourth metal strip is within a sixth value range. The sixth value range is: a value range centered on 7um with a positive and negative deviation from a sixth preset value.

6. The superconducting qubit coupling structure according to claim 1, wherein, The length of the capacitor layout structure of the coupler is within a seventh value range, and the seventh value range is: a value range that deviates positively and negatively from a seventh preset value with 325um as the center.

7. The superconducting qubit coupling structure according to claim 1, wherein, a ground metal plate is further provided on the superconducting metal layer where the first metal plate and the second metal plate are arranged. The ground metal plate is separately arranged from the first metal plate and the second metal plate. The ground metal plate surrounds the first metal plate and the second metal plate, and the gap between the first metal plate and the ground metal plate is within an eighth value range. The eighth value range is: a value range that deviates positively and negatively from an eighth preset value with 15um as the center.

8. The superconducting qubit coupling structure according to claim 7, wherein, The gaps between the third metal strip and the fifth metal strip and the ground metal plate in the width direction are within a ninth value range. The ninth value range is: a value range that deviates positively and negatively from a ninth preset value with 5um as the center. The gaps between the third metal strip and the fifth metal strip and the ground metal plate in the length direction are within a tenth value range. The tenth value range is: a value range that deviates positively and negatively from a tenth preset value with 5um as the center.

9. The superconducting qubit coupling structure according to claim 7, wherein, The gap between the fourth metal strip and the ground metal plate in the width direction is within an eleventh value range. The eleventh value range is: a value range that deviates positively and negatively from an eleventh preset value with 5um as the center.

10. The superconducting qubit coupling structure according to claim 7, wherein, The gap between the length direction of the capacitor layout structure of the coupler and the ground metal plate is within a twelfth value range. The twelfth value range is: a value range that deviates positively and negatively from a twelfth preset value with 10um as the center.

11. The superconducting qubit coupling structure according to claim 1, wherein, The gaps between the first metal plate and the third metal strip and the fifth metal strip respectively are within a thirteenth value range. The thirteenth value range is: a value range that deviates positively and negatively from a thirteenth preset value with 15um as the center.

12. The superconducting qubit coupling structure according to claim 7, further comprises: two first superconducting quantum interferometers, and one second superconducting quantum interferometer; wherein, one of the first superconducting quantum interferometers is connected between one of the first metal plates and the ground metal plate, and the second superconducting quantum interferometer is connected between the capacitor layout structure of the coupler and the ground metal plate.

13. A superconducting quantum chip, comprising the superconducting qubit coupling structure according to any one of claims 1 to 12.

14. The superconducting quantum chip according to claim 13, wherein, The superconducting quantum chip includes at least three superconducting qubit units distributed in an array, and the superconducting qubit coupling structure is formed between two adjacent superconducting qubit units among the at least three superconducting qubit units.

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