Display substrate, display panel and display device

By setting grooves that penetrate the organic insulating layer in the peripheral area of ​​the liquid crystal display substrate to avoid the second conductive layer, and combining this with an inorganic protective layer covering the sidewalls, the problem of short circuits in signal lines caused by water absorption by the organic film is solved, thereby improving the reliability and transmittance of the display and reducing power consumption.

CN116047799BActive Publication Date: 2026-01-23HEFEI XINSHENG OPTOELECTRONICS TECH CO LTD +1
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Patent Information

Application Number
CN202111266306.8
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2021-10-28
Publication Date
2026-01-23
Estimated Expiration
2041-10-28

AI Technical Summary

Technical Problem

Under high temperature and humidity conditions, the organic film in existing LCD displays is prone to absorbing water and spreading to the display area, causing reliability issues and affecting product quality. In particular, the organic film under the frame adhesive can cause short circuits in signal lines.

Method used

A first groove penetrating the organic insulating layer is provided in the peripheral area of ​​the display substrate to avoid the second conductive layer, exposing only the first insulating layer to prevent etching damage to the second conductive layer. An inorganic protective layer is used to cover the sidewalls of the groove to enhance the moisture barrier capability.

Benefits of technology

It effectively prevents moisture erosion, avoids short circuits in the conductive layer caused by film peeling, improves the reliability and transmittance of the display, and reduces power consumption.

✦ Generated by Eureka AI based on patent content.

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Abstract

The application discloses a display substrate, a display panel and a display device, which can avoid water vapor from invading through an organic insulating layer and can also avoid short circuit between signal lines. The display substrate provided by the application has a display area and a peripheral area surrounding the display area. The display substrate comprises a substrate, a first conductive layer, a first insulating layer, a second conductive layer and an organic insulating layer arranged on one side of the substrate in sequence. In the peripheral area, the display substrate comprises a gate drive circuit, and the first conductive layer comprises a plurality of first signal lines located on the side of the gate drive circuit away from the display area, and the first signal lines are used for providing signals to the gate drive circuit. In the peripheral area, the organic insulating layer comprises a plurality of first grooves penetrating through the thickness of the organic insulating layer. The first grooves are located in the regions between two adjacent first signal lines in the orthographic projection of the substrate, and the orthographic projection of the first grooves and the orthographic projection of the second conductive layer do not overlap with each other in the orthographic projection of the substrate.
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Description

Technical Field

[0001] This application relates to the field of display technology, and in particular to a display substrate, display panel and display device. Background Technology

[0002] LCD monitors are currently the most common display devices, used in mobile phones, laptops, computers, televisions, and other displays.

[0003] With the development and improvement of LCD displays, the required display resolution is getting higher and higher, the transmittance requirements are constantly increasing, and the power consumption requirements are decreasing. Currently, high-end LCD products all use organic films to reduce related coupling capacitance. However, organic film layers are prone to absorbing water during high temperature and high humidity testing, especially the organic film under the frame adhesive. The water absorbed gradually diffuses to the display area, causing the periphery to turn black, affecting product quality. Summary of the Invention

[0004] This application provides a display substrate, a display panel, and a display device to prevent moisture from entering through the organic insulating layer and to prevent short circuits between signal lines.

[0005] This application provides a display substrate, which has a display area and a peripheral area surrounding the display area;

[0006] The display substrate includes: a substrate, and a first conductive layer, a first insulating layer, a second conductive layer, and an organic insulating layer sequentially disposed on one side of the substrate;

[0007] In the peripheral area, the display substrate includes a gate driving circuit, and the first conductive layer includes: a plurality of first signal lines located on the side of the gate driving circuit away from the display area, the first signal lines being used to provide signals to the gate driving circuit;

[0008] In the peripheral region, the organic insulating layer includes a plurality of first grooves extending through its thickness; the orthographic projection of the first grooves onto the substrate covers the orthographic projection of at least a portion of the region between two adjacent first signal lines onto the substrate, and the orthographic projection of the first grooves onto the substrate does not overlap with the orthographic projection of the second conductive layer onto the substrate.

[0009] In some embodiments, in the peripheral region, the second conductive layer includes: a plurality of second signal lines electrically connected to the first signal lines in a one-to-one correspondence; the extension direction of the second signal lines is the same as the extension direction of the first signal lines;

[0010] The orthographic projection of the first groove onto the substrate does not overlap with the orthographic projection of the second signal line onto the substrate.

[0011] In some embodiments, the width of the first signal line is equal to the width of the second signal line;

[0012] The orthographic projection of the first signal line onto the substrate and the orthographic projection of the second signal line onto the substrate have overlapping areas.

[0013] In some embodiments, the width of the first signal line is greater than the width of the second signal line;

[0014] The orthographic projection of the second signal line onto the substrate falls within the orthographic projection of the first signal line onto the substrate.

[0015] In some embodiments, the orthographic projection of the first signal line onto the substrate overlaps with the orthographic projection of the first groove onto the substrate.

[0016] In some embodiments, in the peripheral region, the second conductive layer includes: a plurality of connecting leads electrically connected between the gate driving circuit and the first signal line; the extending directions of the connecting leads are arranged to intersect the extending direction of the first signal line;

[0017] The projection of the first groove onto the substrate and the projection of the connecting lead onto the substrate do not overlap.

[0018] In some embodiments, the minimum distance between the edge of the first groove in the orthographic projection of the substrate and the edge of the source / drain electrode layer in the orthographic projection of the substrate is greater than 6 micrometers.

[0019] In some embodiments, the display substrate further includes: an inorganic protective layer located on the side of the organic insulating layer facing away from the second conductive layer, and a plurality of sidewall protective layers;

[0020] An inorganic protective layer covers a portion of the sidewalls and bottom of the first groove to form a second groove;

[0021] The sidewall protective layer includes: a first sidewall protective layer, and / or, a second sidewall protective layer;

[0022] The first sidewall protective layer is located between the organic insulating layer and the inorganic protective layer, and covers the sidewall of the first groove;

[0023] The second sidewall protective layer is located on the side of the inorganic protective layer away from the organic insulating layer and covers the sidewall of the second groove.

[0024] In some embodiments, the first sidewall protective layer is broken at the bottom of the first groove;

[0025] The second sidewall protective layer breaks off at the bottom of the second groove.

[0026] In some embodiments, in the display area, the display substrate further includes a first transparent electrode located between the organic insulating layer and the inorganic protective layer, and a second transparent electrode located on the side of the inorganic protective layer away from the organic insulating layer.

[0027] The first sidewall protective layer is disposed in the same layer as the first transparent electrode;

[0028] The second sidewall protective layer is disposed in the same layer as the second transparent electrode.

[0029] In some embodiments, the organic insulating layer includes: an organic protective layer, an organic film located on the side of the organic protective layer opposite to the second conductive layer; and a first groove penetrating the organic film and the organic protective layer.

[0030] An embodiment of this application provides a display panel, comprising: a display substrate provided in this application embodiment, a counter substrate disposed opposite to the display substrate, and a sealing adhesive located between the display substrate and the counter substrate;

[0031] The sealing adhesive covers the first groove in the orthogonal projection of the substrate.

[0032] This application provides a display device, including a display panel provided in this application embodiment.

[0033] The display substrate, display panel, and display device provided in this application embodiment have a first groove whose orthographic projection on the substrate does not overlap with the second conductive layer's orthographic projection on the substrate. That is, the first groove avoids the second conductive layer, so that the first groove penetrating the organic insulating layer only exposes the first insulating layer and does not expose the second conductive layer. This can avoid damage to the second conductive layer during the etching process to form the first groove, avoid moisture erosion caused by affecting the density of the interface between the second conductive layer and the subsequent film layer, and also avoid the subsequent film layer from peeling off due to moisture erosion. In addition, it can avoid short circuit of the second conductive layer caused by film layer peeling off. Attached Figure Description

[0034] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0035] Figure 1 A schematic diagram of a display substrate provided in an embodiment of this application;

[0036] Figure 2 Provided for the embodiments of this application Figure 1 A schematic diagram of region D in the middle;

[0037] Figure 3 The following are provided for the embodiments of this application: Figure 2 Cross-sectional view of AA';

[0038] Figure 4 A schematic diagram of another display substrate provided in an embodiment of this application;

[0039] Figure 5 A schematic diagram of yet another display substrate provided in an embodiment of this application;

[0040] Figure 6 The following are provided for the embodiments of this application: Figure 5 Cross-sectional view of BB';

[0041] Figure 7 A schematic diagram of yet another display substrate provided in an embodiment of this application;

[0042] Figure 8 The following are provided for the embodiments of this application: Figure 7 A cross-sectional view of CC';

[0043] Figure 9 A schematic diagram of yet another display substrate provided in an embodiment of this application;

[0044] Figure 10 The following are provided for the embodiments of this application: Figure 9 Cross-sectional view of EE';

[0045] Figure 11 A schematic diagram of yet another display substrate provided in an embodiment of this application;

[0046] Figure 12 The following are provided for the embodiments of this application: Figure 11 Cross-sectional view of FF';

[0047] Figure 13 A schematic diagram of yet another display substrate provided in an embodiment of this application;

[0048] Figure 14 The following are provided for the embodiments of this application: Figure 13 Cross-sectional view of GG'. Detailed Implementation

[0049] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this application. Furthermore, the embodiments and features in the embodiments of this application can be combined with each other without conflict. All other embodiments obtained by those skilled in the art based on the described embodiments of this application without creative effort are within the scope of protection of this application.

[0050] Unless otherwise defined, the technical or scientific terms used in this application shall have the ordinary meaning understood by one of ordinary skill in the art to which this application pertains. The terms "first," "second," and similar terms used in this application do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Terms such as "comprising" or "including" mean that the element or object preceding the word encompasses the elements or objects listed following the word and their equivalents, without excluding other elements or objects. Terms such as "connected" or "linked" are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect.

[0051] It should be noted that the dimensions and shapes of the figures in the accompanying drawings do not reflect actual proportions and are intended only to illustrate the content of this application. Furthermore, the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout.

[0052] In related technologies, products with organic films require a trench design for the organic film, with the trench area located in the double-layer wiring area of ​​the gate drive circuit. During the etching process of the organic film to form trenches exposing the upper gate drive circuit signal lines, the upper gate drive circuit signal lines are easily damaged, affecting the compactness of the interface between the subsequently formed protective layer and the exposed upper gate drive circuit signal lines. This allows moisture to enter and corrode the upper gate drive circuit signal lines. Moisture corrosion can also cause the protective layer to peel off. Without the protection of the protective layer, the metal slag from the corrosion of the gate drive circuit signal lines can easily cause short circuits between adjacent gate drive circuit signal lines.

[0053] This application provides a display substrate, such as... Figure 1 As shown, the display substrate has a display area 1 and a peripheral area 2 surrounding the display area 1;

[0054] like Figure 2 , Figure 3 As shown, the display substrate includes: a substrate 3, and a first conductive layer 4, a first insulating layer 5, a second conductive layer, and an organic insulating layer 7 sequentially disposed on one side of the substrate 3.

[0055] In the peripheral area, the display substrate includes a gate driving circuit, and the first conductive layer 4 includes: a plurality of first signal lines 10 located on the side of the gate driving circuit away from the display area, the first signal lines 10 being used to provide signals to the gate driving circuit;

[0056] In the peripheral region, the organic insulating layer 7 includes a plurality of first grooves 11 extending through its thickness; the orthographic projection of the first grooves 11 onto the substrate 3 covers at least a portion of the orthographic projection of the region between two adjacent first signal lines 10 onto the substrate 3, and the orthographic projection of the first grooves 11 onto the substrate 3 does not overlap with the orthographic projection of the second conductive layer onto the substrate 3.

[0057] The display substrate provided in this application embodiment has a first groove whose orthographic projection on the substrate does not overlap with the second conductive layer's orthographic projection on the substrate. That is, the first groove avoids the second conductive layer, so that the first groove penetrating the organic insulating layer only exposes the first insulating layer and does not expose the second conductive layer. This can avoid damage to the second conductive layer during the etching process to form the first groove, avoid moisture erosion caused by affecting the density of the interface between the second conductive layer and the subsequent film layer, and also avoid the subsequent film layer from peeling off due to moisture erosion. In addition, it can avoid short circuits in the second conductive layer caused by film layer peeling off.

[0058] It should be noted that, Figure 2 for Figure 1 A schematic diagram of region D in the middle. Figure 3 It can be along Figure 2 Cross-sectional view of AA'.

[0059] In some embodiments, the display area includes a plurality of sub-pixels arranged in an array. Each sub-pixel includes a thin-film transistor (TFT). A first conductive layer is, for example, a gate conductive layer, meaning the first conductive layer includes the gate of the TFT; a second conductive layer is, for example, a source-drain conductive layer, meaning the second conductive layer includes the source and drain of the TFT. In specific implementations, the TFT may be, for example, a bottom-gate structure, with a first insulating layer as a gate insulating layer. The TFT also includes an active layer located between the first insulating layer and the second conductive layer. In specific implementations, a buffer layer may also be disposed between the first conductive layer and the substrate. Alternatively, in specific implementations, the TFT may also be a top-gate structure, in which case the first insulating layer is an interlayer insulating layer, an active layer is further included between the first conductive layer and the substrate, and a gate insulating layer is further included between the active layer and the first conductive layer.

[0060] In some embodiments, such as Figure 3 As shown, the display substrate also includes: an inorganic protective layer 12 located on the side of the organic insulating layer 7 facing away from the second conductive layer; the portion of the inorganic protective layer 12 covering the sidewall and bottom of the first groove 11 forms the second groove 14.

[0061] In some embodiments, in the display area, the display substrate further includes a first transparent electrode located between the organic insulating layer and the inorganic protective layer, and a second transparent electrode located on the side of the inorganic protective layer opposite to the organic insulating layer.

[0062] In some embodiments, the first transparent electrode is a pixel electrode, and the second transparent electrode is a common electrode. Alternatively, in some embodiments, the first transparent electrode is a common electrode, and the second transparent electrode is a pixel electrode. That is, the display substrate provided in this application embodiment can be applied to a liquid crystal display. In specific implementation, the pixel electrode corresponds one-to-one with a sub-pixel, and the pixel electrode is electrically connected to the drain of the thin-film transistor.

[0063] In some embodiments, such as Figure 3 As shown, the organic insulating layer 7 includes: an organic protective layer 8, an organic film 9 located on the side of the organic protective layer 8 opposite to the second conductive layer; and a first groove 11 penetrating the organic film 9 and the organic protective layer 8.

[0064] The display substrate provided in this application embodiment protects the second conductive layer by setting an organic protective layer, and an organic film is set on the side of the organic protective layer away from the substrate, thereby increasing the distance between the pixel electrode and the second conductive layer, thereby reducing the coupling capacitance between the pixel electrode and the second conductive layer.

[0065] In some embodiments, such as Figure 3 As shown, the thickness of the organic film 9 is greater than the thickness of the organic protective layer 8.

[0066] In practice, the thickness of the first and second conductive layers is greater than or equal to 2000 angstroms and less than or equal to 4000 angstroms; the thickness of the first insulating layer is greater than or equal to 3000 angstroms and less than or equal to 5000 angstroms; and the thickness of the organic protective layer is greater than or equal to 1000 angstroms and less than or equal to 2000 angstroms. The thickness of the organic film is greater than or equal to 2 to 3 micrometers. The thickness of the inorganic protective layer is greater than or equal to 2000 angstroms and less than or equal to 4000 angstroms.

[0067] In practical implementation, since both the organic protective layer and the organic film are organic materials, to prevent the film formed by the organic materials from absorbing water under high temperature and humidity conditions, grooves are formed in the organic film and the organic protective layer to block the water vapor intrusion channel and prevent water vapor from entering the display area. In practical implementation, for example, an etching process can be performed after the organic film is formed to remove the organic film and organic protective layer in the first groove area, forming a first groove that penetrates the thickness of the organic protective layer and the organic film. It should be noted that, in order to ensure complete etching of the organic protective layer, over-etching is usually performed in the first groove etching process, that is, a part of the film layer below the organic protective layer is also etched. Since the first groove of the display substrate provided in this application embodiment only exposes the first insulating layer, the first groove etching process only over-etches the first insulating layer and does not over-etch the source and drain electrode layers above the first insulating layer. This can avoid damage to the second conductive layer, avoid affecting the density of the interface between the second conductive layer and the subsequent film layer, and avoid water vapor erosion caused by water vapor erosion. It can also avoid the subsequent formation of the inorganic protective layer from peeling off due to water vapor erosion.

[0068] In some embodiments, the gate driving circuit provides a scan signal to the gate of the transistor of the sub-pixel. In a specific implementation, the gate driving circuit includes a plurality of cascaded shift registers, each of which includes a thin-film transistor.

[0069] It should be noted that when the display substrate is used in a liquid crystal display product, a bezel adhesive is required to seal the display substrate and the opposing substrate. To achieve a narrow bezel display, the bezel adhesive coating area covers the area of ​​the gate drive circuit. Since the organic film in the bezel adhesive coating area easily absorbs water, the first groove can be set in the bezel adhesive coating area. That is, the orthogonal projection of the first groove onto the substrate falls within the orthogonal projection of the bezel adhesive onto the substrate. To ensure the consistency between the thin-film transistors in the gate drive circuit and the thin-film transistors in the display area, the organic protective layer and the insulating film need to cover the area of ​​the thin-film transistors in the gate drive circuit. Therefore, in the array substrate provided in this application embodiment, the first groove of the organic insulating layer is set in the area of ​​the signal line electrically connected to the gate drive circuit.

[0070] In specific implementation, such as Figure 2 As shown, multiple first signal lines 10 are arranged along a first direction X and extend along a second direction Y, where the first direction X and the second direction Y intersect. Figure 2 The example given is that the first direction X is perpendicular to the second direction Y. Figure 2 As shown, the region between the first groove 11 and the first signal line 10 has an overlapping portion, a plurality of first grooves 11 are arranged along a first direction X, and the first groove 11 includes a portion extending along a second direction Y.

[0071] In a specific implementation, the gate driving circuit is located at least on one side of the display area. That is, in the first direction X, the gate driving circuit is located on the left and / or right side of the display area.

[0072] In practical implementation, the number of first grooves in the peripheral area on one side of the display area is no greater than the number of first signal lines. The number of first grooves can be selected according to actual needs.

[0073] In some embodiments, such as Figure 2 , Figure 3 As shown, in the peripheral region, the signal lines that provide signals to the gate drive circuit and extend along the second direction Y include only the first signal lines.

[0074] In some embodiments, such as Figure 4 As shown, in the peripheral region, the second conductive layer 6 includes: a plurality of connecting leads 15 electrically connected between the gate driving circuit and the first signal line 10; the extending direction of the connecting leads 15 is intersected with the extending direction of the first signal line 10; that is, the connecting leads extend along the first direction X.

[0075] The orthographic projection of the first groove 11 onto the substrate does not overlap with the orthographic projection of the connecting lead 15 onto the substrate.

[0076] In some embodiments, such as Figure 4 As shown, the connecting lead 15 is electrically connected to the first signal line 10 through the first via 16 that penetrates the first insulating layer. Figure 4 The area circled in the middle is the area of ​​the first via 16.

[0077] In some embodiments, such as Figure 4 As shown, the orthographic projection of the first signal line 10 onto the substrate overlaps with the orthographic projection of the first groove 11 onto the substrate.

[0078] In a specific implementation, the signal line that provides a signal to the gate drive circuit and extends along the second direction Y may include a double-layer signal line.

[0079] In some embodiments, such as Figure 5 , Figure 6 As shown, in the peripheral area, the second conductive layer 6 includes: multiple second signal lines 13, each of which is electrically connected to a first signal line 10 in a one-to-one correspondence; the extension direction of the second signal lines 13 is the same as the extension direction of the first signal lines 10; that is, the multiple second signal lines 13 are arranged along the first direction X and extend along the second direction Y.

[0080] The orthographic projection of the first groove 11 onto the substrate 3 and the orthographic projection of the second signal line 13 onto the substrate 3 do not overlap.

[0081] The display substrate provided in this application embodiment has a one-to-one electrical connection between the second signal line and the first signal line, thereby reducing the resistance of the gate drive signal line. Furthermore, since the orthographic projection of the first groove of the organic insulating layer onto the substrate does not overlap with the orthographic projection of the second signal line onto the substrate, the first groove only exposes the first insulating layer and does not expose the second signal line, thus avoiding damage caused by over-etching the second signal line.

[0082] It should be noted that, Figure 6 For along Figure 5 Cross-sectional view of BB'.

[0083] In some embodiments, such as Figure 5 , Figure 6 As shown, the width of the first signal line 10 is equal to the width of the second signal line 13;

[0084] The orthographic projection of the first signal line 10 onto the substrate 3 overlaps with the orthographic projection of the second signal line 13 onto the substrate 3.

[0085] It should be noted that, considering process errors, the overlapping area between the orthographic projections of the first signal line and the second signal line on the substrate may not be guaranteed to be completely coincident. In practical implementation, under reasonable process error conditions, it is sufficient for the orthographic projections of the first and second signal lines on the substrate to have a region that approximately coincides. For example, if the error is m, and the widths of the first and second signal lines are n, then the orthographic projections of the first and second signal lines within a width range of nm on the substrate should coincide.

[0086] In some embodiments, such as Figure 7 , Figure 8 As shown, the width of the first signal line 10 is greater than the width of the second signal line 13;

[0087] The orthographic projection of the second signal line 13 onto the substrate 3 falls within the orthographic projection of the first signal line 10 onto the substrate 3.

[0088] In some embodiments, such as Figure 7 , Figure 8 As shown, the orthographic projection of the first signal line 10 onto the substrate 3 overlaps with the orthographic projection of the first groove 11 onto the substrate 3.

[0089] It should be noted that, Figure 8 For along Figure 7 Cross-sectional view of CC'.

[0090] In practical implementation, since the width of the first signal line is greater than the width of the second signal line, even if a portion of the first signal line is covered by the area of ​​the first groove, the first groove can still avoid the second signal line. This saves wiring space for the first signal line compared to the case where the width of the first signal line is equal to the width of the second signal line, reduces the size of the surrounding area, and is more conducive to achieving a narrow bezel display.

[0091] In some embodiments, such as Figure 5 , Figure 7 As shown, the second signal line 13 is electrically connected to the first signal line 10 through the second via 17 that penetrates the first insulating layer. Figure 5 , Figure 7 The area circled by the dashed line is the area of ​​the second via 17.

[0092] In some embodiments, the minimum distance between the edge of the first groove in the orthographic projection of the substrate and the edge of the source / drain electrode layer in the orthographic projection of the substrate is greater than 6 micrometers.

[0093] In practical implementation, when a single-layer signal line is used to provide a signal to the gate driving circuit, the minimum distance between the edge of the first groove's projection onto the substrate and the edge of the connecting lead's projection onto the substrate is greater than 6 micrometers. When a double-layer signal line is used to provide a signal to the gate driving circuit, such as Figure 5 , Figure 7 As shown, the minimum distance h1 between the edge of the first groove 11 projected onto the substrate and the edge of the second signal line 13 projected onto the substrate is greater than 6 micrometers.

[0094] This avoids over-etching of the source / drain electrode layer patterns due to process fluctuations or errors, ensuring sufficient safe distance between the first groove and the patterns of adjacent source / drain electrode layers.

[0095] In some embodiments, such as Figure 9 , Figure 10 , Figure 11 , Figure 12 , Figure 13 , Figure 14 As shown, the display substrate also includes: multiple sidewall protective layers 18;

[0096] The sidewall protective layer 18 includes: a first sidewall protective layer 19, and / or, a second sidewall protective layer 20;

[0097] The first sidewall protective layer 19 is located between the organic insulating layer 7 and the inorganic protective layer 12, and covers the sidewall of the first groove 11;

[0098] The second sidewall protective layer 20 is located on the side of the inorganic protective layer 12 away from the organic insulating layer 7 and covers the sidewall of the second groove 14.

[0099] Figure 9 , Figure 10 The middle sidewall protective layer only includes the first sidewall protective layer 19. Figure 10 For example, it could be along Figure 9 Cross-sectional view of EE' Figure 11 , Figure 12 The middle sidewall protective layer only includes the second sidewall protective layer 20. Figure 12 For example, it could be along Figure 11 A cross-sectional view of FF'. Figure 13 , Figure 14 The middle sidewall protective layer includes a first sidewall protective layer 19 and a second sidewall protective layer 20. Figure 14 For example, it could be along Figure 13 Cross-sectional view of GG'.

[0100] The display substrate provided in this application embodiment has a sidewall protective layer covering the sidewall area of ​​the first groove, which can further improve the water vapor barrier capability and the scratch resistance of the film layer.

[0101] In some embodiments, the thickness of the sidewall protective layer is greater than or equal to 500 angstroms and less than or equal to 1000 angstroms.

[0102] In practice, the sidewall protective layer may include materials with excellent water-blocking properties.

[0103] In some embodiments, the first sidewall protective layer is disposed in the same layer as the first transparent electrode;

[0104] The second sidewall protective layer is disposed in the same layer as the second transparent electrode.

[0105] That is, the first sidewall protective layer can be formed in the same patterning process as the first transparent electrode, and the second sidewall protective layer can be formed in the same patterning process as the second transparent electrode. This achieves the goal of improving water vapor barrier capability and scratch resistance of the film layer while avoiding additional process steps and saving costs.

[0106] In some embodiments, both the first and second transparent electrodes are made of indium tin oxide (ITO). Correspondingly, the sidewall protective layer is made of ITO.

[0107] In some embodiments, such as Figure 9 , Figure 10 , Figure 13 , Figure 14 As shown, the first sidewall protective layer 19 is broken at the bottom of the first groove 11;

[0108] like Figure 11 , Figure 12 , Figure 13 , Figure 14 As shown, the second sidewall protective layer 20 is broken at the bottom of the second groove 14.

[0109] This avoids the sidewall protective layer affecting the signals loaded on the first and second signal lines. In practice, the sidewall protective layer does not need to be loaded with any signals.

[0110] It should be noted that, Figures 9-14 The example provided illustrates this by having a first sidewall protective layer covering the sidewall of a first groove and a second sidewall protective layer covering the sidewall of a second groove. In practice, the first sidewall protective layer can extend to cover the bottom of the first groove, and the second sidewall protective layer can extend to cover the bottom of the second groove, as long as both the first and second sidewall protective layers are disconnected at the bottom of the first and second grooves.

[0111] It should be noted that for the surrounding area where no gate drive circuit and its electrically connected signal lines are provided, the area where the sealant is applied still needs to have a first groove in the organic insulating layer. In some embodiments, such as Figure 1As shown, the orthographic projection of the first groove 11 onto the substrate is annular. For the peripheral area where no gate drive circuit or signal line electrically connected to it is provided, the orthographic projection of the first groove onto the substrate still does not overlap with the orthographic projection of the second conductive layer onto the substrate. That is, for any peripheral area, the first groove avoids the second conductive layer.

[0112] Next, taking an example where the sidewall protective layer includes a first sidewall protective layer and a second sidewall protective layer, the fabrication method of the display substrate provided in this application will be illustrated. The fabrication method of the display substrate includes the following steps:

[0113] S101. A buffer layer is formed on a substrate, and a first conductive layer, a first insulating layer, an active layer, and a second conductive layer are sequentially formed on the side of the buffer layer away from the substrate.

[0114] S102. An organic protective layer and an organic film are sequentially formed on the side of the second conductive layer away from the substrate. Multiple first grooves penetrating the thickness of the organic film and the organic protective layer are formed in the peripheral area using a patterning process.

[0115] S103. A pattern of a first transparent electrode layer is formed on the side of the organic film facing away from the substrate; the first transparent electrode layer includes a first transparent electrode and a first sidewall protective layer.

[0116] S104. An inorganic protective layer is formed on the side of the first transparent electrode layer away from the substrate.

[0117] S105, A pattern of a second transparent electrode layer is formed on the side of the inorganic protective layer away from the substrate; the second transparent electrode layer includes a second transparent electrode and a second sidewall protective layer.

[0118] Based on the same inventive concept, this application embodiment also provides a display panel, including: the display substrate provided in this application embodiment, a counter substrate disposed opposite to the display substrate, and a sealing adhesive located between the display substrate and the counter substrate;

[0119] The sealing adhesive covers the first groove in the orthogonal projection of the substrate.

[0120] In some embodiments, the display panel further includes a liquid crystal layer located between the display substrate and the opposing substrate. That is, the display panel is a liquid crystal display panel. In a specific implementation, the orthographic projection of the sealing adhesive on the display substrate surrounds the orthographic projection of the liquid crystal layer on the display substrate.

[0121] This application provides a display device, including a display panel provided in this application embodiment.

[0122] The display device provided in this application embodiment includes any product or component with display function, such as a mobile phone, tablet computer, television, monitor, laptop computer, digital photo frame, and navigator. Other essential components of this display device are understood by those skilled in the art and will not be described in detail here, nor should they be construed as limiting this application. Implementation of this display device can refer to the above-described embodiment of the display substrate; repeated details will not be elaborated upon.

[0123] In summary, the display substrate, display panel, and display device provided in this application embodiment have a first groove whose orthographic projection on the substrate does not overlap with the second conductive layer's orthographic projection on the substrate. That is, the first groove avoids the second conductive layer, so that the first groove penetrating the organic insulating layer only exposes the first insulating layer and does not expose the second conductive layer. This can avoid damage to the second conductive layer during the etching process to form the first groove, avoid moisture erosion caused by affecting the density of the interface between the second conductive layer and subsequent film layers, and also avoid the subsequent film layer from peeling off due to moisture erosion. In addition, it can avoid short circuits in the second conductive layer caused by film layer peeling off.

[0124] Obviously, those skilled in the art can make various modifications and variations to this application without departing from the spirit and scope of this application. Therefore, if such modifications and variations fall within the scope of the claims of this application and their equivalents, this application also intends to include such modifications and variations.

Claims

1. A display substrate, characterized in that, The display substrate has a display area and a peripheral area surrounding the display area; The display substrate includes: a substrate, and a first conductive layer, a first insulating layer, a second conductive layer, and an organic insulating layer are sequentially disposed on one side of the substrate. In the peripheral area, the display substrate includes a gate driving circuit, and the first conductive layer includes: a plurality of first signal lines located on the side of the gate driving circuit away from the display area, the first signal lines being used to provide signals to the gate driving circuit; In the peripheral region, the organic insulating layer includes a plurality of first grooves extending through its thickness; the orthographic projection of the first grooves on the substrate covers at least a portion of the region between two adjacent first signal lines on the substrate, and the orthographic projection of the first grooves on the substrate does not overlap with the orthographic projection of the second conductive layer on the substrate.

2. The display substrate according to claim 1, characterized in that, In the peripheral area, the second conductive layer includes: a plurality of second signal lines electrically connected to the first signal lines in a one-to-one correspondence; the extension direction of the second signal lines is the same as the extension direction of the first signal lines; The orthographic projection of the first groove on the substrate and the orthographic projection of the second signal line on the substrate do not overlap.

3. The display substrate according to claim 2, characterized in that, The width of the first signal line is equal to the width of the second signal line; The orthographic projection of the first signal line onto the substrate and the orthographic projection of the second signal line onto the substrate have overlapping areas.

4. The display substrate according to claim 2, characterized in that, The width of the first signal line is greater than the width of the second signal line; The orthographic projection of the second signal line onto the substrate falls within the orthographic projection of the first signal line onto the substrate.

5. The display substrate according to claim 4, characterized in that, The orthographic projection of the first signal line onto the substrate overlaps with the orthographic projection of the first groove onto the substrate.

6. The display substrate according to claim 1, characterized in that, In the peripheral region, the second conductive layer includes: a plurality of connecting leads electrically connected between the gate driving circuit and the first signal line; the extending directions of the connecting leads are arranged to intersect the extending direction of the first signal line; The orthographic projection of the first groove onto the substrate and the orthographic projection of the connecting lead onto the substrate do not overlap.

7. The display substrate according to any one of claims 2 to 6, characterized in that, The minimum distance between the edge of the first groove in the orthographic projection of the substrate and the edge of the source / drain electrode layer in the orthographic projection of the substrate is greater than 6 micrometers.

8. The display substrate according to any one of claims 1 to 6, characterized in that, The display substrate further includes: an inorganic protective layer located on the side of the organic insulating layer opposite to the second conductive layer, and a plurality of sidewall protective layers; The inorganic protective layer covers the sidewalls and bottom portion of the first groove to form a second groove; The sidewall protective layer includes: a first sidewall protective layer, and / or, a second sidewall protective layer; The first sidewall protective layer is located between the organic insulating layer and the inorganic protective layer, and covers the sidewall of the first groove; The second sidewall protective layer is located on the side of the inorganic protective layer opposite to the organic insulating layer and covers the sidewall of the second groove.

9. The display substrate according to claim 8, characterized in that, The first sidewall protective layer breaks at the bottom of the first groove; The second sidewall protective layer breaks off at the bottom of the second groove.

10. The display substrate according to claim 9, characterized in that, In the display area, the display substrate further includes a first transparent electrode located between the organic insulating layer and the inorganic protective layer, and a second transparent electrode located on the side of the inorganic protective layer opposite to the organic insulating layer; The first sidewall protective layer is disposed in the same layer as the first transparent electrode; The second sidewall protective layer is disposed in the same layer as the second transparent electrode.

11. The display substrate according to any one of claims 1 to 6, characterized in that, The organic insulating layer includes: an organic protective layer, and an organic film located on the side of the organic protective layer opposite to the second conductive layer; the first groove penetrates the organic film and the organic protective layer.

12. A display panel, characterized in that, include: According to any one of claims 1 to 11, a counter substrate disposed opposite to the display substrate, and a sealing adhesive located between the display substrate and the counter substrate; The sealing adhesive covers the first groove in the orthogonal projection of the substrate.

13. A display device, characterized in that, Includes the display panel according to claim 12.

Citation Information

Patent Citations

  • Display panel and manufacturing method therefor, and display device

    CN113169287A

  • Display device and liquid crystal display device

    WO2019159523A1