A general debugger, debugging system and debugging method of a computing device

Abstract

The application belongs to the technical field of device debugging, and relates to a general debugger of a computing device, a debugging system and a debugging method, wherein the debugging method comprises the following steps: a debugging host computer acquires input information and sends the input information to the general debugger; the general debugger performs debugging verification on the input information to determine debugging information; the general debugger selects a bus interface according to a bus type field of the debugging information; the general debugger performs register read and write on the computing device by using the bus interface, and generates debugging result data; and the general debugger acquires the debugging result data and sends the debugging result data to the debugging host computer. The application can independently debug the computing device by using the general debugger; the debugging function can be used to acquire the running condition of a connected device at an interface end of the debugging device; one set of bus interfaces can be used to simultaneously acquire all information of all on-board devices and all machine modules of the computing device, and the application is not limited by different chip address widths and different positions of the chips on the bus.

Description

Technical Field

[0001] This invention relates to the field of equipment debugging technology, and more specifically, to a universal debugger, debugging system, and debugging method for computing devices. Background Technology

[0002] Currently, all chips use register addressing to receive control signals from the outside world, and at the same time, they put the chip's own status and data into designated registers for external reading.

[0003] The current chip exhibits the following characteristics:

[0004] (1) Different data read and write interfaces provided by the chip: Due to the above situation, it is difficult to find a remote debugger that can also be used locally, especially a BMC (server baseboard management controller) with debugging function, which can read sensor information such as temperature and voltage, and can also test, maintain and flash firmware of chips such as CPU.

[0005] (2) Different chip address widths: The chip address may be 8 bits, 16 bits, 32 bits, 64 bits, and even some chips have irregular address widths, such as the CPU's maintenance address width of 48 bits;

[0006] (3) Different chip operation register methods: Different chips operate registers in different ways. Some chips can obtain the required information or data by directly reading a certain register, while some chips may require writing and reading multiple registers in a certain step to obtain the result or data.

[0007] For the reasons mentioned above, it is currently difficult to find a debugger on the market that can be used both remotely and locally, especially a BMC (Server Baseboard Management Controller) with debugging capabilities that can read sensor information such as temperature and voltage, and can also test, maintain, and flash firmware on chips such as CPUs. Summary of the Invention

[0008] To address the aforementioned technical problems, this invention provides a universal debugger and debugging method for computing devices.

[0009] In a first aspect, the present invention provides a universal debugger for computing devices, comprising:

[0010] The information transceiver server is used to input information transmission and reception and to send back debugging result data to the debugging host computer.

[0011] The debugging information distribution layer is used to verify the input information, determine the debugging information, determine the bus type based on the debugging information, and distribute the debugging information to the bus debugging module through the bus interface of the bus type.

[0012] Several bus debugging modules are used to debug the device under debugging based on the debugging information and obtain the debugging result data.

[0013] In a second aspect, the present invention provides a debugging system for a universal debugger of a computing device, comprising:

[0014] A universal debugger for computing devices as described in claim 1;

[0015] The host computer is configured to communicate with the universal debugger, generate debugging information and send it to the universal debugger, and receive and display the debugging result data fed back by the universal debugger.

[0016] The computing device, as the device being debugged, is connected to the general-purpose debugger via a hardware interface, and the general-purpose debugger uses the debugging information to debug the computing device.

[0017] Thirdly, the present invention provides a debugging method for a universal debugger for computing devices, comprising the following steps:

[0018] The host computer is debugged to acquire input information and send the input information to a general-purpose debugger of the computing device.

[0019] The general-purpose debugger receives the input information, performs debugging verification on the input information, and determines the debugging information;

[0020] The general debugger selects the bus interface based on the bus type field of the debugging information;

[0021] The bus interface is used to read and write registers of the computing device and generate debugging result data.

[0022] The general-purpose debugger acquires the debugging result data and sends it to the debugging host computer.

[0023] The beneficial effects of this invention are:

[0024] 1. Enables remote network debugging, local debugging of the debugging device, and self-debugging of the device being debugged;

[0025] 2. Simplified debugging commands, enabling independent debugging of computing devices using a general-purpose debugger;

[0026] 3. It has debugging capabilities and can also obtain the operating status of the interface connected to the device being debugged. It can read sensor information such as temperature and voltage, and can also test, maintain and flash firmware on chips such as CPU.

[0027] 4. A single bus interface can be used to simultaneously obtain all information about all devices on the computing device board and all modules of the whole machine, without being limited by different chip address widths or different chip positions on the bus.

[0028] Based on the above technical solution, the present invention can be further improved as follows.

[0029] Furthermore, verifying the input information to determine the debugging information and determining the bus type based on the debugging information includes: verifying the input information according to the header to determine that the input information is the debugging information; reading the target field from the debugging information to determine the bus type.

[0030] Furthermore, the debugging information includes a header, address information, flag information, bus type, custom field content, data length information, and data area; the header is used for debugging information verification; the address information is used to store chip address information; the flag information is used to determine whether to perform a read or write operation on the device under debugging; the bus type is used to determine the bus interface type; the data length is used to indicate the length of data read from a specified address when performing a read operation on the device under debugging, and to indicate the length of the data area in bytes at a set position and the number of bytes written from the specified address when performing a read operation on the device under debugging.

[0031] Furthermore, the bus types include IIC bus type, SPI bus type and Jtag bus type.

[0032] Furthermore, the computing device is an embedded device that includes an FPGA, a DSP, and a CPU; the general-purpose debugger is used to scan, read, and write the GPIO registers of the embedded device.

[0033] Furthermore, the hardware interface includes a Jtag hardware interface, an IIC hardware interface, and an SPI hardware interface; the various devices within the computing device are connected in a daisy-chain manner to the Jtag bus interface.

[0034] Furthermore, the universal debugger is either built into the baseboard management controller of the computing device or set up independently of the computing device. Attached Figure Description

[0035] Figure 1 This is a schematic diagram of a universal debugger for a computing device provided in Embodiment 1 of the present invention;

[0036] Figure 2 This is a schematic diagram of a general debugging system for a computing device provided in Embodiment 2 of the present invention;

[0037] Figure 3This invention provides a debugging method for a universal debugger for computing devices, as described in Embodiment 3 of the present invention. Detailed Implementation

[0038] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. The components of the embodiments of the present invention described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0039] Example 1

[0040] As an example, see the attached document. Figure 1 As shown, to solve the above-mentioned technical problems, this embodiment provides a universal debugger for computing devices, including:

[0041] The information transceiver server is used to input information transmission and reception and to send back debugging result data to the debugging host computer.

[0042] The debugging information distribution layer is used to verify the input information, determine the debugging information, determine the bus type based on the debugging information, and distribute the debugging information to the bus debugging module through the bus interface of the bus type.

[0043] Several bus debugging modules are used to debug the device under debugging based on the debugging information and obtain debugging result data.

[0044] Optionally, verifying the input information to determine the debugging information and determining the bus type based on the debugging information includes: verifying the input information according to the header to determine that the input information is debugging information; reading the target field from the debugging information to determine the bus type.

[0045] Optionally, the bus type includes IIC bus type, SP I bus type and Jtag bus type.

[0046] Several bus debugging modules are attached. Figure 1 The bus debugging module 1, bus debugging module 2, ..., bus debugging module n are shown.

[0047] Optionally, the debugging information includes a header, address information, flag information, bus type, custom field content, data length information, and data area; the header is used for debugging information verification; the address information is used to store chip address information; the flag information is used to determine whether to perform a read or write operation on the device under debugging; the bus type is used to determine the bus interface type; the data length is used to indicate the length of data read from a specified address when performing a read operation on the device under debugging, and to indicate the length of the data area in bytes at a set position and the number of bytes written from the specified address when performing a read operation on the device under debugging.

[0048] In practical applications, the general-purpose debugger's information transceiver server receives debugging information from the host computer, verifies the input information to confirm the debugging information, and determines the bus type based on the debugging information. After reading and writing the register data of the computing device, the general-purpose debugger returns debugging result data to the host computer. The debugging result data adds characters to the debugging information to indicate whether the debugging was successful or failed, such as 1 for successful debugging and 0 for failed debugging.

[0049] Optionally, by customizing commands on the information transceiver server, standard and universal ipmitool or snmp client software or commands can be used for debugging, eliminating the need to develop client debugging tools.

[0050] Traditional general-purpose debugging software tools (such as ipmitool), while capable of command customization, result in numerous and complex commands requiring customization due to the aforementioned reasons. In practical applications, the debugging host computer sends debugging information from the first node of the computing device and receives result data from the second node. The information transceiver server receives the debugging information from the first node, processes it, and returns the result data from the second node, enabling simultaneous debugging of multiple devices on the computing device.

[0051] The host computer for debugging is a laptop, PC, or other similar device. It connects and communicates with the general-purpose debugger via wireless (such as Ethernet or Bluetooth) or wired (such as serial port or IIC interface). It sends debugging commands to the general-purpose debugger by installing client tools or local software, and receives debugging result data, as well as analyzes and displays the debugging result data.

[0052] Example 2

[0053] Based on a universal debugger for a computing device shown in Embodiment 1 of the present invention, as illustrated in the appendix Figure 2 As shown, an embodiment of the present invention also provides a debugging system for a universal debugger for computing devices, comprising:

[0054] Such as a general-purpose debugger for a computing device in Example 1;

[0055] The host computer is debugged and communicates with the general-purpose debugger to generate debugging information and send it to the general-purpose debugger, as well as to receive and display the debugging results data fed back by the general-purpose debugger.

[0056] The computing device, as the device being debugged, is connected to a general-purpose debugger via a hardware interface. The general-purpose debugger uses the debugging information to debug the computing device.

[0057] In practical applications, debuggers can be built into computing devices, such as BMCs (Baseboard Management Controllers) integrated into computing devices like servers, which have monitoring and debugging functions, or they can be independent of computing devices.

[0058] The computing device being debugged can be a server, PC, laptop, or other embedded device. A general-purpose debugger connects to components on the computing device through various hardware interfaces.

[0059] Optionally, the hardware interfaces include a JTAG bus interface, a JTAG hardware interface, an IIC hardware interface, and an SPI hardware interface; the various devices within the computing device are daisy-chained together on the JTAG bus interface; the IIC hardware interface connects to sensors and EEPROM memory; and the SPI hardware interface connects to Flash memory.

[0060] Traditional debuggers, when operating, are constrained by the different chip positions on the bus: for example, devices on the JTAG bus are linked in a daisy chain. This means that reading and writing chip registers is not only limited by the chip and the JTAG protocol, but also by the chip's position within the JTAG bus. The JTAG (Joint Test Action Group) interface is the most commonly used interface between debuggers and computing devices. Within computing devices, multiple devices such as FPGAs, DSPs, and CPUs are linked together in a daisy chain to allow the debugger to test or debug them. Through the JTAG interface, this general-purpose debugger can program the firmware of FPGAs, DSPs, and CPUs, test and scan the GPIO registers of the firmware, and read and write registers of various modules within the FPGA, DSP, and CPU (such as Core0, Core1...Coren within the CPU, IIC controller, LPC controller, memory controller, interrupt controller, PCIE controller, various controller registers, PCIE external device registers, etc.) and memory data.

[0061] When a general-purpose debugger's local or address space-mapped register type is directly connected to a computing device, no bus interface is required; the general-purpose debugger can directly read and write to the specified address of the computing device. Based on the slave address and IIC bus number of the computing device, the general-purpose debugger reads and writes the registers of the external device via the IIC bus. Based on the chip select number of the computing device, it reads or writes the registers of the external device via the SPI bus. Since multiple debugged devices are daisy-chained on the JTAG bus, when the debugged chip (such as CPU, FPGA, DSP, etc.) is connected to the general-purpose debugger through the JTAG hardware interface, it is necessary to obtain the total number of chips in the daisy chain, the position number of the debugged chip in the JTAG daisy chain, and the width of the data register.

[0062] Example 3

[0063] Based on the same principle as the method shown in Embodiment 1 of the present invention, an embodiment of the present invention also provides a debugging method for a universal debugger for a computing device, comprising the following steps:

[0064] A universal debugger for a computing device is used to debug the host computer to acquire and send input information.

[0065] The general-purpose debugger receives input information, performs debugging verification on the input information, and determines the debugging information.

[0066] The general-purpose debugger selects the bus interface based on the bus type field of the debug information;

[0067] The bus interface is used to read and write registers of the computing device and generate debugging result data.

[0068] The general-purpose debugger acquires the debugging result data and sends it to the debugging host computer.

[0069] Optionally, the computing device is an embedded device containing an FPGA, DSP, and CPU; a general-purpose debugger is used to scan, read, and write the GPIO registers of the embedded device.

[0070] In practical applications, as shown in the appendix Figure 3 As shown, the user fills in debugging information through the debugging host computer; the debugging host computer sends the debugging information to the general-purpose debugger; the general-purpose debugger receives the debugging information and verifies it. If the verification is successful, it selects the bus type according to the bus type field in the debugging information; if the verification fails, it discards the debugging information; the general-purpose debugger selects the bus interface according to the bus type to perform read or write operations on the registers of the computing device; after the read or write operation is completed, it fills in the success or error code, as well as the data area and data length in the debugging information, as the debugging result data and sends it to the debugging host computer; the debugging host computer receives the debugging result data and analyzes and displays it.

[0071] The above are merely preferred embodiments of the present invention and are not intended to limit the present invention. Various modifications and variations can be made to the present invention by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A universal debugger for computing devices, characterized in that, include: The information transceiver server is used to input information transmission and reception and to send back debugging result data to the debugging host computer. The debugging information distribution layer is used to verify the input information according to the header, determine that the input information is debugging information, read the target field from the debugging information, determine the bus type, and distribute the debugging information to the bus debugging module through the bus interface of the bus type; Several bus debugging modules are used to debug the device under debugging based on the debugging information and obtain the debugging result data.

2. The universal debugger for computing devices according to claim 1, characterized in that, The debugging information includes a header, address information, flag information, bus type, custom field content, data length information, and data area; the header is used for debugging information verification; the address information is used to store chip address information. The flag information is used to determine whether to perform a read or write operation on the device under test; the bus type is used to determine the bus interface type; the data length is used to indicate the length of data read from a specified address when performing a read operation on the device under test, and to indicate the length of the data area bytes at a set position and the number of bytes written from the specified address when performing a read operation on the device under test.

3. The universal debugger for computing devices according to claim 1, characterized in that, The bus types include IIC bus type, SPI bus type and Jtag bus type.

4. A debugging system based on the universal debugger for a computing device as described in claim 1, characterized in that, include: A universal debugger for computing devices as described in claim 1; The host computer is configured to communicate with the universal debugger, generate debugging information and send it to the universal debugger, and receive and display the debugging result data fed back by the universal debugger. The computing device, as the device being debugged, is connected to the general-purpose debugger via a hardware interface, and the general-purpose debugger uses the debugging information to debug the computing device.

5. The debugging system for a universal debugger for computing devices according to claim 4, characterized in that, The computing device is an embedded device that includes an FPGA, DSP, and CPU; the general-purpose debugger is used to scan, read, and write the GPIO registers of the embedded device.

6. The debugging system for a universal debugger for computing devices according to claim 4, characterized in that, The hardware interfaces include a Jtag hardware interface, an IIC hardware interface, and an SPI hardware interface; the various devices within the computing device are connected in a daisy chain on the Jtag bus interface.

7. The debugging system for a universal debugger for computing devices according to claim 4, characterized in that, The universal debugger is either built into the baseboard management controller of the computing device or set up independently of the computing device.

8. A debugging method based on the universal debugger for a computing device as described in claim 1, characterized in that, Including the following steps: The host computer is debugged to acquire input information and send the input information to a universal debugger for a computing device as described in claim 1. The general-purpose debugger receives the input information, performs debugging verification on the input information, and determines the debugging information; The general debugger selects the bus interface based on the bus type field of the debugging information; The bus interface is used to read and write registers of the computing device and generate debugging result data. The general-purpose debugger acquires the debugging result data and sends it to the debugging host computer.

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