Digitally adjustable low-power voltage-controlled oscillator and its application

Abstract

The present invention discloses a digitally adjustable low-power voltage-controlled oscillator and its application. The present invention receives a digital control signal transmitted by a host computer, and one path passes through a rectifier circuit to a low-voltage difference linear voltage regulator circuit, converting the AC signal with amplitude fluctuations into a stable power supply voltage to power a digital signal processing circuit, a current-steering digital-to-analog converter circuit, and a voltage-controlled oscillator circuit; the other path passes through a digital signal processing circuit, which demodulates, decodes, and serializes the digital control signal to obtain parallel data and a clock, which are input to a current-steering digital-to-analog converter circuit. The current-steering digital-to-analog converter circuit outputs a control voltage to a voltage-controlled oscillator, and finally the voltage-controlled oscillator outputs a carrier signal with a stable frequency. The present invention can achieve digital adjustment of the carrier signal frequency by the host computer, meet the requirements of switching the carrier signal frequency when the neural signal acquisition signal system communicates in different frequency bands, and realize wireless power supply at the same time, reducing the weight of the neural signal acquisition signal system.

Description

Technical Field

[0001] The present invention relates to the technical field of analog integrated circuits, and in particular to a digitally adjustable low-power voltage-controlled oscillator and its application. Background Art

[0002] Brain-computer interfaces (BCIs) are used to establish communication between the biological brain and external devices. By collecting neural signals or regulating neural behavior, they are of great significance in neuroscience research and disease diagnosis and treatment. Low power consumption is a key characteristic of neural signal acquisition systems for small animals. Furthermore, wireless transmission and reception of neural signals is a major requirement for neural signal acquisition systems to eliminate the impact of wired acquisition on animal activity. Voltage-controlled oscillators (VCOs), as key components in wireless communication systems, are widely used. In wireless transceiver circuits, they primarily serve as local oscillator signal generators, providing a stable carrier signal for the transceiver. Therefore, research on low-power VCOs is crucial for wireless transmission and reception in animal neural signal acquisition systems. Summary of the Invention

[0003] The purpose of the present invention is to solve the needs of low power consumption and wireless transmission and reception of neural signals in a neural signal acquisition system. On this basis, in order to reduce the weight of the system, a wireless power supply function is added to eliminate the external power supply (such as a battery). At the same time, in response to the switching requirements of the communication frequency band of the neural signal acquisition system, a digitally adjustable function is added to realize direct control of the carrier frequency by the host computer. A digitally adjustable low-power voltage-controlled oscillator and its application are proposed.

[0004] The present invention includes a digital signal processing circuit, an AC to DC rectifier circuit, a low voltage drop linear regulator circuit, a current steering digital-to-analog converter circuit and a voltage-controlled oscillator circuit;

[0005] The external host computer sends a digital control signal, which is received by the voltage-controlled oscillator's antenna, coupled through a large capacitor, and input into the subsequent two paths, where:

[0006] One way is through the AC to DC rectifier circuit to the low voltage difference linear voltage regulator circuit, which converts the amplitude fluctuating AC signal received from the antenna into a stable power supply voltage VDD, thereby powering the digital signal processing circuit, the current steering digital-to-analog converter circuit and the voltage controlled oscillator circuit, realizing the wireless power supply function;

[0007] The other input is a digital signal processing circuit that demodulates, decodes, and serializes the digital control signal into parallel form, ultimately generating a parallel digital control signal that is input into a current-steering digital-to-analog converter circuit. The current-steering digital-to-analog converter converts the parallel digital control signal into an analog control voltage, Vcontrol, which is input into a voltage-controlled oscillator. The voltage-controlled oscillator receives different analog control voltages, Vcontrl, and outputs carrier signals with different frequencies.

[0008] The digitally adjustable low-power voltage-controlled oscillator receives different digital control signals transmitted by a host computer and outputs carrier signals with different frequencies, thereby enabling the host computer to digitally adjust the carrier signal frequency, meeting the requirements of carrier signal frequency switching when communicating in different frequency bands, and realizing multi-band communication functions.

[0009] The present invention also provides the application of the digitally adjustable low-power voltage-controlled oscillator in an animal nerve signal acquisition system.

[0010] Compared with the prior art, this application has the following beneficial effects:

[0011] 1. The VCO uses a three-stage inverter ring structure with the lowest oscillator power consumption. An external current-starved structure is added to limit the current flowing into the ring inverter chain. When outputting a frequency of 1 GHz to 3.2 GHz, the overall power consumption is 4.56-18.72uW, with the characteristics of ultra-low power consumption, wide tuning range and high oscillation gain.

[0012] 2. The digitally adjustable low-power voltage-controlled oscillator adopts the circuit combination of DSPC+DAC+VCO to realize the digital adjustable function of the output carrier frequency by the host computer, meeting the needs of carrier signal frequency switching when communicating in different frequency bands of the neural signal acquisition system.

[0013] 3. A digitally adjustable low-power voltage-controlled oscillator uses a circuit combination of Rectifier + LDO to achieve wireless power supply function for the entire circuit, replacing the external power supply (such as battery) of the neural signal acquisition system and reducing the weight of the system. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 It is a structural block diagram of a digitally adjustable low-power voltage-controlled oscillator;

[0015] Figure 2 It is the structural block diagram of the signal processing circuit;

[0016] Figure 3 This is the block diagram of the 6-bit current steering DAC structure;

[0017] Figure 4 Schematic diagram of bias circuit, switch circuit and current source array circuit

[0018] Figure 5 Schematic diagram of the VCO circuit; DETAILED DESCRIPTION

[0019] To make the objectives, technical solutions, and advantages of the present invention more clearly apparent, the present invention is further explained below with reference to the accompanying drawings. It must be noted that the embodiments described below are only some of the embodiments of the present invention, not all of them. The embodiments of the present invention and all other embodiments obtained by persons of ordinary skill in the art without creative effort are within the scope of protection of the present invention.

[0020] The present invention includes a digital signal processing circuit (denoted as DSPC), an AC to DC rectifier circuit (denoted as Rectifier), a low-dropout linear regulator circuit (denoted as LDO), a 6-bit current-steering digital-to-analog converter circuit (denoted as DAC) and a voltage-controlled oscillator circuit (denoted as VCO).

[0021] DSPC includes amplitude-shift keying demodulation circuit (ASKDC), Manchester decoding circuit (Decoder) and serial-to-parallel conversion circuit (STPC), outputs clock signal (CLK) and parallel data (Data), and realizes signal demodulation, decoding and serial-to-parallel conversion functions.

[0022] The Rectifier receives an AC signal with varying amplitude (denoted as vac) and outputs a DC signal with varying amplitude (denoted as vdc), thus realizing the AC-DC conversion function of the signal.

[0023] The LDO includes a bandgap reference circuit (denoted as bandgap), an error amplifier (denoted as EA), and a power tube. The LDO receives a vdc signal and outputs a stable voltage signal (denoted as vdd), providing power supply voltage for other circuits to achieve wireless power supply. The 6-bit current steering DAC includes both analog and digital circuits. The analog module includes: a voltage-to-current bias circuit (denoted as Bias), a switching circuit (denoted as Switch), and a common-source and common-gate current source (denoted as CS). The digital module includes a thermometer decoding circuit (denoted as TDC) and a latch circuit (denoted as latch). The DAC circuit receives clk and data and outputs an analog control voltage (denoted as Vcontrol), realizing the function of converting digital signals into analog voltages.

[0024] The VCO receives the Vcontrl voltage and outputs a carrier signal (denoted as carrier) with a stable frequency, thereby enabling the host computer to directly control the carrier frequency.

[0025] The working principle of the present invention is as follows: the host computer transmits a Manchester-encoded digital control signal through an antenna, the antenna receives the digital control signal, and then obtains a vac signal through a large capacitor coupling control signal, which is simultaneously input into a DSPC and a Rectifier; the ASKDC in the DSPC performs amplitude demodulation on vac, down-converts the signal, and then inputs it into a decoder for decoding to obtain clk and serial data, which is input into an STPC to obtain data; at the same time, the Rectifier converts vac from AC to DC and outputs a DC signal vdc with varying amplitude; the LDO receives the amplitude varying vdc and outputs a stable voltage signal vdd, which is the power supply voltage of the DSPC, DAC and VCO circuits, and the bandgap outputs two reference voltages (denoted as vref1 and vref2), vref1 serving as the reference voltage of the EA and vref2 as the reference voltage of the bias.

[0026] The DAC receives clk and data. The high four bits of the 6-bit data are converted into a 15-bit thermometer code by the TDC circuit through thermometer row and column decoding. The clk controls the latch to latch the 15-bit thermometer code and the low two bits of the data, ensuring that they are input to the switch at the same time to control the on and off of the switch. The Bias receives vref2 as the reference voltage and outputs two bias voltages to bias the CS, causing the CS to generate current. The CS consists of 18 common-source and common-gate current sources, each connected to a switch. When the switch is turned on, the current source outputs current, and finally the output current is converted into an analog control voltage Vcontrol by a resistor; the VCO receives Vcontrol and outputs a carrier signal with a stable frequency.

[0027] The present invention is based on the TSMC 65nm standard process and has the advantages of low power consumption and full integration. It enables the host computer to digitally adjust the carrier signal frequency, meeting the needs of carrier signal frequency switching when the neural signal acquisition system communicates in different frequency bands. At the same time, it realizes the wireless power supply function to replace the external power supply, reducing the weight of the neural signal acquisition system. Specific embodiment:

[0029] The digitally adjustable low-power voltage-controlled oscillator (VCO) in this embodiment includes a digital signal processing circuit, an AC-to-DC rectifier circuit, a low-voltage dropout linear regulator circuit, a 6-bit current-steering digital-to-analog converter circuit, and a voltage-controlled oscillator circuit. A host computer transmits a Manchester-encoded digital control signal via an antenna. After the system antenna receives it, the control signal is coupled via a large capacitor. One path passes through the AC-to-DC rectifier circuit and connects to the low-voltage dropout linear regulator circuit. The low-voltage dropout linear regulator circuit converts the amplitude-fluctuating AC signal received from the antenna into a stable power supply voltage (VDD), thereby powering the digital signal processing circuit, the 6-bit current-steering digital-to-analog converter circuit, and the VCO circuit, achieving wireless power supply functionality. Simultaneously, another path feeds the digital signal processing circuit, which demodulates, decodes, and serial-to-parallel converts the digital control signal to generate data and clock signals, which are then fed into the 6-bit current-steering digital-to-analog converter circuit. The 6-bit current-steering digital-to-analog converter circuit converts the parallel digital signal into an analog control voltage (Vcontrol), which is then fed into the VCO. The VCO receives different Vcontrl values ​​and outputs carrier signals with varying frequencies. The digitally adjustable low-power voltage-controlled oscillator circuit receives different digital control signals transmitted by the host computer and outputs carrier signals with different frequencies, thereby enabling the host computer to digitally adjust the carrier signal frequency, meeting the needs of carrier signal frequency switching when communicating in different frequency bands, and realizing multi-band communication functions.

[0030] like Figure 2 As shown, in some embodiments, the AC-to-DC rectifier circuit utilizes a two-stage, cross-gate-coupled bridge structure. The circuit converts the amplitude-fluctuating AC signal (vac) received from the antenna into a value-fluctuating DC signal (vdc). The low-dropout linear voltage regulator circuit utilizes a fully integrated, capacitor-free structure, consisting of a low-voltage bandgap reference circuit, an error amplifier, and a power transistor. The addition of a source-follower buffer and a dynamic bias transistor enhances circuit stability. The low-voltage bandgap reference circuit outputs two reference voltages: vref1, which is input to a single-stage differential cascode error amplifier, and vref2, which provides a reference voltage for the voltage-to-current bias circuit of the 6-bit current-steering digital-to-analog converter circuit.

[0031] The digital signal processing circuit demodulates, decodes, and serial-to-parallel converts the host computer control signal coupled from the antenna to obtain a parallel digital signal and clock. It includes an ASK demodulation circuit, a Manchester decoding circuit, and a serial-to-parallel converting circuit. The host computer transmits the Manchester-encoded digital control signal through the antenna. The ASK demodulation circuit demodulates the AC signal received by the antenna, down-converts the signal, and decodes it through the Manchester decoding circuit to obtain serial data and clock. Finally, the serial data passes through the serial-to-parallel converting circuit to obtain a parallel digital control signal.

[0032] like Figure 3As shown, in some embodiments, a 6-bit current-steering digital-to-analog converter employs a "4+2" thermometer code and binary code segmented structure to convert input digital control signals into analog control voltages. The converter comprises both analog and digital circuits. The analog module includes a voltage-to-current bias circuit, a switch circuit, and a cascode current source array. The digital module includes a thermometer decoding circuit and a latch circuit. The thermometer decoding circuit employs a two-stage row-column decoding method, converting the 4-bit high-order binary code into a 15-bit thermometer code. This code is then latched together with the two low-order binary codes in a latch. Each bit of the signal code is connected to a latch and input as a control signal to the differential switch circuit. The basic decoding unit of the two-stage thermometer code row-column decoder consists of a NOT gate and two NAND gates. The output of the NOT gate and the output of the NAND gate serve as the two inputs of the other NAND gate. The latch ensures that the input digital signals are output simultaneously and that the output differential signals maintain a high cross-point, ensuring that the differential switch array does not shut down simultaneously during operation, thereby improving dynamic performance.

[0033] like Figure 4 As shown, in some embodiments, the voltage-to-current bias circuit structure is as follows: a two-stage op amp outputs an NMOS, the source terminal of the NMOS is connected to a resistor, and the resistor and the op amp form a negative feedback structure. The resistor and the op amp then form a negative feedback structure, which is then input into a low-voltage cascode current mirror through a current mirror structure to generate two bias voltages. The reference voltage vref2 input to the voltage-to-current bias circuit is provided by a bandgap reference circuit in a low-dropout linear voltage regulator circuit. The current source array uses a cascode structure to improve output impedance. Due to the use of 65nm process devices, transistors have gate leakage, so two two-stage op amp current sources with negative feedback structures are added to clamp the bias voltage. The output current of the current source array finally passes through an output resistor to output a control voltage.

[0034] like Figure 5 As shown, in some embodiments, the voltage-controlled oscillator circuit adopts a current-starved ring oscillator structure based on an inverter, which receives an analog control voltage and converts it into a frequency-stable carrier signal. The oscillation loop adopts a three-stage inverter chain with the lowest power consumption. The control voltage is input to MN1. There is a pmos current mirror composed of MP1 and MP2 and an nmos current mirror composed of MN2 and MN3 above and below MN1, forming a current-starved structure. Changes in the control voltage cause changes in the branch current of the current-starved structure, thereby changing the current flowing into the inverter chain and ultimately changing the frequency of the output carrier signal. At the same time, the current-starved structure limits the current flowing into the inverter chain, further reducing power consumption.

Claims

1. Digitally adjustable low power voltage controlled oscillator, characterized by: Including digital signal processing circuit, AC to DC rectifier circuit, low voltage drop linear regulator circuit, current steering digital-to-analog converter circuit and voltage controlled oscillator circuit; The external host computer sends a digital control signal, which is received by the voltage-controlled oscillator's antenna, coupled through a large capacitor, and input into the subsequent two paths, where: One way is through the AC to DC rectifier circuit to the low voltage difference linear voltage regulator circuit, which converts the amplitude fluctuating AC signal received from the antenna into a stable power supply voltage VDD, thereby powering the digital signal processing circuit, the current steering digital-to-analog converter circuit and the voltage controlled oscillator circuit, realizing the wireless power supply function; The other input is a digital signal processing circuit, which demodulates, decodes, and serializes the digital control signal to parallel, and finally obtains a parallel digital control signal, which is input to a current-steering digital-to-analog converter circuit; the current-steering digital-to-analog converter circuit converts the parallel digital control signal into an analog control voltage Vcontrol, which is input to a voltage-controlled oscillator; the voltage-controlled oscillator receives different analog control voltages Vcontrl and outputs carrier signals with different frequencies; The digitally adjustable low-power voltage-controlled oscillator receives different digital control signals transmitted by a host computer and outputs carrier signals with different frequencies, thereby enabling the host computer to digitally adjust the carrier signal frequency, meeting the requirements of carrier signal frequency switching when communicating in different frequency bands, and realizing multi-band communication functions.

2. The digitally adjustable low-power voltage-controlled oscillator according to claim 1, wherein: The digital signal processing circuit includes an amplitude keying demodulation circuit, a Manchester decoding circuit and a serial-to-parallel circuit. The amplitude keying demodulation circuit performs amplitude demodulation on the digital control signal, down-converts the digital control signal, and then inputs it into the Manchester decoding circuit for decoding to obtain a clock clk and serial data. The serial data is input into the serial-to-parallel circuit to obtain a parallel digital control signal.

3. The digitally adjustable low-power voltage-controlled oscillator according to claim 1, wherein: The current steering digital-to-analog converter circuit is a 6-bit current steering digital-to-analog converter circuit, which includes two modules: analog and digital. The analog module includes: a voltage-to-current bias circuit, a switch circuit and a common-source common-gate current source; the digital module includes a thermometer decoding circuit and a latch circuit. The high four-bit binary code of the parallel digital control signal is converted into a 15-bit thermometer code by the thermometer decoding circuit through thermometer row and column decoding. The clock control latch circuit latches the 15-bit thermometer code and the low two-bit binary code of the parallel digital control signal to ensure that they are input into the switching circuit at the same time to control the on and off of the switching circuit. The voltage-to-current bias circuit receives vref2 from the AC-to-DC rectifier circuit as a reference voltage and outputs two bias voltages for biasing the common-source and common-gate current sources.

4. The digitally adjustable low-power voltage-controlled oscillator according to claim 1, wherein: The low voltage difference linear regulator circuit includes a bandgap reference circuit, an error amplifier and a power tube.

5. The digitally adjustable low-power voltage-controlled oscillator according to claim 1, wherein: The voltage-controlled oscillator circuit adopts a current-starved ring oscillator structure based on an inverter.

6. Use of the digitally adjustable low-power voltage-controlled oscillator according to any one of claims 1 to 5 in an animal neural signal acquisition system.

Images