A readout circuit for a large array of superconducting single-photon detectors
By combining TAC and NTRON's readout circuits, the problem of large-array superconducting single-photon detectors reading response spatial position and time intervals at ultra-low temperatures is solved, achieving ps-level accuracy and resolution, saving coaxial line and space, and reducing power consumption.
Patent Information
- Application Number
- CN202310174352.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-02-28
- Publication Date
- 2025-08-22
- Estimated Expiration
- 2043-02-28
AI Technical Summary
When large array superconducting single-photon detectors read out the response spatial position and time interval at ultra-low temperatures, there are problems such as limited number of coaxial lines, high power consumption and low resolution.
The reading circuit based on TAC and NTRON is adopted, including the NTRON interconnected reading module, the NTRON output signal processing module, the TAC reading module and the quantization time amplitude module. Through the NTRON output signal processing and time amplitude conversion, it combines with a high-resolution ADC for accurate measurement.
The ps-level time interval and spatial position readout accuracy are achieved, saving the number of coaxial lines at low temperatures, reducing power consumption, and reducing space and cost.
Smart Images
Figure CN116067491B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of superconducting single-photon detection, in particular to a readout circuit of a large array superconducting single-photon detector. Background Art
[0002] Single-photon detectors are a key technology in the field of quantum information and a fundamental means for manipulating, processing, and studying single quantum states. A superconducting nanowire single-photon detector (SPD) is a highly sensitive detector that uses superconducting nanowires for photon detection. The detector's photosensitive portion is a thin-film nanowire structure. During operation, the current in the nanowire is biased slightly below the critical current. When the nanowire absorbs a photon, the superconducting state in the absorption region is briefly destroyed before automatically recovering to its original state. This is manifested in a circuit as an electrical pulse that rises rapidly and then decays exponentially. By amplifying this pulse signal, single photons can be identified.
[0003] Current array SNSPDs include 2×2 4-pixel devices, 4×4 16-pixel devices, 32×32 1024-pixel devices, and so on. As the number of pixels in the detector increases, signal readout becomes a problem. Large array devices require simultaneous readout of the response spatial position and time interval. Due to limited space at ultra-low temperatures, the number of coaxial lines that can be drawn out is limited, and power consumption is restricted, placing high demands on the readout method. The traditional direct readout circuit has a simple structure, but as the number of SNSPD pixels increases, the circuit becomes larger and the power consumption is higher, making it unsuitable for large array devices. Existing row and column readout circuits have been used for readout of large array SNSPDs, but they suffer from the problem of requiring too many coaxial lines at ultra-low temperatures and low resolution.
[0004] The multi-gate superconducting nanowire cryostat (NTRON) is an ultra-low power, ultra-compact superconducting binary encoder that uses combinational logic. The propagation timing jitter, defined as the standard deviation of the propagation delay between output and input, is 75 ps on average, and the total power consumption is less than 1 uW.
[0005] The basic principle of a time-amplitude converter (TAC) is to convert the time interval between two signals into an output signal with an amplitude proportional to the interval. This allows the imprecisely measured time quantity to be converted into a more precisely measurable voltage quantity. A time-amplitude converter (TAC) is a commonly used front-end electronic circuit for time interval measurement, with picosecond-level resolution and accuracy. Summary of the Invention
[0006] The technical problem to be solved by the present invention is to provide a readout circuit for a large array superconducting single photon detector, which is based on the large array SNSPD readout method of TAC and NTRON and can read out the time interval and spatial position of the response.
[0007] To solve the above technical problems, the present invention provides a readout circuit for a large array superconducting single-photon detector, comprising: an NTRON interconnected readout module, an NTRON output signal processing module, a TAC readout module, and a quantized time amplitude module; the large array SNSPD is connected to the NTRON interconnected readout module, the NTRON output signal processing module processes the NTRON output signal and inputs it to the TAC readout module; the TAC readout module performs time amplitude conversion on the signal output by the NTRON output signal processing module to measure the time interval; and the quantized time amplitude module quantizes the time interval measured by the TAC readout module to obtain an accurate time interval.
[0008] Preferably, the NTRON interconnect readout module includes: a low-temperature Bias-Tee circuit, an NTRON interface circuit, and an NTRON; the AC port RF of the low-temperature Bias-Tee is connected to the NTRON through the NTRON interface circuit, the DC port DC of the low-temperature Bias-Tee is connected to the DC bias, and the RF & DC port is connected to the SNSPD output port. The low-temperature Bias-Tee circuit is used to ensure that the external DC bias can be fully applied to the SNSPD to ensure normal operation. The DC bias is input through the DC port of the low-temperature Bias-Tee and input to the SNSPD through the RF & DC ports of the low-temperature Bias-Tee; at the same time, it ensures that the output AC signal of the SNSPD can be fully input to the input port of the NTRON to trigger the NTRON. The output signal of the SNSPD is input through the RF & DC ports of the low-temperature Bias-Tee, input to the NTRON interface circuit through the RF port of the low-temperature Bias-Tee, and then input to the NTRON through the NTRON interface circuit.
[0009] Preferably, the NTRON output signal processing module includes a high-speed comparator and a T-flip-flop. The high-speed comparator is connected to the NTRON output signal processing module, and its output is connected to the T-flip-flop. The T-flip-flop maintains a high-level output during the time interval to be measured. Because the output signal appears as an electrical pulse that rises rapidly and then decays exponentially in the circuit, its processing primarily focuses on the rising edge of the electrical pulse. The signal is connected to the high-speed comparator, which provides a pulse signal sufficient to trigger the T-flip-flop. The T-flip-flop converts the time between two rising edges into a square wave signal, whose width corresponds to the time interval between the two rising edges of the electrical pulse.
[0010] Preferably, the TAC readout module includes a charge-discharge constant current source, a high-speed analog switch, and an integrating capacitor. The high-speed analog switch is controlled by the output of a T trigger. The charge-discharge constant current source is connected to the integrating capacitor via the high-speed analog switch. The integrating capacitor is used to integrate the charging current. The charging time is controlled by the high-speed analog switch. The charging current is constant, and the voltage across the two ends satisfies: ΔV = I × Δt / C, where ΔV is the voltage difference across the capacitor, I is the charging current value, Δt is the time interval, and C is the capacitance of the capacitor. When the current is constant, the voltage difference across the capacitor is positively correlated with the charging time. As long as the voltage difference is known, the charging time can be reversed. Based on this principle, the time interval between signals can be read using a time-amplitude conversion method. The square wave with time information output by the T trigger is used to control the on and off of the high-speed analog switch. The high-speed analog switch connects the charge-discharge constant current source and the integrating capacitor. During the timing phase, the capacitor is charged, and after completion, it is maintained until the quantization is completed. The capacitor is then controlled by the high-speed analog switch to discharge. After the discharge is completed, the next time interval measurement can be performed.
[0011] Preferably, the quantized time amplitude module quantizes the voltage across the integrating capacitor C1 using a high-resolution ADC, and derives the time interval based on the voltage formula for the integrating capacitor C1. The voltage value of the integrating capacitor is quantized. The response interval of a large array SNSPD is between 100ns and 1us. Therefore, the capacitor voltage value is converted into a value within the ADC range through a signal processing circuit. The ADC then performs quantization. The accuracy and resolution of the time interval readout thus depends on the resolution of the ADC itself. As long as the number of binary bits quantized by the ADC is sufficient, the resolution and accuracy can reach the picosecond level. The ADC quantization result is output to the FPGA for final output.
[0012] The beneficial effects of the present invention are as follows: the present invention uses a superconducting binary encoder NTRON and a time-to-amplitude conversion circuit TAC to read the time interval and spatial position of the response of a large array SNSPD, achieving accuracy and resolution at the ps level, saving the number of coaxial lines at low temperatures, and the time interval measurement resolution is directly related to the number of bits of the quantization ADC. By selecting an ADC that meets the requirements, the resolution can reach the ps level; the time-to-amplitude conversion is performed using an analog circuit, with high accuracy, which can reach the ps level; the NTRON is directly connected to the large array SNSPD at low temperatures, without the need for additional coaxial line lead-out, thus saving a large number of coaxial lines; space and cost are saved, as there is no need to read each channel separately, thus saving a large amount of space and cost. BRIEF DESCRIPTION OF THE DRAWINGS
[0013] Figure 1 Schematic diagram of the time interval and spatial position readout method of the large array SNSPD based on TAC and NTRON in the present invention.
[0014] Figure 2 Schematic diagram of the interconnection between SNSPD and NTRON of the present invention.
[0015] Figure 3 Schematic diagram of the NTRON output signal processing module, TAC readout module and quantization time amplitude module of the present invention.
[0016] Figure 4 This is a schematic diagram of the spatial position of the NTRON encoding output of the present invention.
[0017] Figure 5 This is a schematic diagram of the TAC circuit output of the present invention. DETAILED DESCRIPTION
[0018] like Figure 1 As shown, a readout circuit for a large array superconducting single-photon detector includes: an NTRON interconnected readout module, an NTRON output signal processing module, a TAC readout module, and a quantized time amplitude module; the SNSPD array device is connected to the NTRON interconnected readout module, the NTRON output signal processing module processes the NTRON output signal and inputs it to the TAC readout module; the TAC readout module performs time amplitude conversion on the signal output by the NTRON output signal processing module to measure the time interval; the quantized time amplitude module quantizes the time interval measured by the TAC readout module to obtain the precise time interval.
[0019] The large-array SNSPD, NTRON encoder, and interconnects are located in a low-temperature environment, while the TAC is maintained at room temperature. The signal from the large-array SNSPD is fed into the NTRON encoder, which measures the position of its input port using binary encoding to read out the spatial position of the large-array SNSPD response. The NTRON output, after processing, is connected to the TAC readout module. The TAC uses time-to-amplitude conversion to convert the time interval between pulses into a change in the voltage across a capacitor. The quantized time-amplitude module quantizes this change to read out the time interval of the large-array SNSPD.
[0020] The interconnection between NTRON encoder and large array SNSPD is as follows Figure 2As shown, to ensure matching, an interface circuit is required between each channel. The inductor L2 below is used to prevent DC signals from interfering with the NTRON. The resistor and inductor on the right are currently integrated into the NTRON design, so a separate 20Ω resistor is required. Since large-array SNSPDs require a bias on the rows, a low-temperature bias tee is required between the two to ensure that the bias is fully applied to the large-array SNSPDs for operation and that the output signal of the large-array SNSPDs is fully output to the NTRON for triggering. The DC bias is applied to the SNSPDs via inductor L1, and capacitors C2 and C3 are used to filter the AC signal. The output signal of the large-array SNSPDs is input to the NTRON input via C1, R1, and R2. Low-temperature Bias-Tee needs to consider isolation and the characteristics of components at low temperatures. The isolation should reach about -40dB at a frequency of 1GHz. At the same time, to ensure the pass rate, high-frequency capacitors should be used. For the characteristics of components at low temperatures, SNSPD and NTRON need to operate at about 2K. After measurement, it was found that the inductance change value is not large at this temperature, but the capacitance of different packages and materials varies greatly. The difference between X5R is about ten times, and COG is almost unchanged. When performing low-temperature isolation, it is necessary to pay attention to the impact of different models on the final result.
[0021] NTRON output signal processing module, TAC readout module and quantization time amplitude module such as Figure 3 As shown, the signal first passes through the NTRON output signal processing module, which consists of a comparator and a T-type flip-flop. A high-speed comparator is selected to prevent time delays from affecting the next measurement. The T-type flip-flop is constructed by connecting D-type or JK-type flip-flops. The signal is converted into a square wave signal with time information. The width of the square wave represents the measured time interval. The square wave signal is then input to the TAC readout module, which consists of a high-speed analog switch, a constant current source, and a capacitor. The positive and negative square wave outputs of the T-type flip-flop are connected to two high-speed analog switches, respectively, to control the alternating switching of the charging and discharging constant current sources. To ensure proper signal acquisition, a signal is added via the FPGA to establish a time interval between the completion of the charging constant current source and the start of the discharging constant current source, facilitating quantized readout. The high-speed analog switch has three ports, connected to the constant current source, the timing capacitor, and ground. When the capacitor is not connected for charging or discharging, the constant current source is grounded for stable discharge, minimizing errors caused by the constant current source startup. The quantized time amplitude module uses an ADC to quantize the voltage across the capacitor to obtain the time interval.
[0022] NTRON output result diagram is as follows Figure 4As shown, NTRON displays encoding results through output pulses. A single signal is input into one of the NTRON encoder's 15 channels, encoding the information. The output signal is then displayed on four output channels. The results shown in the figure show responses from channels 1 and 4, but not from channels 2 and 3. The corresponding binary code is 1001, which converts to decimal as 9, indicating that the input channel was channel 9. This allows the spatial position of the output from large array devices to be read.
[0023] The schematic diagram of the TAC readout module output is as follows Figure 5 As shown in the figure, it is the output value of the capacitor's two-terminal value. The figure shows the readout result of the signal interval of 1000ns. The final voltage value across the capacitor is related to the capacitance, charging current and time of the capacitor. Here, a capacitor with a capacitance of 100pF is selected, the charging current is 1mA, the initial voltage value is 3V, and the final voltage value is 13V. After rising to the peak value, this process is maintained for 50-100ns. The specific value depends on the ADC readout rate. After the readout is completed, it is discharged with a constant current source. The discharge constant current source uses a large current. Here, a 10mA constant current source is selected for discharge. This process is very fast. The discharge is completed in 100ns. The voltage across the capacitor returns to 3V and is ready for the next measurement. In this way, a measurement is completed. The second measurement repeats the first process, and there is no difference in operation.
Claims
1. A readout circuit for a large array superconducting single-photon detector, characterized in that: include: NTRON interconnection readout module, NTRON output signal processing module, TAC readout module and quantization time amplitude module; large array SNSPD device is connected to NTRON interconnection readout module, NTRON output signal processing module processes NTRON output signal and inputs it to TAC readout module; TAC readout module performs time amplitude conversion on the signal output by NTRON output signal processing module and measures the time interval; quantization time amplitude module quantizes the time interval measured by TAC readout module to obtain the accurate time interval; NTRON interconnection readout module includes: low temperature Bias-Tee circuit, NTRON interface The AC port RF end of the low-temperature Bias-Tee is connected to the NTRON through the NTRON interface circuit, the DC port DC end of the low-temperature Bias-Tee is connected to the DC bias, and the RF&DC end is connected to the SNSPD output port; the DC bias is input through the DC end of the low-temperature Bias-Tee, and is input to the SNSPD through the RF&DC end of the low-temperature Bias-Tee; the output signal of the SNSPD is input through the RF&DC end of the low-temperature Bias-Tee, and is input to the NTRON interface circuit through the RF end of the low-temperature Bias-Tee, and then is input to the NTRON through the NTRON interface circuit.
2. The readout circuit of the large array superconducting single photon detector according to claim 1, characterized in that: The NTRON output signal processing module includes a high-speed comparator and a T trigger. The high-speed comparator is connected to the NTRON output signal processing module, and the output is connected to the T trigger. The T trigger maintains a high level output during the time interval to be measured.
3. The readout circuit of the large array superconducting single photon detector according to claim 1, characterized in that: The TAC readout module includes a charge and discharge constant current source, a high-speed analog switch and an integral capacitor. The high-speed analog switch is controlled by the output of the T trigger to open and close. The charge and discharge constant current source is connected to the integral capacitor through the high-speed analog switch. The integral capacitor is used to integrate the charging current. The charging time is controlled by the high-speed analog switch. The charging current is constant, and the voltage value at both ends satisfies: ΔV = I × Δt / C, where ΔV is the difference in voltage across the capacitor, I is the charging current value, Δt is the time interval, and C is the capacitance of the capacitor.
4. The readout circuit of the large array superconducting single photon detector according to claim 1, characterized in that: The quantized time amplitude module quantizes the voltage across the integration capacitor C1 through a high-resolution ADC and derives the time interval based on the voltage formula of the integration capacitor C1.