Lithographic system
By setting electrostatic discharge rings with feature sizes smaller than the resolution of the photolithography equipment in the exposure area of the photomask, and setting multiple electrostatic discharge rings around the device pattern, the problem of overlap between the electrostatic discharge rings and the alignment marks is solved, thus improving the yield of semiconductor devices.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- CHANGXIN MEMORY TECH INC
- Filing Date
- 2021-11-03
- Publication Date
- 2026-06-19
AI Technical Summary
In the prior art, the position of the electrostatic discharge ring on the mask overlaps with the alignment mark of the exposure machine, which cannot meet the requirement of the exposure machine that there are no other patterns in the area where the alignment mark is set. Moreover, electrostatic discharge may affect the pattern imaging in the exposure area, resulting in a decrease in the yield of semiconductor devices.
An electrostatic discharge ring is set in the exposure area of the photomask, and the feature size of the electrostatic discharge ring is smaller than the resolution of the photolithography equipment so that it does not form an image during exposure. Multiple electrostatic discharge rings are set around the device pattern to ensure that there are no other patterns in the alignment mark area and to provide electrostatic protection.
This technology enables the alignment requirements of the exposure equipment to be met without affecting the imaging of the device pattern, thereby improving the yield of semiconductor devices and reducing the impact of electrostatic discharge on the device pattern.
Smart Images
Figure CN116068843B_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to the field of semiconductor device manufacturing, and more particularly to a photolithography system. Background Technology
[0002] A photomask is a pattern master used in photolithography to transfer a design pattern onto a semiconductor structure to form a semiconductor device. Therefore, the quality of the photomask directly affects the quality of the fabricated semiconductor structure, and consequently, the yield of the semiconductor device containing that structure. Typically, a photomask includes exposed and unexposed areas. Furthermore, alignment marks are added to the photomask for alignment with the exposure equipment. In addition, to reduce the impact of electrostatic discharge (ESD) on the exposed area, an ESD ring is usually included. How to properly position the ESD ring is a crucial issue that needs to be addressed. Summary of the Invention
[0003] This disclosure provides a photolithography system, including:
[0004] Photolithography equipment;
[0005] A photomask suitable for the photolithography apparatus has an exposure area and a non-exposure area surrounding the exposure area, wherein the photomask includes:
[0006] Device patterns are disposed in the exposure area for projection onto the photoresist covering the semiconductor structure during exposure;
[0007] An electrostatic discharge ring is disposed in the exposure area and surrounds the device pattern. The feature size of the electrostatic discharge ring is smaller than the resolution of the photolithography equipment. The electrostatic discharge ring and the device pattern have a preset distance.
[0008] In some embodiments, the photomask includes a plurality of electrostatic discharge rings arranged side by side around the device pattern; wherein the minimum distance between two adjacent electrostatic discharge rings is greater than or equal to the feature size of the electrostatic discharge ring.
[0009] In some embodiments, the minimum distance between two adjacent electrostatic discharge rings is equal to 1.5 to 2.5 times the characteristic size of the electrostatic discharge ring.
[0010] In some embodiments, the plurality of electrostatic discharge rings are arranged at equal intervals.
[0011] In some embodiments, the plurality of electrostatic discharge rings have the same width.
[0012] In some embodiments, the centers of symmetry of the plurality of electrostatic discharge rings overlap.
[0013] In some embodiments, the shape of the electrostatic discharge ring includes: rectangle, square, or ring.
[0014] In some embodiments, the constituent material of the electrostatic discharge ring includes quartz.
[0015] In some embodiments, the mask further includes:
[0016] Alignment marks are set in the non-exposure area to align the mask with the light source of the photolithography equipment.
[0017] In some embodiments, the lithography equipment includes: an I-Line lithography machine, a KrF lithography machine, an ArF dry lithography machine, or an ArF immersion lithography machine.
[0018] In some embodiments, the lithography equipment is the I-Line lithography machine, and the feature size of the electrostatic discharge ring is less than 1120 nanometers.
[0019] In some embodiments, the lithography equipment is the KrF lithography machine, and the feature size of the electrostatic discharge ring is less than 320 nanometers.
[0020] In some embodiments, the lithography equipment is the ArF dry lithography machine, and the feature size of the electrostatic discharge ring is less than 228 nanometers.
[0021] In some embodiments, the lithography equipment is the ArF immersion lithography machine, and the feature size of the electrostatic discharge ring is less than 152 nanometers.
[0022] In related technologies, the location of the electrostatic discharge ring on the photomask overlaps with the location of the alignment marks used for alignment with the exposure equipment, thus failing to meet the exposure equipment's requirement that the area where the alignment marks are located be free of other patterns (i.e., pattern free). Removing the electrostatic discharge ring from the photomask may cause electrostatic discharge, affecting the pattern in the exposure area. In this embodiment, the electrostatic discharge ring is placed in the exposure area, and the feature size of the electrostatic discharge ring is smaller than the resolution of the photolithography equipment. Thus, during exposure, the electrostatic discharge ring will not form an image, meaning it will not affect the formation of the device pattern projected onto the photoresist covering the semiconductor structure, and electrostatic protection for the device pattern in the exposure area can be achieved. Attached Figure Description
[0023] Figure 1a This is a schematic diagram illustrating the exposure area of a photomask according to an exemplary embodiment;
[0024] Figure 1b This is a schematic diagram illustrating the non-exposed area of a photomask according to an exemplary embodiment;
[0025] Figure 1c This is a schematic diagram of a photomask according to an exemplary embodiment;
[0026] Figure 1d This is a partial schematic diagram of a photomask according to an exemplary embodiment;
[0027] Figure 2a This is a block diagram illustrating a photolithography system according to an exemplary embodiment;
[0028] Figure 2b This is a schematic diagram illustrating the exposure area I of a photomask according to an exemplary embodiment;
[0029] Figure 2c This is a schematic diagram illustrating a non-exposed area II of a photomask according to an exemplary embodiment;
[0030] Figure 2d This is a schematic diagram of a photomask according to an exemplary embodiment;
[0031] Figure 3a This is a schematic diagram of the exposure area I of another photomask according to an exemplary embodiment;
[0032] Figure 3b This is a schematic diagram of another mask according to an exemplary embodiment. Detailed Implementation
[0033] The technical solutions of this disclosure will be further described in detail below with reference to the accompanying drawings and embodiments. Although exemplary embodiments of this disclosure are shown in the drawings, it should be understood that this disclosure can be implemented in various forms and should not be limited to the embodiments described herein. Rather, these embodiments are provided to enable a more thorough understanding of this disclosure and to fully convey the scope of this disclosure to those skilled in the art.
[0034] The present disclosure is described in more detail below by way of example with reference to the accompanying drawings. The advantages and features of the present disclosure will become clearer from the following description and claims. It should be noted that the drawings are in a very simplified form and use non-precise proportions, and are only used to facilitate and clarify the illustration of the embodiments of the present disclosure.
[0035] It is understood that the meanings of “on”, “above” and “above” in this disclosure should be interpreted in the broadest sense, such that “on” means not only that it is “on” something without any intervening feature or layer (i.e., directly on something), but also that it is “on” something with an intervening feature or layer.
[0036] In the embodiments of this disclosure, the terms "first," "second," "third," etc., are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence.
[0037] In embodiments of this disclosure, the term "layer" refers to a portion of material comprising a region having thickness. A layer may extend over the entirety of a lower or upper structure, or may have a range smaller than that of the lower or upper structure. Furthermore, a layer may be a region of a homogeneous or heterogeneous continuous structure with a thickness less than the thickness of the continuous structure. For example, a layer may be located between the top and bottom surfaces of a continuous structure, or a layer may be located between any horizontal faces at the top and bottom surfaces of the continuous structure. A layer may extend horizontally, vertically, and / or along an inclined surface. A layer may include multiple sublayers.
[0038] It should be noted that the technical solutions described in the embodiments of this disclosure can be combined arbitrarily without conflict.
[0039] In the fabrication of semiconductor devices, it is often necessary to form structures with specific patterns. For example, in the fabrication of Dynamic Random Access Memory (DRAM), it is necessary to form capacitor holes that penetrate a stacked structure including a sacrificial layer and a support layer on the wafer, or to form multiple word line trenches or bit line trenches arranged in parallel within a predetermined structure. To form these specific patterns, exposure can be used to transfer the pattern to a photoresist covering the stacked structure using a mask, or to transfer the pattern to a photoresist covering the predetermined structure using a mask, thus forming a patterned photoresist. Then, using the patterned photoresist as an etching mask layer, photolithography is used to form the capacitor holes, word line trenches, or bit line trenches.
[0040] In existing technologies, there is a problem of low yield in semiconductor devices formed after exposure and photolithography. Analysis and research have revealed that the low yield may be due to electrostatic discharge of the photomask during exposure, which affects the imaging of the device pattern in the exposed area, thereby reducing the consistency between the pattern projected onto the photoresist and the device pattern on the photomask. For example, it may cause shape changes between the actual pattern projected onto the photoresist and the device pattern on the photomask, leading to short circuits or open circuits in the formed semiconductor device, thus reducing the yield of the semiconductor device.
[0041] To address the impact of electrostatic discharge on device patterns and protect the device patterns in the exposure area, an electrostatic discharge ring can be set around the device patterns. Figure 1a This is a schematic diagram illustrating the exposure area of a photomask according to an exemplary embodiment. Figure 1b This is a schematic diagram illustrating a substrate including a non-exposed area according to an exemplary embodiment. Figure 1cIt includes Figure 1a The exposure area shown and Figure 1b A schematic diagram of the mask (i.e., physical photomask) for the non-exposed area is shown. Figure 1d yes Figure 1c A partial schematic diagram of the photomask is shown. It can be understood that by combining... Figure 1a The exposure area shown in the figure and Figure 1b The substrate shown, including the non-exposed area, can be formed as follows: Figure 1c The mask shown.
[0042] Combination Figures 1a to 1d As shown, a photomask typically includes exposed and non-exposed areas. The exposed area is usually located at the center of the photomask substrate. The non-exposed area is usually located at the edge of the substrate and surrounds the exposed area. Device patterns are provided in the exposed area, which are projected onto the photoresist covering the semiconductor structure during exposure. The device patterns may include die patterns arranged in a matrix, with each die pattern corresponding to one die. Alignment marks (such as...) may be provided in the non-exposed area. Figure 1b The dotted, blocky, or striped patterns shown are used for alignment by the exposure machine. For example... Figure 1d As shown, the width L1 of the photomask can be 126 mm, and the width L2 of the electrostatic discharge ring can be 118 mm.
[0043] However, in practical applications, if the electrostatic discharge ring is placed in a non-exposure area (such as...) Figure 1b As shown, the electrostatic discharge ring overlaps with the alignment marks used for lithography machine alignment, failing to meet the requirement of the exposure equipment that the area on the photomask with the alignment marks should not have other patterns. Taking the ASML NXT1470 lithography machine as an example, refer to... Figure 1d As shown, this lithography machine requires that no patterns other than alignment marks be set in the P3, P5, P6, P7, P9 and P20 regions.
[0044] In view of this, embodiments of the present disclosure provide a photolithography system 100. (Refer to...) Figures 2a to 2d As shown, the photolithography system 100 includes:
[0045] Photolithography equipment 110;
[0046] A photomask 120 for use in a photolithography apparatus 110 has an exposure area I and a non-exposure area II surrounding the exposure area I, wherein the photomask 120 includes:
[0047] Device pattern 121 is disposed in exposure area I and is used to be projected onto the photoresist covering the semiconductor structure during exposure;
[0048] An electrostatic discharge ring 122 is disposed in the exposure area I and surrounds the device pattern 121. The feature size of the electrostatic discharge ring 122 is smaller than the resolution of the photolithography equipment 110. The electrostatic discharge ring 122 and the device pattern 121 have a preset distance.
[0049] The resolution of the lithography apparatus 110 represents its ability to clearly project even the smallest image. According to Rayleigh's law... The resolution R of the lithography equipment 110 can be calculated, where K1 represents process-related parameters; λ represents the wavelength of the light source used in the lithography equipment 110; N A This refers to the numerical aperture.
[0050] It is understood that those skilled in the art can reasonably set the feature size of the electrostatic discharge ring 122 in the mask 120 for different photolithography equipment 110 to meet the actual needs of different process technologies, and this disclosure does not impose any limitations.
[0051] The feature size of the device pattern 121 is greater than or equal to the resolution of the photolithography equipment 110. It is understood that, in this embodiment of the present disclosure, by setting the feature size of the device pattern 121 to be greater than or equal to the resolution of the photolithography equipment 110, it can be ensured that the device pattern 121 can be projected onto the photoresist covering the semiconductor structure to form the relevant functional structure.
[0052] For example, the device pattern 121 may be light-transmitting or opaque.
[0053] Specifically, when the device pattern 121 is transparent, the device pattern 121 may include a first gap that penetrates the upper and lower surfaces of the mask 120. The photoresist covering the semiconductor structure is a positive photoresist. The exposure light source passes through the first gap and reacts with the positive photoresist covering the semiconductor structure. By performing baking and development processes on the positive photoresist, the device pattern 121 can be transferred into the photoresist to form a patterned photoresist layer.
[0054] When the device pattern 121 is transparent, the device pattern 121 may also include a solid transparent structure that penetrates the upper and lower surfaces of the mask 120. The photoresist covering the semiconductor structure is a positive photoresist. The exposure light source passes through the solid transparent structure and reacts with the positive photoresist covering the semiconductor structure. By performing baking and development processes on the positive photoresist, the device pattern 121 can be transferred into the photoresist to form a patterned photoresist layer.
[0055] When the device pattern 121 is opaque, the device pattern 121 can be an opaque solid structure. The area outside the device pattern 121 in the exposure area I is a second gap that penetrates the upper and lower surfaces of the mask 120. The photoresist covering the semiconductor structure is a negative photoresist. The exposure light source reacts with the negative photoresist covering the semiconductor structure through the second gap. By performing baking and development processes on the negative photoresist, the device pattern 121 can be transferred into the photoresist to form a patterned photoresist layer.
[0056] For example, device pattern 121 may include a capacitor hole pattern for forming capacitor holes in a semiconductor structure. The shape of the capacitor hole pattern includes, but is not limited to, a circle or a rectangle.
[0057] In some embodiments, the device pattern 121 may further include any one or a combination of contact plug patterns and conductive wire patterns, without limitation herein.
[0058] For example, the electrostatic discharge ring 122 is a closed shape, and the device pattern 121 is located inside this closed shape. Features of the electrostatic discharge ring 122 may include the linewidth of the electrostatic discharge ring 122. It should be emphasized that the device pattern 121 does not contact the electrostatic discharge ring 122; that is, the predetermined distance between the electrostatic discharge ring 122 and the device pattern 121 is greater than 0.
[0059] It is understandable that although the electrostatic discharge ring 122 is set in the exposure area I, since the feature size of the electrostatic discharge ring 122 is smaller than the resolution of the photolithography equipment 110, the electrostatic discharge ring 122 will not form an image in the photoresist covering the semiconductor structure when exposed by the photolithography equipment 110. That is, when the photoresist covering the semiconductor structure is exposed by the photolithography system, the image formed in the photoresist is determined by the device pattern 121 in the exposure area I and will not be affected by the electrostatic discharge ring 122, and thus will not affect the formed device.
[0060] Exemplary types of mask 120 include, but are not limited to, phase-shift mask (PSM), chromium-containing mask (COG), or molybdenum-containing mask (OMOG). Preferably, a chromium-free mask 120 may be used to reduce the impact on the device pattern 121.
[0061] Compared to related technologies where the location of the electrostatic discharge ring 122 on the mask 120 overlaps with the location of the alignment mark used for alignment with the exposure machine, or where the electrostatic discharge ring 122 is removed from the mask 120, in this embodiment, the electrostatic discharge ring 122 is located in the exposure area I, and the feature size of the electrostatic discharge ring 122 is smaller than the resolution of the photolithography equipment 110. This satisfies the requirement of the exposure machine that there are no other patterns in the area where the alignment mark is located, reducing the loading effect of the pattern. Furthermore, when the photolithography equipment 110 performs exposure, the electrostatic discharge ring 122 will not form an image, that is, it will not affect the formation of the device pattern 121 projected onto the photoresist covering the semiconductor structure, and can achieve electrostatic protection for the device pattern 121 in the exposure area I.
[0062] In some embodiments, refer to Figure 3a and Figure 3b As shown, the mask 120 includes a plurality of electrostatic discharge rings arranged side by side around the device pattern 121; wherein the minimum distance between two adjacent electrostatic discharge rings is greater than or equal to the feature size of the electrostatic discharge ring.
[0063] It is understood that, since each of the multiple electrostatic discharge rings 122 arranged in parallel surrounds the device pattern 121 and each electrostatic discharge ring 122 is a closed structure, the multiple electrostatic discharge rings 122 arranged in parallel are nested together.
[0064] Reference Figure 3a As shown, the exposure area I of the mask 120 may include two electrostatic discharge rings arranged side by side around the device pattern 121, namely a first electrostatic discharge ring 122a and a second electrostatic discharge ring 122b, with the first electrostatic discharge ring 122a located between the second electrostatic discharge ring 122b and the device pattern 121.
[0065] For example, the minimum distance between two adjacent electrostatic discharge rings 122 can be represented by the minimum distance between any point on one electrostatic discharge ring 122 and any point on the other electrostatic discharge ring 122.
[0066] When two adjacent electrostatic discharge rings 122 are both circular, the minimum distance between the two adjacent electrostatic discharge rings 122 can be represented by the difference in the radii of the two adjacent electrostatic discharge rings 122.
[0067] When two adjacent electrostatic discharge rings 122 are both rectangular, the minimum distance between the two adjacent electrostatic discharge rings 122 can be represented by half the difference between the diagonals of the two adjacent electrostatic discharge rings 122.
[0068] Since the mask 120 includes a plurality of electrostatic discharge rings 122, when at least two electrostatic discharge rings 122 have different feature sizes, the minimum distance between two adjacent electrostatic discharge rings 122 can be greater than or equal to the maximum value of the feature sizes of the plurality of electrostatic discharge rings 122.
[0069] Compared to setting only one electrostatic discharge ring 122, the mask 120 provided in this embodiment of the present disclosure can provide better electrostatic discharge capability by setting multiple electrostatic discharge rings 122 arranged in parallel around the device pattern 121. In particular, when a single electrostatic discharge ring 122 is not enough to resist the impact of electrostatic discharge on the device pattern 121, the other electrostatic discharge rings 122 can further protect the device pattern 121.
[0070] In some embodiments, the minimum distance between two adjacent electrostatic discharge rings 122 is equal to 1.5 to 2.5 times the characteristic size of the electrostatic discharge ring 122.
[0071] For example, when two adjacent electrostatic discharge rings 122 have the same characteristic size, the minimum distance between the two adjacent electrostatic discharge rings 122 can be equal to 1.5 to 2.5 times the characteristic size of any one of the electrostatic discharge rings 122, for example, it can be twice the characteristic size of any one of the electrostatic discharge rings 122.
[0072] When the characteristic dimensions of two adjacent electrostatic discharge rings 122 are different, for example, when the first electrostatic discharge ring and the second electrostatic discharge ring are arranged adjacent to each other, and the characteristic dimension of the first electrostatic discharge ring is smaller than the characteristic dimension of the second electrostatic discharge ring, the minimum distance between the first electrostatic discharge ring and the second electrostatic discharge ring can be equal to 1.5 to 2.5 times the characteristic dimension of the first electrostatic discharge ring, or equal to 1.5 to 2.5 times the characteristic dimension of the second electrostatic discharge ring.
[0073] In this embodiment, by setting the minimum distance between two adjacent electrostatic discharge rings 122 to be equal to 1.5 to 2.5 times the feature size of the electrostatic discharge ring 122, the probability of multiple electrostatic discharge rings 122 forming a dense pattern and thus being imaged in the photoresist due to excessively small distances between them can be reduced. This satisfies the requirement that the electrostatic discharge rings 122 do not affect the pattern projected onto the photoresist, ensuring that the formed semiconductor device meets yield requirements. On the other hand, compared to setting the minimum distance between adjacent electrostatic discharge rings 122 too large, this embodiment can reduce the area of the exposure area I occupied by the electrostatic discharge rings 122.
[0074] In some embodiments, a plurality of electrostatic discharge rings 122 are arranged at equal intervals.
[0075] Specifically, the spacing between any two adjacent electrostatic discharge rings 122 is equal. It should be emphasized that the spacing between any two adjacent electrostatic discharge rings 122 is equal to 1.5 to 2.5 times the characteristic dimension of the electrostatic discharge ring 122.
[0076] Compared to having at least two different spacings among the multiple electrostatic discharge rings 122, the present embodiment sets the multiple electrostatic discharge rings 122 at equal spacings, which is beneficial to optimizing the layout of the electrostatic discharge rings 122.
[0077] In some embodiments, the plurality of electrostatic discharge rings 122 have the same width.
[0078] The width of the electrostatic discharge ring 122 can be represented by the line width of the electrostatic discharge ring 122. Taking the shape of the electrostatic discharge ring 122 as a ring as an example, the ring-shaped electrostatic discharge ring 122 includes an inner ring surface and an outer ring surface disposed opposite to the inner ring surface. The line width of the ring-shaped electrostatic discharge ring 122 is the distance between the inner ring surface and the outer ring surface.
[0079] Compared to setting at least two electrostatic discharge rings 122 with different widths, the multiple electrostatic discharge rings 122 in this embodiment have the same width, which helps to reduce the difficulty of forming a mask 120 including the multiple electrostatic discharge rings 122.
[0080] In some embodiments, the centers of symmetry of the plurality of electrostatic discharge rings 122 overlap.
[0081] For example, each electrostatic discharge ring 122 may be a symmetrical pattern.
[0082] It is understandable that when the centers of symmetry of at least two electrostatic discharge rings 122 change from an overlapping state to a non-overlapping state, when the at least two electrostatic discharge rings 122 are set on the mask 120, the overlapping area surrounded by the at least two electrostatic discharge rings 122 will decrease and the non-overlapping area will increase. In other words, the area required to set the at least two electrostatic discharge rings 122 will increase.
[0083] Compared to arranging at least two electrostatic discharge rings 122 with non-overlapping centers of symmetry, in this embodiment, by overlapping the centers of symmetry of multiple electrostatic discharge rings 122, the layout of these multiple electrostatic discharge rings 122 can be optimized, making full use of the area of the exposure area I. On the one hand, the area occupied by the electrostatic discharge rings 122 can be reduced while keeping the number of rings constant. On the other hand, while keeping the area of the exposure area I constant, the number of electrostatic discharge rings 122 that can be arranged can be increased, which is beneficial to improving the electrostatic protection effect on the device pattern 121.
[0084] In some embodiments, the shape of the electrostatic discharge ring 122 may be a regular closed pattern. For example, the shape of the electrostatic discharge ring 122 may include a rectangle, a square, or a ring. It is understood that the shape of the electrostatic discharge ring 122 may also include a triangle or a trapezoid, etc.
[0085] It is understandable that irregular closed patterns typically have many inflection points, making it difficult to form a mask 120 with an irregular closed pattern as the electrostatic discharge ring 122. Compared to using an irregular closed pattern as the electrostatic discharge ring 122, the electrostatic discharge ring 122 provided in this embodiment has a regular closed pattern, which reduces the difficulty of forming a mask 120 including the electrostatic discharge ring 122 and optimizes the layout of the mask 120.
[0086] In some embodiments, the constituent material of the electrostatic discharge ring 122 includes quartz.
[0087] For example, the constituent materials of the electrostatic discharge ring 122 may also include molybdenum or chromium. Preferably, a material that does not contain chromium can be selected to form the electrostatic discharge ring 122 to reduce the influence of chromium on the device pattern 121.
[0088] In some embodiments, mask 120 further includes:
[0089] Alignment marks are set in the non-exposure area II to align the light source of the photomask 120 and the photolithography equipment 110.
[0090] During the process of exposing a wafer using photolithography equipment 110, the photolithography equipment 110 can use the alignment mark to align the mask 120 with the wafer, so as to ensure that the device pattern 121 on the mask 120 can be projected onto the preset position in the photoresist covering the wafer.
[0091] In some embodiments, the lithography equipment 110 includes: an I-Line lithography machine, a KrF lithography machine, an ArF dry lithography machine, or an ArF immersion lithography machine.
[0092] For example, the lithography equipment 100 can be distinguished according to the different light sources used. For instance, when the light source is mercury light, the lithography equipment 100 is an I-line lithography machine. When the light source is krypton fluoride, the lithography equipment 110 is a KrF lithography machine. When the light source is argon fluoride, the lithography equipment 110 can be an ArF dry lithography machine or an ArF immersion lithography machine.
[0093] The lithography system provided in this embodiment can flexibly design or select the mask 120 according to the lithography equipment 110 used, so as to meet application requirements and expand the application scope of the lithography system.
[0094] In some embodiments, the lithography equipment 110 is an I-line lithography machine, and the feature size of the electrostatic discharge ring 122 is less than 1120 nanometers.
[0095] It is important to emphasize that, according to Rayleigh's law, with other parameters remaining constant, the resolution of the lithography equipment 110 is positively correlated with the wavelength of the light source used by the lithography equipment 110. Therefore, as the light source used by the lithography equipment 110 varies, the resolution of the lithography equipment 110 will also vary, and the feature size of the electrostatic discharge ring 122 in the accompanying mask 120 will also vary.
[0096] When the lithography equipment 110 is an I-line lithography machine with a light source wavelength of 365 nanometers, the resolution of the I-line lithography machine can be calculated to be 1120 nanometers according to the Rayleigh formula. That is, when the lithography equipment 110 exposes the photoresist through the mask 120, the minimum feature size of the pattern to be imaged on the mask 120 is 1120 nanometers. Therefore, the feature size of the electrostatic discharge ring 122 is less than 1120 nanometers.
[0097] When the lithography equipment 110 is an I-line lithography machine with a light source wavelength of 365 nanometers, the smallest feature of the pattern that can be formed on the wafer can be 280 nanometers.
[0098] In some embodiments, the lithography equipment 110 is a KrF lithography machine, and the feature size of the electrostatic discharge ring 122 is less than 320 nanometers.
[0099] When the lithography equipment 110 is a KrF lithography machine and the light source wavelength is 248 nanometers, the resolution of the KrF lithography machine can be calculated to be 320 nanometers according to the Rayleigh formula. That is, when the lithography equipment 110 exposes the photoresist through the mask 120, the minimum feature size of the pattern to be imaged on the mask 120 is 320 nanometers. Therefore, the feature size of the electrostatic discharge ring 122 is less than 320 nanometers.
[0100] When the lithography equipment 110 is a KrF lithography machine and the light source wavelength is 248 nanometers, the smallest feature of the pattern that can be formed on the wafer can be 80 nanometers.
[0101] In some embodiments, the lithography equipment 110 is an ArF dry lithography machine, and the feature size of the electrostatic discharge ring 122 is less than 228 nanometers.
[0102] When the lithography equipment 110 is an ArF dry lithography machine and the light source wavelength is 193 nanometers, the resolution of the ArF dry lithography machine can be calculated to be 228 nanometers according to the Rayleigh formula. That is, when the lithography equipment 110 exposes the photoresist through the mask 120, the minimum feature size of the pattern to be imaged on the mask 120 is 228 nanometers. Therefore, the feature size of the electrostatic discharge ring 122 is less than 228 nanometers.
[0103] When the lithography equipment 110 is an ArF dry lithography machine with a light source wavelength of 193 nanometers, the smallest feature of the pattern that can be formed on the wafer can be 57 nanometers.
[0104] In some embodiments, the lithography equipment 110 is an ArF immersion lithography machine, and the feature size of the electrostatic discharge ring 122 is less than 152 nanometers.
[0105] When the lithography equipment 110 is an ArF immersion lithography machine with a light source wavelength of 193 nanometers, the resolution of the ArF immersion lithography machine can be calculated to be 152 nanometers according to the Rayleigh formula. That is, when the lithography equipment 110 exposes the photoresist through the mask 120, the minimum feature size of the pattern to be imaged on the mask 120 is 152 nanometers. Therefore, the feature size of the electrostatic discharge ring 122 is less than 152 nanometers.
[0106] When the lithography equipment 110 is an ArF immersion lithography machine with a light source wavelength of 193 nanometers, the smallest feature of the pattern that can be formed on the wafer can be 38 nanometers.
[0107] Understandably, the higher the resolution of the lithography equipment 110, the higher the cost of the lithography system, but the higher the precision of the structures fabricated using that system. Therefore, a suitable lithography system can be selected based on the specific application requirements.
[0108] The above description is merely a specific embodiment of this disclosure, but the scope of protection of this disclosure is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this disclosure should be included within the scope of protection of this disclosure. Therefore, the scope of protection of this disclosure should be determined by the scope of the claims.
Claims
1. A lithographic system, characterized by, include: Photolithography equipment; A photomask suitable for the photolithography apparatus has an exposure area and a non-exposure area surrounding the exposure area, wherein the photomask includes: Device patterns are disposed in the exposure area for projection onto the photoresist covering the semiconductor structure during exposure; An electrostatic discharge ring is disposed in the exposure area and surrounds the device pattern. The feature size of the electrostatic discharge ring is smaller than the resolution of the photolithography equipment. The electrostatic discharge ring and the device pattern have a preset distance, which is greater than 0.
2. The photolithography system according to claim 1, characterized in that, The mask includes a plurality of electrostatic discharge rings arranged side by side around the device pattern; wherein the minimum distance between two adjacent electrostatic discharge rings is greater than or equal to the feature size of the electrostatic discharge ring.
3. The photolithography system of claim 2, wherein, The minimum distance between two adjacent electrostatic discharge rings is equal to 1.5 to 2.5 times the characteristic size of the electrostatic discharge ring.
4. The photolithography system of claim 2, wherein, Multiple electrostatic discharge rings are arranged at equal intervals.
5. The photolithography system of claim 2, wherein, The multiple electrostatic discharge rings have the same width.
6. The photolithography system of claim 2, wherein, The centers of symmetry of the plurality of electrostatic discharge rings overlap.
7. The photolithography system of claim 1, wherein, The shape of the electrostatic discharge ring includes: rectangle, square, or ring.
8. The photolithography system of claim 1, wherein, The constituent materials of the electrostatic discharge ring include: quartz.
9. The photolithography system of claim 1, wherein, The photomask also includes: Alignment marks are set in the non-exposure area to align the mask with the light source of the photolithography equipment.
10. The photolithography system according to claim 1, characterized in that, The lithography equipment includes: I-Line lithography machine, KrF lithography machine, ArF dry lithography machine or ArF immersion lithography machine.
11. The photolithography system according to claim 10, characterized in that, The lithography equipment is the I-Line lithography machine, and the feature size of the electrostatic discharge ring is less than 1120 nanometers.
12. The photolithography system according to claim 10, characterized in that, The lithography equipment is the KrF lithography machine, and the feature size of the electrostatic discharge ring is less than 320 nanometers.
13. The photolithography system according to claim 10, characterized in that, The lithography equipment is the ArF dry lithography machine, and the feature size of the electrostatic discharge ring is less than 228 nanometers.
14. The photolithography system according to claim 10, characterized in that, The lithography equipment is the ArF immersion lithography machine, and the feature size of the electrostatic discharge ring is less than 152 nanometers.