Silicon-based ultrasonic fingerprint detection sensors and modules

Abstract

This specification relates to the field of fingerprint recognition technology, specifically disclosing a silicon-based ultrasonic fingerprint detection sensor and module. The silicon-based ultrasonic fingerprint detection sensor includes a silicon substrate; an ultrasonic pixel array, disposed on the silicon substrate, comprising a plurality of ultrasonic pixel units; each ultrasonic pixel unit includes an ultrasonic sensor and an ultrasonic fingerprint detection circuit. The ultrasonic fingerprint detection circuit includes two capacitors and at least five MOS transistors: a first capacitor, a second capacitor, a first MOS transistor, a second MOS transistor, a third MOS transistor, a fourth MOS transistor, and a fifth MOS transistor. The ultrasonic fingerprint detection circuit receives at least four corresponding timing control signals: a first drive signal, a bias signal, a second drive signal, and a row select signal. The four timing control signals are mutually independent. The silicon-based ultrasonic fingerprint detection sensor of the present invention can read ultrasonic fingerprint signals.

Description

Technical Field

[0001] This specification relates to the technical field of fingerprint detection ultrasonic sensors, and in particular to a silicon-based ultrasonic fingerprint detection sensor and module. Background Art

[0002] Ultrasonic sensors convert ultrasonic signals into other energy signals (usually electrical signals). They feature high frequency, short wavelength, minimal diffraction, and, most notably, excellent directionality, enabling them to propagate in a directional manner as rays. Ultrasonic waves have a strong ability to penetrate liquids and solids, especially solids that are opaque to sunlight. These characteristics have led to their widespread application.

[0003] Unlike traditional optical or capacitive fingerprint recognition solutions, ultrasonic sensors are increasingly popular for under-display fingerprint recognition due to their greater flexibility in environmental applications. Unlike optical fingerprint sensors, which are constrained by optical path limitations and cannot be extremely thin, ultrasonic sensors do not have this limitation. Therefore, under-display fingerprint sensors can be made thinner as electronic products become thinner. Unlike capacitive fingerprint sensors, ultrasonic sensors are also less susceptible to humidity, which can affect their sensitivity.

[0004] As users increasingly pursue a better experience, they also want a larger fingerprint recognition area. Currently, they are pursuing large-array fingerprint recognition chips. However, using CMOS technology to manufacture large-array ultrasonic fingerprint chips obviously has a weaker cost advantage.

[0005] At present, the domestic large-array under-screen ultrasonic fingerprint recognition module is still in the development stage, and no such under-screen ultrasonic fingerprint recognition sensor has appeared. Summary of the Invention

[0006] The embodiments of this specification provide a silicon-based ultrasonic fingerprint detection sensor and module. The silicon-based ultrasonic fingerprint detection sensor is manufactured using a TFT process, which can reduce the manufacturing cost of the sensor when manufacturing a large-array silicon-based ultrasonic fingerprint detection sensor.

[0007] An embodiment of the present specification provides a silicon-based ultrasonic fingerprint detection sensor, comprising: a silicon substrate; an ultrasonic pixel array, disposed on the silicon substrate, comprising a plurality of ultrasonic pixel units; each ultrasonic pixel unit comprising an ultrasonic sensor and an ultrasonic fingerprint detection circuit, wherein the ultrasonic fingerprint detection circuit comprises two capacitors and at least five MOS transistors: a first capacitor, a second capacitor, a first MOS transistor, a second MOS transistor, a third MOS transistor, a fourth MOS transistor, and a fifth MOS transistor; the ultrasonic fingerprint detection circuit receives at least four corresponding timing control signals: a first drive signal, a bias signal, a second drive signal, and a row select signal, wherein the four timing control signals are independent of each other; wherein the first MOS transistor functions as a source follower transistor, the gate of the first MOS transistor being connected to one end of the first capacitor, the gate of the fourth MOS transistor receiving the second drive signal, the gate of the third MOS transistor receiving the first drive signal, and the source / drain of the third MOS transistor receiving the bias signal; and the source and drain of the third MOS transistor and the fourth MOS transistor being connected to form a first common point. The first common point is connected to the electrode corresponding to the ultrasonic sensor; the gate of the second MOS transistor and the gate of the fifth MOS transistor receive the row select signal; the source and drain of the first MOS transistor and the second MOS transistor are connected to form a second common point, and the second common point is connected to the source / drain of the fifth MOS transistor; the drain / source of the fifth MOS transistor is connected to one end of the second capacitor; during a receiving phase of the ultrasonic fingerprint detection circuit, at least the fourth MOS transistor is turned on using the second drive signal, so that the gate of the first MOS transistor forms an electrical path with the first common point; during the period in which the first common point and the gate of the first MOS transistor form an electrical path, the third MOS transistor is controlled to turn on using the first drive signal and the bias signal to raise the potential of the first common point; in a reading phase after the receiving phase, the second MOS transistor and the fifth MOS transistor are turned on using the row select signal, the ultrasonic fingerprint signal stored on the first capacitor is transferred to the second capacitor, and the ultrasonic fingerprint signal stored on the second capacitor is output.

[0008] The embodiments of this specification also provide a silicon-based ultrasonic fingerprint detection module, comprising: an ultrasonic fingerprint detection sensor as described in the above embodiments; an integrated circuit dedicated chip, the integrated circuit dedicated chip communicates with the ultrasonic fingerprint detection sensor and provides a function for generating four timing control signals to the ultrasonic fingerprint detection sensor.

[0009] In summary, in the ultrasonic fingerprint detection sensor of the embodiment of the present invention, the ultrasonic fingerprint detection circuit in the ultrasonic pixel unit includes at least five MOS tubes and two capacitors. In conjunction with the signal provided by the integrated circuit dedicated chip and the corresponding ultrasonic sensor, it can stimulate the ultrasonic sensor in the ultrasonic pixel unit to generate ultrasonic waves, and control the ultrasonic fingerprint detection circuit to receive the ultrasonic signal transmitted back from the finger and output it to the corresponding integrated circuit dedicated chip for fingerprint signal processing.

[0010] The ultrasonic fingerprint detection circuit in the ultrasonic pixel unit described in this specification is manufactured using a TFT process, which can reduce the manufacturing cost of larger ultrasonic pixel arrays. This large-area ultrasonic pixel array provides a larger fingerprint detection area, and the corresponding increased size can be flexibly adjusted to the specifications of the electronic product to provide a correspondingly larger fingerprint detection area.

[0011] Based on the above description of the ultrasonic fingerprint detection circuit, the ultrasonic fingerprint detection circuit includes at least five MOS transistors and two capacitors, corresponding to at least four different timing control signals that control the ultrasonic fingerprint detection circuit to operate in different phases. A working cycle of the ultrasonic fingerprint detection circuit includes at least a receiving phase and a reading phase. The fourth MOS transistor can isolate the first MOS transistor from the ultrasonic sensor, preventing the ultrasonic fingerprint signal stored on the gate of the first MOS transistor from being interfered with by factors such as the finger or the outside world during the receiving or reading process, thereby improving the signal-to-noise ratio of the collected fingerprint signal.

[0012] The voltage ΔV of the ultrasonic fingerprint peak signal can be adjusted by adjusting the capacitance values ​​of the first capacitor and the second capacitor in the ultrasonic fingerprint detection circuit to better perform fingerprint detection.

[0013] This specification describes various embodiments for controlling the first drive signal and bias signal for the third MOS transistor. Among these embodiments, the preferred implementation involves asynchronous rising and falling edges of the pulse signals in the first drive signal and bias signal. When these timing signals originate from a dedicated integrated circuit chip, or when the ultrasonic fingerprint detection sensor is required to convert the timing signal source provided by the dedicated integrated circuit chip, the rising and falling edges of the pulse signals must be completely synchronized. This places stringent requirements on the circuitry generating the timing control signal. Even the slightest timing error can cause a stage of the ultrasonic fingerprint detection circuit to malfunction. The complete synchronization of the rising and falling edges of these pulse signals is not only crucial to the design and fabrication of the circuitry generating the timing signals, but also crucial to the circuit's manufacturing process. Therefore, reducing the pulse synchronization requirements for the first drive signal and bias signal for the third MOS transistor can reduce the design and fabrication complexity of the dedicated integrated circuit chip generating the timing signals. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] The drawings described herein are for illustrative purposes only and are not intended to limit the scope of the present invention in any way. In addition, the shapes and proportional dimensions of the components in the drawings are only schematic and are used to help understand the present invention, and do not specifically limit the shapes and proportional dimensions of the components of the present invention. Those skilled in the art can select various possible shapes and proportional dimensions to implement the present invention according to the specific circumstances under the guidance of the present invention. In the drawings:

[0015] Figure 1 FIG1 is a schematic top view of a silicon-based ultrasonic fingerprint detection sensor according to a non-limiting embodiment of the present invention;

[0016] Figure 2 for Figure 1 The cross-sectional structure diagram of the silicon-based ultrasonic fingerprint detection sensor is shown;

[0017] Figure 3 A circuit topology diagram of an ultrasonic fingerprint detection circuit in a silicon-based ultrasonic fingerprint detection sensor according to a non-limiting embodiment of the present invention;

[0018] Figure 4 A circuit topology diagram of an ultrasonic fingerprint detection circuit in a silicon-based ultrasonic fingerprint detection sensor according to a non-limiting embodiment of the present invention;

[0019] Figure 5 A circuit topology diagram of an ultrasonic fingerprint detection circuit in a silicon-based ultrasonic fingerprint detection sensor according to a non-limiting embodiment of the present invention;

[0020] Figure 6 A circuit topology diagram of an ultrasonic fingerprint detection circuit in a silicon-based ultrasonic fingerprint detection sensor according to a non-limiting embodiment of the present invention;

[0021] Figure 7 for Figures 3 to 5 The control timing diagram of the ultrasonic fingerprint detection circuit shown;

[0022] Figure 8 for Figures 3 to 5 A control timing diagram of the ultrasonic fingerprint detection circuit shown;

[0023] Figure 9 for Figures 3 to 5 Another control timing diagram of the ultrasonic fingerprint detection circuit is shown. DETAILED DESCRIPTION

[0024] In order to enable those skilled in the art to better understand the technical solutions of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings of the embodiments of the present invention. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts should fall within the scope of protection of the present invention.

[0025] It should be noted that when an element is referred to as being "disposed on" another element, it may be directly on the other element or there may be an element centered thereon. When an element is referred to as being "connected to" another element, it may be directly connected to the other element or there may be an element centered thereon. The terms "vertical," "horizontal," "left," "right," and similar expressions used herein are for illustrative purposes only and do not represent the only embodiments.

[0026] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the art to which this invention pertains. The terms used herein in the specification of the present invention are for the purpose of describing specific embodiments only and are not intended to limit the present invention. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0027] Embodiments of the present invention provide a silicon-based ultrasonic fingerprint sensor and a fingerprint detection method using the same. The silicon-based ultrasonic fingerprint sensor can be used in electronic devices, including but not limited to mobile smartphones, tablets, computers, GPS navigators, personal digital assistants, and smart wearable devices, for fingerprint recognition, enabling fingerprint unlocking, user authentication, and permission acquisition.

[0028] For example, in a feasible implementation scenario, a silicon-based ultrasonic fingerprint detection sensor is configured in a smartphone. The smartphone can obtain the user's fingerprint feature information based on the silicon-based ultrasonic fingerprint detection sensor to match it with the stored fingerprint information to achieve identity authentication of the current user, thereby confirming whether he has the corresponding authority to perform screen unlocking, user authentication, permission acquisition and other related operations on the smartphone.

[0029] like Figure 1 and Figure 2As shown, the silicon-based ultrasonic fingerprint detection sensor includes a silicon substrate 1 and an ultrasonic pixel array 2 disposed on the silicon substrate 1. The ultrasonic pixel array 2 includes a plurality of ultrasonic pixel units 201. The plurality of ultrasonic pixel units 201 can be arranged in a regular pattern of multiple rows and columns on the silicon substrate 1. The silicon substrate 1 utilizes a TFT process to manufacture a large-area ultrasonic pixel array. Compared to ultrasonic fingerprint detection circuits on glass substrates, the silicon process is more stable and has higher uniformity. Furthermore, MOS transistors manufactured on silicon substrates have lower leakage current. With low leakage current, it is possible to excite and read all rows and columns at once.

[0030] Furthermore, the silicon-based ultrasonic fingerprint sensor is equipped with a pin 3 for connecting to a dedicated integrated circuit chip, which provides the signal source for generating timing control signals for the ultrasonic fingerprint detection circuit. When the ultrasonic fingerprint detection module, consisting of the silicon-based ultrasonic fingerprint detection sensor and the dedicated integrated circuit chip, is applied to a corresponding electronic device, the dedicated integrated circuit chip communicates with the core processing chip in the electronic device to perform ultrasonic fingerprint detection and recognition.

[0031] like Figure 2 As shown, the silicon-based ultrasonic fingerprint detection sensor includes an ultrasonic pixel array. The ultrasonic pixel units 201 in the ultrasonic pixel array each include an ultrasonic sensor (Sensor) and an ultrasonic fingerprint detection circuit 201a electrically connected to the ultrasonic sensor. Figure 1 and Figure 2 As shown, the ultrasonic sensor may include a bottom electrode 201b, a piezoelectric material 4, an electrode 5, a protective film 6 and a cover layer 7 stacked in sequence from bottom to top. The piezoelectric material 4 may be made of PVDF. Figure 2 The electrode 5 shown in FIG. 2 can be understood as the top electrode. The piezoelectric material 4 is disposed between the electrode 5 and the bottom electrode 201b. The cover layer 7, specifically a cover glass, is provided for a user's finger to press or touch. The protective film 6 isolates the electrode 5 from the cover layer 7, buffering the user's finger pressure or touch operation and protecting the electrode 5 as well as the underlying piezoelectric material 4, ultrasonic pixel array 2, and other structures.

[0032] The ultrasonic fingerprint detection circuit 201a is a part of the ultrasonic pixel unit. This ultrasonic fingerprint detection circuit 201a corresponds one-to-one to the patterned bottom electrode to form an array-type ultrasonic pixel array. Several ultrasonic pixel units 201 are independent of each other. The "independent of each other" means that there is no signal connection or signal sharing relationship between the several ultrasonic pixel units 201. The ultrasonic fingerprint detection circuit 201a only receives the electrical signal transmitted from the bottom electrode of the ultrasonic sensor in the corresponding ultrasonic pixel unit. The ultrasonic sensor is electrically connected to the ultrasonic detection circuit in the ultrasonic pixel unit through the patterned bottom electrode. An excitation stage is included in a working cycle of the ultrasonic detection circuit. In the excitation stage, the electrode 5 receives an AC excitation voltage signal (Excitation Signal), and the ultrasonic detection circuit provides a stable DC low potential to the bottom electrode of the corresponding ultrasonic sensor in the excitation stage.

[0033] In the receiving stage, the ultrasonic fingerprint detection circuit receives the ultrasonic fingerprint signal of the ultrasonic sensor of the corresponding bottom electrode. Figures 3 to 6 As shown, each ultrasonic fingerprint detection circuit 201a includes at least five MOS transistors and two capacitors: a first MOS transistor M1, a second MOS transistor M2, a third MOS transistor M3, a fourth MOS transistor M4, a fifth MOS transistor M5, a first capacitor C1 and a second capacitor C2.

[0034] In this embodiment, all MOS transistors are preferably of the same type, for example, all are N-type MOS transistors or all are P-type MOS transistors. Figure 6 The ultrasonic fingerprint detection circuit topology shown is the same as Figure 3 The ultrasonic fingerprint detection circuit topology is roughly the same as shown in the figure, except that Figure 3 The NMOS transistors in the ultrasonic fingerprint detection circuit are replaced with PMOS transistors. In a preferred embodiment, using the same type of MOS transistors in the ultrasonic fingerprint detection circuit can reduce the complexity of the TFT manufacturing process to a certain extent. Of course, in other feasible embodiments of the ultrasonic fingerprint detection circuit, some MOS transistors can be N-type MOS transistors and some MOS transistors can be P-type MOS transistors, and the present invention is not limited to this.

[0035] For MOS transistors manufactured using TFT processes, those skilled in the art will recognize that the source and drain of a MOS transistor are interchangeable. Therefore, in all technical solutions disclosed herein, when describing the connection relationship between the source and the corresponding drain of a MOS transistor, the connection relationship between the drain and the corresponding source of the MOS transistor can be replaced with the connection relationship between the drain and the corresponding source of the MOS transistor. Further description of this common technical knowledge known to those skilled in the art will not be provided here. Such source and drain connection relationships, provided they do not change the substantive functionality of the circuit, are merely variations in the description of the technical solutions disclosed in this specification.

[0036] The ultrasonic fingerprint detection circuit 201a receives at least four independent timing control signals to control at least five MOS transistors to implement different operating stages of the ultrasonic fingerprint detection circuit. Each ultrasonic fingerprint detection circuit 201a receives at least four independent timing control signals, which can be: a first drive signal OD_1, a second drive signal OD_2, a bias signal Bias, and a row select signal Row.

[0037] like Figures 3 to 5 As shown, in the embodiment where the ultrasonic fingerprint detection circuit includes five MOS transistors and two capacitors, there are also four timing control signals, namely: a row select signal Row connected to the gate of the second MOS transistor M2 and the gate of the fifth MOS transistor M5, a first drive signal OD_1 and a bias signal Bias connected to the gate of the third MOS transistor M3, and a second drive signal OD_2 connected to the gate of the fourth MOS transistor M4.

[0038] Similarly, the five MOS tubes are as follows Figures 3 to 5 In the illustrated embodiment of the N-type MOS transistor, the drain of the first MOS transistor M1 is connected to a constant voltage DC power supply Vcc. The drain of the second MOS transistor M2 is connected to the source of the first MOS transistor M1, forming a second common point. The second common point is connected to the source / drain of the fifth MOS transistor. The source of the second MOS transistor is connected to the constant current DC power supply I inThe drain / source of the fifth MOS transistor M5 is connected to one end of the second capacitor C2, serving as the output of the ultrasonic fingerprint detection circuit. The other end of the second capacitor C2 can be grounded. The source of the third MOS transistor M3 receives the bias signal Bias, and its drain is connected to the source of the fourth MOS transistor M4, forming a first common point. The first common point is connected to the electrodes of the ultrasonic sensor. The gate of the third MOS transistor M3 receives the first drive signal OD_1. The gate of the fourth MOS transistor M4 receives the second drive signal OD_2, and the drain of the fourth MOS transistor M4 is connected to the gate of the first MOS transistor and one end of the first capacitor C1. The gate of the second MOS transistor M2 and the gate of the fifth MOS transistor M5 receive the row select signal Row. Four timing control signals: the row select signal ROW, the first drive signal OD_1, the bias signal Bias, and the second drive signal OD_2 are connected to the gate of the second MOS transistor M2, the gate of the fifth MOS transistor M5, the gate of the third MOS transistor M3, the source of the third MOS transistor M3, and the gate of the fourth MOS transistor M4, respectively. The connection relationship between the five MOS transistors and the ultrasonic sensor is as follows: the fourth MOS transistor M4 is located between the first MOS transistor M1 and the ultrasonic sensor. The fourth MOS transistor M4 is connected in series with the third MOS transistor M3. The ultrasonic sensor is connected between the third MOS transistor M3 and the fourth MOS transistor M4. The three share a common connection point. Specifically, the drain of the fourth MOS transistor M4 is connected to the gate of the first MOS transistor M1, and the source is connected to the drain of the ultrasonic sensor and the drain of the third MOS transistor M3.

[0039] The five MOS tubes are as follows Figure 6 In the illustrated embodiment of the P-type MOS transistor, the source of the first MOS transistor M1 is connected to a constant voltage DC power supply Vcc. The source of the second MOS transistor M2 is connected to the drain of the first MOS transistor M1, forming a second common point. The second common point is connected to the source / drain of the fifth MOS transistor. The drain of the second MOS transistor is connected to the constant current DC power supply I inThe drain / source of the fifth MOS tube M5 is connected to one end of the second capacitor C2, serving as the output end of the ultrasonic fingerprint detection circuit. The other end of the second capacitor C2 can be grounded. The drain of the third MOS tube M3 receives the bias signal Bias, and the source is connected to the drain of the fourth MOS tube M4 to form a first common point. The first common point is connected to the electrode of the ultrasonic sensor. The gate of the third MOS tube M3 receives the first drive signal OD_1. The gate of the fourth MOS tube M4 receives the second drive signal OD_2, and the source is connected to the gate of the first MOS tube M1 and one end of the first capacitor C1. The gate of the fourth MOS tube M4 receives the second drive signal OD_2. The gate of the second MOS tube M2 and the gate of the fifth MOS tube M5 receive the row selection signal Row. Four timing control signals: the row select signal ROW, the first drive signal OD_1, the bias signal Bias, and the second drive signal OD_2, are connected to the gates of the second MOS transistor M2, the fifth MOS transistor M5, the gate of the third MOS transistor M3, the drain of the third MOS transistor M3, and the gate of the fourth MOS transistor M4, respectively. The gate of the first MOS transistor M1 is connected to the source of the fourth MOS transistor M4, while its drain is connected to the source of the second MOS transistor M2, and its source is connected to a constant-voltage DC power supply Vcc. The drain of the fourth MOS transistor M4 is connected to the ultrasonic sensor and the source of the third MOS transistor M3.

[0040] The voltage value of the constant-voltage DC power supply Vcc can be set and selected based on actual conditions, for example, it can be selected from 6V to 12V. Its function is to ensure that the first MOS transistor M1 always operates in the saturation region, forming the first MOS transistor M1 into a source follower device. In this way, the signal stored on the gate of the first MOS transistor M1 can be transferred from the source of the second MOS transistor M2 to the second capacitor C2 when the second MOS transistor M2 and the fifth MOS transistor M5 are turned on or conductive. That is, the signal stored on the first capacitor C1 is transferred and stored on the second capacitor C2.

[0041] exist Figure 6 The present invention only illustrates embodiments of ultrasonic fingerprint detection circuits using different types of MOS transistors. As previously mentioned, when thin-film transistors are manufactured using a TFT process, the positions of the drain and source of the MOS transistor can be easily interchanged by those skilled in the art. If the interchange of the drain and source of the MOS transistor is achieved, and the substantial functionality achieved by this positional change combined with the timing control signal is consistent with the technical solution disclosed in this embodiment, such modified ultrasonic fingerprint detection circuits should be considered as disclosed in this specification.

[0042] That is to say, in Figures 3 to 6In the illustrated embodiment including five MOS transistors, the first MOS transistor M1 functions as a source follower transistor; the gates of the second MOS transistor M2 and the fifth MOS transistor M5 receive the row select signal ROW; the gate of the third MOS transistor M3 receives the first drive signal OD_1, and the source / drain receive the bias signal Bias (as described above, whether the source or the drain receives the bias signal Bias depends on the type of the third MOS transistor M3); the gate of the fourth MOS transistor M4 receives the second drive signal OD_2; the source and drain of the third and fourth MOS transistors are connected to form a common node, which is electrically connected to an electrode of the ultrasonic sensor. The source and drain of the first MOS transistor M1 and the second MOS transistor M2 are connected to form a second common node, which is connected to the source and drain of the fifth MOS transistor M5.

[0043] Corresponding to, Figures 3 to 5 middle, Figures 7 to 9 The timing control diagram for controlling the ultrasonic fingerprint detection circuit shown in FIG includes at least four timing control signals: a row select signal ROW connected to the gates of the second MOS transistor M2 and the fifth MOS transistor M5; a first drive signal OD_1 and a bias signal Bias connected to the gate and source of the third MOS transistor M3; and a second drive signal OD_2 connected to the gate of the fourth MOS transistor M4.

[0044] The row select signal ROW, a timing control signal connected to the gates of the second MOS transistor M2 and the fifth MOS transistor M5, can control the on / off switching of the second MOS transistor M2 and the fifth MOS transistor M5. Specifically, when the voltage of the row select signal ROW is high, the second MOS transistor M2 and the fifth MOS transistor M5 are turned on. When the voltage of the row select signal ROW is low, the second MOS transistor M2 and the fifth MOS transistor M5 are turned off.

[0045] The fifth MOS tube M5 is used as a switch tube and works in the linear region. The ultrasonic fingerprint detection circuit is made on a silicon substrate. Accordingly, the fifth MOS tube M5 is also made on a silicon substrate. DS The voltage difference between the first and second capacitors C1 and C2 can be amplified to a certain extent by adjusting the capacitance ratio of the first capacitor C1 to the second capacitor C2.

[0046] It should be noted that among these four timing control signals, the first drive signal OD_1, the second drive signal OD_2, and the row select signal ROW all control the gates of the third MOS transistor M3, the fourth MOS transistor M4, the second MOS transistor M2, and the fifth MOS transistor M5, respectively. The high and low potentials of these three signals are the voltage thresholds for turning on and off the MOS transistors, respectively. The specific values ​​of the high and low potentials can be set based on the threshold voltages of the MOS transistors in the ultrasonic fingerprint detection circuit actually manufactured using a TFT process.

[0047] As described above, the ultrasonic fingerprint detection circuit 201a of this embodiment of the present invention includes only two electronic components: a MOS transistor and a capacitor C1, and does not include other electronic components, such as diodes. The following describes the process of implementing fingerprint detection using the ultrasonic fingerprint detection sensor of this embodiment of the present invention.

[0048] The control timing diagram of an ultrasonic pixel unit and its integrated ultrasonic fingerprint detection circuit is used to describe and illustrate a single operating cycle of the ultrasonic pixel unit. In the ultrasonic pixel unit, the ultrasonic sensor receives the ultrasonic fingerprint signal and converts it into an electrical signal, which is then detected by the ultrasonic fingerprint detection circuit. This operating cycle includes an excitation phase, a receiving phase, and a reading phase. During the receiving phase, the first MOS transistor M1 and the first capacitor C1 store the fingerprint peak signal output by the ultrasonic sensor. During this receiving phase, because the fingerprint peak signal voltage ΔV is generally weak and difficult to accurately detect, the potential of the common point (i.e., the potential of the ultrasonic fingerprint signal transmitted by the sensor to the ultrasonic fingerprint detection circuit) is increased by controlling the first drive signal and bias signal connected to the third MOS transistor. This facilitates the temporary storage of the ultrasonic fingerprint signal by the gate of the first MOS transistor using a TFT process. During the reading phase, the second MOS transistor M2 and the fifth MOS transistor M5 are turned on, storing the fingerprint peak signal stored on the gate of the first MOS transistor M1 and the first capacitor C1 on the second capacitor C2. In the reading phase, the row selection signal is used to turn on the second MOS transistor M2 and the fifth MOS transistor M5 to output the fingerprint peak signal stored in the second capacitor C2.

[0049] like Figures 3 to 5 As shown, in an embodiment including five MOS transistors, each ultrasonic fingerprint detection circuit 201a receives four independent timing control signals. Furthermore, to prevent external factors such as the user's finger and the external environment from affecting the gate of the first MOS transistor M1 and the fingerprint signal stored in the capacitor during the reading phase, the fourth MOS transistor M4 can be turned off before the reading phase to isolate the ultrasonic fingerprint detection circuit from external interference.

[0050] Receiving phase correspondence Figure 7In the intervals T2 and T3 shown, after the gate of the first MOS transistor completes receiving the ultrasonic fingerprint signal, the fourth MOS transistor M4 is turned off at the end of the receiving phase (interval T3) to isolate the ultrasonic sensor from the first MOS transistor M1, thereby preventing the noise signal generated by the ultrasonic sensor due to interference from the external environment from being transmitted to the gate and capacitor of the first MOS transistor M1, thereby improving the signal-to-noise ratio of the detected ultrasonic fingerprint signal.

[0051] exist Figure 7 As shown in the control timing diagram, Figures 3 to 5 The ultrasonic fingerprint detection circuit shown also includes a reset phase T5. Figure 7 In the embodiment of the control timing diagram shown, the reset phase follows the read phase. During reset phase T5, the second drive signal OD_2 turns on the fourth MOS transistor, while the first drive signal OD_1 and the bias signal correspondingly turn on the third MOS transistor, resetting the gate of the first MOS transistor, which is electrically connected to the common node, to the desired reset potential.

[0052] correspond Figure 7 The reset phase shown in FIG is followed by a second read phase ( T6 ). During this second read phase, the voltage of the first drive signal OD_1 is less than the voltage of the bias signal Bias. The row select signal ROW is high, turning on the second MOS transistor M2 and the fifth MOS transistor M5 to read the reset signal.

[0053] By resetting, the influence of other factors on the fingerprint signal during the detection process can be filtered out, reducing the background noise. This timing control of the working state of these five MOS tubes allows this ultrasonic fingerprint detection circuit to achieve fingerprint peak signal detection with a high signal-to-noise ratio.

[0054] like Figure 3 and Figure 5 As shown in FIG, several different connection modes of the second electrode of the first capacitor C1 are shown. Figure 3 As shown, the second electrode of the first capacitor C1 can be connected to the row selection signal ROW.

[0055] In addition, if Figure 4 As shown, in another feasible embodiment, the second electrode of the first capacitor C1 can be connected to a timing control signal V2, and the potential of the gate of the first MOS transistor M1 can be directly raised to a preset potential value through the timing control signal V2.

[0056] like Figure 5As shown, the second electrode of the first capacitor C1 can also be grounded. In this embodiment, the first capacitor C1 is grounded, so that the function of the first capacitor C1 becomes pure and single. The first capacitor C1 only holds the fingerprint signal stored in the gate of the first MOS transistor M1, while the function of raising the gate potential of the first MOS transistor M1 is completed by the third MOS transistor M3. Figure 3 and Figure 5 The other end of the first capacitor C1 is connected in a relatively Figure 4 For example, one timing control signal (control signal V2) can be reduced to simplify the circuit structure for generating the timing control signal.

[0057] exist Figures 3 to 5 In the embodiment, the second electrode of the second capacitor C2 can be grounded, so that the ultrasonic fingerprint signal is stored in the second capacitor C2.

[0058] It should be emphasized that the first capacitor C1 and the second capacitor C2 in these embodiments are not parasitic capacitors of the MOS transistor in the ultrasonic fingerprint detection circuit or parasitic capacitors in the structure formed by the entire ultrasonic fingerprint detection circuit using a TFT process. The capacitance of these capacitors has a direct impact on the detection of ultrasonic signals in the ultrasonic fingerprint detection circuit. Whether it is the parasitic capacitance of the MOS transistor or the parasitic capacitance of the structure in the ultrasonic fingerprint detection circuit, when the ultrasonic fingerprint detection circuit is operating normally, the parasitic capacitance value will not be very large. Moreover, as the TFT manufacturing process fluctuates, the parameters of the parasitic capacitance will also change, making the capacitance value of the parasitic capacitance difficult to accurately or precisely control.

[0059] Therefore, in the embodiment of the ultrasonic fingerprint detection circuit described above, the first capacitor C1 and the second capacitor C2 are not parasitic capacitors. The first capacitor C1 and the second capacitor C2 in these embodiments can be manufactured using a TFT process to form a PIP capacitor or a metal plate capacitor. Alternatively, the first capacitor C1 and the second capacitor C2 can be manufactured using a PMOS tube capacitor and an NMOS tube manufactured using a TFT process. If a PMOS tube capacitor and an NMOS tube capacitor are used to manufacture the first capacitor C1 and the second capacitor C2, the body end (Body), source (Source), and drain (Drain) are connected together to form a two-terminal element, equivalent to a capacitor. In this way, the capacitance value of the first capacitor C1 and the second capacitor C2 can be adjusted to a preset capacitance value by changing the area of ​​W multiplied by L of the MOS tube. The voltage ΔV of the fingerprint peak signal can be adjusted by adjusting the capacitance value of the first capacitor C1 and the second capacitor C2.

[0060] For example, when the second electrodes of the first capacitor C1 and the second electrodes of the second capacitor C2 are both grounded, during the reading phase, the ultrasonic fingerprint signal stored on the first capacitor C1 is transferred to the second capacitor C2. By setting the capacitance of the second capacitor C2 to be smaller than that of the first capacitor C1, the voltage ΔV of the fingerprint peak signal can be amplified to a certain extent, thereby improving the accuracy of fingerprint recognition.

[0061] In some embodiments of this specification, the second capacitor C2 can be configured as an adjustable capacitor, for example, a capacitor array. By configuring the second capacitor C2 as an adjustable capacitor, the capacitance value of the second capacitor C2 can be adjusted according to actual process conditions, fingerprint detection circuit parameters, and specific fingerprint recognition requirements, thereby improving the accuracy and flexibility of fingerprint recognition.

[0062] against Figures 3 to 5 In the embodiment of the ultrasonic fingerprint detection circuit shown in , at least five MOS transistors are included: a first MOS transistor, a second MOS transistor, a third MOS transistor, a fourth MOS transistor and a fifth MOS transistor. Figures 3 to 5 Corresponding Figure 7 The timing control signal diagram shown in the figure is supplemented with Figure 8 and Figure 9 Two other timing control signal diagrams are shown.

[0063] like Figure 8 During the excitation phase TX, the ultrasonic fingerprint detection circuit operates on the timing signal to coordinate with the ultrasonic sensor to receive the excitation signal. During this phase, the first drive signal OD_1 and the second drive signal OD_2 respectively control the conduction of the third MOS transistor M3 and the fourth MOS transistor M4. At this point, the common node maintains a stable low potential.

[0064] In the receiving stage of the ultrasonic fingerprint detection circuit ( Figure 8 and Figure 9 In the RX phase), the second drive signal OD_2 is high, and the gate of the first MOS transistor M1 forms an electrical path with the common contact. When the ultrasonic fingerprint detection circuit is receiving, the first drive signal OD_1 and the bias signal Bias are as follows: Figure 8 Specifically, the first driving signal OD_1 has a first pulse signal with a first preset holding time. The first pulse signal has a rising edge and a falling edge. The bias signal Bias has a second pulse signal with a second preset holding time in this receiving phase. The second pulse signal has a rising edge and a falling edge. Figure 8 In the control timing diagram shown, the second preset holding time of the second pulse signal is greater than the first preset holding time of the first pulse signal. In this receiving phase, the third MOS transistor is controlled to operate in a diode-like state. During the first preset holding time, the potential of the common node is raised. Figure 7 The difference is, Figure 7 The rising and falling edges of the second pulse signal in the bias signal need to completely coincide with the rising and falling edges of the first pulse signal in the first drive signal OD_1. Figure 8 In the timing embodiment shown, the second preset holding time of the second pulse signal is greater than the first preset holding time of the first pulse signal, and the rising edge of the second pulse signal is earlier than the rising edge of the first pulse signal, and the falling edge of the second pulse signal is later than the falling edge of the first pulse signal, thereby achieving the peak detection function. This process reduces the requirements for the overlap of the rising or falling edges of the pulse signals between the first drive signal OD_1 and the bias signal. Specifically, in Figure 8 In the timing diagram shown, during the receiving phase, the rising edge of the first pulse signal in the first drive signal OD_1 jumps directly from a low potential to a high potential. Meanwhile, the rising edge of the second pulse signal included in the bias signal Bias rises from a low potential to a high potential, and the rising edge can be relatively slow. After maintaining the second pulse signal for a second predetermined hold time (which is longer than the first predetermined hold time of the first pulse signal in the first drive signal OD_1), the falling edge of the second pulse signal drops from a high potential to a third-state potential. The rising edge of the second pulse signal must precede the rising edge of the first pulse signal, and the falling edge must follow the falling edge of the first pulse signal. This ensures that the entire first pulse signal falls within the second pulse signal interval. The timing of the first drive signal OD_1 and the bias signal Bias controls the third MOS transistor M3 to perform peak detection, fixing the detected signal to the common node. Simultaneously, the second drive signal OD_2 is also at a high level, turning on the fourth MOS transistor. Therefore, the gate potential of the first MOS transistor is also equal to the potential at the common node.

[0065] Figure 8 The receiving stage RX shown in FIG is only an embodiment of the corresponding first driving signal OD_1 and the bias signal Bias, and is not limited to this. In the receiving stage, the first MOS transistor M1 and the first capacitor C1 store the potential of the common node. In the reading stage ( Figure 8 and Figure 9 During the READ phase (the READ phase in the image), the row select signal ROW is controlled to a high level, turning on the second MOS transistor M2 and the fifth MOS transistor M5. This transfers the fingerprint signal stored on the gate of the first MOS transistor M1 and the first capacitor C1 to the second capacitor C2. Simultaneously, the potential at the other end of the first capacitor C1 raises the gate voltage of the first MOS transistor M1, placing the first MOS transistor M1 in a saturation region. During this read phase, the second drive signal OD_2 is low, and the fourth MOS transistor M4 is turned off, isolating the first MOS transistor M1 from the ultrasonic sensor to prevent noise caused by external factors.

[0066] Here Figure 8 The illustrated ultrasonic fingerprint detection circuit also includes a reset phase within its operating cycle. This reset phase follows the read phase. When the second drive signal OD_2 is high, the fourth MOS transistor M4 turns on. At this point, the fingerprint signal on the gate of the first MOS transistor is cleared, meaning the potential on the gate now represents the reset signal.

[0067] Here Figure 8 A working cycle of the ultrasonic fingerprint detection circuit shown in the figure also includes a second reading phase following the reset phase described above. In the second reading phase, the row select signal is turned on, turning on the second MOS transistor M2 and the fifth MOS transistor M5, and reading the reset signal stored on the second capacitor C2 during the reset phase.

[0068] exist Figure 8 The control timing diagram shown is relative to Figure 7 For the timing control embodiment shown, Figure 8 The timing control diagram shown does not require that the rising and falling edges of the first and second pulse signals in the bias signal Bias and the first drive signal OD_1 completely coincide with each other during the receiving phase. Instead, the rising edge of the second pulse signal is controlled to occur earlier than the rising edge of the first pulse signal, and its falling edge is controlled to occur later than the falling edge of the first pulse signal. This greatly reduces the accuracy requirements of the timing control signal, making the timing control simple and flexible.

[0069] To achieve the same or equivalent purpose as above, Figure 9 The timing control diagram shown is the same as Figure 8 The difference is that the two timing control signals for the third MOS tube: the first drive signal OD_1 and the bias signal Bias and Figure 8 The first driving signal OD_1 and the bias signal Bias for the third MOS transistor shown in FIG are slightly different. Figure 9 The first driving signal OD_1 and the bias signal Bias are shown in the receiving phase RX, and the bias signal Bias does not set the second pulse signal in the receiving phase RX.

[0070] Specifically, see Figure 9During the receiving phase RX, the first drive signal OD_1 is provided with a first pulse signal having a first predetermined duration. The first pulse signal has a rising edge and a falling edge. The bias signal Bias is a stable predetermined potential, and the third MOS transistor M3 operates in the MOS transistor state. In this embodiment, the predetermined potential is lower than the high potential of the first pulse signal. Thus, when the first drive signal OD_1 generates a first pulse signal, the third MOS transistor M3 turns on, raising the gate potential of the first MOS transistor M1 (at this time, the fourth MOS transistor M4 is in the on state). During the receiving phase, the level of the first drive signal OD_1 outside of the first pulse is lower than the potential of the bias signal Bias, and the third MOS transistor M3 is turned off.

[0071] Likewise, Figure 9 In the receiving stage shown, the bias signal Bias is a stable preset value potential and does not have Figure 8 The second pulse signal is shown in . Figure 9 The timing control diagram shown is relative to Figure 8 The control signal of the timing control diagram shown is simpler and has lower requirements on the accuracy of the timing control signal.

[0072] As described above Figures 7 to 9 In the control timing diagram, a working cycle of the ultrasonic fingerprint detection circuit may also include a reset phase and a second reading phase. Here, the position of the reset phase and the second reading phase relative to the receiving phase and the reading phase described above can be changed during a working cycle, and is not limited to the embodiments illustrated here. The main purpose of adding the reset phase and the second reading phase during a working cycle, or several working cycles, is to obtain the background noise of the ultrasonic fingerprint detection circuit itself during operation and / or the noise introduced by external interference factors, thereby improving the signal-to-noise ratio of the ultrasonic fingerprint signal ultimately detected by the ultrasonic fingerprint detection sensor. Therefore, further examples and descriptions of the implementation of the reset phase and the second reading phase are not provided here. Other conventional adjustments and modifications to the reset phase and / or the second reading phase made by those skilled in the art should be considered as disclosed by the embodiments described herein.

[0073] As mentioned above, combined Figures 7 to 9 As shown in the control timing, the fourth MOS transistor M4 can isolate the first MOS transistor M1 from the ultrasonic sensor at the end of the receiving phase and the reading phase to avoid the influence of external factors. The fingerprint signal reception or reading process is not affected by external noise factors such as the finger or the outside world, thereby improving the signal-to-noise ratio of the detected fingerprint signal.

[0074] An embodiment of the present invention also provides an ultrasonic fingerprint detection module comprising the aforementioned silicon-based ultrasonic fingerprint detection sensor and a dedicated integrated circuit chip. The dedicated integrated circuit chip communicates with the silicon-based ultrasonic fingerprint detection sensor and generates four timing control signals for the silicon-based ultrasonic fingerprint detection sensor. When the ultrasonic fingerprint detection module is used in a corresponding electronic device, the dedicated integrated circuit chip in the ultrasonic fingerprint detection module communicates with the electronic device's core processing chip. The dedicated integrated circuit chip receives signals from the core processing chip and controls the silicon-based ultrasonic fingerprint detection sensor to detect and identify fingerprints on the screen.

[0075] In summary, the silicon-based ultrasonic fingerprint detection sensor of the embodiment of the present invention includes at least five MOS transistors and two capacitors in the ultrasonic fingerprint detection circuit 201a. In one specific embodiment, if the first capacitor and the second capacitor are also made of MOS transistors, the ultrasonic fingerprint detection circuit includes seven MOS transistors. This ultrasonic fingerprint detection circuit, combined with the corresponding control timing, the corresponding ultrasonic sensor and the dedicated integrated circuit chip, can generate ultrasonic signals and detect the ultrasonic fingerprint signal transmitted back through the finger on the screen. This silicon-based ultrasonic fingerprint detection sensor is manufactured using TFT technology, which can produce large-array silicon-based ultrasonic fingerprint detection sensors at a lower production cost.

[0076] It should be noted that, in the description of the present invention, the terms "first," "second," etc., are used solely for descriptive purposes and to distinguish similar objects. There is no order of precedence between the two, nor should they be construed as indicating or implying relative importance. Furthermore, in the description of the present invention, unless otherwise specified, "plurality" means two or more.

[0077] Any numerical value cited herein includes all values ​​of the lower and upper values ​​in increments of one unit from the lower limit to the upper limit, provided that there is an interval of at least two units between any lower value and any higher value. For example, if the value of the quantity of a component or process variable, such as voltage, is stated to be from 0 to 17, preferably from 0 to 15, the purpose is to illustrate that values ​​such as 0 to 14, 0.1 to 13, 1 to 12, etc. are not explicitly listed in this specification. For values ​​less than 1, one unit is appropriately considered to be 0.0001, 0.001, 0.01, 0.1. These are merely examples intended to be clearly expressed, and it can be considered that all possible combinations of numerical values ​​listed between the minimum and maximum values ​​are clearly set forth in this specification in a similar manner.

[0078] Unless otherwise indicated, all ranges include the endpoints and all numbers between the endpoints. When used with a range, "about" or "approximately" applies to both endpoints of the range. Thus, "about 20 to 30" is intended to cover "about 20 to about 30," including at least the specified endpoints.

[0079] The above descriptions are only several embodiments of the present invention. Those skilled in the art may make various changes or modifications to the embodiments of the present invention based on the contents disclosed in the specification documents without departing from the spirit and scope of the present invention.

[0080] It should be understood that the above description is intended to be illustrative and not limiting. Numerous embodiments and applications beyond the examples provided will be readily apparent to those skilled in the art upon reading the above description. Therefore, the scope of this specification should not be determined with reference to the above description, but rather with reference to the preceding claims, along with the full scope of equivalents to which such claims are entitled.

[0081] The above description is merely a preferred embodiment of this specification and is not intended to limit this specification. Those skilled in the art will readily appreciate that various modifications and variations to the embodiments of this specification are possible. Any modifications, equivalent substitutions, or improvements made within the spirit and principles of this specification shall be within the scope of protection of this specification.

Claims

1. A silicon-based ultrasonic fingerprint detection sensor, characterized in that: include: Silicon substrate; An ultrasonic pixel array, disposed on the silicon substrate, includes a plurality of ultrasonic pixel units; each ultrasonic pixel unit includes an ultrasonic sensor and an ultrasonic fingerprint detection circuit, the ultrasonic fingerprint detection circuit includes two capacitors and at least five MOS transistors: a first capacitor, a second capacitor, a first MOS transistor, a second MOS transistor, a third MOS transistor, a fourth MOS transistor, and a fifth MOS transistor; the ultrasonic fingerprint detection circuit receives at least four corresponding timing control signals: a first drive signal, a bias signal, a second drive signal, and a row select signal, the four timing control signals being independent of each other; The first MOS transistor functions as a source follower transistor, the gate of the first MOS transistor being connected to one end of the first capacitor; the gate of the fourth MOS transistor receiving the second drive signal; the gate of the third MOS transistor receiving the first drive signal; and the source / drain of the third MOS transistor receiving the bias signal; the source and drain of the third and fourth MOS transistors being connected to form a first common point, which is connected to an electrode corresponding to the ultrasonic sensor; the gate of the second MOS transistor and the gate of the fifth MOS transistor receiving the row select signal; the source and drain of the first and second MOS transistors being connected to form a second common point, which is connected to the source / drain of the fifth MOS transistor; and the drain / source of the fifth MOS transistor being connected to one end of the second capacitor; During a receiving phase of the ultrasonic fingerprint detection circuit, at least the second drive signal is used to turn on the fourth MOS transistor, so that the gate of the first MOS transistor forms an electrical path with the first common contact. During a period in which the first common contact and the gate of the first MOS transistor form an electrical path, the first drive signal and the bias signal are used to control the turn-on of the third MOS transistor, thereby raising the potential of the first common contact. In the reading phase after the receiving phase, the row select signal is used to turn on the second MOS transistor and the fifth MOS transistor, transfer the ultrasonic fingerprint signal stored on the first capacitor to the second capacitor, and output the ultrasonic fingerprint signal stored on the second capacitor.

2. The silicon-based ultrasonic fingerprint detection sensor according to claim 1, characterized in that: The capacitance value of the first capacitor is greater than the capacitance value of the second capacitor.

3. The silicon-based ultrasonic fingerprint detection sensor according to claim 1, characterized in that: The second capacitor is an adjustable capacitor.

4. The silicon-based ultrasonic fingerprint detection sensor according to claim 1, characterized in that: A working cycle of the ultrasonic pixel unit also includes an excitation phase, wherein the ultrasonic sensor receives an excitation signal, and the ultrasonic fingerprint detection circuit uses the first drive signal and the bias signal to control the third MOS transistor to provide a steady-state DC potential for the first common point.

5. The silicon-based ultrasonic fingerprint detection sensor according to claim 1, characterized in that: During the reading phase, the second driving signal controls the fourth MOS transistor to be turned off.

6. The silicon-based ultrasonic fingerprint detection sensor according to claim 1, characterized in that: During the receiving phase, the method further includes utilizing the second driving signal to control the fourth MOS transistor to be turned off, thereby blocking the electrical path between the first common point and the gate of the first MOS transistor.

7. The silicon-based ultrasonic fingerprint detection sensor according to claim 6, characterized in that: In the receiving phase, the first driving signal is a first pulse signal with a first preset maintenance time, and the first pulse signal has a rising edge and a falling edge; The bias signal is a second pulse signal with a second preset holding time. The second pulse signal has a rising edge and a falling edge. The bias signal has three-state potentials in the receiving phase: a low potential, a high potential, and a third-state potential.

8. The silicon-based ultrasonic fingerprint detection sensor according to claim 7, characterized in that: The first preset holding time is equal to the second preset holding time, and rising edges and falling edges of the first pulse signal and the second pulse signal coincide with each other.

9. The silicon-based ultrasonic fingerprint detection sensor according to claim 7, characterized in that: The second preset holding time is greater than the first preset holding time; the rising edge of the second pulse signal is earlier than the rising edge of the first pulse signal, and the falling edge of the second pulse signal is later than the falling edge of the first pulse signal.

10. The silicon-based ultrasonic fingerprint detection sensor according to claim 6, characterized in that: In the receiving phase, the bias signal is a stable preset potential, the first driving signal includes a first pulse signal, and the first pulse signal has a rising edge and a falling edge.

11. The silicon-based ultrasonic fingerprint detection sensor according to claim 1, characterized in that: The ultrasonic fingerprint detection circuit further includes a reset phase. In the reset phase, the gate of the first MOS transistor is reset to a desired reset potential using the drive signal and the bias signal.

12. The silicon-based ultrasonic fingerprint detection sensor according to claim 11, characterized in that: In the reset phase, the second driving signal is used to control the fourth MOS transistor to be turned on, so that the first common contact and the gate of the first MOS transistor form an electrical path.

13. The silicon-based ultrasonic fingerprint detection sensor according to claim 11, characterized in that: The ultrasonic fingerprint detection circuit also includes a second reading phase, in which the second MOS transistor and the fifth MOS transistor are controlled to be turned on using a row select signal. After the fifth MOS transistor is turned on, the reset signal stored on the first capacitor is transferred to the second capacitor, and the reset signal stored on the second capacitor during the reset phase is read.

14. The silicon-based ultrasonic fingerprint detection sensor according to claim 1, characterized in that: The first capacitor is one of a PIP capacitor, a metal plate capacitor, a PMOS transistor capacitor and an NMOS transistor capacitor; the second capacitor is one of a PIP capacitor, a metal plate capacitor, a PMOS transistor capacitor and an NMOS transistor capacitor.

15. A silicon-based ultrasonic fingerprint detection module, characterized in that: include: The silicon-based ultrasonic fingerprint detection sensor according to claim 1; The integrated circuit dedicated chip is electrically connected to the silicon-based ultrasonic fingerprint detection sensor and is used to generate four timing control signals to the silicon-based ultrasonic fingerprint detection sensor.

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