Image sensors, sensor architectures, camera modules and electronic devices

Abstract

This application discloses an image sensor, sensor architecture, camera module, and electronic device, belonging to the field of image processing. It includes: a pixel array, a high dynamic range logic module, and a dual-gain signal buffer and driving module; the pixel array includes N rows of pixel units and M columns of pixel units, with N pixel units in the same column connected to the dual-gain signal buffer and driving module via a first connection line, and the N pixel units in the same column connected to the high dynamic range logic module via a second connection line; wherein, the high dynamic range logic module is used to generate a conversion gain selection table based on the image data output by the pixel array, the conversion gain selection table including a dual-gain mode selection signal corresponding to each pixel unit; the dual-gain signal buffer and driving module is used to read the dual-gain mode selection signal corresponding to each pixel unit row by row from the conversion gain selection table, and send the dual-gain mode selection signal to the corresponding pixel unit.

Description

Technical Field

[0001] This application belongs to the field of image processing, specifically relating to an image sensor, sensor architecture, camera module, and electronic device. Background Technology

[0002] In image sensors (Complementary Metal-Oxide Semiconductor, CMOS), the dynamic range of an image is generally adjusted by changing the pixel exposure time of all pixels and making overall adjustments to the pixel signal gain.

[0003] In related technologies, for exposure in Dual Conversion Gain (DCG-HDR) mode, the image sensor often needs to first expose in High Conversion Gain (HCG) mode, and then read the image before exposing in Low Conversion Gain (LCG) mode. This method may result in some pixels being locally overexposed or some pixels being underexposed in the generated image. Summary of the Invention

[0004] The purpose of this application is to provide an image sensor, sensor architecture, camera module, and electronic device that can solve the problem of some pixels being locally overexposed or some pixels being underexposed in the generated image.

[0005] In a first aspect, embodiments of this application provide an image sensor, including: a pixel array, a high dynamic range logic module, and a dual-gain signal buffer and driving module;

[0006] The pixel array includes N rows of pixel units and M columns of pixel units. N pixel units in the same column are connected to the dual-gain signal buffer and driving module through a first connection line, and N pixel units in the same column are connected to the high dynamic range logic module through a second connection line.

[0007] The high dynamic range logic module is used to generate a conversion gain selection table based on the image data output by the pixel array. The conversion gain selection table includes a dual gain mode selection signal corresponding to each pixel unit.

[0008] The dual-gain signal buffer and drive module is used to read the dual-gain mode selection signal corresponding to each pixel unit from the conversion gain selection table row by row, and send the dual-gain mode selection signal to the corresponding pixel unit.

[0009] Secondly, embodiments of this application provide a sensor architecture, including: a pixel layer and a circuit layer;

[0010] The pixel layer includes: a first bonding region and a pixel array, wherein the pixel array is communicatively connected to the first bonding region;

[0011] The circuit layer includes: a second bonding region, a high dynamic range logic module, and a dual-gain signal buffer and driving module. The second bonding region is communicatively connected to the high dynamic range logic module and the dual-gain signal buffer and driving module, respectively. The first bonding region is bonded to the second bonding region.

[0012] Thirdly, embodiments of this application provide a camera module, including the image processor as described in the first aspect.

[0013] Fourthly, embodiments of this application provide an electronic device including a camera module as described in the third aspect.

[0014] In this embodiment, the high dynamic range logic module can effectively determine the corresponding dual-gain mode selection signal for each pixel unit based on the pixel signal output by each pixel unit, generating a conversion gain selection table. Furthermore, the dual-gain signal buffer and driving module reads the corresponding dual-gain mode selection signal for each pixel unit row by row from the conversion gain selection table, thereby achieving pixel-level gain adjustment. This avoids the problem of localized overexposure or underexposure of some pixels due to two exposures, allowing each pixel in the array to automatically select and operate in dual-gain mode according to logic within each frame, thus achieving DCG-HDR functionality based on the scene or environment. The solution in this application does not require changing the traditional pixel structure or the traditional image processor's reading and signal processing methods; accurate control of the gain mode selection for each pixel can be achieved using a column-parallel control method. Attached Figure Description

[0015] Figure 1 This is one of the schematic diagrams of the image sensor structure provided in the embodiments of this application;

[0016] Figure 2 This is a second schematic diagram of the image sensor structure provided in the embodiments of this application;

[0017] Figure 3 This is a schematic diagram of the sensor architecture provided in an embodiment of this application. Detailed Implementation

[0018] The technical solutions of the embodiments of this application will be clearly described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this application. All other embodiments obtained by those skilled in the art based on the embodiments of this application are within the scope of protection of this application.

[0019] The terms "first," "second," etc., used in the specification and claims of this application are used to distinguish similar objects and not to describe a specific order or sequence. It should be understood that such use of data can be interchanged where appropriate so that embodiments of this application can be implemented in orders other than those illustrated or described herein, and the objects distinguished by "first," "second," etc., are generally of the same class and the number of objects is not limited; for example, a first object can be one or more. Furthermore, in the specification and claims, "and / or" indicates at least one of the connected objects, and the character " / " generally indicates that the preceding and following objects are in an "or" relationship.

[0020] The image sensor, sensor architecture, camera module, and electronic device provided in this application will be described in detail below with reference to the accompanying drawings and through specific embodiments and application scenarios.

[0021] Figure 1 This is one of the schematic diagrams of the image sensor structure provided in the embodiments of this application, such as... Figure 1 As shown, it includes: a pixel array 11, a high dynamic range logic module 12, and a dual-gain signal buffer and drive module 13;

[0022] The pixel array 11 includes N rows of pixel units 110 and M columns of pixel units 110. N pixel units 110 in the same column are connected to the dual-gain signal buffer and driving module 13 through a first connection line, and N pixel units 110 in the same column are connected to the high dynamic range logic module through a second connection line.

[0023] The high dynamic range logic module 12 is used to generate a conversion gain selection table based on the image data output by the pixel array 11. The conversion gain selection table includes a dual gain mode selection signal corresponding to each pixel unit 110.

[0024] The dual-gain signal buffer and drive module 13 is used to read the dual-gain mode selection signal corresponding to each pixel unit 110 from the conversion gain selection table row by row, and send the dual-gain mode selection signal to the corresponding pixel unit 110.

[0025] Specifically, the pixel array described in the embodiments of this application includes multiple pixel units, which may include N pixel rows in the same row and M pixel columns in the same column, corresponding to NxM pixel units in each pixel array.

[0026] In this embodiment of the application, in order to further save wiring space, N pixel units in the same pixel column are connected to the dual-gain signal buffer and driving module through the same first connection line, and N pixel units in the same pixel column are also connected to the high dynamic range logic module through the same second connection line.

[0027] In this embodiment of the application, the image data output by the pixel array can be the image data output by each pixel unit in the current frame after reset and exposure processing. The image data output by each pixel unit can be different image data. In this embodiment of the application, the high dynamic range logic module can determine the dual gain mode selection signal corresponding to each pixel unit in the next frame based on the image data of the current frame.

[0028] In an optional embodiment, the high dynamic range logic module is used to determine the corresponding dual gain mode selection signal based on the image data output by each pixel unit, and then generate a conversion gain selection table based on the dual gain mode selection signal corresponding to each pixel unit.

[0029] In this embodiment, the conversion gain selection table records the dual gain mode selection signal corresponding to each pixel unit. Optionally, the dual gain mode selection signals in the conversion gain selection table can be sorted according to the arrangement of the pixel array.

[0030] The image sensor described in this application embodiment can perform image processing using a rolling shutter, exposing pixel by pixel.

[0031] The dual-gain signal buffer and driver module can read the dual-gain mode selection signal corresponding to each pixel unit row by row according to the pixel row arrangement of the pixel array. The dual-gain signal buffer and driver module can buffer the dual-gain mode selection signal of only one pixel row at a time.

[0032] For example, it could include a row buffer that reads and buffers one row of dual-gain mode selection signals from the conversion gain selection table in the high dynamic range logic module. During rolling shutter exposure, when a row of pixels in the pixel array enters the readout period and requires HCG or LCG readout mode selection, the row buffer in the column-parallel DCG mode signal buffer and drive module pushes the buffered conversion gain selection signal as a DCG signal. After being driven by the corresponding row driver, this signal is transmitted to the pixel array to provide the corresponding row of pixels with HCG or LCG mode readout.

[0033] More specifically, the dual gain mode selection signal corresponding to each pixel unit can be a digital signal or an analog signal. This dual gain mode selection signal will control the pixel unit to output the pixel signal according to the gain mode indicated by the dual gain mode selection signal within the time of the next image frame.

[0034] In this embodiment, the high dynamic range logic module can effectively determine the corresponding dual gain mode selection signal for each pixel unit based on the pixel signal output by each pixel unit, generate a conversion gain selection table, and further read the dual gain mode selection signal corresponding to each pixel unit from the conversion gain selection table row by row through the dual gain signal buffer and driving module, thereby realizing pixel-level gain adjustment, avoiding the problem of local overexposure or underexposure of some pixels caused by two exposures. At the same time, the high dynamic range logic module and the dual gain signal buffer and driving module are both set outside the pixel array, without requiring any modification to the traditional pixel structure.

[0035] Optionally, the high dynamic range logic module includes: a digital comparator;

[0036] The digital comparator is used to compare the pixel signal corresponding to each pixel unit in the image data with a preset threshold signal to obtain the digital comparator output signal corresponding to each pixel unit.

[0037] The conversion gain selection table is generated based on the dual-gain mode selection signal corresponding to the output signal of each of the digital comparators.

[0038] The preset threshold signal described in this application embodiment can be a threshold preset by the user, specifically a fixed preset threshold signal.

[0039] Optionally, different preset threshold signals can be set when comparing different pixel units.

[0040] In an optional embodiment, the image data output by each pixel unit can be converted into a digital signal to obtain the pixel signal corresponding to each pixel unit. The pixel signal can be compared with a threshold signal preset by the user and input to a digital comparator (COMP). For the signal output by each pixel, a comparison result can be obtained, thereby obtaining the corresponding dual gain mode selection signal for each pixel unit.

[0041] More specifically, in the embodiments of this application, the preset threshold signal can be a binary digital signal, such as a 10-bit binary digital signal, and the pixel signal can also be converted into a digital signal after analog-to-digital conversion, so as to be effectively compared with the preset threshold signal.

[0042] In an optional embodiment, when the pixel signal is greater than the preset threshold signal, the digital comparator output signal corresponding to the pixel unit is a high-level output signal, and the dual-gain mode selection signal corresponding to the high-level output signal is a high-gain mode selection signal.

[0043] When the pixel signal is less than or equal to the preset threshold signal, the digital comparator outputs a low-level signal, and the dual-gain mode selection signal corresponding to the low-level output signal is a low-gain mode selection signal.

[0044] Optionally, a high-level output signal can be recorded as "1" in the conversion gain selection table, and a low-level output signal can be recorded as "0". For each pixel's output signal, a comparison result can be obtained, and the result is buffered in the conversion gain selection table according to the pixel's position in the pixel array. It is agreed that a binary digital signal "1" represents enabling the pixel to enter high-gain mode for reading, and a binary digital signal "0" represents enabling the pixel to enter low-gain mode for reading. In specific implementations, it can also be agreed that the reverse is used, but a 1-bit binary signal must be used.

[0045] In an alternative embodiment, if the user does not require the DCG-HDR function, the dual-gain signal buffer and driver module can be forcibly disabled and their operation can be stopped.

[0046] In this embodiment, a digital comparator can effectively analyze the image data output by different pixel units, thereby obtaining a gain mode suitable for each pixel unit and ensuring the quality of the final generated image.

[0047] Optionally, the high dynamic range logic module includes: a software program module;

[0048] The software program module is used to perform pixel-by-pixel analysis on the image data output by the pixel array according to the stored program algorithm, and obtain the dual-gain mode selection signal corresponding to each pixel unit;

[0049] The conversion gain selection table is generated based on the dual-gain mode selection signal corresponding to each pixel unit.

[0050] In an optional embodiment, the program algorithm may specifically be an algorithm that analyzes the image data of each pixel unit and determines the gain mode of each pixel. Specifically, the algorithm may be an algorithm that, after inputting the image data of each pixel unit, can output the corresponding dual gain mode selection signal.

[0051] In an optional embodiment, it may be an algorithm that simulates a comparator through a program algorithm, thereby performing pixel-by-pixel analysis on the image data output by the pixel array to obtain the dual-gain mode selection signal corresponding to each pixel unit. This algorithm may also be other algorithms that can achieve the corresponding function.

[0052] In an optional embodiment, after obtaining the dual-gain mode selection signal corresponding to each pixel unit, the dual-gain mode selection signal can be further stored in the corresponding position according to the arrangement of the pixel array and the row and column distribution of the pixel units to obtain the final conversion gain selection table.

[0053] In an optional embodiment, the stored program algorithm may be stored inside the image sensor or integrated outside the image sensor.

[0054] When the algorithm is integrated outside the image sensor, it can be stored in a separate image signal processor outside the image sensor.

[0055] In the embodiments of this application, the program algorithm integrated by the software program module can perform pixel unit analysis one by one in software, which can effectively reduce the number of transistors in the image sensor and save costs while ensuring image quality.

[0056] Optionally, the sensor further includes an interface module, which is communicatively connected to the dual-gain signal buffer and driving module and the pixel array, respectively.

[0057] The interface module is used to receive the dual-gain mode selection signal corresponding to each pixel unit transmitted by the software program module.

[0058] In an alternative embodiment, the interface module may specifically be an interface for data transmission with a separate image signal processor.

[0059] Figure 2 This is a second schematic diagram of the image sensor structure provided in the embodiments of this application, as shown below. Figure 2 As shown, it includes: a pixel array 11, an independent image signal processor 22, a dual-gain signal buffer and drive module 13, and an interface module 23.

[0060] In this embodiment, the interface module is communicatively connected to the dual-gain signal buffer and driver module and the pixel array, respectively. The interface module can transmit the image data of each pixel unit in the pixel array to an independent image signal processor, so that the independent image signal processor can analyze the gain mode corresponding to each pixel unit according to the image data and obtain a conversion gain selection table.

[0061] The interface module can also receive dual-gain mode selection signals for each column of pixels from an independent image signal processor.

[0062] In this embodiment, the interface module can effectively send image data to an independent image signal processor for gain mode analysis and receive the dual gain mode selection signal corresponding to each pixel unit sent back by the independent image signal processor, which can effectively ensure image quality while effectively reducing the number of transistors.

[0063] Optionally, the pixel array further includes a signal reading module, wherein N pixel units in the same column are connected to the signal reading module via the second connection line;

[0064] The signal reading module is used to convert the image data output by each pixel unit into analog and digital data and then transmit it to the high dynamic range logic module.

[0065] Optionally, the pixel array further includes a row driver, wherein the M pixel units in the same row are connected to the row driver via a third connection line;

[0066] The row driver is used to control the exposure and reset of each pixel unit. That is, in each frame, the driver controls each pixel unit to reset the pixel. After the pixel is exposed, the image data of each pixel unit is generated.

[0067] In an optional embodiment, during each frame time, after each pixel unit has completed its reset and exposure, a reading phase is entered, at which time the signal reading module reads the image data generated by each pixel unit.

[0068] After the signal reading module reads the image data, the image data is often an analog signal, which is not convenient for direct processing. Therefore, it can be converted from analog to digital to a digital signal before being transmitted to the high dynamic range logic module.

[0069] In this embodiment of the application, by performing analog-to-digital conversion on the image data output by each pixel unit, it is possible to effectively ensure that the image data can be effectively analyzed subsequently.

[0070] Figure 3 This is a schematic diagram of the sensor architecture provided in the embodiments of this application, such as... Figure 3 As shown, it includes: pixel layer 31 and circuit layer 32;

[0071] The pixel layer 31 includes: a first bonding region 311 and a pixel array 11, wherein the pixel array 11 is communicatively connected to the first bonding region 311;

[0072] The circuit layer 32 includes: a second bonding region 321, a high dynamic range logic module 12, and a dual-gain signal buffer and driving module 13. The second bonding region 321 is communicatively connected to the high dynamic range logic module 12 and the dual-gain signal buffer and driving module 13, respectively. The first bonding region 311 is bonded to the second bonding region 321.

[0073] Specifically, in the embodiments of this application, the pixel layer and the circuit layer can be composed of silicon wafer layers. The pixel layer is specifically a pixel silicon wafer layer, and all pixel units are disposed on the pixel layer. The pixel layer can be manufactured using front-side illumination (FSI) or back-side illumination (BSI) processes.

[0074] In this embodiment, the pixel layer is arranged with an effective pixel array, and a first bonding area can be set around the pixel array for signal routing, thereby realizing the connection between the pixel layer and the circuit layer.

[0075] The pixel layer silicon wafer only houses the pixel array, and all input and output signals for the pixels are provided by the underlying circuit layer silicon wafer. The signal connection between the two layers uses methods such as TSV (Trans-Silicon Via) or Cu-Cu Hybrid Bonding.

[0076] High dynamic range logic modules, dual-gain signal buffer and driver modules, and interface modules can all be set in the circuit layer.

[0077] In an optional embodiment, when the high dynamic range logic module is a software program module, the corresponding circuit layer will not have a high dynamic range logic module.

[0078] External HDR logic software can connect to the image sensor's I / O pins and the parallel DCG mode signal buffer and driver module under the coordination of the port module.

[0079] In an optional embodiment, the program algorithm stored in the software program module can be integrated into the image signal processing module in the signal reading module.

[0080] In this embodiment, the high dynamic range logic module can effectively determine the corresponding dual-gain mode selection signal for each pixel unit based on the pixel signal output by each pixel unit, generating a conversion gain selection table. Furthermore, the dual-gain signal buffer and driving module reads the corresponding dual-gain mode selection signal for each pixel unit row by row from the conversion gain selection table, thereby achieving pixel-level gain adjustment. This avoids the problem of localized overexposure or underexposure of some pixels due to two exposures, allowing each pixel in the array to automatically select and operate in dual-gain mode according to logic within each frame, thus achieving DCG-HDR functionality based on the scene or environment. The solution in this application does not require changing the traditional pixel structure or the traditional image processor reading and signal processing methods, and uses a column-parallel control method to achieve DCG mode selection for each pixel.

[0081] Optionally, embodiments of this application also provide a camera module including the above-mentioned image sensor. This camera module can perform pixel-by-pixel modulation during the implementation of DCG-HDR function, effectively ensuring the imaging effect of the output image.

[0082] Optionally, embodiments of this application also provide an electronic device, which includes the camera module described in the above embodiments. This electronic device can be a terminal or other devices besides a terminal. For example, the electronic device can be a mobile phone, tablet computer, laptop computer, PDA, in-vehicle electronic device, mobile internet device (MID), augmented reality (AR) / virtual reality (VR) device, robot, wearable device, ultra-mobile personal computer (UMPC), netbook, or personal digital assistant (PDA), etc. It can also be a server, network attached storage (NAS), personal computer (PC), television set (TV), ATM, or self-service machine, etc. Embodiments of this application do not impose specific limitations.

[0083] The electronic device in this application embodiment can be a device with an operating system. This operating system can be Android, iOS, or other possible operating systems; this application embodiment does not specifically limit the specific operating system used.

[0084] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element. Furthermore, it should be noted that the scope of the methods and apparatuses in the embodiments of this application is not limited to performing functions in the order shown or discussed, but may also include performing functions substantially simultaneously or in the reverse order, depending on the functions involved. For example, the described methods may be performed in a different order than described, and various steps may be added, omitted, or combined. Additionally, features described with reference to certain examples may be combined in other examples.

[0085] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods of the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, can be embodied in the form of a computer software product. This computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk) and includes several instructions to cause a terminal (which may be a mobile phone, computer, server, or network device, etc.) to execute the methods described in the various embodiments of this application.

[0086] The embodiments of this application have been described above with reference to the accompanying drawings. However, this application is not limited to the specific embodiments described above. The specific embodiments described above are merely illustrative and not restrictive. Those skilled in the art can make many other forms under the guidance of this application without departing from the spirit and scope of the claims, and all of these forms are within the protection scope of this application.

Claims

1. An image sensor, characterized by, The sensor comprises a pixel array, a high dynamic range logic module and a double-gain signal buffer and driving module. The pixel array comprises N rows of pixel units and M columns of pixel units, N pixel units in the same column are connected with the double-gain signal buffer and driving module through a first connecting line, N pixel units in the same column are connected with the high dynamic range logic module through a second connecting line, and M and N are positive integers. The high dynamic range logic module is configured to generate a conversion gain selection table according to image data output by the pixel array, and the conversion gain selection table comprises double-gain mode selection signals corresponding to each pixel unit. The double-gain signal buffer and driving module is configured to read the double-gain mode selection signals corresponding to each pixel unit from the conversion gain selection table row by row, and transmit the double-gain mode selection signals to the corresponding pixel units. The high dynamic range logic module comprises an independent image signal processor. The independent image signal processor is configured to perform pixel-by-pixel analysis on the image data output by the pixel array according to a stored program algorithm, to obtain the double-gain mode selection signals corresponding to each pixel unit. The conversion gain selection table is generated according to the double-gain mode selection signals corresponding to each pixel unit. The pixel array further comprises a signal reading module, and N pixel units in the same column are connected with the signal reading module through the second connecting line. The signal reading module is configured to perform analog-to-digital conversion on the image data output by each pixel unit, and transmit the image data to the high dynamic range logic module through an image signal processor. The high dynamic range logic module comprises a digital comparator.

2. The image sensor of claim 1, wherein, The digital comparator is configured to compare pixel signals corresponding to each pixel unit in the image data with a preset threshold signal, to obtain a digital comparator output signal corresponding to each pixel unit. The conversion gain selection table is generated according to the double-gain mode selection signals corresponding to each digital comparator output signal. The digital comparator is specifically configured to:

3. The image sensor of claim 2, wherein, in a case where the pixel signal is greater than the preset threshold signal, output a high-level output signal as the digital comparator output signal corresponding to the pixel unit, wherein the double-gain mode selection signal corresponding to the high-level output signal is a high-gain mode selection signal; in a case where the pixel signal is less than or equal to the preset threshold signal, output a low-level output signal as the digital comparator output signal corresponding to the pixel unit, wherein the double-gain mode selection signal corresponding to the low-level output signal is a low-gain mode selection signal. The sensor further comprises an interface module, which is in communication connection with the double-gain signal buffer and driving module and the pixel array.

4. The image sensor of claim 1, wherein, The interface module is configured to receive the double-gain mode selection signals corresponding to each pixel unit transmitted by the independent image signal processor. The pixel array further comprises a row driver, and M pixel units in the same row are connected with the row driver through a third connecting line.

5. The image sensor of claim 1, wherein, ​ The row driver is used for controlling exposure and reset of each pixel unit.

6. A sensor architecture based on the image sensor of any of the preceding claims 1-5, characterized in that, Comprise: A pixel layer and a circuit layer; The pixel layer comprises a first bonding area and a pixel array, and the pixel array is in communication connection with the first bonding area; The circuit layer comprises a second bonding area, a high dynamic range logic module and a double-gain signal buffer and driving module, the second bonding area is in communication connection with the high dynamic range logic module and the double-gain signal buffer and driving module respectively, and the first bonding area is in bonding connection with the second bonding area.

7. An image capture module, comprising: Comprise the image sensor as any one of claims 1-5.

8. An electronic device, comprising: Comprise the camera module as claim 7.

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