Display panel

Abstract

The embodiment of the application discloses a display panel, which comprises a substrate, a first semiconductor layer arranged on one side of the substrate, the first semiconductor layer comprising a photosensitive semiconductor arranged in a non-display area, the photosensitive semiconductor comprising a first semiconductor region, a second semiconductor region and a built-in electric field region, the built-in electric field region being arranged between the first semiconductor region and the second semiconductor region, a color film layer arranged on the side, away from the substrate, of the first semiconductor layer, the color film layer comprising a light-shielding portion and a color resistance portion, the light-shielding portion being provided with a first opening corresponding to the photosensitive semiconductor in the non-display area, the color resistance portion comprising a first color resistance structure arranged in the first opening, and the first color resistance structure being arranged in overlap with at least the built-in electric field region. The variation of the transmittance of the color film layer is determined by a target light ray passing through the color resistance portion and the built-in electric field region, the characteristics of the color film layer can be monitored in real time, and the yield of products is improved.

Description

TECHNICAL FIELD

[0001] The present application belongs to the technical field of display, and particularly relates to a display panel. BACKGROUND

[0002] With the continuous development of display technology, OLED (Organic Light-Emitting Diode) display panels are more and more favored by people due to their advantages of full solid state, ultra-thin, no viewing angle limitation, fast response, wide working temperature, easy realization of flexible display and 3D display, etc. Among them, the OLED display panel using the depolarizing sheet technology can reduce light loss and improve light efficiency.

[0003] At present, in the preparation process of the OLED display panel using the depolarizing sheet technology, a plurality of colored photoresist materials need to be used, and different process technologies will affect the optical properties of the colored photoresist materials, such as baking, exposure, development, etc. However, in the preparation process of the colored photoresist material in the prior art, the optical properties thereof cannot be monitored in real time, so that the yield of the product cannot be determined in time. SUMMARY

[0004] The embodiments of the present application provide a display panel, which can monitor the characteristics of a color film layer in real time and improve the yield of a product.

[0005] In a first aspect, the embodiments of the present application provide a display panel, which comprises a display area and a non-display area, and the display panel comprises:

[0006] a substrate;

[0007] a first semiconductor layer disposed on one side of the substrate, the first semiconductor layer comprising a photosensitive semiconductor disposed in the non-display area, the photosensitive semiconductor comprising a first semiconductor region, a second semiconductor region and a built-in electric field region, the built-in electric field region being disposed between the first semiconductor region and the second semiconductor region; and

[0008] a color film layer disposed on a side of the first semiconductor layer away from the substrate, the color film layer comprising a light shielding portion and a color resist portion, the light shielding portion being provided with a first opening corresponding to the photosensitive semiconductor in the non-display area, the color resist portion comprising a first color resist structure disposed in the first opening, the first color resist structure being at least partially overlapped with the built-in electric field region.

[0009] Optionally, in some embodiments, the first semiconductor region comprises a semiconductor material doped with boron ions, and the second semiconductor region comprises a semiconductor material doped with phosphorus ions.

[0010] Optionally, in some embodiments, the first color resist structure comprises a red color resist structure, a green color resist structure, or a blue color resist structure.

[0011] Optionally, in some embodiments, the first color resist structure comprises a laminated structure of at least two color resist structures among a red color resist structure, a green color resist structure, and a blue color resist structure.

[0012] Optionally, in some embodiments, the display panel further comprises a thin film transistor disposed in the display area, the thin film transistor comprising a second semiconductor layer, the second semiconductor layer being disposed in the same layer as the first semiconductor layer.

[0013] Optionally, in some embodiments, the display panel further comprises a light emitting device layer disposed in the display area, the light emitting device layer being disposed between the color filter layer and the thin film transistor, the light shielding portion being provided with a second opening corresponding to the light emitting device layer in the display area, the color resist portion comprising a second color resist structure disposed in the second opening, the size of the second opening being greater than the size of the first opening.

[0014] Optionally, in some embodiments, the display panel further comprises a barrier layer disposed on the substrate, the first semiconductor layer and the second semiconductor layer being disposed on the barrier layer.

[0015] The display panel further comprises an insulating layer disposed on the barrier layer and covering the first semiconductor layer and the second semiconductor layer.

[0016] The display panel further comprises a metal layer disposed on the insulating layer and an interlayer insulating layer disposed on the insulating layer and covering the metal layer.

[0017] Optionally, in some embodiments, the metal layer comprises a first metal region and a second metal region disposed in the non-display area, the insulating layer is provided with a first via hole and a second via hole in the non-display area, the first semiconductor layer is provided with a first overlap region on a side of the first semiconductor region away from the second semiconductor region and a second overlap region on a side of the second semiconductor region away from the first semiconductor region, the first metal region is connected to the first overlap region through a metal trace disposed in the first via hole, and the second metal region is connected to the second overlap region through a metal trace disposed in the second via hole.

[0018] Optionally, in some embodiments, the metal layer includes a third metal region and a fourth metal region disposed in the display region, the insulating layer is provided with a third via hole and a fourth via hole in the display region, the second semiconductor layer includes an active layer and a third overlap region and a fourth overlap region disposed on both sides of the active layer, the third metal region is connected with the third overlap region through a metal trace disposed in the third via hole, and the fourth metal region is connected with the fourth overlap region through a metal trace disposed in the fourth via hole.

[0019] Optionally, in some embodiments, the thin film transistor further includes a gate insulating layer and a gate layer, the gate insulating layer is disposed on the active layer, and the gate layer is disposed on the gate insulating layer, wherein a projection area of the gate layer on the substrate is the same as a projection area of the active layer on the substrate.

[0020] The display panel provided by the embodiment of the present application comprises a substrate, a first semiconductor layer disposed on one side of the substrate, the first semiconductor layer comprising a photosensitive semiconductor disposed in a non-display region, the photosensitive semiconductor comprising a first semiconductor region, a second semiconductor region and a built-in electric field region, the built-in electric field region being disposed between the first semiconductor region and the second semiconductor region, and a color film layer disposed on a side of the first semiconductor layer away from the substrate, the color film layer comprising a light shielding portion and a color resistance portion, the light shielding portion being provided with a first opening corresponding to the photosensitive semiconductor in the non-display region, and the color resistance portion comprising a first color resistance structure disposed in the first opening, the first color resistance structure at least being overlapped with the built-in electric field region. The present application determines the change of the transmittance of the color film layer through a target light ray passing through the color resistance portion and the built-in electric field region, can monitor the characteristics of the color film layer in real time, and improves the yield of products. BRIEF DESCRIPTION OF DRAWINGS

[0021] The technical scheme and the beneficial effects of the present application will become apparent through the following detailed description of the specific embodiments of the present application in combination with the accompanying drawings.

[0022] Figure 1 FIG. 1 is a first structural schematic diagram of a display panel provided by an embodiment of the present application.

[0023] Figure 2 FIG. 2 is a second structural schematic diagram of a display panel provided by an embodiment of the present application.

[0024] Figure 3 FIG. 3 is a flow schematic diagram of a preparation method of a display panel provided by an embodiment of the present application. DETAILED DESCRIPTION

[0025] With reference to the accompanying drawings, the technical solutions in the embodiments of the present application will be clearly and completely described below. Obviously, the described embodiments are only a part of the embodiments of the present application, but not all the embodiments of the present application. Based on the embodiments in the present application, all the other embodiments obtained by those skilled in the art without creative work fall within the scope of the present application.

[0026] Unless otherwise defined, technical terms or scientific terms used in the present disclosure shall have the ordinary meaning understood by one of ordinary skill in the art to which the present application pertains. The terms "first", "second", and similar terms used in the present disclosure do not denote any order, quantity, or importance, but are used to distinguish different components. Similarly, the terms "one", "a", or "the" or similar terms do not denote a quantity of any number, but mean the existence of at least one. The terms "include", "comprise", or "contain" or similar terms mean that the elements or objects before the terms encompass the elements or objects listed after the terms and their equivalents, and do not exclude other elements or objects. The terms "connect" or "connected" or similar terms do not mean physical or mechanical connection, but can include electrical connection, whether direct or indirect. The terms "upper", "lower", "left", "right", and the like are used only to represent relative positional relationships, and when the absolute positions of the described objects are changed, the relative positional relationships can also be changed accordingly.

[0027] At present, in the preparation process of the OLED display panel adopting the depolarizing sheet technology, a plurality of color resist (referred to as "color resist") materials need to be used, and different process technologies will affect the optical properties of the color resist materials, such as baking, exposure, development, and the like. However, in the prior art, the optical properties of the color resist materials cannot be monitored in real time in the preparation process of the color resist materials, so that the yield of the product cannot be determined in time.

[0028] To solve the problems in the prior art, the present application provides a display panel. Please refer to Figure 1 , Figure 1 is a first structural schematic diagram of the display panel provided by the present application. The display panel 100 can be an OLED display panel adopting the depolarizing sheet technology. The display panel 100 can include a display area 30 and a non-display area 40. Specifically, the display panel 100 can include a plurality of display areas 30 and a plurality of non-display areas 40. The display area 30 and the non-display area 40 can be arranged adjacently, and any display area 30 can be arranged between two adjacent non-display areas 40. The display panel 100 can include a substrate 130, a first semiconductor layer 110, and a color film layer 120.

[0029] The substrate 130 can be a rigid substrate, such as a glass substrate, and can also be a flexible substrate. The flexible substrate 130 also needs to have a certain structural strength, so that the substrate 130 can support and resist impact on other structures of the display panel 100.

[0030] The first semiconductor layer 110 can be disposed on the side of the substrate 130, and the first semiconductor layer 110 can include a photosensitive semiconductor disposed in the non-display area 40. The photosensitive semiconductor can include a built-in electric field region 111, a first semiconductor region 112, and a second semiconductor region 113, wherein the built-in electric field region 111 is disposed between the first semiconductor region 112 and the second semiconductor region 113.

[0031] The first semiconductor layer 110 can be made of silicon or a silicon-containing compound material. It should be noted that the first semiconductor region 112 can include a semiconductor material doped with boron ions, such as silicon doped with boron ions, and the second semiconductor region 113 can include a semiconductor material doped with phosphorus ions, such as silicon doped with phosphorus ions. Specifically, boron ions are implanted into the first semiconductor region 112 by ion implantation technology, so that the first semiconductor region 112 forms a P-type semiconductor; phosphorus ions are implanted into the second semiconductor region 113 by ion implantation technology, so that the second semiconductor region 113 forms an N-type semiconductor. Of course, phosphorus ions can also be implanted into the first semiconductor region 112 to form an N-type semiconductor, and boron ions can be implanted into the second semiconductor region 113 to form a P-type semiconductor.

[0032] The color filter layer 120 can be disposed on the side of the first semiconductor layer 110 away from the substrate 130, and the color filter layer 120 can include a light shielding portion 121 and a color resistance portion 122. The light shielding portion 121 is provided with a first opening 51 corresponding to the photosensitive semiconductor in the non-display area 40, and the color resistance portion 122 includes a first color resistance structure 1221 disposed in the first opening 51. The first color resistance structure 1221 at least overlaps the built-in electric field region 111, that is, the projection area of the first color resistance structure 1221 on the substrate 130 at least partially overlaps the projection area of the built-in electric field region 111 on the substrate 130, so as to ensure that the initial light rays parallel or inclined to the normal direction of the first color resistance structure 1221 can at least partially enter the built-in electric field region 111.

[0033] The first color resist structure 1221 can include a red color resist structure, a green color resist structure, or a blue color resist structure, that is, the first color resist structure 1221 can be a single-layer pure color color resist structure, and only light of a pure color corresponding wavelength can be transmitted through the film layer, and light of other colors is blocked by the film layer. Of course, the first color resist structure 1221 can also include a laminated structure composed of at least two of the red color resist structure, the green color resist structure, and the blue color resist structure, and the laminated structure can transmit light of a wavelength corresponding to the color of the first color resist structure 1221, and light of other colors is blocked by the laminated structure.

[0034] Referring to Figure 2 , Figure 2 is a second structure schematic diagram of a display panel provided by the embodiment of the present application. Wherein, the first semiconductor region 112 is a P-type semiconductor, and the second semiconductor region 113 is an N-type semiconductor.

[0035] It should be noted that, since the first semiconductor region 112 is a P-type semiconductor, the first semiconductor region 112 includes a plurality of holes containing positive charges; and since the second semiconductor region 113 is an N-type semiconductor, the second semiconductor region 113 includes a plurality of electrons containing negative charges. Under the action of an external electric field, part of the holes in the first semiconductor region 112 migrate to the second semiconductor region 113, and part of the electrons in the second semiconductor region 113 migrate to the first semiconductor region 112, and part of the holes and part of the electrons form donor ions and acceptor ions without carrier compensation between the first semiconductor region 112 and the second semiconductor region 113, and the region where the donor ions and the acceptor ions are located is a space charge region, that is, the built-in electric field region 111.

[0036] In some embodiments, the initial light can sequentially pass through the first color resist structure 1221 and the built-in electric field region 111 in the first semiconductor layer 110 to form a target light, so as to determine the transmittance of the first color resist structure 1221 through the target light, and determine the transmittance of the color film layer 120. Wherein, the initial light can be ambient light, so that more initial light can be incident into the built-in electric field region 111 after passing through the first color resist structure 1221, the entire first color resist structure 1221 can be located in the built-in electric field region 111 in the orthographic projection region of the first semiconductor layer 110.

[0037] Specifically, the initial light can form a target light by sequentially passing through the first color resistance structure 1221 and the built-in electric field region 111 in the first semiconductor layer 110. When the target light irradiates the position where the built-in electric field region 111 is located, the holes with positive charges in the first semiconductor region 112 and the electrons with negative charges in the second semiconductor region 113 originally belong to the bound valence electrons. After the built-in electric field region 111 is bombarded by the photons in the target light, the bound valence electrons absorb the energy of the photons and are excited, so that a part of the electrons in the first semiconductor region 112 and a part of the holes in the second semiconductor region 113 migrate towards the adjacent positions of the two, thereby forming a plurality of electron-hole pairs in the built-in electric field region 111, that is, the built-in electric field region 111 forms a PN junction between the P-type semiconductor and the N-type semiconductor. Among them, since the PN junction has unidirectional conductivity, the current direction in the built-in electric field region 111 is from the second semiconductor region 113 to the first semiconductor region 112, and the current direction of the built-in electric field region 111 can be determined as the current direction of the forward voltage.

[0038] When the target light irradiates the built-in electric field region 111, the target light generates a photoelectric field in the built-in electric field region 111, and the current direction in the photoelectric field is opposite to the current direction of the built-in electric field region, that is, the current direction in the photoelectric field is from the first semiconductor region 112 to the second semiconductor region 113, and the current direction of the photoelectric field can be determined as the current direction of the reverse voltage. The current in the photoelectric field can be called photocurrent or photo-generated leakage current. Among them, when a reverse voltage is applied to the first semiconductor layer 110, the built-in electric field region 111 greatly increases the reverse saturation leakage current under the action of the reverse voltage, thereby forming a photo-generated leakage current. It can be understood that the photo-generated leakage current changes with the light intensity value of the target light, and the light intensity value of the target light can be reflected by detecting the size of the photo-generated leakage current.

[0039] The embodiment forms a PN junction in the first semiconductor layer 110 of the display panel 100, and uses the principle of the PN junction to monitor the change of the light intensity value of the target light in real time by detecting the change of the photo-generated leakage current corresponding to the target light. Further, by monitoring the change of the light intensity value of the target light formed by the initial light irradiating the built-in electric field region 111 through the first color resistance structure 1221 in real time, the real-time monitoring of the optical characteristics of the color film layer 120 can be realized.

[0040] Specifically, the magnitude of the photo-generated leakage current generated in the built-in electric field region 111 can be detected by a processor, the processor can be electrically connected with the first semiconductor layer 110, the processor can include a detection module, the detection module can detect the magnitude of the photo-generated leakage current formed by the target light in the built-in electric field region 111, and calculate the light intensity value of the target light corresponding to the photo-generated leakage current detected by the detection module through the chip, and obtain the change of the transmittance of the color film layer 120 through the corresponding relationship between the light intensity value of the target light and the light transmittance of the color film layer 120. Wherein, the detection module can also be a separate device, and is respectively electrically connected with the processor and the first semiconductor layer 110.

[0041] When the initial light forms the target light incident to the built-in electric field region 111 through the first color resistance structure 1221, the photo-generated electric field generated by the target light can exert a reverse voltage on the first semiconductor layer 110, the current generated by the reverse voltage flows from the second semiconductor region 113 to the first semiconductor region 112, so that the built-in electric field region 111 generates a photo-generated leakage current, the detection module detects the magnitude of the photo-generated leakage current, and determines the light intensity value of the target light according to the magnitude of the photo-generated leakage current; according to the light intensity value of the target light, the transmittance of the color film layer 120 is determined. Wherein, the magnitude of the photo-generated leakage current is positively correlated with the light intensity value of the target light, that is, the greater the photo-generated leakage current, the greater the light intensity value of the target light, that is, the greater the transmittance of the color film layer 120; the smaller the photo-generated leakage current, the smaller the light intensity value of the target light, that is, the smaller the transmittance of the color film layer 120.

[0042] It should be noted that the first color resistance structure 1221 of the color film layer 120 includes a plurality of process technologies in the preparation process, such as baking, developing, etc. In the preparation process, each process technology will affect the optical properties of the first color resistance structure 1221, such as the temperature and time of baking will affect the curing crosslinking of the first color resistance structure 1221, thereby affecting the transmittance of the first color resistance structure 1221; such as different developing time will affect the film thickness of the first color resistance structure 1221, and the film thickness of the first color resistance structure 1221 will also affect its transmittance. Therefore, by detecting the change of the photo-generated leakage current generated by the built-in electric field region 111 using the PN junction principle, the transmittance change of the photoresist material layer can be monitored in real time, that is, the transmittance change of the color film layer 120 can be monitored in real time, so that the process technology causing the optical property change of the color film layer 120 can be determined in time, and the product yield of the display panel 100 is improved.

[0043] In addition, please continue to refer to Figure 1The display panel 100 can further include a thin film transistor 60 disposed on the display area 30. The thin film transistor 60 can include a second semiconductor layer 140, which can be disposed in the same layer as the first semiconductor layer 110, i.e., the second semiconductor layer 140 can be prepared by the same process as the first semiconductor layer 110, and the patterned first semiconductor layer 110 and the patterned second semiconductor layer 140 are formed by etching process, respectively. Therefore, the material of the second semiconductor layer 140 can also be silicon or a silicon-containing compound material.

[0044] The display panel 100 can further include a light emitting device layer 150 disposed on the display area 30. The light emitting device layer 150 can be disposed between the color filter layer 120 and the thin film transistor 60. The light shielding portion 121 is provided with a second opening 52 corresponding to the light emitting device layer 150 in the display area 30, and the color resistance portion 122 includes a second color resistance structure 1222 disposed in the second opening 52. The size of the second opening 52 can be greater than the size of the first opening 51. It can be understood that the second color resistance structure 1222 can also include a red color resistance structure, a green color resistance structure or a blue color resistance structure, i.e., the second color resistance structure 1222 can also be a single-layer pure color resistance structure. Of course, the second color resistance structure 1222 can also be a laminated structure composed of at least two color resistance structures of the red color resistance structure, the green color resistance structure and the blue color resistance structure.

[0045] The light emitting device layer 150 can include an anode layer, a hole injection layer, a hole transport layer, an organic light emitting layer, an electron transport layer, an electron injection layer and a cathode layer which are sequentially stacked. The anode layer is disposed on the thin film transistor 60, and the cathode layer is disposed on the side of the anode layer away from the thin film transistor 60. The cathode layer can be disposed between the anode layer and the color filter layer 120.

[0046] Please continue to refer to Figure 1 The display panel 100 can further include a barrier layer 160, an insulating layer 170, a metal layer 180 and an interlayer insulating layer 190. The barrier layer 160 is disposed on the substrate 130, and the first semiconductor layer 110 and the second semiconductor layer 140 are both disposed on the barrier layer 160, i.e., the barrier layer 160 is located between the substrate 130 and the first semiconductor layer 110 and / or the second semiconductor layer 140. The barrier layer 160 can block the water vapor or air from the outside into the display panel 100 to improve the display effect of the display panel 100. In addition, the barrier layer 160 can be made of insulating material and heat dissipation material, so that the barrier layer 160 can play a role of preventing static electricity and heat dissipation.

[0047] The insulating layer 170 can be disposed on the barrier layer 160, and the insulating layer 170 can cover the first semiconductor layer 110 and the second semiconductor layer 140. The metal layer 180 can be disposed on the insulating layer 170, the interlayer insulating layer 190 can be disposed on the insulating layer 170, and the interlayer insulating layer 190 can cover the metal layer 180. Specifically, the metal layer 180 can include a first metal region 181 and a second metal region 182 disposed in the non-display region 40; the insulating layer 170 can be provided with a first via hole 171 and a second via hole 172 in the non-display region 40; the first semiconductor layer 110 is provided with a first lap region 114 on the side of the first semiconductor region 112 away from the second semiconductor region 113, and the first semiconductor layer 110 is provided with a second lap region 115 on the side of the second semiconductor region 113 away from the first semiconductor 112, i.e., the first lap region 114 and the second lap region 115 are respectively disposed on both sides of the photosensitive semiconductor in the first semiconductor layer 110.

[0048] The first metal region 181 is electrically connected to the first lap region 114 through a metal trace disposed in the first via hole 171, and the second metal region 182 is electrically connected to the second lap region 115 through a metal trace disposed in the second via hole 172, so that an electric current can flow in the first semiconductor layer 110 by applying a voltage to the first metal region 181 and the second metal region 182, and the first semiconductor layer 110 can form a built-in electric field region 111.

[0049] In addition, the metal layer 180 can further include a third metal region 183 and a fourth metal region 184 disposed in the display region 30, wherein the third metal region 183 can serve as the source electrode of the thin film transistor 60, and the fourth metal region 184 can serve as the drain electrode of the thin film transistor 60; or the third metal region 183 serves as the drain electrode of the thin film transistor 60, and the fourth metal region 184 serves as the source electrode of the thin film transistor 60. The insulating layer 170 can be provided with a third via hole 173 and a fourth via hole 174 in the display region 30; the second semiconductor layer 140 can include an active layer 141 and a third lap region 142 and a fourth lap region 143 disposed on both sides of the active layer 141.

[0050] The third metal region 183 is electrically connected to the third lap region 142 through a metal trace disposed in the third via hole 173, and the fourth metal region 184 is electrically connected to the fourth lap region 143 through a metal trace disposed in the fourth via hole 174, so that the control of the thin film transistor 60 can be realized by applying a voltage to the third metal region 183 and the fourth metal region 184.

[0051] The thin film transistor 60 can further include a gate insulating layer 61 and a gate layer 62. The gate insulating layer 61 can be disposed on the active layer 141, and the gate layer 62 can be disposed on the gate insulating layer 61. The gate layer 62 can serve as a gate of the thin film transistor 60, and a projection area of the gate layer 62 on the substrate 130 is the same as a projection area of the active layer 141 on the substrate 130.

[0052] Please continue to refer to Figure 1 The thickness of the interlayer insulating layer 190 can be greater than the thickness of the metal layer 180, so that the interlayer insulating layer 190 can cover the metal layer 180. Taking the fourth metal region 184 as an example, the interlayer insulating layer 190 is provided with a fifth via hole 191 at a position corresponding to the fourth metal region 184. Since the light emitting device layer 150 is disposed between the thin film transistor 60 and the color filter layer 120, specifically, the light emitting device layer 150 is disposed corresponding to the fifth via hole 191, and the light emitting device layer 150 is electrically connected to the fourth metal region 184, i.e., the drain, through the metal wiring disposed in the fifth via hole 191, so as to control the light emitting device layer 150 to emit light through the thin film transistor 60.

[0053] It can be understood that if the third metal region 183 is taken as the drain of the thin film transistor 60, the light emitting device layer 150 and the fifth via hole 191 are both disposed corresponding to the third metal region 183, and the light emitting device layer 150 is electrically connected to the third metal region 183 through the metal wiring disposed in the fifth via hole 191.

[0054] Optionally, the display panel 100 can further include a pixel definition layer 200, which can be disposed on the interlayer insulating layer 190. Specifically, the pixel definition layer 200 can be disposed between the interlayer insulating layer 190 and the color filter layer 120, and the pixel definition layer 200 covers the light emitting device layer 150.

[0055] As can be seen, in the embodiment, the first semiconductor layer 110 is implanted with boron ions and phosphorus ions to form the first semiconductor region 112 and the second semiconductor region 113 in the first semiconductor layer 110, and the built-in electric field region 111 is formed between the first semiconductor region 112 and the second semiconductor region 113, so that the PN junction is formed in the display panel 100. According to the PN junction principle, when the target light is incident on the built-in electric field region 111 in the first semiconductor layer 110, the photoelectric field is generated in the built-in electric field region 111, the photoelectric field has an opposite current direction to the built-in electric field region 111, the photoelectric leakage current is generated in the built-in electric field region 111, and the change of the photoelectric leakage current can reflect the change of the light intensity value of the target light. The first color resistance structure 1221 of the color filter layer 120 is arranged at a position corresponding to the built-in electric field region 111, so that the initial light can be incident on the built-in electric field region 111 through the first color resistance structure 1221, and the change of the light intensity value of the target light reflected by the change of the leakage current generated by the built-in electric field region is used to monitor the optical properties such as the transmittance of the color filter layer 120 in real time, so that the process technology causing the change of the optical properties of the color filter layer 120 can be determined in time during the preparation process of the color filter layer 120, and the product yield of the display panel 100 is improved.

[0056] To further illustrate the display panel 100 in the above embodiment, the present embodiment further provides a preparation method of a display panel, please refer to Figure 1 and Figure 3 , Figure 3 is a flowchart of the preparation method of the display panel provided by the present embodiment. The display panel can be an OLED display panel using a depolarizer technology, and the display panel can include a display area 30 and a non-display area 40. The specific steps of the preparation method of the display panel can be as follows:

[0057] 201, a substrate is provided, and a first semiconductor layer is formed on the substrate, wherein the first semiconductor layer includes a photosensitive semiconductor arranged in the non-display area, and the photosensitive semiconductor includes a first semiconductor region, a second semiconductor region, and a built-in electric field region arranged between the first semiconductor region and the second semiconductor region.

[0058] Please continue to refer to Figure 1 , a substrate 130 is provided, which can be a flexible substrate or a rigid substrate. A barrier layer 160 is deposited and formed on the substrate 130. The barrier layer 160 can block water vapor or air from the outside to enter the display panel 100 to improve the display effect of the display panel 100. In addition, the barrier layer 160 can be made of insulating materials and heat dissipation materials, so that the barrier layer 160 can play a role in preventing static electricity and dissipating heat.

[0059] A first semiconductor layer 110 is formed on the barrier layer 160, and the first semiconductor layer 110 can include a photosensitive semiconductor disposed in the non-display region 40, and the photosensitive semiconductor includes a built-in electric field region 111, a first semiconductor region 112, and a second semiconductor region 113, wherein the built-in electric field region 111 is disposed between the first semiconductor region 112 and the second semiconductor region 113.

[0060] The first semiconductor layer 110 can be made of silicon or a silicon-containing compound material. It should be noted that the first semiconductor region 112 can include a semiconductor material doped with boron ions, such as silicon doped with boron ions, and the second semiconductor region 113 can include a semiconductor material doped with phosphorus ions, such as silicon doped with phosphorus ions. Specifically, boron ions are implanted into the first semiconductor region 112 by ion implantation technology to form a P-type semiconductor in the first semiconductor region 112, and phosphorus ions are implanted into the second semiconductor region 113 by ion implantation technology to form an N-type semiconductor in the second semiconductor region 113. Of course, phosphorus ions can also be implanted into the first semiconductor region 112 to form an N-type semiconductor in the first semiconductor region 112, and boron ions can be implanted into the second semiconductor region 113 to form a P-type semiconductor in the second semiconductor region 113.

[0061] 202, a color filter layer is formed on the side of the first semiconductor layer away from the substrate, wherein the color filter layer includes a light shielding portion and a color resistance portion, the light shielding portion is provided with a first opening corresponding to the photosensitive semiconductor in the non-display region, and the color resistance portion includes a first color resistance structure disposed in the first opening, and the first color resistance structure at least overlaps with the built-in electric field region.

[0062] The color filter layer 120 can be formed on the side of the first semiconductor layer 110 away from the substrate 130, and the color filter layer 120 can include a light shielding portion 121 and a color resistance portion 122. The light shielding portion 121 is provided with a first opening 51 corresponding to the photosensitive semiconductor in the non-display region 40, and the color resistance portion 122 includes a first color resistance structure 1221 disposed in the first opening 51, and the first color resistance structure 1221 at least overlaps with the built-in electric field region 111, i.e., the projection area of the first color resistance structure 1221 on the substrate 130 at least partially overlaps with the projection area of the built-in electric field region 111 on the substrate 130, so as to ensure that the initial light rays parallel or inclined to the normal direction of the first color resistance structure 1221 can at least partially enter the built-in electric field region 111.

[0063] The first color resist structure 1221 can include a red color resist structure, a green color resist structure, or a blue color resist structure, i.e., the first color resist structure 1221 can be a single-layer pure color color resist structure, which only allows light of a pure color corresponding wavelength to pass through the film layer, and light of other colors is blocked by the film layer. Of course, the first color resist structure 1221 can also include a laminated structure composed of at least two color resist structures of a red color resist structure, a green color resist structure, and a blue color resist structure. The laminated structure can pass light of a wavelength corresponding to the color of the first color resist structure 1221, and light of other colors is blocked by the laminated structure.

[0064] The first semiconductor region 112 is a P-type semiconductor, and the second semiconductor region 113 is an N-type semiconductor. Since the first semiconductor region 112 is a P-type semiconductor, the first semiconductor region 112 includes a plurality of holes containing positive charges; since the second semiconductor region 113 is an N-type semiconductor, the second semiconductor region 113 includes a plurality of electrons containing negative charges. Under the action of an applied electric field, part of the holes in the first semiconductor region 112 migrate to the second semiconductor region 113, and part of the electrons in the second semiconductor region 113 migrate to the first semiconductor region 112. Part of the holes and part of the electrons form donor ions and acceptor ions without carrier compensation between the first semiconductor region 112 and the second semiconductor region 113. The region where the donor ions and the acceptor ions are located is a space charge region, i.e., the built-in electric field region 111.

[0065] In some embodiments, an initial light can pass through the first color resist structure 1221 and the built-in electric field region 111 in the first semiconductor layer 110 in sequence to form a target light, so as to determine the transmittance of the first color resist structure 1221 by the target light, and thus determine the transmittance of the color film layer 120. The initial light can be ambient light. In order to enable more initial light to be incident into the built-in electric field region 111 after passing through the first color resist structure 1221, the entire first color resist structure 1221 can be located in the built-in electric field region 111 in the orthographic projection region of the first semiconductor layer 110.

[0066] When the target light is incident to the built-in electric field region 111, the target light will generate a photoelectric field in the built-in electric field region 111, and the current direction in the photoelectric field is opposite to the current direction of the built-in electric field region, that is, the current direction in the photoelectric field is from the first semiconductor region 112 to the second semiconductor region 113, and the current direction of the photoelectric field can be defined as the current direction of the reverse voltage, and the current of the photoelectric field can be called the photoelectric current or the photoelectric leakage current. Wherein, when the reverse voltage is applied to the first semiconductor layer 110, the built-in electric field region 111 increases greatly under the action of the reverse voltage, thereby forming the photoelectric leakage current, and the photoelectric leakage current will change with the light intensity value of the target light. It can be understood that the light intensity value of the target light can also be reflected by detecting the size of the photoelectric leakage current.

[0067] The embodiment forms a PN junction in the first semiconductor layer 110 of the display panel 100, and uses the principle of the PN junction to monitor the change of the light intensity value of the target light in real time by detecting the change of the photoelectric leakage current corresponding to the target light. Further, by monitoring the change of the light intensity value of the target light formed by the initial light incident to the built-in electric field region 111 through the first color resistance structure 1221 in real time, the real-time monitoring of the optical characteristics of the color film layer 120 can be realized.

[0068] The insulating layer 170 is deposited on the barrier layer 160 and can cover the first semiconductor layer 110, the metal layer 180 is formed on the insulating layer 170, and the interlayer insulating layer 190 is formed on the insulating layer 170 and covers the metal layer 180.

[0069] Specifically, the metal layer 180 can include a first metal region 181 and a second metal region 182 arranged in the non-display area 40; the insulating layer 170 can be provided with a first via hole 171 and a second via hole 172 in the non-display area 40; the first semiconductor layer 110 is provided with a first lap region 114 on the side of the first semiconductor region 112 away from the second semiconductor region 113, and the first semiconductor layer 110 is provided with a second lap region 115 on the side of the second semiconductor region 113 away from the first semiconductor region 112, that is, the first lap region 114 and the second lap region 115 are arranged on both sides of the photosensitive semiconductor in the first semiconductor layer 110.

[0070] Wherein, the first metal region 181 is electrically connected with the first lap region 114 through the metal wire arranged in the first via hole 171, and the second metal region 182 is electrically connected with the second lap region 115 through the metal wire arranged in the second via hole 172, so that the current flows in the first semiconductor layer 110 by applying voltage to the first metal region 181 and the second metal region 182, thereby forming the built-in electric field region 111 in the first semiconductor layer 110.

[0071] Specifically, the magnitude of the photo-generated leakage current generated in the built-in electric field region 111 can be detected by a processor, the processor can be electrically connected with the first semiconductor layer 110, the processor can include a detection module, the detection module can detect the magnitude of the photo-generated leakage current formed by the target light in the built-in electric field region 111, and calculate the light intensity value of the target light corresponding to the photo-generated leakage current detected by the detection module, and obtain the change of the transmittance of the first color resist structure 1221 through the corresponding relationship between the light intensity value of the target light and the light transmittance of the first color resist structure 1221, and further obtain the change of the transmittance of the color film layer 120. The detection module can also be a separate device and be electrically connected with the processor and the first semiconductor layer 110 respectively.

[0072] When the initial light forms the target light incident to the built-in electric field region 111 through the first color resist structure 1221, the photo-generated electric field generated by the target light can exert a reverse voltage on the first semiconductor layer 110, the current generated by the reverse voltage flows from the second semiconductor region 113 to the first semiconductor region 112, so that the built-in electric field region 111 generates a photo-generated leakage current, the detection module detects the magnitude of the photo-generated leakage current, and determines the light intensity value of the target light according to the magnitude of the photo-generated leakage current; according to the light intensity value of the target light, the transmittance of the color film layer 120 is determined. The magnitude of the photo-generated leakage current is positively correlated with the light intensity value of the target light, that is, the greater the photo-generated leakage current, the greater the light intensity value of the target light, that is, the greater the transmittance of the color film layer 120; the smaller the photo-generated leakage current, the smaller the light intensity value of the target light, that is, the smaller the transmittance of the color film layer 120.

[0073] It should be noted that the first color resist structure 1221 of the color film layer 120 includes a plurality of process technologies in the preparation process, such as baking, developing, etc. In the preparation process, each process technology will affect the optical properties of the first color resist structure 1221, such as the temperature and time of baking affecting the curing crosslinking of the first color resist structure 1221, thereby affecting the transmittance of the first color resist structure 1221; such as different developing times affecting the film thickness of the first color resist structure 1221, and the film thickness of the first color resist structure 1221 also affecting the transmittance thereof. Therefore, by detecting the change of the photo-generated leakage current generated by the built-in electric field region 111 using the PN junction principle, the transmittance change of the photoresist material layer can be monitored in real time, that is, the transmittance change of the color film layer 120 can be monitored in real time, so that the process technology causing the optical property change of the color film layer 120 can be determined in time, and the product yield of the display panel 100 is improved.

[0074] Optionally, a pixel definition layer 200 is deposited on the interlayer insulating layer 190, and the pixel definition layer 200 can be arranged between the interlayer insulating layer 190 and the color film layer 120.

[0075] As can be seen, in the embodiment, when the target light is incident on the built-in electric field region 111 in the semiconductor layer 110, the target light generates a photoelectric field in the built-in electric field region 111, the photoelectric field has a current direction opposite to that of the built-in electric field region 111, and the built-in electric field region 111 generates a photoelectric leakage current. The change of the photoelectric leakage current can reflect the change of the light intensity value of the target light. The first color resistance structure 1221 of the color film layer 120 is arranged at a position corresponding to the built-in electric field region 111, so that the initial light can be incident on the built-in electric field region 111 through the first color resistance structure 1221, and the change of the light intensity value of the target light reflected by the change of the leakage current generated by the built-in electric field region can be used to monitor the optical properties such as the transmittance of the color film layer 120 in real time. Therefore, during the preparation process of the color film layer 120, the process technology causing the change of the optical properties of the color film layer 120 can be determined in time, and the product yield of the display panel 100 is improved.

[0076] The display device can be a full-screen display device. For example, the display device can be a wearable device such as a watch or a bracelet, or the display device can be a product or component with a display function such as a television, a display, a notebook computer, a digital photo frame, or a navigator. The display device can include a processor. The processor can be electrically connected with the detection module, or the processor includes the detection module. Therefore, the processor can process the size of the photoelectric leakage current generated by the built-in electric field region 111 detected by the detection module to obtain the light intensity value of the target light, and determine the optical properties of the color film layer 120 according to the light intensity value of the target light.

[0077] In the above embodiments, the description of each embodiment focuses on different aspects. The parts not described in detail in a certain embodiment can be referred to the related description of other embodiments.

[0078] The display panel and the preparation method of the display panel provided in the embodiments of the present application are described in detail above. The principles and implementation manners of the present application are described by using specific examples. The above description of the embodiments is only used to help understand the method of the present application and its core idea. Meanwhile, for those skilled in the art, the specific implementation manners and application ranges can be changed according to the idea of the present application. In summary, the content of the specification should not be understood as a limitation of the present application.

Claims

1. A display panel, comprising a display area and a non-display area, the display panel being applied to a display device, the display device further comprising a detection module configured to detect a magnitude of a photo-induced leakage current formed by a target light ray in a built-in electric field region, characterized in that, The display panel comprises: a substrate; a first semiconductor layer disposed on one side of the substrate, the first semiconductor layer comprising a photosensitive semiconductor disposed in the non-display area, the photosensitive semiconductor comprising a first semiconductor region, a second semiconductor region, and a built-in electric field region disposed between the first semiconductor region and the second semiconductor region, the first semiconductor region being a P-type semiconductor, the second semiconductor region being an N-type semiconductor, and a PN junction being formed in the first semiconductor layer; and a color filter layer disposed on a side of the first semiconductor layer away from the substrate, the color filter layer comprising a light-shielding portion and a color resist portion, the light-shielding portion being provided with a first opening corresponding to the photosensitive semiconductor in the non-display area, and the color resist portion comprising a first color resist structure disposed in the first opening, the first color resist structure at least partially overlapping the built-in electric field region.

2. The display panel of claim 1, wherein, The first semiconductor region comprises a semiconductor material doped with boron ions, and the second semiconductor region comprises a semiconductor material doped with phosphorus ions.

3. The display panel of claim 1, wherein, The first color resist structure comprises a red color resist structure, a green color resist structure, or a blue color resist structure.

4. The display panel of claim 1, wherein, The first color resist structure comprises a laminated structure of at least two of a red color resist structure, a green color resist structure, and a blue color resist structure.

5. The display panel of claim 1, wherein, The display panel further comprises a thin film transistor disposed in the display area, the thin film transistor comprising a second semiconductor layer disposed in the same layer as the first semiconductor layer.

6. The display panel of claim 5, wherein, The display panel further comprises a light-emitting device layer disposed in the display area, the light-emitting device layer being disposed between the color filter layer and the thin film transistor, the light-shielding portion being provided with a second opening corresponding to the light-emitting device layer in the display area, and the color resist portion comprising a second color resist structure disposed in the second opening, the second opening having a size greater than that of the first opening.

7. The display panel of any of claims 5-6, wherein, The display panel further comprises a barrier layer disposed on the substrate, and the first semiconductor layer and the second semiconductor layer are both disposed on the barrier layer. The display panel further comprises an insulating layer disposed on the barrier layer and covering the first semiconductor layer and the second semiconductor layer. The display panel further comprises a metal layer disposed on the insulating layer, and an interlayer insulating layer disposed on the insulating layer and covering the metal layer.

8. The display panel of claim 7, wherein, The metal layer comprises a first metal region and a second metal region disposed in the non-display area, the insulating layer is provided with a first via hole and a second via hole in the non-display area, the first semiconductor layer is provided with a first overlap region on a side of the first semiconductor region away from the second semiconductor region, and a second overlap region on a side of the second semiconductor region away from the first semiconductor region, the first metal region is connected to the first overlap region through a metal trace disposed in the first via hole, and the second metal region is connected to the second overlap region through a metal trace disposed in the second via hole.

9. The display panel of claim 7, wherein, The metal layer comprises a third metal region and a fourth metal region arranged in the display region, the insulating layer is provided with a third via hole and a fourth via hole in the display region, the second semiconductor layer comprises an active layer and a third overlap region and a fourth overlap region arranged on both sides of the active layer, the third metal region is connected with the third overlap region through a metal trace arranged in the third via hole, and the fourth metal region is connected with the fourth overlap region through a metal trace arranged in the fourth via hole.

10. The display panel of claim 9, wherein, The thin film transistor further comprises a gate insulating layer and a gate layer, the gate insulating layer is arranged on the active layer, and the gate layer is arranged on the gate insulating layer; and the gate layer is in the same orthographic projection region on the substrate as the active layer.

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