Data protection method and flash memory device thereof

Abstract

The application relates to the field of flash memory performance management, and discloses a data protection method and a flash memory device thereof. The data protection method comprises the following steps: receiving a write request, determining at least two data buffers corresponding to the write request; writing data in each data buffer into a corresponding normal data logical unit one by one, and performing XOR processing on the data in each data buffer to obtain an XOR result, and writing the XOR result into a redundancy buffer; and after the XOR result is written into the redundancy buffer, writing data of the redundancy buffer into a check data logical unit. According to the application, the data in the redundancy buffer is directly written into the check data logical unit of the flash memory medium, so that the data in the redundancy buffer does not need to be read out to the cache space and then written into the flash memory medium, thereby reducing the time for reading out the data to the cache space and improving the write performance of the flash memory device.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of flash memory performance management, in particular to a data protection method and a flash memory device thereof. BACKGROUND

[0002] At present, enterprise-level solid state disks are increasingly popular. For enterprise-level solid state disks, most of them use Raid protection. In the traditional technology, the operation of Raid is completed by hardware. After the data is written from the buffer to the flash medium, the hardware request is completed, and the data in the buffer is automatically cleaned. The next time the buffer is used by other requests. However, if the above method is used to write data, the original data will be lost if a write error occurs.

[0003] At present, the Raid protection usually stores data in the cache space to prevent data loss. Specifically, the data is read from the redundant buffer to the cache space, temporarily stored in the cache space, and then written from the cache space to the flash medium. If the above method is used to write data, the data in the cache space can be processed if a write error occurs. However, the operation of reading from the redundant buffer to the cache space and then writing from the cache space to the flash medium will reduce the write performance. SUMMARY

[0004] The embodiments of the present application provide a data protection method and a flash memory device thereof to solve the problem that in the prior art, in order to avoid write errors, data is read from a redundant buffer to a cache space, and then written from the cache space to a flash medium, thereby reducing the write performance.

[0005] To solve the above problems, the embodiments of the present application provide the following technical solutions:

[0006] In a first aspect, the present application provides a data protection method applied to a flash memory device. The flash memory device includes a cache space, a flash medium, and a redundant buffer. The cache space includes at least two data buffers. The flash medium includes at least two normal data logical units and one check data logical unit. Each normal data logical unit corresponds to one data buffer. The method includes:

[0007] receiving a write request and determining at least two data buffers corresponding to the write request;

[0008] writing the data in each data buffer to the corresponding normal data logical unit, and performing XOR processing on the data in each data buffer to obtain an XOR result, and writing the XOR result to the redundant buffer;

[0009] After writing the XOR result to the redundant buffer, write the data of the redundant buffer to the check data logical unit.

[0010] In some embodiments, the write request comprises a first write request, the first write request being used for writing data in the cache space to the flash medium and XOR processing data in the data buffer to the redundancy buffer, and the method further comprises:

[0011] After receiving the first write request, determining whether the redundancy buffer is in an available state;

[0012] If the redundancy buffer is in the available state, writing data in each data buffer to a corresponding normal data logical unit one by one, and XOR processing data in each data buffer to obtain an XOR result, and writing the XOR result to the redundancy buffer;

[0013] If the redundancy buffer is in an unavailable state, suspending processing of the first write request.

[0014] In some embodiments, determining whether the redundancy buffer is in the available state comprises:

[0015] Detecting identification information of the redundancy buffer, wherein the identification information comprises an available state flag and an unavailable state flag;

[0016] If the identification information of the redundancy buffer is the available state flag, it is determined that the redundancy buffer is in the available state;

[0017] If the identification information of the redundancy buffer is the unavailable state flag, it is determined that the redundancy buffer is in the unavailable state.

[0018] In some embodiments, the redundancy buffer comprises a first redundancy buffer, the first redundancy buffer being used for storing the XOR result; the write request further comprises a second write request, the second write request being used for writing data of the first redundancy buffer to a check data logical unit, and the method further comprises:

[0019] After writing the data of the first redundancy buffer to the check data logical unit, determining whether the data of the first redundancy buffer is written successfully;

[0020] If the data of the first redundancy buffer is written successfully, cleaning the data of the first redundancy buffer;

[0021] If the data of the first redundancy buffer fails to be written, the data of the first redundancy buffer is retained in the redundancy buffer.

[0022] In some embodiments, cleaning the data of the first redundancy buffer comprises:

[0023] Obtaining a data cleaning instruction;

[0024] Cleaning the data of the first redundancy buffer according to the data cleaning instruction.

[0025] After the first redundant buffer is cleaned up, the identification information of the first redundant buffer is modified to a usable state mark.

[0026] In a second aspect, the present application provides a flash memory device, comprising:

[0027] at least one processor; and

[0028] a memory in communication with the at least one processor; wherein

[0029] The memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to perform part or all of the method as described in the first aspect.

[0030] In a third aspect, the present application provides a data protection method applied to a flash memory device, the flash memory device comprising a cache space and a flash memory medium, a redundant buffer, the cache space comprising at least two data buffers, the flash memory medium comprising at least two normal data logical units and one check data logical unit, wherein each normal data logical unit corresponds to one data buffer one by one, the flash memory device comprising a flash memory controller, the flash memory controller comprising a flash memory management module and a backend module, the method comprising:

[0031] The flash memory management module sends a first write request to the backend module, wherein the first write request corresponds to the at least two data buffers;

[0032] After the backend module receives the first write request, the data in each data buffer is written to the corresponding normal data logical unit one by one, and the data in each data buffer is processed by exclusive OR to obtain an exclusive OR result, and the exclusive OR result is written to the redundant buffer.

[0033] In some embodiments, the method further comprises:

[0034] The backend module judges whether the redundant buffer is in a usable state after receiving the first write request;

[0035] If the redundant buffer is in the usable state, the data in each data buffer is written to the corresponding normal data logical unit one by one, and the data in each data buffer is processed by exclusive OR to obtain an exclusive OR result, and the exclusive OR result is written to the redundant buffer;

[0036] If the redundant buffer is in an unusable state, the processing of the first write request is suspended.

[0037] In some embodiments, the flash memory device comprises a hardware module, the redundant buffer comprises a first redundant buffer, and the first redundant buffer is used to store the exclusive OR result, and the method further comprises:

[0038] The flash management module sends a second write request to the backend module;

[0039] After the backend module receives the second write request sent by the flash management module, the data of the first redundant buffer is written to the check data logic unit, and it is determined whether the data of the first redundant buffer is written successfully;

[0040] If the data of the first redundant buffer is written successfully, a data write success message is returned to the flash management module, and a data cleaning instruction is sent to the hardware module to make the hardware module clean the data of the first redundant buffer;

[0041] If the data of the first redundant buffer fails to be written, a data write failure message is returned to the flash management module, and an error processing instruction is sent to the hardware module to make the hardware module, according to the error processing instruction, retain the data of the first redundant buffer in the redundant buffer, or write the data of the first redundant buffer to the flash medium, or read the data of the first redundant buffer to the cache space.

[0042] In a fourth aspect, the present application provides a flash device, comprising:

[0043] A flash controller, which is capable of performing part or all of the method as described in the third aspect;

[0044] A cache space, comprising at least two data buffers, for caching data corresponding to a write request;

[0045] A flash medium, the flash medium comprising at least two normal data logic units and one check data logic unit, wherein the normal data logic units are used to store normal data, and the check data logic unit is used to store check data;

[0046] A redundant buffer, for caching an exclusive-OR result of data corresponding to a write request.

[0047] The beneficial effects of the embodiments of the present application are that: different from the prior art, the data protection method and the flash memory device provided by the embodiments of the present application, the data protection method comprises the following steps: receiving a write request, determining at least two data buffers corresponding to the write request; writing the data in each data buffer into a corresponding normal data logical unit one by one, and performing XOR processing on the data in each data buffer to obtain an XOR result, and writing the XOR result into a redundancy buffer; after the XOR result is written into the redundancy buffer, the data of the redundancy buffer is written into a check data logical unit. The data in the redundancy buffer is directly written into the check data logical unit of the flash memory medium by the present application, so that the data in the redundancy buffer does not need to be read out to the cache space and then written into the flash memory medium, thereby reducing the time of reading out the data to the cache space and improving the write performance of the flash memory device; and when a program error occurs, the data in the redundancy buffer can also be directly read for error processing, thereby improving the processing efficiency of the program error. BRIEF DESCRIPTION OF DRAWINGS

[0048] One or more embodiments are illustrated by way of example with reference to the accompanying drawings, which are schematic and not intended to be limiting of the embodiments, and in which like numerals refer to like elements, unless otherwise specified. The drawings are not necessarily to scale, the emphasis instead being placed upon illustrating the principles of the embodiments.

[0049] Figure 1 is a structural schematic diagram of a flash memory device provided by the embodiments of the present application;

[0050] Figure 2 is a schematic diagram of data protection provided by the embodiments of the present application;

[0051] Figure 3 is a schematic diagram of another data protection provided by the embodiments of the present application;

[0052] Figure 4 is a flowchart of a data protection method provided by the embodiments of the present application;

[0053] Figure 5 is a flowchart of processing a first write request provided by the embodiments of the present application;

[0054] Figure 6 is a flowchart of processing a second write request provided by the embodiments of the present application;

[0055] Figure 7 is a schematic diagram of module circulation of host write data provided by the embodiments of the present application;

[0056] Figure 8 is a flowchart of another data protection method provided by the embodiments of the present application;

[0057] Figure 9 is a flow diagram of another data protection method provided by an embodiment of the present application.

[0058] Figure 10 is a structural diagram of another flash memory device provided by an embodiment of the present application. DETAILED DESCRIPTION

[0059] To make the objectives, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be described below in detail with reference to the accompanying drawings. Obviously, the described embodiments are some but not all of the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts should fall into the protection scope of the present application.

[0060] It should be noted that the various features of the embodiments of the present application can be combined with each other if there is no conflict, and all fall within the protection scope of the present application. In addition, although the functional modules are divided in the device schematic diagram, and the logical order is shown in the flowchart, in some cases, the steps shown or described can be executed in a different order from the module division in the device or the order in the flowchart. In addition, the "first", "second", "third" and the like used herein do not limit the data and execution order, but only distinguish the same items or similar items with basically the same function and effect.

[0061] Unless otherwise defined, all technical and scientific terms used in the present application have the same meanings as commonly understood by those skilled in the art to which the present application belongs. The terms used in the present application are only for the purpose of describing specific embodiments and are not intended to limit the present application. The term "and / or" used in the present application includes any and all combinations of one or more related listed items.

[0062] In addition, the technical features involved in each embodiment of the present application described below can be combined with each other as long as there is no conflict.

[0063] The technical solutions of the present application will be described in detail below with reference to the accompanying drawings:

[0064] Please refer to Figure 1 , Figure 1 is a structural diagram of another flash memory device provided by an embodiment of the present application.

[0065] As Figure 1As shown, the flash memory device 100 includes a flash memory medium 110 and a controller 120 connected with the flash memory medium 110. The flash memory device 100 is communicatively connected with the host 200 through wired or wireless manner to realize data interaction.

[0066] The flash memory medium 110, as the storage medium of the flash memory device 100, is also called flash memory, NAND Flash, Flash memory or Flash particle, and belongs to a kind of memory device. It is a non-volatile memory that can store data for a long time without power supply, and its storage characteristics are equivalent to hard disk, so that the flash memory medium 110 can become the basis of the storage medium of various portable digital devices.

[0067] The controller 120 includes a data converter 121, a processor 122, a buffer 123, a flash memory controller 124 and an interface 125.

[0068] The data converter 121 is connected with the processor 122 and the flash memory controller 124 respectively. The data converter 121 is used to convert binary data into hexadecimal data and convert hexadecimal data into binary data. Specifically, when the flash memory controller 124 writes data into the flash memory medium 110, the binary data to be written is converted into hexadecimal data by the data converter 121, and then written into the flash memory medium 110. When the flash memory controller 124 reads data from the flash memory medium 110, the hexadecimal data stored in the flash memory medium 110 is converted into binary data by the data converter 121, and then the converted data is read from the binary data page register. The data converter 121 can include a binary data register and a hexadecimal data register. The binary data register can be used to save the data converted from hexadecimal to binary, and the hexadecimal data register can be used to save the data converted from binary to hexadecimal.

[0069] The processor 122 is connected with the data converter 121, the buffer 123, the flash memory controller 124 and the interface 125 respectively. The processor 122 can be connected with the data converter 121, the buffer 123, the flash memory controller 124 and the interface 125 through a bus or other means. The processor is used to run the non-volatile software program, instruction and module stored in the buffer 123, so as to realize any method embodiment of the application. On this basis, through firmware development, the processor is also used to be responsible for the core processing of the flash translation layer (FTL).

[0070] The buffer 123 is mainly used to buffer the read / write instruction sent by the host 200 and the read data or write data obtained from the flash memory medium 110 according to the read / write instruction sent by the host 200.

[0071] The flash memory controller 124 is connected with the flash memory medium 110, the data converter 121, the processor 122 and the buffer 123, and is used for accessing the flash memory medium 110 in the back end and managing various parameters and data I / O of the flash memory medium 110.

[0072] The interface 125 is connected with the host 200, the data converter 121, the processor 122 and the buffer 123, and is used for receiving data sent by the host 200 or receiving data sent by the processor 122, so as to realize data transmission between the host 200 and the processor 122. The interface 125 can be a SATA-2 interface, a SATA-3 interface, a SAS interface, an MSATA interface, a PCI-E interface, an NGFF interface, a CFast interface, an SFF-8639 interface and an M.2 NVME / SATA protocol.

[0073] Please refer to Figure 2 , Figure 2 is a schematic diagram of a data protection method provided by the embodiment of the application.

[0074] As Figure 2 indicated, the data protection method is applied to a flash memory device, wherein the flash memory device includes a cache space, a redundant buffer and a flash memory medium.

[0075] The cache space includes at least two data buffers and a check data buffer. For example, the at least two data buffers include a first data buffer, a second data buffer, a third data buffer, …, and an n-1 data buffer. The first data buffer, the second data buffer, the third data buffer, …, and the n-1 data buffer are used to store normal data, and the check data buffer is used to store check data.

[0076] The flash memory medium includes at least two normal data logic units (Die) and a check data logic unit (Parity Die). For example, the at least two normal data logic units include a first normal data logic unit (Die 0), a second normal data logic unit (Die 1), a third normal data logic unit (Die 2), …, and an n normal data logic unit (Die n-1). The first normal data logic unit, the second normal data logic unit, the normal data logic unit, …, and the n-1 normal data logic unit are used to store data written by the corresponding data buffer in the cache space, and the check data logic unit (Parity Die) is used to store check data written by the corresponding check data buffer (Parity Backbuffer) in the cache space.

[0077] The redundant buffer is used to store the data after XOR processing in the plurality of data buffers, and the data after XOR processing is referred to as check data.

[0078] It should be noted that the hardware automatically performs XOR processing on the data to be written in the data buffer to obtain check data, and then saves the check data to the redundant buffer. Meanwhile, the hardware automatically writes the data in the plurality of data buffers to the corresponding data logical units of the flash medium. When the data to be written is processed by XOR to obtain check data, the check data in the redundant buffer is read to the check data buffer in the cache space after a command request is initiated by software, and finally the check data in the check data buffer is written to the check data logical unit of the flash medium.

[0079] In the embodiment of the application, since the data is written from the data buffer in the cache space to the flash medium, when a write error occurs, the error can be handled by the check data stored in the check data buffer, and the data after error handling is written to the flash medium. The embodiment of the application effectively solves the problem of data loss caused by data write error by writing the check data in the redundant buffer to the check data buffer and then writing the check data from the check data buffer to the flash medium.

[0080] However, in order to solve the operation of writing data from the redundant buffer to the check data buffer due to write error, the write performance of the flash device is reduced.

[0081] Therefore, in order to improve the write performance, the application further provides a data protection method. For details, please refer to Figure 3 , Figure 3 is another schematic diagram of data protection provided by the embodiment of the application.

[0082] As Figure 3 shown, the data protection method is applied to a flash device, wherein the flash device includes a cache space, a redundant buffer and a flash medium.

[0083] The cache space includes at least two data buffers, including a first data buffer, a second data buffer, a third data buffer, …, an n-1 data buffer. The first data buffer, the second data buffer, the third data buffer, …, and the n-1 data buffer are used to store data.

[0084] The flash memory medium includes at least two normal data logic units and a check data logic unit, for example, the at least two normal data logic units include a first normal data logic unit, a second normal data logic unit, a third normal data logic unit,..., and an (n-1)th normal data logic unit. The first normal data logic unit, the second normal data logic unit, the normal data logic unit,..., and the (n-1)th normal data logic unit are used to store data written by a corresponding data buffer in the cache space, and the check data logic unit is used to store check data written by a redundant data buffer.

[0085] The redundant buffer is used to store data after XOR processing of a plurality of data buffers, and the data after XOR processing includes the check data.

[0086] It should be noted that the hardware automatically performs XOR processing on the data to be written in the data buffer to obtain the check data, and then saves the check data to the redundant buffer. Meanwhile, the hardware automatically writes the data in the plurality of data buffers to the corresponding normal data logic unit in the flash memory medium. When the data to be written is XOR processed to obtain the check data, the hardware writes the check data in the redundant buffer to the check data logic unit in the flash memory medium.

[0087] In the embodiment of the present application, since the data is written from the data buffer in the cache space to the flash memory medium, when a write error occurs, the check data stored in the check data buffer can be used for error processing, and then the data after error processing is written to the flash memory medium. The present application directly writes the data in the redundant buffer to the check data logic unit in the flash memory medium, which not only effectively solves the problem of data loss caused by data write error, but also improves the write performance of the flash device.

[0088] Please refer to Figure 4 , Figure 4 is a flowchart of a data protection method provided by the embodiment of the present application; the data protection method is applied to a flash device, and the flash device includes a cache space, a flash memory medium, and a redundant buffer.

[0089] The cache space can be a double data rate synchronous dynamic random access memory (DDR SDRAM) or the like, and the cache space includes at least two data buffers. The flash medium can be a computer flash device such as a NAND (NAND flash memory), and the flash medium includes at least two normal data logic units and one check data logic unit, wherein each normal data logic unit corresponds to one data buffer. The redundant buffer can be a redundant array of independent disks (RAID) or the like.

[0090] As shown in Figure 4 The data protection method includes the following steps.

[0091] In step S401, a write request is received, and at least two data buffers corresponding to the write request are determined.

[0092] The flash device includes at least one processor and a memory in communication with the at least one processor. Specifically, the flash device receives a transmitted write request, and the write request includes data information to be written. The data information includes address information and the like. At least two data buffers corresponding to the write request are determined according to the data information.

[0093] The write request is used to write the data in each data buffer to the corresponding normal data logic unit one by one, and the data in each data buffer is subjected to XOR processing to obtain an XOR result, the XOR result is written to the redundant buffer, and the data in the first redundant buffer is written to the check data logic unit.

[0094] In some embodiments, the data in the at least two data buffers is subjected to XOR processing to obtain an XOR result, and the XOR result is written to the redundant buffer in sequence. Hardware sorts according to time sequence, for example: assuming that the at least two data buffers include n data buffers, namely die 0 buffer, die 1 buffer, die 2 buffer, …, and die n-1 buffer, when die 0 buffer is first submitted to the hardware, it is first subjected to XOR processing to the redundant buffer (Raid buffer A). When die 0 buffer is subjected to XOR processing, die 1 submitted later is queued, and who is first submitted to the hardware is first subjected to XOR operation. Since the XOR processing speed is very fast, if Raid buffer A is read, the hardware can ensure that it can only be read out when the XOR of all dies is completed.

[0095] In some embodiments, when a write request of data is initiated, after determining that a number of data buffers corresponding to the write request need to be executed according to the data buffer information in the write request, first, the data in the number of data buffers in the cache space is subjected to an exclusive-OR operation to obtain a check bit, the check bit is temporarily stored in the redundancy buffer by being written into the redundancy buffer, the check bit is written into the check data logical unit corresponding to the cache space, and finally, the check bit data and the data in the number of data buffers are respectively and correspondingly written into the normal data logical unit and the check data logical unit corresponding to the flash medium.

[0096] In the embodiments of the present application, when a write request of data is initiated, after determining that a number of data buffers corresponding to the write request need to be executed according to the data buffer information in the write request, first, it is judged whether the redundancy buffer is available, if available, the data in the number of data buffers is subjected to an exclusive-OR operation to obtain a check bit, the check bit is sent to the redundancy buffer for temporary storage, and the data in the number of data buffers is respectively and correspondingly written into the normal logical unit corresponding to the flash medium, and finally, the check bit data is written into the check data logical unit corresponding to the flash medium, wherein the logical unit corresponding to the flash medium includes at least two normal logical data units and one check data logical unit.

[0097] When reading data, the read data is subjected to an exclusive-OR operation to obtain a new check bit, and the new check bit is compared with the above check bit, if the new check bit is inconsistent with the above check bit, it indicates that the data access is inconsistent, and an error occurs.

[0098] In some embodiments, the data in the redundancy buffer is written into the check data buffer of the cache space, and then the data in the check data buffer is written into the flash medium, when a write error occurs, the data is still retained in the check data buffer, and by this method, the problem of loss of original data when a write error occurs can be effectively avoided.

[0099] In the embodiments of the present application, the data in the redundancy buffer is directly written into the check data logical unit of the flash medium, which not only can effectively avoid the problem of loss of original data when a write error occurs, but also improves the write performance of the flash device.

[0100] Step S402: write the data in each data buffer into the corresponding normal data logical unit one by one, and perform exclusive-OR processing on the data in each data buffer to obtain an exclusive-OR result, and write the exclusive-OR result into the redundancy buffer.

[0101] Specifically, before writing the XOR result into the redundancy buffer, it is needed to determine whether the redundancy buffer is in the available state, if the redundancy buffer is in the available state, the write request is executed: the data in each data buffer is written into the corresponding normal data logical unit one by one, and the data in each data buffer is XOR processed to obtain the XOR result, and the XOR result is written into the redundancy buffer.

[0102] In the embodiment of the application, after the processor receives the write request, it first detects the identification information of the redundancy buffer, determines whether the redundancy buffer is in the available state according to the identification information, and then determines whether to execute the write request or suspend the write request.

[0103] If the redundancy buffer is in the unavailable state, it indicates that the resources of the redundancy buffer are occupied, and the request is suspended, and the write request is in the waiting command waiting for the redundancy buffer to complete the cleaning until the redundancy buffer changes from the unavailable state to the available state, and the write request is continued to be executed.

[0104] If the redundancy buffer is in the available state, the write request is directly executed, and specifically, the data in each data buffer in the cache space is written into the corresponding normal data logical unit in the flash medium one by one, and the data in each data buffer in the cache space is XOR processed to obtain the XOR result, and the XOR result is written into the redundancy buffer.

[0105] Among them, the data in each data buffer in the cache space is XOR processed to obtain the XOR result, and the XOR result is written into the redundancy buffer, and specifically, the data in a plurality of data buffers in the cache space is XOR operated to obtain a check bit, and the check bit is sent to the redundancy buffer for temporary storage.

[0106] Step S403: After writing the XOR result into the redundancy buffer, the data of the redundancy buffer is written into the check data logical unit.

[0107] Specifically, the check bit temporarily stored in the redundancy buffer is written into the corresponding check data logical unit in the flash medium, and it is determined whether the check bit and the buffer data are written successfully.

[0108] It is determined whether the check bit and the buffer data are written successfully, and specifically, the written buffer data is XOR operated to obtain a new check bit, and compared with the above check bit, if the new check bit and the above check bit are inconsistent, it indicates that the data access is inconsistent, and the write error occurs, and it is determined that the writing fails; otherwise, it is determined that the writing is successful, and the data in the redundancy buffer is released.

[0109] Data in the redundant buffer is released, specifically, the redundant buffer enters a cleaning state, and when the redundant buffer ends the cleaning state, i.e., cleaning is completed, the redundant buffer is switched from the unusable state to the available state.

[0110] The embodiment of the present application provides a data protection method, which comprises the following steps: receiving a write request; determining at least two data buffers corresponding to the write request; writing data in each data buffer into a corresponding normal data logic unit one by one, and performing XOR processing on the data in each data buffer to obtain an XOR result, and writing the XOR result into a redundant buffer; and writing data of the redundant buffer into a check data logic unit after the XOR result is written into the redundant buffer, thereby improving the write performance of the flash device.

[0111] Please refer to Figure 5 , Figure 5 is a flowchart of processing a first write request provided by the embodiment of the present application;

[0112] As shown in Figure 5 , the steps of processing a first write request provided by the embodiment of the present application comprise the following steps:

[0113] Step S501: receiving a first write request.

[0114] The write request in the embodiment of the present application comprises a first write request and a second write request, wherein the first write request contains first data information to be written, wherein the first data information comprises first address information and the like, wherein the first address information comprises address information of a normal data logic unit corresponding to each data buffer in a flash medium, for example, a first data buffer corresponds to a first normal data logic unit, a second data buffer comprises a second normal data logic unit,..., an (n-1)th data buffer corresponds to an (n-1)th normal data logic unit, and assuming that the first write request is used to write data of all data buffers in a cache space into a flash medium, the first data information comprises address information of the first normal data logic unit, address information of the second normal data logic unit,..., and address information of the (n-1)th normal data logic unit in the flash medium. According to the first data information, at least two data buffers corresponding to the first write request are determined, wherein the first write request is used to write data in the cache space into the flash medium and to perform XOR processing on the data in the data buffer to the redundant buffer.

[0115] It can be understood that the two operations of writing data in the cache space to the flash medium and XOR processing data in the data buffer to the redundant buffer are independent, the former is slower in writing the flash medium (NAND), and the latter is faster in XOR processing to the redundant buffer. Among them, the operation of writing data in each data buffer in the cache space to the flash medium is processed in parallel, and the operation of XOR processing data in the data buffer to the redundant buffer is processed in series.

[0116] XOR processing data in the data buffer to the redundant buffer, that is, XOR processing or modulo two addition of data in the data buffer, wherein the modulo two addition is a binary operation, which is equivalent to the XOR operation, and the operation rule is that two sequences are added by bit modulo two, that is, the corresponding bits in the two sequences are added without carry, and the same is 0 and the different is 1. That is, 1 plus 1 equals 0, 0 plus 0 equals 0, 1 plus 0 equals 1, and 0 plus 1 equals 1.

[0117] Step S502: detecting the identification information of the redundant buffer.

[0118] In the embodiment of the application, after receiving the first write request and determining the at least two data buffers corresponding to the first write request, the identification information of the redundant buffer is detected, and whether the redundant buffer is in an available state is judged according to the identification information, wherein the identification information includes an available state mark and an unavailable state mark.

[0119] Specifically, the embodiment of the application uses a state mark to manage each redundant buffer in the buffer. Specifically, after receiving the first write request and determining the at least two data buffers corresponding to the write request, the identification information of the redundant buffer is obtained, wherein the identification information includes the state data of the redundant buffer.

[0120] Step S503: judging whether the identification information of the redundant buffer is an available state mark.

[0121] Specifically, the identification information of the redundant buffer is compared with the preset state mark to judge whether the identification information of the redundant buffer is the preset available state mark. For example, 0 is set as an unavailable state mark, which is used to indicate that the redundant buffer is in a resource cleaning state and / or in a resource occupied state, and 1 is set as an available state mark, which is used to indicate that the resources of the redundant buffer have been released and are in a cleaning end state.

[0122] If the identification information of the redundant buffer is the available state mark, step S504 is entered: determining that the redundant buffer is in an available state.

[0123] Step S505: write the data in each data buffer to the corresponding normal data logical unit one by one, and perform XOR operation on the data in each data buffer to obtain an XOR result, and write the XOR result to the redundancy buffer.

[0124] Specifically, when the identification information of the redundancy buffer is the available state mark, it is determined that the redundancy buffer resource is not occupied, and that the redundancy buffer is in the available state. The first write request is executed, which is used to write the data in each data buffer in the cache space to the corresponding normal data logical unit of the flash medium, and perform XOR operation on the data in each data buffer in the cache space to obtain an XOR result, and write the XOR result to the redundancy buffer. Specifically, the XOR operation is used to perform XOR operation on the data in a plurality of data buffers to obtain a check bit, wherein the XOR result includes the check bit data, and the XOR result is written to the redundancy buffer.

[0125] It should be noted that each byte on the normal data unit contains 8 bits, and each byte on the logical data unit additionally contains 1 bit as a check bit. The check bit is used to determine whether a bit error occurs during data writing. Therefore, the check bit is generated by performing XOR operation on a plurality of bits, for example, when there are an odd number of 1s in the plurality of bits, the check bit is 1, and when there are an even number of 1s, the check bit is 0.

[0126] If the identification information of the redundancy buffer is the unavailable state mark, step S506 is entered: it is determined that the redundancy buffer is in the unavailable state.

[0127] Step S507: suspend processing of the first write request.

[0128] Specifically, when the identification information of the redundancy buffer is the unavailable state mark, it is determined that the redundancy buffer resource is occupied and is in the unavailable state, at which time the process is suspended and the next available state mark information is detected.

[0129] The embodiment of the application provides a data protection method. After receiving a first write request, identification information of a redundancy buffer is detected, and whether the redundancy buffer is in an available state is determined according to the identification information. If the redundancy buffer is in the available state, the first write request is executed, otherwise, processing of the first write request is suspended. By determining whether the redundancy buffer is in the available state, it is determined whether to execute the write request. If yes, the data is directly written to the flash medium, so that the step of writing the data from the redundancy buffer to the cache space is reduced, and the write performance of the flash device is improved.

[0130] Please refer to Figure 6 , Figure 6 is a flowchart of processing a second write request provided by the embodiment of the application;

[0131] As Figure 6 shown, the embodiment of the present application provides a step of processing a second write request, which comprises:

[0132] Step S601: receiving a second write request.

[0133] Specifically, the second write request contains second data information to be written, wherein the second data information comprises second address information and the like, and the second address information is the address information of the check data logic unit in the flash medium. An exclusive-OR result corresponding to the second write request is determined according to the second data information, wherein the exclusive-OR result comprises check bit data, and the second write request is used to write the check bit data of the first redundant buffer to the check data logic unit.

[0134] Step S602: writing the data of the first redundant buffer to the check data logic unit.

[0135] The second write request is executed to write the check bit data of the first redundant buffer to the check data logic unit.

[0136] Step S603: determining whether the data of the first redundant buffer is written successfully.

[0137] After the second write request is executed, it is determined whether the check bit data of the first redundant buffer is written successfully.

[0138] Specifically, the buffer data written to the flash medium is subjected to exclusive-OR operation to obtain new check bits, and the new check bits are compared with the check bit data. If the new check bits are inconsistent with the check bit data, it indicates that an error occurs in the process of writing the data to the flash medium, and it is determined that the data is written unsuccessfully. If the new check bits are consistent with the check bit data, it is determined that the data is written successfully.

[0139] If yes, go to step S604.

[0140] Step S604: obtaining a data cleaning instruction.

[0141] If the new check bits are consistent with the check bit data, it is determined that the data is written successfully. At this time, the software releases the data of the first redundant buffer, so that the first redundant buffer can be used by other requests. Meanwhile, the flash management module issues a data cleaning instruction to the hardware module, wherein the data cleaning instruction is used to clean the data in the first redundant buffer.

[0142] Step S605: cleaning the data of the first redundant buffer.

[0143] Specifically, the data cleaning instruction is obtained, and the data of the first redundant buffer is cleaned according to the data cleaning instruction.

[0144] Step S606: modifying the identification information of the first redundancy buffer to a usable state mark.

[0145] Specifically, after the first redundancy buffer is cleaned up, the identification information of the first redundancy buffer is modified to a usable state mark.

[0146] If no, go to step S607: keeping the data of the first redundancy buffer in the redundancy buffer.

[0147] If the new check bit and the check bit data are inconsistent, it is determined that the data writing fails, at this time, the data of the first redundancy buffer is kept in the redundancy buffer, so that the subsequent error processing operation can directly call out the data in the redundancy buffer.

[0148] The embodiment of the application provides a data protection method, when receiving a second write request, writing the data of the first redundancy buffer to a check data logic unit, judging whether the data of the first redundancy buffer is written successfully, if yes, cleaning up the data of the first redundancy buffer, and after the first redundancy buffer is cleaned up, modifying the identification information of the first redundancy buffer to a usable state mark, if no, keeping the data of the first redundancy buffer in the redundancy buffer, so that the step of writing the data from the redundancy buffer to the cache space is reduced, thereby reducing the time of reading out the data to the cache space, and further improving the write performance of the flash memory device; and when a program error occurs, the data of the redundancy buffer can be directly read for error processing, and the processing efficiency of the program error is improved.

[0149] Please refer to Figure 7 , Figure 7 is a schematic diagram of module flow provided by the embodiment of the application for host writing data;

[0150] Among them, the flash memory device includes a flash memory controller, the flash memory controller includes a firmware system, the firmware system is used to connect a host (HOST) and a flash memory array, and realize the processing of data IO.

[0151] As shown in Figure 7 , the firmware system includes:

[0152] A front-end module, namely (Front End, FE), connects a data storage interface, is used to process and communicate with a host system protocol and distribute a data storage operation sent by the host system, namely is used to acquire a host command to generate an IO operation, wherein the front-end module is further used to be responsible for the communication protocol of the host, the analysis of the host command and the solid state disk command and the like operation;

[0153] The flash management module, i.e. a flash algorithm module, also known as a flash translation layer (FTL), is connected to the front-end module, and is used for management of a mapping table and management of a data granularity for writing to a flash memory, for example, mapping processing of an IO operation to determine a flash array to be issued, and the flash management module sends the IO operation to the back-end module (BE) to enable the back-end module (BE) to receive the IO operation;

[0154] The back-end module, i.e. (BE), is connected to the flash management module and the hardware module, and is used for management of flash data read and write and flash commands.

[0155] The hardware module, i.e. (HW Op Nand Mode), is used for operating a flash medium (NAND) and is controlled by the back-end module.

[0156] The front-end module processes the host command to generate an IO operation, and sequentially passes through the flash management module and the back-end module to operate the hardware module. For example, when the host reads data, the host (Host) sends a host command to the flash device (device), the front-end module (FE) of the flash device receives the host command, the front-end module distributes the host command to the flash management module (FTL), the flash management module receives the host command, performs logical-to-physical conversion processing, and then sends a NAND read operation request to the back-end module (BE), the back-end module (BE) receives the NAND read operation request, and sends a hardware instruction to the hardware module to operate the NAND in parallel.

[0157] Please refer to Figure 8 , Figure 8 is a flowchart of another data protection method provided by the embodiment of the application;

[0158] The data protection method is applied to a flash device, and the flash device includes a cache space and a flash medium, a redundant buffer area, the cache space includes at least two data buffer areas, the flash medium includes at least two normal data logical units and one check data logical unit, each normal data logical unit corresponds to one data buffer area, the flash device includes a flash controller, and the flash controller includes a flash management module and a back-end module.

[0159] As shown in Figure 8 , the data protection method includes the following steps.

[0160] Step S801: The flash management module sends a first write request to the back-end module, wherein the first write request corresponds to at least two data buffer areas.

[0161] Specifically, after the front-end module obtains the host command, the front-end module processes the host command to generate a first write request operation. The flash management module is connected to the front-end module and is configured to manage the request operation. Specifically, the flash management module sends the first write request to the back-end module, so that the back-end module receives the first write request. The first write request corresponds to write requests of at least two data buffers.

[0162] The first write request is configured to write data in each data buffer to a corresponding normal data logical unit one by one, or perform exclusive OR processing on the data in each data buffer to obtain an exclusive OR result, write the exclusive OR result to a redundant buffer, and write data in the first redundant buffer to a check data logical unit.

[0163] After the back-end module receives the first write request, the back-end module writes data in each data buffer to a corresponding normal data logical unit one by one, and performs exclusive OR processing on the data in each data buffer to obtain an exclusive OR result, and writes the exclusive OR result to a redundant buffer.

[0164] Specifically, the back-end module is connected to the flash management module and a hardware module, and is configured to manage flash data read and write and flash commands. Specifically, after the back-end module receives the first write request, the back-end module first determines whether the redundant buffer is available. If the redundant buffer is in an available state, the back-end module sends a command to the hardware module and performs operation processing in parallel. Specifically, the hardware module writes data in each data buffer to a corresponding normal data logical unit one by one, and performs exclusive OR processing on the data in each data buffer to obtain an exclusive OR result, and writes the exclusive OR result to a redundant buffer.

[0165] Specifically, please refer to Figure 9 , Figure 9 is a flowchart of another data protection method provided by the embodiment of the present application;

[0166] The data protection method is applied to a flash device. The flash device includes a cache space and a flash medium, and a redundant buffer. The cache space includes at least two data buffers. The flash medium includes at least two normal data logical units and one check data logical unit. Each normal data logical unit corresponds to one data buffer. The flash device includes a flash controller. The flash controller includes a front-end module, a flash management module, and a back-end module.

[0167] As shown in Figure 9 , the data protection method includes the following steps.

[0168] Step S901: sending a first write request.

[0169] Specifically, the flash memory management module sends a first write request to the back-end module. For example, after the front-end module obtains the host command, it processes it to generate a first write request. The flash memory management module is connected to the front-end module. Specifically, the flash memory management module receives the first write request issued by the front-end module, maps the first write request to determine the issued flash memory array, and sends the determined issued flash memory array to the back-end module, wherein the issued flash memory array corresponds to at least two data buffers.

[0170] Step S902: Determine whether the redundant buffer is in an available state.

[0171] Specifically, after receiving the first write request, the backend module determines whether the redundant buffer is in an available state.

[0172] It should be noted that for the specific steps to determine whether the redundant buffer is in an available state, please refer to Figures 4 to 6 The relevant descriptions in and the relevant contents of the above embodiments are not repeated here.

[0173] In an embodiment of the present application, the redundant buffer includes a first redundant buffer, a second redundant buffer, ..., an Nth redundant buffer, wherein the present application manages each redundant buffer in a status marking manner, and the cleaning of each redundant buffer is controlled by a back-end module. Specifically, after the data of each redundant buffer is written to the flash memory medium, the hardware module does not automatically clean up the data of the redundant buffer, but instead sends a data cleaning instruction to the hardware module through the back-end module. Before cleaning, the identification information of the redundant buffer is set to an unavailable status mark; after cleaning, the identification information of the redundant buffer is set to an available status mark.

[0174] Furthermore, the flash memory management module and the back-end module in the embodiment of the present application run on different processors. For example, the flash memory management module runs through the first processor of the flash memory controller, and the back-end module runs through the second processor of the flash memory controller. Since the data cleaning process of the redundant buffer is faster, the flash memory management module does not perceive the cleaning process. When a program error occurs, the back-end module does not clean up immediately, but sends the error instruction to the flash memory management module, and the flash memory management module performs further error processing.

[0175] If the redundant buffer is in an unavailable state, proceed to step S903.

[0176] Step S903: suspend processing of the first write request.

[0177] Specifically, if the identification information corresponding to the redundant buffer is the unusable state mark, it is determined that the redundant buffer is in the unusable state, and the backend module suspends processing of the first write request to wait for the redundant buffer to be converted to the available state and then processes the first write request.

[0178] If the identification information corresponding to the redundant buffer is the available state mark, it is determined that the redundant buffer is in the available state, and step S904 is entered.

[0179] Step S904: Write the data in each data buffer in the cache space to the corresponding normal data logical unit one by one, and perform XOR processing on the data in each data buffer to obtain an XOR result, and write the XOR result to the redundant buffer.

[0180] Specifically, if the redundant buffer is in the available state, the backend module executes the first write request, writes the data in each data buffer in the determined cache space to the corresponding normal data logical unit one by one, and performs XOR processing on the data in each data buffer to obtain an XOR result, and writes the XOR result to the redundant buffer.

[0181] Step S905: Send a second write request.

[0182] Specifically, the flash management module sends a second write request to the backend module, for example: the flash management module receives a second write request issued by the front-end module, performs mapping processing on the second write request to determine the issued flash array, and sends the determined flash array to the backend module, wherein the issued flash array corresponds to at least one redundant buffer.

[0183] Step S906: Write the data in the first redundant buffer to the check data logical unit.

[0184] Specifically, the redundant buffer includes a plurality of redundant buffers, such as a first redundant buffer, and after the backend module receives the second write request sent by the flash management module, the data in the first redundant buffer is written to the check data logical unit.

[0185] Step S907: Determine whether the data in the first redundant buffer is written successfully.

[0186] Specifically, after the backend module receives the second write request and writes the data in the first redundant buffer to the check data logical unit, it determines whether the data in the first redundant buffer is written successfully.

[0187] If the data in the first redundant buffer is written successfully, a data write success message is returned to the flash management module, and a data cleaning instruction is sent to the hardware module to make the hardware module clean the data in the first redundant buffer.

[0188] It should be noted that the specific step of determining whether the data of the first redundant buffer is written successfully can refer to the related description in Figures 4 to 6 and the related content of the above embodiments, which will not be repeated here.

[0189] If the data of the first redundant buffer fails to be written, step S908 is entered.

[0190] Step S908: sending a data write failure message.

[0191] Specifically, if the data of the first redundant buffer fails to be written, the backend module returns data write failure information to the flash management module. After returning the data write failure information, the backend module sends an error handling instruction to the hardware module, so that the hardware module retains the data of the first redundant buffer in the redundant buffer, or writes the data of the first redundant buffer to the flash medium, or reads the data of the first redundant buffer to the cache space. The hardware module retains the data of the first redundant buffer in the redundant buffer, or writes the data of the first redundant buffer to the flash medium, or reads the data of the first redundant buffer to the cache space.

[0192] If the data of the first redundant buffer is successfully written, step S909 is entered.

[0193] Step S909: sending a data write success message.

[0194] Specifically, if the data of the first redundant buffer is successfully written, the backend module returns data write success information to the flash management module.

[0195] Step S910: releasing the first redundant buffer.

[0196] Specifically, after the flash management module receives the data write success message sent by the backend module, the flash management module releases the first redundant buffer, so as to provide a write request for other flash management modules.

[0197] Step S911: sending a data cleaning instruction.

[0198] Specifically, after returning the data write success information, the backend module sends a data cleaning instruction to the hardware module, so that the hardware module cleans the data of the first redundant buffer.

[0199] Step S912: cleaning the data of the first redundant buffer.

[0200] Specifically, the hardware module receives the data cleaning instruction and cleans the data of the first redundant buffer.

[0201] In the process of cleaning the data of the first redundant buffer by the hardware module, the identification information of the first redundant buffer is marked as the unavailable state, and the identification information of the first redundant buffer is kept as the unavailable state in the cleaning process; after the cleaning of the data of the first redundant buffer is completed, the identification information of the first redundant buffer is marked as the available state, so that the first redundant buffer can be used by other first write requests.

[0202] The embodiment of the present application provides a data protection method, which comprises the following steps: after a first write request is sent to a back-end module by a flash memory management module, it is judged whether a redundant buffer is in an available state; if yes, the data in each data buffer is written into a corresponding normal data logical unit one by one, and the data in each data buffer is processed by exclusive OR to obtain an exclusive OR result, the exclusive OR result is written into the redundant buffer, and after a second write request sent by the flash memory management module is received, the data in the first redundant buffer is written into a check data logical unit, and it is judged whether the data in the first redundant buffer is written successfully; if yes, a hardware module is controlled to clean the data in the first redundant buffer; if not, data write failure information is returned to the flash memory management module, and an error processing instruction is sent to the hardware module, so that the hardware module is controlled to retain the data in the first redundant buffer; and if not, the processing of the first write request is suspended.

[0203] Through the interaction between the flash memory management module and the back-end module, the writing performance of the flash memory device can be improved.

[0204] Please refer to Figure 10 , Figure 10 which is another structural schematic diagram of a flash memory device provided by the embodiment of the present application.

[0205] As Figure 10 shown, the flash memory device 100 comprises at least one processor 101 and a memory 102 connected with the at least one processor 101, Figure 10 in which the at least one processor 101 is taken as an example. The memory 102 stores instructions executable by the at least one processor 101, and the instructions are executed by the at least one processor 101, so that the at least one processor 101 can execute the data protection method described above. Figures 4 to 6 The processor 101 and the memory 102 can be connected through a bus or other means, Figure 10 in which the connection through the bus is taken as an example.

[0206] The processor 101 can be any type of processor with one or more processing cores. It can execute single-thread or multi-thread operations, and is used to parse instructions to perform operations such as obtaining data, performing logical operation functions and issuing operation processing results.

[0207] The processor 101 is configured to receive a first write request, determine at least two data buffers corresponding to the write request, judge whether a redundant buffer is in an available state, if the redundant buffer is in the available state, write data in each data buffer to a corresponding normal data logical unit one by one, and perform XOR processing on the data in each data buffer to obtain an XOR result, and write the XOR result to the redundant buffer; receive a second write request, write data in a first redundant buffer to a check data logical unit, and judge whether the data in the first redundant buffer is written successfully; if the data in the first redundant buffer is written successfully, obtain a data cleaning instruction, clean the data in the first redundant buffer according to the data cleaning instruction, modify identification information of the first redundant buffer to an available state mark after cleaning of the first redundant buffer is completed; if the data in the first redundant buffer fails to be written, retain the data in the first redundant buffer in the redundant buffer; and if the redundant buffer is in an unavailable state, suspend processing of the first write request.

[0208] By judging whether the redundant buffer is in the available state first, and then judging whether the data in the first redundant buffer is written successfully, the application can solve the problem that in the prior art, in order to avoid writing errors, data is read from a buffer to a memory, and then written to a flash medium through the memory, thereby reducing the write performance, and the write performance of the flash device is improved.

[0209] The memory 102 is a non-transitory computer readable storage medium, and can be configured to store a non-transitory software program, a non-transitory computer executable program and a module, such as a program instruction / module corresponding to the data protection method in the embodiment of the application. The processor 101 can implement the data protection method in the method embodiment by running the non-transitory software program, the instruction and the module stored in the memory 102.

[0210] The memory 102 can include a program storage area and a data storage area, wherein the program storage area can store an operating system and an application program required by at least one function; and the data storage area can store data created according to use of a remote control device. In addition, the memory 102 can include a high-speed random access memory, and can further include a non-transitory memory, such as at least one magnetic disk storage device, a flash memory device, or other non-transitory solid-state memory device.

[0211] The memory 102 stores instructions executable by the at least one processor 101; and the at least one processor 101 is configured to execute the instructions to implement the data protection method in any method embodiment described above.

[0212] Some embodiments of the application further provide a flash device, comprising:

[0213] The flash memory controller is used to execute the data protection method provided by the above-mentioned embodiments, and the specific content can refer to the related content mentioned in the above-mentioned embodiments, which will not be repeated here.

[0214] The cache space includes at least two data buffers, and is used to cache data corresponding to the write request.

[0215] The flash memory medium includes at least two normal data logical units and one check data logical unit, wherein the normal data logical unit is used to store normal data, and the check data logical unit is used to store check data.

[0216] The redundant buffer is used to cache the XOR result of the data corresponding to the write request.

[0217] It should be noted that the related content of the flash memory controller, the cache space, the flash memory medium and the redundant buffer can refer to the related content provided by the above-mentioned embodiments, which will not be repeated here.

[0218] Further, the embodiment of the present application further provides a non-transitory computer readable storage medium, which stores computer executable instructions. The computer executable instructions are executed by one or more processors 101, so that the above-mentioned one or more processors 101 execute the data protection method in any method embodiment.

[0219] Further, the embodiment of the present application further provides a computer program product, wherein the computer program product includes a non-transitory computer readable storage medium storing a computer program, and the computer program is operable to make a computer execute the data protection method in any method embodiment. The computer program product can be a software installation package.

[0220] The device embodiments described above are only schematic, wherein the units shown as separate components can or can not be physically separate, and the components shown as units can or can not be physical units, that is, they can be located in one place, or distributed on multiple network units. Part or all of the modules can be selected according to actual needs to achieve the purpose of the embodiment scheme. Part or all of the modules can be selected according to actual needs to achieve the purpose of the embodiment scheme.

[0221] Those skilled in the art can clearly understand the implementation of the embodiments by the description of the above embodiments, and the embodiments can be implemented by means of software plus a general hardware platform, and of course, can also be implemented by hardware. Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by a computer program in a computer program product instructing related hardware, and the computer program can be stored in a non-transitory computer readable storage medium, and the computer program includes program instructions, when the program instructions are executed by related equipment, the related equipment can execute the processes of the above-mentioned embodiment methods. The storage medium can be a magnetic disc, an optical disc, a read-only memory (ROM) or a random access memory (RAM) and the like.

[0222] The product can execute the data protection method provided by the embodiments of the application, has the function modules and beneficial effects corresponding to the execution of the data protection method. The technical details not described in detail in the embodiments can refer to the data protection method provided by the embodiments of the application.

[0223] Finally, it should be noted that: the above embodiments are only used to illustrate the technical solutions of the present application, and not to limit them; under the idea of the present application, the technical features in the above embodiments or different embodiments can also be combined, the steps can be implemented in any order, and there are many other changes of the different aspects of the present application as described above. In order to be simple, they are not provided in details; although the present application is described in detail with reference to the foregoing embodiments, those skilled in the art should understand that: it can still modify the technical solutions recorded in the foregoing embodiments, or make equivalent replacement for part of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A data protection method, characterized in that: Applied to a flash memory device, the flash memory device includes a cache space, a flash memory medium, and a redundant buffer, the cache space includes at least two data buffers, the flash memory medium includes at least two normal data logic units and one check data logic unit, wherein each of the normal data logic units corresponds to one of the data buffers, the method comprising: receiving a write request, and determining at least two data buffers corresponding to the write request; Writing the data in each of the data buffers into the corresponding common data logic unit one by one, and performing an XOR process on the data in each of the data buffers to obtain an XOR result, and writing the XOR result into the redundant buffer; After writing the XOR result into the redundant buffer, writing the data of the redundant buffer into the verification data logic unit; The write request includes a first write request, wherein the first write request is used to write the data in the cache space to the flash memory medium and perform XOR processing on the data in the data buffer and write the data to the redundant buffer; The redundant buffer includes a first redundant buffer, the first redundant buffer is used to store the XOR result; the write request also includes a second write request, the second write request is used to write the data of the first redundant buffer to the verification data logic unit, and the method further includes: After writing the data in the first redundant buffer into the verification data logic unit, determining whether the data in the first redundant buffer is written successfully; If the data in the first redundant buffer is written successfully, clearing the data in the first redundant buffer; If writing of data into the first redundant buffer fails, the data into the first redundant buffer is retained in the redundant buffer.

2. The method according to claim 1, characterized in that The method further comprises: After receiving the first write request, determining whether the redundant buffer is in an available state; If the redundant buffer is in an available state, writing the data in each of the data buffers into the corresponding normal data logic unit one by one, and performing an XOR process on the data in each of the data buffers to obtain an XOR result, and writing the XOR result into the redundant buffer; If the redundant buffer is in an unavailable state, processing of the first write request is suspended.

3. The method according to claim 2, characterized in that The determining whether the redundant buffer is in an available state includes: Detecting identification information of the redundant buffer, wherein the identification information includes an available state flag and an unavailable state flag; If the identification information of the redundant buffer is an available state flag, determining that the redundant buffer is in an available state; If the identification information of the redundant buffer is an unavailable state flag, it is determined that the redundant buffer is in an unavailable state.

4. The method according to claim 1, wherein The clearing of data in the first redundant buffer includes: Get data cleaning instructions; Cleaning the data in the first redundant buffer according to the data cleaning instruction; After the first redundant buffer is cleared, the identification information of the first redundant buffer is modified to an available state mark.

5. A flash memory device, characterized in that: include: at least one processor; and a memory communicatively connected to the at least one processor; wherein, The memory stores instructions that can be executed by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to execute the data protection method according to any one of claims 1 to 4.

6. A data protection method, characterized in that: The method is applied to a flash memory device, the flash memory device including a cache space, a flash memory medium, and a redundant buffer, the cache space including at least two data buffers, the flash memory medium including at least two normal data logic units and one check data logic unit, wherein each normal data logic unit corresponds to one of the data buffers, the flash memory device including a flash memory controller, the flash memory controller including a flash memory management module and a backend module, and the method comprising: The flash memory management module sends a first write request to the backend module, wherein the first write request corresponds to at least two of the data buffers; After receiving the first write request, the back-end module writes the data in each of the data buffers into the corresponding common data logic unit one by one, and performs an XOR process on the data in each of the data buffers to obtain an XOR result, and writes the XOR result into the redundant buffer; The flash memory device includes a hardware module, the redundant buffer includes a first redundant buffer, and the first redundant buffer is used to store the XOR result. The method further includes: The flash memory management module sends a second write request to the back-end module; After receiving the second write request sent by the flash memory management module, the back-end module writes the data in the first redundant buffer to the verification data logic unit, and determines whether the data in the first redundant buffer is written successfully; If the data in the first redundant buffer is written successfully, a data writing success message is returned to the flash memory management module, and a data cleaning instruction is sent to the hardware module so that the hardware module cleans up the data in the first redundant buffer; If the data writing in the first redundant buffer fails, the data writing failure information is returned to the flash memory management module, and an error handling instruction is sent to the hardware module, so that the hardware module retains the data in the first redundant buffer in the redundant buffer according to the error handling instruction, or writes the data in the first redundant buffer to the flash memory medium, or reads the data in the first redundant buffer to the cache space.

7. The method according to claim 6, characterized in that The method further comprises: After receiving the first write request, the backend module determines whether the redundant buffer is in an available state; If the redundant buffer is in an available state, writing the data in each of the data buffers into the corresponding normal data logic unit one by one, and performing an XOR process on the data in each of the data buffers to obtain an XOR result, and writing the XOR result into the redundant buffer; If the redundant buffer is in an unavailable state, processing of the first write request is suspended.

8. A flash memory device, characterized in that: include: A flash memory controller, configured to execute the method according to any one of claims 6 to 7; A cache space including at least two data buffers for caching data corresponding to a write request; A flash memory medium, comprising at least two normal data logic units and one check data logic unit, wherein the normal data logic unit is used to store normal data, and the check data logic unit is used to store check data; A redundant buffer is used to cache the XOR result of the data corresponding to the write request.

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