Method for implementing analog and multi-value content addressable memory based on pulse width modulation ferroelectric field effect transistor

Abstract

The present invention provides a method for implementing analog and multi-value content addressable memory based on pulse width modulation ferroelectric field effect transistors, belonging to the field of new storage and computing technologies. The present invention realizes ACAM and MCAM based on pulse width modulation FeFET by using complementary information of pulse width. Compared with the implementation methods of traditional ACAM and MCAM, it does not require additional transistors and complex analog peripheral circuits, and only a few common logic gates are needed to achieve it. It has a more concise implementation method and lower hardware overhead, and only requires a voltage amplitude VDD during the search process, making it easier to be compatible with digital systems. In addition, based on the encoding method of the search query and storage entry of pulse width, its storage range is not limited by the storage window of FeFET, and more bit numbers of MCAM can be obtained to further improve the storage density and search energy efficiency of CAM, having broad application prospects.

Description

Technical Field

[0001] The present invention relates to the field of novel storage and computing technologies, and particularly relates to a design of an analog and multi-valued content addressable memory based on a pulse width modulation ferroelectric field effect transistor. Background Art

[0002] A content addressable memory (CAM) can perform search operations efficiently and in parallel, and is widely used in routers, database searches, in-memory computing, and neuromorphic computing and other efficient machine learning models. A CAM is a special type of memory for parallel search. In addition to the read operation and write operation of a conventional memory, it can also perform a unique search operation. A CAM was initially used to accelerate table look-up operations related to packet forwarding and classification in network routers. Since a CAM can complete the entire search operation within one clock cycle, it has a significant acceleration effect compared to other hardware- or software-based search systems. Based on the CAM, a ternary content addressable memory (TCAM) with the ability to store the "X" state of a mask was further developed. The TCAM can achieve exact matching or fuzzy matching, improving the table look-up efficiency. In the big data era, since a CAM can complete the matching operation between an input vector (query) and all stored vectors (entry) within one search cycle and perform feature retrieval based on distance metrics according to the degree of mismatch, it is extremely attractive in edge machine learning tasks such as pattern matching, video, and image processing.

[0003] The CAM design based on traditional static random access memory (SRAM) occupies a huge cell area, limiting its storage density for mapping computationally intensive algorithms. Moreover, the resulting large parasitic capacitance will further increase the search delay and power consumption. The CAM designed based on various emerging non-volatile memories, such as resistive random access memory (RRAM), phase change memory (PCM), and ferroelectric field effect transistor (FeFET), etc., has a reduced cell area, search delay, and energy consumption. In addition, an analog content addressable memory (ACAM) designed by further utilizing the multi-valued storage ability of emerging non-volatile memories can not only improve the storage density of the CAM by quantifying it into a multi-valued content addressable memory (MCAM), but also be used in more extensive application scenarios such as decision trees and deep random forests based on its unique range matching operation. However, the current ACAM and MCAM designs based on emerging non-volatile memories need to be realized through additional hardware overhead, that is, through additional control transistors or additional peripheral complex circuits to implement the matching operation between the analog input and the storage range, and the corresponding programming and search methods are also more complex. Combining the above analysis, it is of great significance to realize a more compact and simply operated ACAM and MCAM design. Summary of the Invention

[0004] In view of the problems existing in the above prior art, the present invention proposes a design of ACAM and MCAM based on pulse width modulation FeFET. Compared with the current ACAM and MCAM designs, it does not require additional control transistors and complex peripheral circuits. The encoding method of the search query and storage entry based on the pulse width enables the matching range of the ACAM based on pulse width modulation FeFET to be unrestricted by the storage window of the FeFET, and can be quantized into an MCAM with a larger number of bits, improving the storage density and search energy efficiency of the CAM. Moreover, only one voltage amplitude is required during the search process, making it easier to be compatible with digital systems.

[0005] The technical solution of the present invention is as follows:

[0006] A method for implementing an analog content addressable memory (ACAM) based on pulse width modulation FeFET, characterized by comprising a CAM array composed of CAM cells, each CAM cell being composed of two N-type FeFETs. The drains of the FeFETs are connected to two match lines ML and ML b , the gates of the FeFETs are connected to two search lines SL and SL b , the sources of the FeFETs are grounded. In the CAM array, one row of CAM cells shares two match lines ML and ML b , ML and ML b serve as the two inputs of a row-shared AND gate, and the output of the AND gate is the matching result Vout of this row; one column of CAM cells shares two search lines SL and SL b , the search signal SL and the reference signal Ref of each column serve as the two inputs of a column-shared XOR gate, and the output of the XOR gate is SL b ; a precharge circuit is used to charge the two match lines of each row; during the stage of programming the ACAM storage entry, certain programming voltages are respectively applied to the gates of the two FeFETs to program them to certain threshold voltages V TH1 and V TH2 . When voltages VDD are applied to the gates of the two FeFETs, ML1 and ML2 precharged to VDD by the precharge circuit exhibit discharge speeds related to the FeFET threshold voltages, and the times for them to discharge to VDD / 2 are t1 and t2 respectively. During the search stage, first, ML1 and ML2 are precharged to VDD by the precharge circuit, and a search voltage V SL with a certain pulse width T SL and an amplitude of VDD is applied to the SL end, T SL is of a size corresponding to the size of the search query, and the width of the reference signal Ref is T Ref , then the signal at the SLb end is a pulse width of T Ref-T SL and a search voltage V with an amplitude of VDD SLb , when the pulse width T SL of V SL is less than the discharge time t1 of the FeFET it acts on, and the pulse width T SLb of V Ref -T SL is less than the discharge time t2 of the FeFET it acts on, during the search process, the voltages of ML1 and ML2 will not discharge below VDD / 2, and the output result Vout of the AND gate remains high level, indicating a match. Therefore, the matching range can be obtained as T SL is located between T Ref -t2 and t1. By independently programming the two FeFETs respectively, different discharge times t1 and t2 can be obtained, and then different matching ranges can be obtained. If the pulse width of V SL is large, it will cause T SL to be greater than t1, causing ML1 of the FeFET that V SL acts on to drop below VDD / 2 during the search phase. And if the pulse width of V SL is small, it will cause T SL to be less than T Ref -t2, causing ML2 of the FeFET that V SLb acts on to drop below VDD / 2 during the search phase. Both situations will cause the output result Vout to become low level during the search phase, indicating a mismatch, thus realizing the range matching operation of the ACAM unit.

[0007] Furthermore, by programming the CAM units in the array into multiple non-overlapping pulse width matching ranges, that is, the analog content addressable memory ACAM can be quantized into a multi-value content addressable memory MCAM. The multiple discrete pulse width matching ranges represent the multi-level entry states of the MCAM. The pulse width of the quantized multi-level search query corresponding to the entry can take the intermediate value of the storage range. Then, during the search operation, according to the search query, apply V with the corresponding pulse width SL . Only when the multi-level search query is consistent with the multi-level storage entry, the pulse width of V SL is within the matching range, making the time that V SL and V SLb act on the FeFET respectively less than the discharge time of the corresponding FeFET, so that during the search process, both ML1 and ML2 are greater than VDD / 2, making the output result Vout high level, indicating a match. Otherwise, when the multi-level search query is inconsistent with the multi-level storage entry, it will cause V SLThe pulse width is outside the matching range, causing ML1 or ML2 to drop below VDD / 2 during the search phase, making the output result Vout go low, indicating a mismatch, and realizing the MCAM matching operation.

[0008] The pulse width T of the reference signal Ref Ref It can be adjusted according to the discharge time of the programmed FeFET. The FeFET can be programmed into a low-threshold state and a high-threshold state, so that it is in a fully conducting state and a cut-off state respectively when the gate input is the VDD voltage, and the corresponding discharge times are a very short time and a time approaching infinity. Therefore, by modulating the threshold voltage of the FeFET and selecting an appropriate Ref, the storage range of the ACAM based on pulse-width modulation of the FeFET can be from a very small pulse-width range to a theoretically infinite pulse-width range. If used in MCAM, the number of quantifiable states can be further increased.

[0009] In summary, the ACAM and MCAM designs based on pulse-width modulation of FeFET are realized by using complementary information of pulse width. Compared with the implementation method of traditional ACAM, only one voltage amplitude VDD is required during the search process, which is compatible with digital systems. In addition, the coding method of the search query and storage entry based on pulse width enables its storage range not to be limited by the storage window of FeFET, and more bits of MCAM can be obtained, further improving the density and search energy efficiency of CAM.

[0010] For the ACAM and MCAM designs based on pulse-width modulation of FeFET proposed by the present invention, the ferroelectric material needs to use various HfO2-doped multi-domain ferroelectric materials such as HfO2 doped with Zr (HZO) and HfO2 doped with Al (HfAlO), and the device gate stack can be based on various structures such as MFMIS, MFIS, and MFS.

[0011] The technical effects of the present invention are as follows:

[0012] 1. For the ACAM design based on pulse-width modulation of FeFET proposed by the present invention, the ACAM based on pulse-width modulation of FeFET is realized by using complementary information of pulse width. Compared with the implementation method of traditional ACAM, no additional transistors and complex analog peripheral circuits are required inside the cell, and only a few logic gates that can be shared are needed to achieve it. It has a more concise implementation method and lower hardware overhead, and only one voltage amplitude VDD is required during the search process, making it easier to be compatible with digital systems.

[0013] 2. The MCAM design based on pulse-width modulation FeFET proposed by the present invention, with the encoding method of search query and storage entry based on pulse width, enables its storage range not to be limited by the storage window of FeFET, and more bits of MCAM can be obtained to further improve the storage density and search energy efficiency of CAM. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 It is a schematic diagram of the CAM cell structure based on pulse-width modulation FeFET of the present invention;

[0015] Figure 2 It is a schematic diagram of the ACAM function implementation principle based on pulse-width modulation FeFET of the present invention; In the figure: A) is a schematic diagram of the I D -V G characteristic diagram of two FeFETs of each CAM cell; B) is a schematic diagram of the discharge characteristics of two FeFETs of each CAM cell; C) is a schematic diagram of the search signal waveform of each CAM cell; D) is a schematic diagram of the output result of each CAM cell;

[0016] Figure 3 It is a schematic diagram of the MCAM function implementation principle based on pulse-width modulation FeFET of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0017] The following further clearly and completely elaborates the present invention with reference to the accompanying drawings and through specific embodiments.

[0018] The CAM array structure based on pulse-width modulation FeFET of the present invention is as Figure 1 shown. The CAM cell consists of two N-type FeFETs (F1 and F2), a two-input exclusive-OR gate shared by rows, a two-input AND gate shared by columns, and a precharge circuit. The gates of F1 and F2 are respectively connected to two search lines SL and SLb. SL and the reference signal Ref serve as the two inputs of the exclusive-OR gate, and the output of the exclusive-OR gate is SLb. The drains of F1 and F2 are connected to two match lines ML1 and ML2. ML1 and ML2 serve as the two inputs of the AND gate, and the output of the AND gate is the match result Vout of this row. During the search operation, first, the two match lines ML1 and ML2 are charged to VDD through the precharge circuit, and then a search voltage is applied. If Vout remains high during the search process, it indicates a match; otherwise, it indicates a mismatch.

[0019] Figure 2 It is a schematic diagram of the ACAM function implementation principle based on pulse-width modulation FeFET of this embodiment. During the stage of programming the ACAM storage entry, programming voltages greater than the coercive voltage are respectively applied to the gates of F1 and F2 to program their threshold voltages to V TH1 and V TH2, when a voltage VDD is applied to the gates of F1 and F2, ML1 and ML2 pre-charged to VDD by the pre-charge circuit exhibit discharge speeds related to the threshold voltages of F1 and F2, and the times for them to discharge to VDD / 2 are t1 and t2 respectively; in the search phase, first ML1 and ML2 are pre-charged to VDD by the pre-charge circuit, and a search voltage V with a pulse width of T corresponding to the search query is applied to the SL terminal. SL of the search voltage V SL , the width of the reference signal Ref is T Ref , then the signal at the SLb terminal is a pulse width of T SLb is T Ref -T SL , only when the pulse width T of V SL is less than the discharge time t1 of F1, and the pulse width T of V SL is less than the discharge time t2 of F2, can it be ensured that during the search process, the voltages of ML1 and ML2 will not discharge below VDD / 2, and the output result Vout of the AND gate remains high level, indicating a match, that is, the match range is T SLb is located between T SLb -t2 and t1. If the pulse width of V SL is large, it will cause T Ref to be greater than t1, causing ML1 to discharge below VDD / 2 through F1 during the search phase, and if the pulse width of V SL is small, it will cause T SL to be less than T SL -t2, causing ML2 to discharge below VDD / 2 through F2 during the search phase, and making the output result Vout become low level during the search phase, indicating a mismatch. SL is less than T Ref -t2, which will cause ML2 to discharge below VDD / 2 through F2 during the search phase, making the output result Vout become low level during the search phase, indicating a mismatch.

[0020] As Figure 3 shown, by programming the CAM cells in the above array into multiple non-overlapping pulse width match ranges, the ACAM can be quantized into an MCAM. The multiple discrete pulse width match ranges represent the multi-level entry states of the MCAM. The pulse width of the quantized multi-level search query corresponding to the entry can take the intermediate value of the pulse width match range to obtain a greater detection margin and robustness. During the search operation, according to the search query, a V with the corresponding pulse width is applied. SL , when the multi-level search query is consistent with the multi-level stored entry, the pulse width of V SL is within the match range, making V SL and V SLbThe time each acting on the FeFET is less than the discharge time of the corresponding FeFET. During the search process, both ML1 and ML2 are greater than VDD / 2, and the output result Vout is at a high level, indicating a match; otherwise, when the multi-level search query is inconsistent with the multi-level storage entry, the pulse width of V SL is outside the matching range, and either ML1 or ML2 drops below VDD / 2 during the search phase, and the output result Vout becomes low level, indicating a mismatch.

[0021] This embodiment fully and detailedly elaborates on the implementation methods of ACAM and MCAM based on pulse-width modulation FeFET. The ACAM function is realized by using the complementary information of the pulse width. Compared with the implementation method of traditional ACAM, no additional transistors and complex analog peripheral circuits are required within the cell, and based on the encoding method of the search query and storage entry of the pulse width, it can be quantized into MCAM with more bits to improve the storage density and search energy efficiency of the CAM.

[0022] Finally, it should be noted that the purpose of disclosing the embodiments is to help further understand the present invention. However, those skilled in the art can understand that various substitutions and modifications are possible without departing from the spirit and scope of the present invention and the appended claims. Therefore, the present invention should not be limited to the content disclosed in the embodiments, and the scope of protection required by the present invention shall be subject to the scope defined by the claims.

Claims

1. A method for implementing an analog content addressable memory (ACAM), characterized in that, It includes a CAM array composed of CAM cells, each CAM cell consists of two N-type FeFETs, and the drains of the FeFETs are connected to two matching lines ML and ML b , the gates of the FeFETs are connected to two search lines SL and SL b , the sources of the FeFETs are grounded. In the CAM array, one row of CAM cells shares two matching lines ML and ML b , ML and ML b serve as the two inputs of an AND gate shared by the row, and the output of the AND gate is the matching result Vout of this row; one column of CAM cells shares two search lines SL and SL b , the search signal SL and the reference signal Ref of each column serve as the two inputs of an exclusive-OR gate shared by the column, and the output of the exclusive-OR gate is SL b ; the precharge circuit is used to charge the two matching lines of each row; during the stage of programming the ACAM to store an entry, a certain programming voltage is applied to the gates of the two FeFETs of the CAM cell respectively, and it is programmed to a certain threshold voltage V TH1 and V TH2 . When a voltage VDD is applied to the gates of the two FeFETs, ML1 and ML2 precharged to VDD by the precharge circuit exhibit a discharge speed related to the FeFET threshold voltage, and the times for them to discharge to VDD / 2 are t1 and t2 respectively. During the search stage, first, ML1 and ML2 are precharged to VDD by the precharge circuit, and a search voltage V SL with a certain pulse width T SL and an amplitude of VDD is applied to the SL end SL , the size of T Ref corresponds to the size of the search query, and the width of the reference signal Ref is T Ref , then the signal at the SLb end is a search voltage V SL with a pulse width of T SLb -T SL and an amplitude of VDD SL . When the pulse width T SLb of V Ref is less than the discharge time t1 of the FeFET it acts on, and the pulse width T SL of V SL -T Ref is less than the discharge time t2 of the FeFET it acts on, during the search process, the voltages of ML1 and ML2 will not discharge below VDD / 2, and the output result Vout of the AND gate remains high level, indicating a match, and the obtained matching range is T SL located between T SL -t2 and t1; if the pulse width of V SL The ML1 of the FeFET in operation drops below VDD / 2 during the search phase, or if the pulse width of V SL is small, T SL is less than T Ref -t2, V SLb If the ML2 of the FeFET in operation drops below VDD / 2 during the search phase, the output result Vout becomes low during the search phase, indicating a mismatch, and the ACAM matching operation is implemented.

2. A method for implementing a multi-value content addressable memory (ACAM), characterized in that, Using the ACAM described in claim 1, program the CAM cells in the array into a plurality of non - overlapping pulse - width matching ranges. The plurality of discrete pulse - width matching ranges represent the multi - level entry states of the MCAM. During a search operation, apply a V with a corresponding pulse width according to the search query. SL , when the multi - level search query is consistent with the multi - level stored entry, the pulse width of V SL is within the matching range, such that the time that V SL and V SLb each act on the FeFET is less than the discharge time of the corresponding FeFET. During the search process, both ML1 and ML2 are greater than VDD / 2, and the output result Vout is high, indicating a match; otherwise, when the multi - level search query is inconsistent with the multi - level stored entry, the pulse width of V SL is outside the matching range, and either ML1 or ML2 drops below VDD / 2 during the search phase, and the output result Vout becomes low, indicating a mismatch, thus implementing the MCAM matching operation.

3. The method according to claim 1 or 2, characterized in that, The FeFET is a device based on MFMIS, MFIS, or MFS.

4. The method according to claim 3, wherein The ferroelectric material of the FeFET uses HfO2 doped with Zr or HfO2 doped with Al.

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