A millimeter wave radar echo signal processing method and system

Abstract

The present application relates to the technical field of radar sensor, and relates to a millimeter wave radar echo signal processing method and system. When the surrounding environment is detected by a millimeter wave radar, a transmitting array generates and transmits FMCW radar wave detection pulses, a receiving array receives echo signals of the radar wave detection pulses reflected by targets in the environment, and the echo signals enter a receiving signal processor. The received signal pulses are converted into radar digital baseband signal sequences by a radio frequency front end module, a radar echo digital baseband intermediate signal sequence is obtained through first step digital baseband signal processing, the radar echo digital baseband intermediate signal sequence is transmitted to hardware for performing second step digital baseband processing through a high-speed data interface, the second step digital baseband processing is performed, CFAR and AoA detection are finally performed, and information of the detected target is obtained. Compared with a traditional scheme, the data amount of inter-chip transmission is greatly reduced, so that the baseband data scale that can be processed by the radar system is increased, and the radar detection capability is improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of radar sensor, in particular to a millimeter wave radar echo signal processing method and system. BACKGROUND

[0002] Millimeter wave radar refers to a radar device working in the 30-300GHz wave band (corresponding to the wavelength of 1-100mm). Because it has the characteristics of not being affected by weather and light conditions, long detection distance, light weight, small amount of required calculation, low manufacturing cost, etc., it is considered as one of the most important sensor technologies in automatic driving technology, and is used for high-precision, three-dimensional speed measurement, distance measurement and obstacle avoidance functions.

[0003] The mainstream radar waveform of the millimeter wave radar currently used in automatic driving technology is frequency-modulated chirp wave (FMCW). Under this waveform system, the radar transmits a series of chirp wave pulses, which form a radar frame. The time scale within each echo pulse is called fast time scale, also called distance dimension. The time scale between multiple pulses in the entire radar frame is called slow time scale, also called velocity dimension. For each echo pulse, the radar performs distance dimension Fourier transform to obtain the distance dimension information of the detected target. Then, for the entire radar frame, velocity dimension Fourier transform is performed to obtain the velocity dimension information of the detected target.

[0004] In the traditional radar chip scheme, the MMIC chip transmits the digital baseband signal of the chirp wave pulse to the hardware accelerator (HWA) or DSP chip through the inter-chip data interface for hardware signal processing. In order to obtain better detection performance, the data amount of the digital baseband signal also needs to be increased accordingly, which poses a major challenge to the transmission rate of the inter-chip data interface. SUMMARY

[0005] The present application aims to solve the problems in the background art by providing a millimeter wave radar echo signal processing method and system to solve the transmission bottleneck problem between the radar MMIC chip and the digital baseband chip, increase the baseband data scale that the radar chip can process, and thus improve the radar detection capability.

[0006] The technical scheme of the present application is a millimeter wave radar echo signal processing method, which comprises the following specific steps:

[0007] S1, radar detection is performed, and the echo signal of the radar transmission signal after reflection is received through a receiving array; the echo signal is processed to obtain a radar echo digital baseband signal;

[0008] S2, first step digital baseband signal processing is performed on the obtained radar echo digital baseband signal;

[0009] S21, Fourier transform the received time-domain radar signal sequence in fast time scale to obtain a radar range dimension Fourier domain signal sequence;

[0010] S22, data compression processing is performed on the radar range dimension Fourier domain signal sequence;

[0011] S23, the radar echo digital baseband intermediate signal after the first step of digital baseband signal processing is transmitted to the hardware for performing the second step of digital baseband processing through a high-speed data interface, and is temporarily stored in the memory of the hardware;

[0012] S24, when the time and the sequence number length are equivalent to the entire radar frame, the radar echo digital baseband intermediate signal is stored on the hardware for performing the second step of digital baseband processing, and the next step is performed;

[0013] S3, the radar echo digital baseband intermediate signal after the first step of digital baseband signal processing is subjected to the second step of digital baseband signal processing;

[0014] S31, a first signal sequence is taken out from the radar echo digital baseband intermediate signal of a radar frame along the slow time dimension, that is, a radar speed dimension to-be-processed signal sequence;

[0015] S32, data decompression processing is performed on the radar speed dimension to-be-processed signal sequence;

[0016] S33, Fourier transform is performed on the radar speed dimension to-be-processed signal sequence in slow time scale to obtain a radar speed dimension Fourier domain signal sequence;

[0017] S34, data compression processing is performed on the radar speed dimension Fourier domain signal sequence;

[0018] S35, the compressed radar speed dimension Fourier domain signal sequence is stored in the memory of the hardware for performing the second step of digital baseband processing along the slow time dimension;

[0019] S36, the steps of S31-S35 are repeatedly performed until the signal sequences of the radar echo digital baseband intermediate signal of the radar frame are all taken out, processed and stored in the memory again;

[0020] When S31 is repeatedly performed, the next signal sequence is taken out from the radar echo digital baseband intermediate signal of a radar frame along the slow time dimension, that is, a radar speed dimension to-be-processed signal sequence.

[0021] Preferably, in S1, the echo signal is converted into a radar echo digital baseband signal through frequency down-conversion, low-pass filtering, analog-to-digital conversion and calibration processing by a radio frequency front-end module.

[0022] Preferably, the first step of digital baseband signal processing also includes antenna coupling coefficient elimination;

[0023] After executing S21, subtract the antenna coupling coefficient sequence from the radar range-dimensional Fourier domain signal sequence; this antenna coupling coefficient sequence should be acquired in advance and stored in the radar echo signal processing system.

[0024] Preferably, the compression algorithm in S22 is a block floating-point algorithm or an exponential Golomb code algorithm.

[0025] Preferably, the second step of digital baseband signal processing includes static component removal;

[0026] After executing S32, subtract the average value from the radar velocity dimension of the signal sequence to be processed.

[0027] Preferably, in the second step of digital baseband signal processing, if the memory capacity of the hardware performing the second step of digital baseband signal processing is sufficient, the data compression operation of S34 can be omitted.

[0028] Preferably, in the second step of digital baseband signal processing, corresponding demultiplexing processing is performed according to the multiplexing method adopted by the radar transmitted signal.

[0029] Preferably, after the second step of digital baseband signal processing, constant false alarm rate detection and angle of arrival detection are also included;

[0030] The constant false alarm rate (CFAR) detection and angle of arrival (ADR) detection steps are performed on the hardware of the second-step digital baseband signal processing or in cooperation with multiple hardware components, including the hardware of the second-step digital baseband signal processing.

[0031] A millimeter-wave radar echo signal processing system, which executes the millimeter-wave radar echo signal processing method as described in any one of claims 1-8, includes one or more transmitting arrays, at least one receiving array, and at least one signal processor;

[0032] The radar wave signals emitted by the transmitting array provide target information after being reflected by the target in the surrounding environment;

[0033] A transmitter array includes one or more transmitter elements;

[0034] Each transmitting element can correspond to a single or multiple transmitting antennas;

[0035] Each transmitting element may contain one or more phase control units;

[0036] The receiving array receives the echo signal reflected from the transmitted signal by the environmental target; the receiving array detects the phase and amplitude information of the echo signal;

[0037] A receiver array comprises one or more receiver array elements;

[0038] Each receiving element can correspond to a single or multiple receiving antennas;

[0039] For each transmit array or receive array, if it corresponds to multiple array elements, then the spacing between its array elements is less than or equal to λ / 2, where λ is the wavelength of the radar waveform.

[0040] Multiple array elements can be arranged in a straight line or in a plane;

[0041] The signal processor includes an MMIC chip, a high-speed data interface, and an MCU chip;

[0042] The MMIC chip includes an RF front-end module and an HWA-MMIC module.

[0043] The MCU chip includes an HWA-MCU module and an on-chip MCU memory;

[0044] The HWA-MMIC module and the MCU on-chip memory are connected via a high-speed data interface.

[0045] Preferably, the RF front-end module has down-conversion, low-pass filtering, analog-to-digital conversion, and calibration functions; the RF front-end module converts the received radar echo analog RF signal into a digital baseband signal suitable for processing;

[0046] The HWA-MMIC module features antenna coupling coefficient removal, fast time-scale Fourier transform, and data compression functions.

[0047] The HWA-MCU module features data decompression, data compression, slow time-scale Fourier transform, static component removal, radar signal demultiplexing, and constant false alarm rate detection.

[0048] Compared with the prior art, the present invention has the following beneficial technical effects:

[0049] In traditional radar chip solutions, the MMIC chip transmits the digital baseband signal of the chirped wave pulse to a hardware accelerator (HWA) or DSP chip for hardware signal processing via an inter-chip data interface. This invention splits the digital baseband processing of the radar echo signal into two parts: the first part is pre-processed on the MMIC chip, while the second part is still completed on the hardware accelerator or DSP chip. The first part of digital baseband signal processing includes data compression. After completing the first part of digital baseband signal processing, the radar echo signal is transmitted via the inter-chip data interface. Compared to traditional solutions, this significantly reduces the amount of data transmitted between chips, thereby increasing the baseband data scale that the radar system can process and improving radar detection capabilities. Attached Figure Description

[0050] Figure 1 This is a schematic diagram of a radar device system according to an embodiment of the present invention.

[0051] Figure 2 This is a schematic diagram of the structure and functional modules of the receiving signal processor according to an embodiment of the present invention.

[0052] Figure 3 This is a time-frequency domain diagram of the radar detection signal sequence transmitted according to an embodiment of the present invention.

[0053] Figure 4 This is a schematic diagram of the radar data block access method according to an embodiment of the present invention.

[0054] Figure 5 This is a flowchart of the first step of digital baseband signal processing in an embodiment of the present invention.

[0055] Figure 6 This is a flowchart of the second step of digital baseband signal processing in an embodiment of the present invention.

[0056] Reference numerals: 1. Radar device; 2. Transmitting array; 111. Transmitting element; 12. Receiving array; 121. Receiving element; 13. Processor; 131. MMIC chip; 1311. RF front-end module; 1312. HWA-MMIC module; 132. MCU chip; 1321. HWA-MCU module; 1322. MCU on-chip memory; 133. High-speed data interface. Detailed Implementation

[0057] Example 1

[0058] The main solution of this invention is as follows: When performing millimeter-wave radar detection on the surrounding environment, the transmitting array generates and transmits FMCW radar wave detection pulses, and the receiving array receives the echo signals reflected by the radar wave detection pulses from targets within the environment, which then enter the receiving signal processor. In the receiving signal processor, the received analog radar radio frequency signal pulses are converted into a radar digital baseband signal sequence through a radio frequency front-end module. The radar echo digital baseband intermediate signal sequence is obtained through the first step of digital baseband signal processing. This intermediate signal sequence is then transmitted through a high-speed data interface to the hardware executing the second step of digital baseband processing. Finally, CFAR and AoA detection are performed to obtain useful information about the detected targets within the environment.

[0059] like Figure 1 As shown, Figure 1 This is a schematic diagram of a radar device system according to an embodiment of the present invention.

[0060] like Figure 1As shown, the radar device 1 may include one or more transmitting arrays 11, receiving arrays 12, and signal processors 13.

[0061] The transmitting array 11 should be able to transmit radar wave signals that, after being reflected by a target in the surrounding environment, can provide information about the target (e.g., relative position, relative velocity, etc.). Preferably, this signal is a frequency modulated continuous wave (FMCW) signal, but it can also be other radar signals that meet the above requirements.

[0062] like Figure 1 As shown, a transmit array 11 may include one or more transmit elements 111. Each transmit element may correspond to a single or multiple transmit antennas. Each transmit element may include one or more phase control units, which may be implemented using devices such as phase shifters or delay lines.

[0063] The receiving array 12 should be able to receive the echo signal reflected from the transmitted signal by an environmental target. The receiving array should be able to detect information such as the phase and amplitude of the echo signal. Optionally, it can also detect other useful information about the echo signal.

[0064] like Figure 1 As shown, a receiver array 12 may include one or more receiver elements 121. Each receiver element may correspond to one or more receiver antennas.

[0065] For each transmitting or receiving array, if it corresponds to multiple elements, then the element spacing should be less than or equal to λ / 2, where λ is the wavelength of the radar waveform. For example... Figure 1 As shown, multiple array elements can be arranged in a straight line, in a plane, or according to other rules.

[0066] The receiving signal processor 13 should have the function of analyzing all information received by the receiving array 12. Additionally, the receiving signal processor 13 may have the function of controlling the configuration and operation of the radar system 1, such as controlling the transmission and reception of detection signals, calculating tracking parameters, etc.

[0067] like Figure 2 As shown, Figure 2 This is a schematic diagram of the structure and functional modules of the receiving signal processor 13 according to an embodiment of the present invention.

[0068] like Figure 2 As shown, the signal processor 13 includes an MMIC chip 131, a high-speed data interface 132, and an MCU chip 133.

[0069] like Figure 2As shown, the MMIC chip 131 includes an RF front-end module 1311 and an HWA-MMIC module 1312.

[0070] The RF front-end module 1311 has functions such as downconversion, low-pass filtering, analog-to-digital conversion, and calibration. It also has the necessary function of converting the received radar echo analog RF signal into a digital baseband signal suitable for processing.

[0071] The HWA-MMIC module 1312 features antenna coupling coefficient removal, fast time-scale Fourier transform, and data compression functions. The HWA-MMIC module 1312 also has other necessary signal processing or control functions.

[0072] like Figure 2 As shown, the MCU chip 132 includes an HWA-MCU module 1321 and an MCU on-chip memory 1322.

[0073] The HWA-MCU module 1321 features functions such as data decompression, data compression, slow-time-scale Fourier transform, static component removal, radar signal demultiplexing, and constant false alarm rate detection. The HWA-MCU module 1321 also has other necessary signal processing or control functions.

[0074] The size of the on-chip memory 1322 of the MCU needs to be able to store all the radar echo digital baseband intermediate signals of one radar frame. In addition, the on-chip memory 1322 of the MCU also needs to be able to store other intermediate data information and cache sequences required by other MCU chips.

[0075] The HWA-MMIC module 1312 and the MCU on-chip memory 1322 are connected via a high-speed data interface 133. The high-speed data interface 133 can be any high-speed serial data interface used for data transfer between internal devices (e.g., MIPI CSI-2, Ethernet, USB, SATA, DisplayPort, etc.), a die-to-die high-speed parallel interface (e.g., USR, XSR), or any other suitable data interface.

[0076] like Figure 3 As shown, Figure 3 This is a time-frequency domain diagram of the radar detection signal sequence transmitted according to an embodiment of the present invention.

[0077] like Figure 3 As shown, the detection signal emitted by the transmitting array is a series of FMCW pulses with a certain repetition interval. Within one FMCW pulse, its instantaneous frequency increases linearly with time.

[0078] like Figure 3As shown, the time repetition period of a radar pulse is called the pulse period. The duration of a pulse is called the pulse width, the time from the end of one pulse to the start of the next is called the pulse rest time, and the ratio of the pulse width to the pulse period is called the duty cycle.

[0079] like Figure 3 As shown, in this embodiment of the invention, the number of pulses in an FMCW radar frame is denoted as M.

[0080] like Figure 4 As shown, after the receiving array receives the radar echo signal, it undergoes down-conversion and digitization by the RF front-end to obtain a digital baseband signal. The arrangement of multiple radar pulse data points from a radar frame in a matrix is ​​called a radar data block (RDC). Radar data blocks can be accessed along either the fast or slow time dimension.

[0081] like Figure 4 As shown, in this embodiment of the invention, the length of the digital baseband signal sequence of a radar pulse is denoted as N. Therefore, the radar data block is an N×M matrix.

[0082] like Figure 5 As shown, Figure 5 This is a flowchart of the first step of digital baseband signal processing according to an embodiment of the present invention. The first step of digital baseband signal processing is as follows:

[0083] The HWA-MMIC 1312 receives a digital baseband signal sequence 211 of a radar echo pulse obtained from the RF front end. Let the digital baseband signal sequence of the i-th pulse within a radar frame be:

[0084] s i (n), 1≤n≤N

[0085] HWA-MMIC 1312 to s i (n) Perform burr and noise removal 212, and denote the result as s. i ′(n).

[0086] HWA-MMIC 1312 to s i Perform a fast time-scale Fourier transform on ′(n)213, and denote the result as S. i ′(n):

[0087]

[0088] HWA-MMIC 1312 vs S i Antenna coupling coefficient elimination is performed using ′(n) by 214, and the result is denoted as S. i "(n) (The antenna coupling coefficient is denoted as c(n)):

[0089] Si "(n)=S i c'(n) - c(n), 1 ≤ n ≤ N

[0090] HWA-MMIC 1312 vs S i "(n) Perform BFP data compression, and the result is denoted as S i "′(n):

[0091] S i "'(n)=BFP[S i "(n)], 1≤n≤N

[0092] S via high-speed interface 133 i "′(n) is transferred to the MCU on-chip memory 1322

[0093] The radar pulse signal sequence is stored along the range dimension in the on-chip memory 1322 of the MCU, forming part of the radar data block R(n,m), and the correspondence is as follows:

[0094]

[0095] If the Nth pulse in the radar frame has been processed, the process ends. Otherwise, return to the first step of the digital baseband signal processing flow, wait for the next pulse in the radar frame, and process it.

[0096] like Figure 6 As shown, Figure 6 This is a flowchart of the second step of digital baseband signal processing according to an embodiment of the present invention. The second step of digital baseband signal processing is as follows:

[0097] In the on-chip memory 1322 of the MCU, the next radar velocity dimension signal sequence to be processed is retrieved along the slow time dimension. Let u be the j-th radar velocity dimension signal sequence to be processed in a radar data block R(n,m). j (m), then we have:

[0098] u j (m), 1≤n≤M

[0099] u j The correspondence between (m) and R(n,m) is as follows:

[0100]

[0101] HWA-MCU 1321 pair u j (m) Decompress BFP data 222, and denote the result as u′. j (m):

[0102] u′ j (m)=BFP′[uj [(m)], 1 ≤ m ≤ M

[0103] HWA-MCU 1321 pair u′ j (m) Perform static component removal 223, and denot the result as u″. j (m):

[0104] u″ j (m)=u′ j (m)-mean(u′ j (m)), 1≤m≤M

[0105] HWA-MCU 1321 pair u″ j (m) Perform a velocity-dimensional Fourier transform 224, and denote the result as U″. j (m):

[0106]

[0107] HWA-MCU 1321 to U″ j (m) Perform BFP data compression 225, and denot the result as U″′. j (m):

[0108] U″′ j (m)=BFP[U″ j [m], 1 ≤ n ≤ N

[0109] Will U″′ j (m) Store the data back into the MCU on-chip memory 1322. If the capacity of the MCU on-chip memory 1322 is large enough, the data may not be overwritten at the retrieved location, but stored in other available locations.

[0110] If the Mth radar velocity dimension signal sequence within the radar data block has been processed, then the constant false alarm rate detection 226 and angle of arrival detection 227 are executed to obtain the position, velocity, and angle information of the detected target in the surrounding environment, thus completing the signal processing of the radar echo digital baseband signal. Otherwise, the process returns to the second step of digital baseband signal processing, retrieving the next radar velocity dimension signal sequence from the radar data block for processing.

[0111] The embodiments of the present invention have been described in detail above with reference to the accompanying drawings. However, the present invention is not limited thereto. Various changes can be made within the scope of knowledge possessed by those skilled in the art without departing from the spirit of the present invention.

Claims

1. A method for processing millimeter-wave radar echo signals, characterized in that, The specific steps include the following: S1. Perform radar detection by receiving the echo signal after the radar transmitted signal is reflected through a receiving array; process the echo signal to obtain the radar echo digital baseband signal. S2. Perform the first step of digital baseband signal processing on the acquired radar echo digital baseband signal; S21. Perform a fast time-scale Fourier transform on the received time-domain radar signal sequence to obtain the radar range-dimensional Fourier domain signal sequence. S22. Perform data compression processing on the radar range-dimensional Fourier domain signal sequence; S23. The radar echo digital baseband intermediate signal after the first step of digital baseband signal processing is transmitted to the hardware that performs the second step of digital baseband processing through the high-speed data interface, and temporarily stored in the memory of the hardware. S24. After the radar echo digital baseband intermediate signals with a time and sequence length equivalent to the entire radar frame are stored in the hardware that performs the second step of digital baseband processing, proceed to the next step. S3. Perform a second step of digital baseband signal processing on the intermediate digital baseband signal of the radar echo after the first step of digital baseband signal processing. S31. Extract the first signal sequence from the intermediate signal of the radar echo digital baseband of a radar frame along the slow time dimension, which is the radar velocity dimension signal sequence to be processed. S32. Perform data decompression processing on the radar velocity dimension signal sequence to be processed; S33. Perform a slow-time-scale Fourier transform on the radar velocity dimension signal sequence to be processed to obtain the radar velocity dimension Fourier domain signal sequence. S34. Perform data compression processing on the radar velocity-dimensional Fourier domain signal sequence; S35. The compressed radar velocity Fourier domain signal sequence is stored along the slow time dimension into the memory of the hardware that performs the second step of digital baseband processing. S36. Repeat steps S31-S35 until the signal sequence of the radar echo digital baseband intermediate signal of this radar frame is completely extracted, processed and stored back into the memory. When S31 is executed repeatedly, the next signal sequence is extracted from the intermediate signal of the radar echo digital baseband of a radar frame along the slow time dimension, which is the radar velocity dimension signal sequence to be processed.

2. The millimeter-wave radar echo signal processing method according to claim 1, characterized in that, In S1, the echo signal is converted into a radar echo digital baseband signal through downconversion, low-pass filtering, analog-to-digital conversion, and calibration processing via the RF front-end module.

3. The millimeter-wave radar echo signal processing method according to claim 1, characterized in that, The first step of digital baseband signal processing also includes antenna coupling coefficient elimination; After executing S21, subtract the antenna coupling coefficient sequence from the radar range-dimensional Fourier domain signal sequence; this antenna coupling coefficient sequence should be acquired in advance and stored in the radar echo signal processing system.

4. The millimeter-wave radar echo signal processing method according to claim 1, characterized in that, The compression algorithm in S22 is either a block floating-point algorithm or an exponential Golomb code algorithm.

5. The millimeter-wave radar echo signal processing method according to claim 1, characterized in that, The second step of digital baseband signal processing includes static component removal; After executing S32, subtract the average value from the radar velocity dimension of the signal sequence to be processed.

6. The millimeter-wave radar echo signal processing method according to claim 1, characterized in that, In the second step of digital baseband signal processing, if the memory capacity of the hardware performing the second step of digital baseband signal processing is sufficient, the data compression operation of S34 can be omitted.

7. The millimeter-wave radar echo signal processing method according to claim 1, characterized in that, In the second step of digital baseband signal processing, demultiplexing processing is performed according to the multiplexing method used by the radar transmitted signal.

8. The millimeter-wave radar echo signal processing method according to claim 1, characterized in that, The second step, digital baseband signal processing, also includes constant false alarm rate detection and angle of arrival detection. The constant false alarm rate (CFAR) detection and angle of arrival (ADR) detection steps are performed on the hardware of the second-step digital baseband signal processing or in cooperation with multiple hardware components, including the hardware of the second-step digital baseband signal processing.

9. A millimeter-wave radar echo signal processing system, executing the millimeter-wave radar echo signal processing method as described in any one of claims 1-8, characterized in that, It includes one or more transmit arrays, at least one receive array, and at least one signal processor; The radar wave signals emitted by the transmitting array provide target information after being reflected by the target in the surrounding environment; A transmitter array includes one or more transmitter elements; Each transmitting element can correspond to a single or multiple transmitting antennas; Each transmitting element may contain one or more phase control units; The receiving array receives the echo signal reflected from the transmitted signal by the environmental target; the receiving array detects the phase and amplitude information of the echo signal; A receiver array comprises one or more receiver array elements; Each receiving element can correspond to a single or multiple receiving antennas; For each transmit array or receive array, if it corresponds to multiple array elements, then the spacing between its array elements is less than or equal to λ / 2, where λ is the wavelength of the radar waveform. Multiple array elements can be arranged in a straight line or in a plane; The signal processor includes an MMIC chip, a high-speed data interface, and an MCU chip; The MMIC chip includes an RF front-end module and an HWA-MMIC module. The MCU chip includes an HWA-MCU module and an on-chip MCU memory; The HWA-MMIC module and the MCU on-chip memory are connected via a high-speed data interface.

10. A millimeter-wave radar echo signal processing system according to claim 9, characterized in that, The RF front-end module has down-conversion, low-pass filtering, analog-to-digital conversion, and calibration functions; the RF front-end module converts the received radar echo analog RF signal into a digital baseband signal suitable for processing; The HWA-MMIC module features antenna coupling coefficient removal, fast time-scale Fourier transform, and data compression functions. The HWA-MCU module features data decompression, data compression, slow time-scale Fourier transform, static component removal, radar signal demultiplexing, and constant false alarm rate detection.

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