Isolation Circuit for Serial Bus and Device Isolation Method

Abstract

The present invention provides an isolation circuit for a serial bus and a device isolation method. The isolation circuit includes: a hot plug signal control unit configured to generate a corresponding hot plug signal according to the communication state of an external device and send the hot plug signal to a hot plug unit on a first serial bus to control the hot plug unit; an IO detection unit is connected to a baseboard management controller on a motherboard through a second serial bus, and is configured to obtain the communication state of the external device according to the current operating state of the hot plug unit, and determine the control authority of the BMC over the first serial bus at the current moment through the communication state; a switch unit is connected to the external device through the first serial bus and connected to the BMC through the second serial bus, and is configured to switch the on / off state of the channel between the BMC and the external device according to the control authority. The present invention avoids interference between the I2C communication of the slave device and the I2C bus communication of the motherboard.

Description

Technical Field

[0001] The present invention relates to the field of communication technologies, and particularly to an isolation circuit for a serial bus and a device isolation method. Background Art

[0002] The two-wire serial bus (Inter-Integrated Circuit, abbreviated as I2C) protocol is a two-wire serial communication method, including a serial data line (Serial Data Line, abbreviated as SDA) and a serial clock line (Serial Clock Line, abbreviated as SCL), providing a solution for communication between a master device and a slave device. Devices connected to the I2C bus transmit information to each other through these two lines. Since both SDA and SCL are bidirectional lines, they can interact with each other. However, the I2C bus is a synchronous half-duplex communication method, and data can only be operated in one direction at the same time, and data interaction cannot be performed simultaneously.

[0003] As a multi-master bus, the I2C bus supports multiple masters to send data on the bus simultaneously, but only one master can transmit data at the same time. Therefore, it is necessary to determine which master obtains the control right of the bus through arbitration. Other devices that do not obtain the master control right can only wait until they obtain the control right of the bus to perform data transmission.

[0004] In the existing server design, the Baseboard Management Controller (abbreviated as BMC) serves as the only master device on the motherboard's I2C bus, connecting to the slave devices on the motherboard through the System Management Bus (abbreviated as SMBUS), and connecting to the I2C buses of various external devices. For various external devices, these external devices themselves also have complex SMBUS buses, including their own I2C master devices to achieve self-monitoring and management functions. In the current I2C bus communication method, communication between only one master device and one slave device can be achieved at the same time (theoretically speaking, if the content transmitted by two masters is exactly the same, then they can be successfully transmitted without errors, except for this case), and other devices are in an idle state passively. However, in a multi-master and multi-slave I2C bus, any slave device may be frequently accessed by multiple master devices, and the communication of any master device will cause other master devices to wait, resulting in interference between the I2C communication of the slave device and the I2C bus communication of the motherboard, causing errors in the SMBUS management of the server. Therefore, there is an urgent need for an isolation circuit for a serial bus and a device isolation method to solve the above problems. Summary of the Invention

[0005] In view of the problems existing in the prior art, the present invention provides an isolation circuit for a serial bus and a device isolation method.

[0006] The present invention provides an isolation circuit for a serial bus, including a hot plug signal control unit, an input / output (IO) detection unit, and a switch unit, where:

[0007] The hot plug signal control unit is configured to generate a corresponding hot plug signal according to the communication state of an external device, and send the hot plug signal to a hot plug unit on a first serial bus to control the operating state of the hot plug unit;

[0008] The IO detection unit is connected to a baseboard management controller (BMC) on a motherboard through a second serial bus, and is configured to obtain the communication state of the external device according to the operating state of the hot plug unit at the current moment, and determine the control authority of the BMC over the first serial bus at the current moment through the communication state;

[0009] The switch unit is connected to the external device through the first serial bus and connected to the BMC through the second serial bus, and is configured to switch the on / off state of the channel between the BMC and the external device according to the control authority;

[0010] Wherein, the first serial bus is the serial bus of the external device, the second serial bus is the serial bus of the motherboard, and the serial bus includes a serial data line and a serial clock line.

[0011] According to the isolation circuit for a serial bus provided by the present invention, the IO detection unit is an IO expander, a first expansion interface of the IO expander is connected to the hot plug signal control unit, and a second expansion interface of the IO expander is connected to the hot plug unit.

[0012] According to the isolation circuit for a serial bus provided by the present invention, the hot plug signal control unit includes a logic AND gate circuit and a logic OR gate circuit, where:

[0013] A first input end of the logic OR gate circuit is connected to the IO detection unit, a second input end of the logic OR gate circuit is connected to an output end of the logic AND gate circuit, and an output end of the logic OR gate circuit is connected to the hot plug unit;

[0014] Input ends of the logic AND gate circuit are connected to the first serial bus.

[0015] According to the isolation circuit for a serial bus provided by the present invention, a serial clock line of the first serial bus is reversely connected in series with a diode.

[0016] The present invention also provides a device isolation method based on the isolation circuit for a serial bus provided above, including:

[0017] Controlling a hot-swap unit between a baseboard management controller (BMC) on a main board and the external device through a hot-swap signal, and obtaining an operating state of the hot-swap unit at the current moment, where the hot-swap signal is generated by a hot-swap signal control unit according to a communication state of the external device at the current moment;

[0018] Obtaining the communication state of the external device at the current moment through an input / output (IO) detection unit according to the operating state of the hot-swap unit at the current moment;

[0019] Judging the communication state of the external device at the current moment, and performing on-off switching on a channel between the BMC and the external device according to a judgment result.

[0020] According to a device isolation method provided by the present invention, the controlling the hot-swap unit between the baseboard management controller (BMC) on the main board and the external device through the hot-swap signal, and obtaining the operating state of the hot-swap unit at the current moment includes:

[0021] If the communication state of the external device at the current moment is an idle state, generating a hot-swap high-level signal based on the hot-swap signal control unit;

[0022] Sending the hot-swap high-level signal to the hot-swap unit to control the hot-swap unit to be in an on state, and obtaining a first hot-swap signal, where the first hot-swap signal is a high-level READY signal generated by the hot-swap unit according to the hot-swap high-level signal;

[0023] The obtaining the communication state of the external device at the current moment through the input / output (IO) detection unit according to the operating state of the hot-swap unit at the current moment includes:

[0024] Based on the IO detection unit, when it is determined that the operating state of the hot-swap unit at the current moment is an on state according to the first hot-swap signal, obtaining that the external device is in an idle state at the current moment.

[0025] According to a device isolation method provided by the present invention, the method further includes:

[0026] If the communication state of the external device at the current moment is a data transmission state, generating a hot-swap low-level signal based on the hot-swap signal control unit;

[0027] Send the hot-swap low-level signal to the hot-swap unit to control the hot-swap unit to be in the off state, and obtain a second hot-swap signal, where the second hot-swap signal is a low-level READY signal generated by the hot-swap unit according to the hot-swap low-level signal;

[0028] The input / output IO detection unit obtains the communication status of the external device at the current moment according to the operating status of the hot-swap unit at the current moment, including:

[0029] Based on the IO detection unit, when it is determined that the operating status of the hot-swap unit at the current moment is the off state according to the second hot-swap signal, obtain that the external device is in the data transmission state at the current moment.

[0030] According to a device isolation method provided by the present invention, judging the communication status of the external device at the current moment, and according to the judgment result, performing on-off switching on the channel between the BMC and the external device, including:

[0031] If the external device is in the idle state at the current moment, turn on the channel between the BMC and the external device;

[0032] If the external device is in the data transmission state at the current moment, keep the channel between the BMC and the external device disconnected.

[0033] According to a device isolation method provided by the present invention, after the step of if the external device is in the data transmission state at the current moment, keep the channel between the BMC and the external device disconnected, the method further includes:

[0034] When the duration of the communication state of the external device being in the data transmission state is greater than a preset duration, turn on the channel between the BMC and the external device;

[0035] Based on the bus arbitration method, determine the control authority of the BMC over the first serial bus.

[0036] The present invention also provides an electronic device, including a memory, a processor, and a computer program stored on the memory and executable on the processor, where when the processor executes the program, the device isolation method as described in any one of the above is implemented.

[0037] The present invention also provides a non-transitory computer-readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, the device isolation method as described in any one of the above is implemented.

[0038] The isolation circuit for a serial bus and the device isolation method provided by the present invention set up an IO detection unit, enabling the BMC on the main board to obtain the I2C bus status of an external device according to the hot-swap unit of the external device. Then, based on the I2C bus status of the external device, when it is determined that data transmission cannot be performed between the master device and the external device at the current moment, the switch unit is used to keep the master device and the external device in an open circuit, isolating the external device currently in the communication state from the master device, and avoiding interference between the I2C communication of the slave device and the I2C bus communication of the main board. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] In order to more clearly illustrate the technical solutions in the present invention or the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. Obviously, the following drawings are some embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0040] Figure 1 It is a schematic diagram of time synchronization in the serial bus arbitration process of the prior art;

[0041] Figure 2 It is a schematic diagram of the arbitration process of two hosts in the prior art;

[0042] Figure 3 It is a schematic diagram of the connection of a multi-master multi-slave I2C bus provided by the present invention;

[0043] Figure 4 It is a schematic diagram of the structure of the isolation circuit for a serial bus provided by the present invention;

[0044] Figure 5 It is a schematic diagram of the overall structure of an isolation circuit for a serial bus provided by the present invention;

[0045] Figure 6 It is a schematic diagram of the flow of the device isolation method provided by the present invention;

[0046] Figure 7 It is a schematic diagram of the overall flow of the device isolation process provided by the present invention;

[0047] Figure 8 It is a schematic diagram of the structure of an electronic device provided by the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0048] To make the objectives, technical solutions and advantages of the present invention clearer, the technical solutions in the present invention will be clearly and completely described below with reference to the accompanying drawings in the present invention. Apparently, the described embodiments are some but not all of the embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art based on the embodiments in the present invention without creative efforts shall fall within the protection scope of the present invention.

[0049] The existing I2C bus arbitration method is divided into two parts, namely clock synchronization and arbitration. Among them, clock synchronization is achieved through the clock line SCL. Figure 1 For the time synchronization schematic diagram in the serial bus arbitration process of the prior art, reference can be made to Figure 1 As shown, when the clock (CLK1) of the master device 1 becomes low, it will keep the SCL at this level state until it reaches high level; if at this time the clock (CLK2) of another master device 2 is still low, the change of CLK1 from low to high will not change the state of the SCL line (it remains low). Therefore, the SCL line will be occupied by the device (master device 2) with the longest low-level period to control the bus, and the device (master device 1) with a short low-level period will enter the high-level waiting state at this time. Therefore, after the current master device (master device 1) releases the bus control right, master device 2 can obtain the bus control right.

[0050] Since the host can only start data transmission when the serial bus is idle, when two hosts may almost simultaneously generate a valid start signal on the serial bus, arbitration is required in this case to determine which host will occupy the bus control right to complete data transmission. The arbitration of the existing serial bus is carried out bit by bit. During the arbitration of each bit of data, Figure 2 For the schematic diagram of the arbitration process between two hosts in the prior art, reference can be made to Figure 2 As shown, when the clock line SCL is high, each host checks whether the level signal on the data bus SDA is the same as the one it wants to send. Since this process needs to last for many bits, theoretically, if the content transmitted by the two hosts is exactly the same, then they can successfully transmit without errors. However, if a host sends a high level but detects that the level on the SDA bus is low, it is considered that it has failed in arbitration and closes the data transmission on its own SDA data line, while the other host continues to complete its transmission.

[0051] In the current server design, as the only master device on the I2C bus of the motherboard, the BMC connects to various slave devices on the motherboard through the SMBUS bus and also connects to the I2C buses corresponding to each external device. For various external devices, since they also have a complex SMBUS bus of their own, including their own I2C master device to achieve self-monitoring and management functions. Therefore, in the entire server, a multi-master multi-slave I2C topology appears. Figure 3 The connection schematic diagram of the multi-master multi-slave I2C bus provided by the present invention can be referred to Figure 3 As shown, the motherboard BMC is called the master device master0, and the motherboard slave device is slave0_x; the master devices in multiple external devices are respectively master1, master2,..., masterN, and the slave devices in each external device are slave1_x, slave2_x,..., slaveN_x, N = 0, 1, 2,..., x = 0, 1, 2,.... When master0, as the highest master device, actively accesses master1 or master2, the clk clock comes from master0. At this time, master1 or master2 actively switches to a slave device; moreover, master0 will access any i2c device through regular polling or triggering, and master1 and master2 will also regularly poll their respective i2c slave devices.

[0052] In the communication method of the existing I2C bus, at the same moment, only the communication between one master device and one slave device can be achieved (theoretically speaking, if the content transmitted by two hosts is exactly the same, then they can successfully transmit without errors, except for this situation), and other devices are all in a passive idle state. Therefore, in a multi-master multi-slave I2C bus, any slave device may be frequently accessed by multiple master devices; the communication of any master device will cause the waiting of other master devices; moreover, the behavior of devices such as master1 and master2 pulling down SCL has a certain probability of causing the I2C of master0 to hang, resulting in an error in the SMBUS management of the server. Based on the problems existing in the above-mentioned prior art, the present invention isolates the influence of the I2C communication of the external device itself on the motherboard I2C communication by setting an isolation circuit for the serial bus; at the same time, a diode can also be reversely connected in series on the SCL to improve the arbitration priority of master0 on the motherboard and prevent the situation that the I2C bus of the motherboard BMC hangs due to the behavior of the external device actively pulling down the SCL.

[0053] Figure 4 The structural schematic diagram of the isolation circuit for the serial bus provided by the present invention is as Figure 4As shown in the figure, the present invention provides an isolation circuit for a serial bus, including a hot plug signal control unit 401, an input / output (IO) detection unit 402, and a switch unit 403, where:

[0054] The hot plug signal control unit 401 is configured to generate a corresponding hot plug signal according to the communication status of an external device, and send the hot plug signal to a hot plug unit on a first serial bus to control the operating state of the hot plug unit;

[0055] The IO detection unit 402 is connected to a baseboard management controller (BMC) on a motherboard through a second serial bus, and is configured to obtain the communication status of the external device according to the operating state of the hot plug unit at the current moment, and determine the control authority of the BMC 408 over the first serial bus at the current moment through the communication status;

[0056] The switch unit 403 is connected to the external device through the first serial bus and connected to the BMC through the second serial bus, and is configured to switch the on / off state of the channel between the BMC and the external device according to the control authority;

[0057] Wherein, the first serial bus is the serial bus of the external device, the second serial bus is the serial bus of the motherboard, and the serial bus includes a serial data line and a serial clock line.

[0058] In the present invention, the communication between the BMC of the motherboard and the external device is described. The serial bus at one end of the BMC is the SMBUS bus, which is connected to the I2C bus at one end of the external device through the switch unit 403. Specifically, in the existing main multi-slave I2C bus circuit, the present invention adds a controlled I2C isolation circuit. When the I2C bus of the external device is occupied, or when the motherboard has no need to access the external device, the I2C channel between the motherboard and the external device is closed through this isolation circuit.

[0059] In the present invention, by adding an Input / Output (IO) detection unit 402, it is possible to determine the I2C bus state of an external device without opening the I2C channel between the BMC and the external device. Further, the real-time I2C bus state of the external device is determined based on the current operating state of the hot plug unit. When the I2C channel between the BMC and the external device remains disconnected, in the present invention, through the hot plug signal control unit 401, according to the communication state of the external device at the current moment (i.e., whether the external device is currently performing data interaction with other devices), a corresponding hot plug signal is generated, and then this hot plug signal is sent to the hot plug unit to control the hot plug unit to turn on or off, so that the IO detection unit 402 can determine the current communication state of the I2C bus of the external device based on the state of the hot plug unit, that is, to determine whether the external device is in an idle state or a data interaction state. When the I2C bus of the external device is in an idle state, the BMC can turn on the switch unit 403 through relevant instructions (the channel between the BMC and the external device is defaulted to be disconnected), so that a path is maintained between the BMC and the external device. When the I2C bus of the external device is in a data interaction state, at this time, the channel between the BMC and the external device is kept open, and after waiting for the I2C bus of the external device to be in an idle state (still determined by the IO detection unit 402), the channel between the BMC and the external device is turned on to enable data interaction between the BMC and the external device.

[0060] The isolation circuit for a serial bus provided by the present invention, by setting an IO detection unit, enables the BMC on the motherboard to obtain the I2C bus state of the external device according to the hot plug unit of the external device, and then, according to the I2C bus state of the external device, when it is determined that data transmission cannot be performed between the master device and the external device at the current moment, through the switch unit, a disconnection is maintained between the master device and the external device, isolating the external device currently in a communication state from the master device, and avoiding interference between the I2C communication of the slave device and the I2C bus communication of the motherboard.

[0061] Based on the above embodiments, the IO detection unit is an IO expander, the first expansion interface of the IO expander is connected to the hot plug signal control unit, and the second expansion interface of the IO expander is connected to the hot plug unit.

[0062] In the present invention, the IO detection unit is an IO expander, and multiple expansion interfaces on the IO expander can be respectively connected to the hot plug signal control unit 401 and the hot plug unit, so as to realize the control of the hot plug unit and the acquisition of the status signal of the hot plug unit through different expansion interfaces.

[0063] Based on the above embodiments, the hot-swap signal control unit includes a logical AND gate circuit and a logical OR gate circuit, where:

[0064] The first input terminal of the logical OR gate circuit is connected to the IO detection unit, the second input terminal of the logical OR gate circuit is connected to the output terminal of the logical AND gate circuit, and the output terminal of the logical OR gate circuit is connected to the hot-swap unit;

[0065] The input terminal of the logical AND gate circuit is connected to the first serial bus.

[0066] In the present invention, a hot-swap signal control unit is constructed by a logical OR gate circuit and a logical AND gate circuit, so as to realize the control of the hot-swap unit. When both the I2C buses (which can be defined as SDA1 and SCL1) at one end of the external device are at high level, or when the signal input by the IO detection unit to the hot-swap signal control unit at 402 is at high level, the hot-swap unit is in the on state at this time, enabling I2C communication between the BMC and the external device.

[0067] Based on the above embodiments, the serial clock line of the first serial bus is reversely connected in series with a diode.

[0068] In the present invention, by reversely connecting a diode D1 in series on the serial clock line of the external device, the CLK signal of the external device is prevented from entering the motherboard SMBUS network. Moreover, in the clock synchronization link, the priority of the master device is higher than that of the external device, thereby improving the arbitration priority of the master device on the motherboard and preventing the external device from pulling down the clk signal, resulting in the situation of the I2C bus of the master device being probabilistically hung up.

[0069] Figure 5 For the overall structural schematic diagram of an isolation circuit for a serial bus provided by the present invention, reference can be made to Figure 5 As shown, the bus I2C0 (i.e., the SMBUS bus) of the motherboard master0 and the bus I2C1 of the external device master1 are defaultly disconnected, that is, the channel channel_0 of the switch unit (I2C-switch) U2 is in the off state. At this time, the signal IO_0_0 of the IP detection unit (IO-expander) U1 at the motherboard end for controlling the hot-swap unit (I2C-hotswap) U3 is also low. In the present invention, the switch unit U2 is an I2C-switch, which can set one I2C channel at one end of the BMC and transfer out multiple I2C sub-channels corresponding to different external devices. When using a certain channel, the relevant instruction is used to open the channel, and the remaining channels are closed. The hot-swap unit U3 is an I2C hotswap, which is used for hot-swap protection of the I2C line.

[0070] Further, the state of U3 is controlled by the state of I2C1 (i.e., SCDA1 and SCL1). When I2C1 is idle, the signals in SDA1 and SCL1 are both high. After being processed by the logical AND gate circuit U5 and the logical OR gate circuit U4 in the hot plug signal control unit, the ENABLE signal input to U3 becomes high. At this time, U3 is turned on, and further, the READT signal input from U3 to U1 becomes high, so that the communication state of the I2C bus of the external device at this time can be obtained through the corresponding expansion interface of U1 (i.e., IO_1_0). Preferably, in the present invention, for multiple external devices, corresponding multiple isolation circuits can be constructed. Each isolation circuit includes a U4 and a U5, and is connected to the corresponding U3 on the I2C bus of each external device through other expansion interfaces in U1 and corresponding channels in U2. The connection method can refer to Figure 5 as shown. For example, the other two expansion interfaces in U1 (interfaces other than IO_0_0 and IO_1_0) are respectively connected to U4 and U3 in the isolation circuits corresponding to other external devices, and their functions are the same as those of IO_0_0 and IO_1_0; at the same time, the channel interface in U2 (such as channel1_1) is connected to U3 on the I2C bus of the corresponding external device.

[0071] Further, when I2C1 is in communication, the signals in SDA1 / SCL1 are not high. After being processed by U5 and U4, the ENABLE signal input to U3 is low, causing U3 to close. At this time, the READY signal of U3 is low, and further, master0 determines whether I2C1 is in the idle state by reading the state of IO_1_0 of U1, and then determines whether to access the I2C1 bus.

[0072] Specifically, it can be referred to Figure 5 as shown. When the I2C1 bus of the external device is in the idle state, master0 can open channel_0 of U2 through an instruction, set IO_0_0 of U3 to high (U3 will remain on), so that master0 can access the device on the I2C1 bus, and actively close the channel channel_0 after the access ends. When I2C1 is in the communication state, master0 will wait for a certain period of time until I2C1 is idle and then open the channel for communication.

[0073] Preferably, in one embodiment, when the I2C1 bus of the external device communicates for a long time (such as the communication duration exceeds the preset duration, or the data that the BMC needs to access at this time has a higher priority), if master0 cannot wait for the idle state all the time, master0 will forcibly open the corresponding channel in U2 and compete with master1 for the control right of the I2C1 bus. Since the diode D1 is reversely connected in series on the SCL signal line of the external device, master0 will not exit during the clock synchronization; if master1 also does not exit during the clock synchronization, then master0 and master1 will perform bit-by-bit arbitration. If master0 wins the arbitration, it can open the corresponding channel on U2 and successfully access the device on the I2C1 bus. If master1 wins the arbitration, master0 will stop this access and close the channel.

[0074] The isolation circuit of the user serial bus provided by the present invention realizes the control of I2C-hotswap by adding an IO-expander, a logic AND gate and a logic OR gate, and obtains the current state of the I2C bus of the external device by reading the IO state of the corresponding expansion interface of the IO-expander, so as to determine whether the BMC can communicate with the external device at this time to open the corresponding connection channel; at the same time, by reversely connecting a diode in series on the SCL signal line of the external device, the arbitration priority of master0 is improved, and the situation that master1 pulls down SCL and probabilistically causes master0 bus hang-up is prevented.

[0075] Figure 6 is a schematic flow chart of the device isolation method provided by the present invention, as Figure 6 shown, the present invention provides a device isolation method based on the isolation circuit for a serial bus provided in the above embodiment, including:

[0076] Step 601, control the hot-swap unit between the baseboard management controller BMC on the main board and the external device through the hot-swap signal, and obtain the current operating state of the hot-swap unit, wherein the hot-swap signal is generated by the hot-swap signal control unit according to the current communication state of the external device;

[0077] Step 602, obtain the current communication state of the external device through the input / output IO detection unit according to the current operating state of the hot-swap unit;

[0078] Step 603, judge the current communication state of the external device, and perform on-off switching on the channel between the BMC and the external device according to the judgment result.

[0079] In the present invention, the communication between the BMC of the main board and the external device is described. The serial bus at one end of the BMC is the SMBUS bus, which is connected to the I2C bus at one end of the external device through a switching unit. Specifically, in the existing main multi-slave I2C bus circuit of the present invention, a controlled I2C isolation circuit is added. When the I2C bus of the external device is occupied or the main board has no need to access the external device, the I2C channel between the main board and the external device is closed through this isolation circuit.

[0080] Specifically, in the present invention, through the IO detection unit in the isolation circuit, when the I2C channel between the BMC and the external device is open, the I2C bus state of the external device at this time can also be judged. Further, the real-time I2C bus state of the external device is determined based on the operating state of the hot-swap unit at the current moment. When the I2C channel between the BMC and the external device remains disconnected, the present invention controls the hot-swap unit to generate a corresponding hot-swap signal according to the communication state of the external device at the current moment through the hot-swap signal control unit, and then sends the hot-swap signal to the hot-swap unit to control the hot-swap unit to turn on or off, so that the IO detection unit can determine the current communication state of the I2C bus of the external device according to the state of the hot-swap unit, that is, judge whether the external device is in an idle state or a data interaction state.

[0081] In an embodiment, when the I2C bus of the external device is in an idle state, the BMC can turn on the switching unit through relevant instructions to keep the connection between the BMC and the external device. When the I2C bus of the external device is in a data interaction state, the channel between the BMC and the external device is kept open at this time. It is necessary to wait until the I2C bus of the external device is in an idle state, and then turn on the channel between the BMC and the external device to enable data interaction between the BMC and the external device.

[0082] The device isolation method provided by the present invention sets an IO detection unit, so that the BMC on the main board can obtain the I2C bus state of the external device according to the hot-swap unit of the external device, and then according to the I2C bus state of the external device, when it is determined that data transmission cannot be performed between the master device and the external device at the current moment, the switching unit is used to keep the connection between the master device and the external device open, so that the external device currently in a communication state is isolated from the master device, avoiding interference between the I2C communication of the slave device and the I2C bus communication of the main board.

[0083] Based on the above embodiments, controlling the hot-swap unit between the baseboard management controller BMC on the main board and the external device through the hot-swap signal, and obtaining the operating state of the hot-swap unit at the current moment includes:

[0084] If the communication status of the external device at the current moment is the idle state, based on the hot plug signal control unit, generate a hot plug high-level signal;

[0085] Send the hot plug high-level signal to the hot plug unit to control the hot plug unit to be in the on state, and obtain a first hot plug signal, where the first hot plug signal is a high-level READY signal generated by the hot plug unit according to the hot plug high-level signal;

[0086] The input / output IO detection unit obtains the communication status of the external device at the current moment according to the operating state of the hot plug unit at the current moment, including:

[0087] Based on the IO detection unit, when it is determined that the operating state of the hot plug unit at the current moment is the on state according to the first hot plug signal, it is obtained that the external device is in the idle state at the current moment.

[0088] Figure 7 It is a schematic diagram of the overall process of the device isolation process provided by the present invention, which can be referred to Figure 7 As shown, in the initial state, the default output signal of the expansion interface IO_0_0 of the IO detection unit U1 is low, and the channel channel_0 between the BMC and the external device in the switch unit U2 is in the off and closed state. At this time, the state of U3 is controlled by the state of I2C1 (i.e., SCDA1 and SCL1). When I2C1 is idle, the signals in SDA1 and SCL1 are both high. After being processed by the logical AND gate circuit U5 and the logical OR gate circuit U4 in the hot plug signal control unit, the ENABLE signal entering U3 is high. At this time, U3 is turned on, and then the READT signal input from U3 to U1 is high, so that the communication status of the I2C bus of the external device can be obtained through the corresponding expansion interface of U1.

[0089] Further, when I2C1 communicates, the signals in SDA1 / SCL1 are not high. After being processed by U5 and U4, the ENABLE signal input to U3 is low, causing U3 to close. At this time, the READY signal of U3 is low, and then master0 determines whether I2C1 is in the idle state by reading the state of IO_1_0 of U1, and then determines whether to access the I2C1 bus.

[0090] Based on the above embodiments, the method further includes:

[0091] If the communication status of the external device at the current moment is the data transmission state, based on the hot plug signal control unit, generate a hot plug low-level signal;

[0092] Send the hot-swap low-level signal to the hot-swap unit to control the hot-swap unit to be in the off state and obtain a second hot-swap signal, where the second hot-swap signal is a low-level READY signal generated by the hot-swap unit according to the hot-swap low-level signal;

[0093] The input / output IO detection unit obtains the communication status of the external device at the current moment according to the operating status of the hot-swap unit at the current moment, including:

[0094] Based on the IO detection unit, when it is determined according to the second hot-swap signal that the operating status of the hot-swap unit at the current moment is the off state, obtain that the external device is in the data transmission state at the current moment.

[0095] Based on the above embodiments, the method of judging the communication status of the external device at the current moment and switching the on / off of the channel between the BMC and the external device according to the judgment result includes:

[0096] If the external device is in the idle state at the current moment, turn on the channel between the BMC and the external device;

[0097] If the external device is in the data transmission state at the current moment, keep the channel between the BMC and the external device disconnected.

[0098] In the present invention, as shown in Figure 7 , by the BMC reading the value of the IO_1_0 interface of U1, if it is determined that the I2C1 bus of the external device is in the idle state, master0 can open the channel_0 of U2 through an instruction, set the IO_0_0 of U3 to high (U3 will remain on), so that master0 can access the devices on the I2C1 bus, and actively close the channel channel_0 after the access ends and restore to the initial state. If it is determined that I2C1 is in the communication state, master0 will wait for a certain period of time (such as the BMC reads the IO_1_0 of U1 in multiple cycles n), until I2C1 is idle and then open the channel for communication.

[0099] Based on the above embodiments, after the step of if the external device is in the data transmission state at the current moment, keep the channel between the BMC and the external device disconnected, the method further includes:

[0100] When the duration of the communication state of the external device being in the data transmission state is greater than a preset duration, turn on the channel between the BMC and the external device;

[0101] Based on the bus arbitration method, determine the control authority of the BMC over the first serial bus.

[0102] In the present invention, reference can be made to Figure 7 As shown, a diode can be reversely connected in series on the SCL line of the I2C bus of the external device. When the I2C1 bus of the external device communicates for a long time, such as when the BMC cycles through n periods to read IO_1_0 of U1, if n is greater than or equal to the preset period x, it means that the communication duration of the I2C1 bus of the external device exceeds the preset duration. If master0 never waits until it is idle, master0 will forcibly open the corresponding channel in U2 to compete with master1 for the control right of the I2C1 bus. In one embodiment, the controller priority level of the BMC for the I2C1 bus of the external device can also be determined according to the importance of the data that the BMC needs to access at this time. If the priority level is the highest level, the control right of the I2C1 bus of the external device needs to be forcibly assigned to the BMC. Since a diode is reversely connected in series on the SCL signal line of the external device in the present invention, master0 will not exit during the clock synchronization process. If master1 also does not exit during the clock synchronization process, then master0 and master1 will perform bit-by-bit arbitration. If master0 wins the arbitration, the corresponding channel on U2 can be opened to successfully access the device on the I2C1 bus. If master1 wins the arbitration, master0 will stop this access and close the channel.

[0103] Figure 8 It is a schematic structural diagram of the electronic device provided by the present invention. As Figure 8 shown, the electronic device may include: a processor (Processor) 801, a communication interface (Communications Interface) 802, a memory (Memory) 803, and a communication bus 804. Among them, the processor 801, the communication interface 802, and the memory 803 complete mutual communication through the communication bus 804. The processor 801 can call the logical instructions in the memory 803 to execute the device isolation method, and the method includes: controlling the hot plug unit between the baseboard management controller BMC on the motherboard and the external device through the hot plug signal, and obtaining the operating state of the hot plug unit at the current moment, where the hot plug signal is generated based on the hot plug signal control unit according to the communication state of the external device at the current moment; obtaining the communication state of the external device at the current moment through the input / output IO detection unit according to the operating state of the hot plug unit at the current moment; judging the communication state of the external device at the current moment, and switching the on / off state of the channel between the BMC and the external device according to the judgment result.

[0104] In addition, when the logical instructions in the above-mentioned memory 803 are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on such an understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or a part of this technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in various embodiments of the present invention. The aforementioned storage medium includes: various media such as USB flash drives, mobile hard disks, read-only memories (ROM, Read-Only Memory), random access memories (RAM, Random Access Memory), magnetic disks, or optical discs that can store program codes.

[0105] On the other hand, the present invention also provides a computer program product. The computer program product includes a computer program stored on a non-transitory computer-readable storage medium. The computer program includes program instructions. When the program instructions are executed by a computer, the computer can execute the device isolation method provided by the above-mentioned various methods. The method includes: controlling a hot-swap unit between a baseboard management controller (BMC) on a motherboard and the external device through a hot-swap signal, and obtaining the operating state of the hot-swap unit at the current moment, where the hot-swap signal is generated based on a hot-swap signal control unit according to the communication state of the external device at the current moment; obtaining the communication state of the external device at the current moment through an input / output (IO) detection unit according to the operating state of the hot-swap unit at the current moment; judging the communication state of the external device at the current moment, and according to the judgment result, switching the on / off state of the channel between the BMC and the external device.

[0106] In yet another aspect, the present invention also provides a non-transitory computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, it is configured to execute the device isolation method provided by the above-mentioned various embodiments. The method includes: controlling a hot-swap unit between a baseboard management controller (BMC) on a motherboard and the external device through a hot-swap signal, and obtaining the operating state of the hot-swap unit at the current moment, where the hot-swap signal is generated based on a hot-swap signal control unit according to the communication state of the external device at the current moment; obtaining the communication state of the external device at the current moment through an input / output (IO) detection unit according to the operating state of the hot-swap unit at the current moment; judging the communication state of the external device at the current moment, and according to the judgment result, switching the on / off state of the channel between the BMC and the external device.

[0107] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed to multiple network units. Some or all of the modules can be selected according to actual needs to achieve the purpose of the solution of this embodiment. A person of ordinary skill in the art can understand and implement it without creative work.

[0108] Through the description of the above embodiments, those skilled in the art can clearly understand that each embodiment can be implemented by means of software plus a necessary general hardware platform, and of course, it can also be implemented by hardware. Based on such an understanding, the above technical solution, in essence, or the part that contributes to the prior art can be embodied in the form of a software product. The computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., and includes several instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute the methods described in each embodiment or some parts of the embodiments.

[0109] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit them. Although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements for some of the technical features. And these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. An isolation circuit for a serial bus, characterized in that, it includes a hot plug signal control unit, an input / output (IO) detection unit, and a switch unit, where: The hot plug signal control unit is configured to generate a corresponding hot plug signal according to the communication status of an external device, and send the hot plug signal to the hot plug unit on the first serial bus to control the operating state of the hot plug unit; The IO detection unit is connected to the baseboard management controller (BMC) on the motherboard through a second serial bus, and is configured to obtain the communication status of the external device according to the operating state of the hot plug unit at the current moment, and determine the control authority of the BMC over the first serial bus at the current moment through the communication status; The switch unit is connected to the external device through the first serial bus and connected to the BMC through the second serial bus, and is configured to switch the on / off state of the channel between the BMC and the external device according to the control authority; wherein, the first serial bus is the serial bus of the external device, the second serial bus is the serial bus of the motherboard, and the serial bus includes a serial data line and a serial clock line; The IO detection unit is an IO expander, the first expansion interface of the IO expander is connected to the hot plug signal control unit, and the second expansion interface of the IO expander is connected to the hot plug unit; The hot plug signal control unit includes a logical AND gate circuit and a logical OR gate circuit, where: The first input terminal of the logical OR gate circuit is connected to the IO detection unit, the second input terminal of the logical OR gate circuit is connected to the output terminal of the logical AND gate circuit, and the output terminal of the logical OR gate circuit is connected to the hot plug unit; The input terminal of the logical AND gate circuit is connected to the first serial bus.

2. The isolation circuit for a serial bus according to claim 1, characterized in that, A diode is connected in series in reverse on the serial clock line of the first serial bus.

3. A device isolation method based on the isolation circuit for a serial bus according to any one of claims 1 to 2, characterized in that, it includes: Controlling the hot plug unit between the baseboard management controller (BMC) on the motherboard and the external device through a hot plug signal, and obtaining the operating state of the hot plug unit at the current moment, where the hot plug signal is generated based on the hot plug signal control unit according to the communication status of the external device at the current moment; Obtaining the communication status of the external device at the current moment through the input / output (IO) detection unit according to the operating state of the hot plug unit at the current moment; Judging the communication status of the external device at the current moment, and switching the on / off state of the channel between the BMC and the external device according to the judgment result.

4. The device isolation method according to claim 3, characterized in that, The controlling the hot plug unit between the baseboard management controller (BMC) on the motherboard and the external device through a hot plug signal, and obtaining the operating state of the hot plug unit at the current moment includes: If the communication state of the external device at the current moment is the idle state, based on the hot plug signal control unit, generate a hot plug high-level signal; Send the hot plug high-level signal to the hot plug unit to control the hot plug unit to be in the on state, and obtain a first hot plug signal, where the first hot plug signal is a high-level READY signal generated by the hot plug unit according to the hot plug high-level signal; The input / output IO detection unit obtains the communication state of the external device at the current moment according to the operating state of the hot plug unit at the current moment, including: Based on the IO detection unit, when it is determined according to the first hot plug signal that the operating state of the hot plug unit at the current moment is the on state, it is obtained that the external device is in the idle state at the current moment.

5. The device isolation method according to claim 4, wherein, the method further includes: If the communication state of the external device at the current moment is the data transmission state, based on the hot plug signal control unit, generate a hot plug low-level signal; Send the hot plug low-level signal to the hot plug unit to control the hot plug unit to be in the off state, and obtain a second hot plug signal, where the second hot plug signal is a low-level READY signal generated by the hot plug unit according to the hot plug low-level signal; The input / output IO detection unit obtains the communication state of the external device at the current moment according to the operating state of the hot plug unit at the current moment, including: Based on the IO detection unit, when it is determined according to the second hot plug signal that the operating state of the hot plug unit at the current moment is the off state, it is obtained that the external device is in the data transmission state at the current moment.

6. The device isolation method according to claim 5, wherein, The method of judging the communication state of the external device at the current moment and switching the on / off of the channel between the BMC and the external device according to the judgment result includes: If the external device is in the idle state at the current moment, open the channel between the BMC and the external device; If the external device is in the data transmission state at the current moment, keep the channel between the BMC and the external device disconnected.

7. The device isolation method according to claim 6, wherein, After the step of if the external device is in the data transmission state at the current moment, keep the channel between the BMC and the external device disconnected, the method further includes: When the duration of the communication state of the external device being in the data transmission state is greater than a preset duration, open the channel between the BMC and the external device; Based on the bus arbitration method, determine the control authority of the BMC over the first serial bus.

8. An electronic device, including a memory, a processor, and a computer program stored on the memory and executable on the processor, wherein, when the processor executes the computer program, it implements the device isolation method according to any one of claims 3 to 7.

9. A non-transitory computer-readable storage medium, having a computer program stored thereon, characterized in that, when the computer program is executed by a processor, it implements the device isolation method according to any one of claims 3 to 7.

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