A sidewall conduction heterojunction schottky diode and a manufacturing method thereof

Abstract

The application provides a sidewall conduction heterojunction Schottky diode and a manufacturing method thereof. The sidewall conduction heterojunction Schottky diode comprises an anode, an epitaxial wafer, a cathode, a first barrier layer and a second barrier layer. The epitaxial wafer is arranged between the anode and the cathode. The side of the epitaxial wafer facing the anode is provided with a first groove and a boss. The first groove extends along a first direction. The inner wall bottom side of the first groove is covered with the first barrier layer. The anode extends along the first direction and is filled in the first groove. The upper surface of the boss is provided with the second barrier layer. The anode can be in contact with the first barrier layer and the second barrier layer to form a metal-barrier layer-semiconductor structure. The multistage groove Schottky diode can shield a reverse electric field, reduce the leakage current of the device, reduce the on-resistance of the device, enhance the conductance modulation effect, and thus has the characteristics of small on-resistance, high withstand voltage and strong surge resistance.

Description

Technical Field

[0001] This invention relates to the field of semiconductor device technology, specifically to a sidewall-conducting heterojunction Schottky diode and its fabrication method. Background Technology

[0002] In recent years, ultra-wide bandgap semiconductor materials with band gaps larger than SiC and GaN have attracted much attention due to their superior optical and electrical properties. The larger band gap allows devices to be used in many extreme and harsh environments. For example, in the context of geothermal energy production and oil and gas extraction, they can achieve higher drilling speeds and lower failure rates. In high-temperature environments, they can enable electronically controlled aluminum plants, steel plants, and coal-fired and gas-fired power plants to operate at higher temperatures, thereby improving the energy efficiency of these industrial processes.

[0003] In power switching applications, Baliga's figure-of-merit (BFOM) is an indicator of the suitability of semiconductor materials for power electronics. It is expressed as: BFOM = εμE³, where ε is the dielectric constant, μ is the mobility, and E is the breakdown electric field strength of the semiconductor. The BFOM value is approximately positively correlated with the sixth power of the bandgap Eg. Therefore, a larger bandgap means that wide-bandgap semiconductors have lower power losses and higher conversion efficiency in power device applications, thus enabling better and more ideal power electronic applications. Among wide-bandgap semiconductor materials, Ga₂O₃ has a bandgap of 4.8 eV, an ideal breakdown electric field strength of 8 MV / cm, and a BFOM value as high as 3400, approximately four times that of GaN and ten times that of SiC. Therefore, in today's power electronic applications with higher power density and lower power consumption requirements, Ga₂O₃ materials have greater research significance and broader market application prospects.

[0004] Currently, due to the lack of effective P-type semiconductors, gallium oxide cannot be fabricated into Schottky diodes with conventional bulk implanted or epitaxial P-type semiconductors like SiC and GaN. To reduce reverse leakage current in Ga2O3 Schottky diodes, the device can only be fabricated with a fin structure, utilizing the characteristics of the field plate to disperse the electric field at the Schottky interface, distributing the electric field along the field plate. When the device operates in forward conduction, the current first conducts along the epitaxial fin and then flows into the bulk, finally reaching the cathode. Although this structure can achieve a certain withstand voltage and forward conduction, it has significant drawbacks. First, it places high demands on the quality and thickness of the insulating dielectric of the field plate; poor-quality dielectric and inappropriate thickness can cause excessive electric field at certain points on the field plate, leading to reliability failure. Second, during forward conduction, due to the limited width of the fin, the current conduction path cannot be extended when the current passes through the epitaxial fin, thus increasing the on-resistance. Finally, because the device cannot be modulated by conductivity, it is prone to failure under high surge currents, limiting its application in power circuits. Therefore, it is necessary to design new structures for Schottky diodes to develop Schottky diodes with low on-resistance, high voltage withstand capability, and strong surge resistance. Summary of the Invention

[0005] Based on the above description, the present invention provides a sidewall-conducting heterojunction Schottky diode and its fabrication method, in order to solve the technical problems in the prior art where the current conduction path of Schottky diodes cannot be extended, the conduction resistance is increased, and the device is prone to failure under high surge current because it cannot be modulated by conductivity.

[0006] The technical solution of the present invention to solve the above-mentioned technical problems is as follows:

[0007] In a first aspect, the present invention provides a sidewall-conducting heterojunction Schottky diode, comprising: an anode, an epitaxial wafer, a cathode, a first barrier layer, and a second barrier layer;

[0008] The epitaxial wafer is disposed between the anode and the cathode;

[0009] The epitaxial wafer has a first trench and a boss on the side facing the anode. The first trench extends along a first direction, and the bottom side of the inner wall of the first trench is covered with a first barrier layer. The anode extends along the first direction and fills the first trench. The upper surface of the boss is provided with a second barrier layer. The anode can contact the first barrier layer and the second barrier layer to form a metal-barrier layer-semiconductor structure.

[0010] Based on the above technical solution, the present invention can be further improved as follows.

[0011] Furthermore, the epitaxial wafer includes a semiconductor substrate and a semiconductor epitaxial layer;

[0012] The semiconductor epitaxial layer is disposed on the semiconductor substrate, the cathode is disposed at the bottom of the semiconductor substrate, and the anode is disposed on the upper surface of the semiconductor epitaxial layer.

[0013] Furthermore, the cross-section of the first barrier layer is U-shaped.

[0014] Furthermore, the protrusion is provided with a second groove, which extends along the first direction, and the inner wall of the second groove is covered with a second barrier layer with a concave cross-section.

[0015] Furthermore, the depth of the second trench is less than the depth of the first trench.

[0016] Furthermore, the second barrier layer is linearly disposed on the upper surface of the boss.

[0017] Furthermore, the upper surface of the boss is formed with the second barrier layer by in-situ ion implantation.

[0018] Furthermore, there are multiple first grooves and multiple protrusions; the multiple first grooves and multiple protrusions are arranged alternately along the second direction.

[0019] The second direction is perpendicular to the first direction.

[0020] In a second aspect, the present invention also provides a method for fabricating a sidewall-conducting heterojunction Schottky diode as described in the first aspect, comprising:

[0021] Cathode metal is deposited at the bottom of the epitaxial wafer, forming an ohmic contact;

[0022] A first groove is etched on the upper side of the epitaxial wafer, and a boss is formed thereon;

[0023] A first barrier layer is deposited on the bottom side of the inner wall of the first trench, and a second barrier layer is disposed on the upper surface of the boss.

[0024] An anode metal is deposited on the upper surface of the epitaxial wafer, and the anode metal is in contact with the first barrier layer and the second barrier layer.

[0025] Based on the above technical solution, the present invention can be further improved as follows.

[0026] Furthermore, the provision of a second barrier layer on the upper surface of the boss specifically includes:

[0027] A second trench is etched on the protrusion, and a P-type semiconductor material is deposited on the sidewalls and bottom surface of the second trench using a deposition method to form the second barrier layer.

[0028] Alternatively, a P-type semiconductor material may be deposited in a straight line on the upper surface of the boss using a deposition method to form the second barrier layer;

[0029] Alternatively, P-type ions can be implanted in situ onto the upper surface of the boss using ion implantation to form the second barrier layer.

[0030] Compared with the prior art, the technical solution of this application has the following beneficial technical effects:

[0031] The sidewall-conducting heterojunction Schottky diode provided by the present invention comprises an anode, an epitaxial wafer, a cathode, a first barrier layer, and a second barrier layer. The epitaxial wafer has a first trench and a boss on the side facing the anode, and the bottom of the inner wall of the first trench is covered with a first barrier layer. A second barrier layer is formed on the upper surface of the boss. After the anode is deposited, the anode can contact the first barrier layer and the second barrier layer, thereby forming a metal-barrier layer-semiconductor structure. The sidewall of the first trench is not completely covered by the first barrier layer, so the anode can also directly contact the epitaxial wafer. Compared to existing technologies, the sidewall-conducting heterojunction Schottky diode provided by this invention has different heights for the first and second barrier layers, both of which can form a heterojunction barrier together with the epitaxial wafer. The formed heterojunction barrier can shield the reverse electric field and reduce the leakage current of the device. When the device is forward-conducting, the current mainly flows through the sidewall, which helps to reduce the on-resistance of the device. When the current flows through the first barrier layer, a potential difference is formed between the first barrier layer and the second barrier layer at the boss, which helps to enable the heterojunction to turn on earlier and enhance the conductivity modulation effect. Thus, the Schottky diode has the characteristics of low on-resistance, high voltage withstand and strong surge resistance. Attached Figure Description

[0032] Figure 1 This is one of the structural schematic diagrams of a sidewall-conducting heterojunction Schottky diode provided in an embodiment of the present invention;

[0033] Figure 2 This is a second schematic diagram of the structure of a sidewall-conducting heterojunction Schottky diode provided in an embodiment of the present invention;

[0034] Figure 3 This is the third schematic diagram of the sidewall-conducting heterojunction Schottky diode provided in an embodiment of the present invention;

[0035] The attached diagram lists the components represented by each number as follows:

[0036] 1. Anode; 2. Epitaxial wafer; 21. Semiconductor substrate; 22. Semiconductor epitaxial layer; 3. Cathode; 4. First barrier layer; 5. Second barrier layer. Detailed Implementation

[0037] To facilitate understanding of this application, a more complete description will be provided below with reference to the accompanying drawings, which illustrate embodiments of the present application. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that the disclosure of this application will be thorough and complete.

[0038] In the description of the embodiments of the present invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "connected" and "linked" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium. Those skilled in the art can understand the specific meaning of the above terms in the embodiments of the present invention based on the specific circumstances.

[0039] Currently, unlike the ease of n-type doping, there are no reports of successful p-type doping in Ga2O3. This limits the application of Ga2O3 in bipolar power devices compared to materials that can be bipolar-doped. Three factors make achieving hole-conducting p-type Ga2O3 nearly impossible: First, it is difficult to find acceptor impurities with low activation energy; second, theoretical calculations show that Ga2O3 has a small dispersion of valence band maximums and a very large effective mass, resulting in free holes being almost entirely distributed locally with small μ values; finally, theoretical predictions specifically for Ga2O3 indicate that due to local lattice distortion, free holes have a large local self-trapping energy within the volume, leading to the formation of small poles, which undoubtedly prohibits effective hole conduction.

[0040] Meanwhile, Ga2O3 material itself has relatively low thermal conductivity. When the device operates in a high-temperature environment, the carrier mobility decreases due to enhanced phonon scattering, ultimately reducing the device's output current. Bipolar devices can mitigate the device's temperature dependence. As the temperature rises, carrier diffusion is enhanced, which can counteract the impact of decreased carrier mobility. However, Ga2O3 lacks an inherent p-type semiconductor, undoubtedly posing a challenge to the application of bipolar devices.

[0041] While existing gallium oxide planar heterojunction barrier Schottky diodes can improve upon the aforementioned problems, they still suffer from drawbacks such as a relatively large surface electric field under reverse bias, slow conduction modulation during forward conduction, and inability to fully utilize the optimal surface characteristics of Ga2O3. Therefore, there is an urgent need to develop a new gallium oxide Schottky diode with low surface electric field, fast conduction modulation, and the use of the optimal Ga2O3 surface, laying the foundation for fabricating high-voltage, high-current, and high-reliability gallium oxide diode devices. This invention provides a novel Schottky diode structure to reduce its on-resistance, improve its voltage withstand capability, and enhance its surge immunity.

[0042] The embodiments of the present invention will be described in further detail below with reference to the accompanying drawings and examples. The following examples are used to illustrate the present invention, but should not be used to limit the scope of the present invention.

[0043] like Figure 1 As shown, an embodiment of the present invention provides a side-wall conduction heterojunction Schottky barrier diode (SCHSBD), comprising: an anode 1, an epitaxial wafer 2, a cathode 3, a first barrier layer 4, and a second barrier layer 5, wherein the epitaxial wafer 2 is disposed between the anode 1 and the cathode 3.

[0044] The epitaxial wafer 2 has a first trench and a boss on the side facing the anode 1. The first trench extends along a first direction, and a first barrier layer 4 is provided on the bottom side of the inner wall of the first trench. The anode 1 extends along the first direction and fills the first trench. A second barrier layer 5 is provided on the upper surface of the boss. The anode 1 can contact the first barrier layer 4 and the second barrier layer 5 to form a metal-barrier layer-semiconductor structure.

[0045] like Figure 1 As shown, the first direction is the direction in which the opening of the first groove points to the bottom (i.e., Figure 1 (From top to bottom in the middle).

[0046] Specifically, the anode 1 is composed of one or more of the following metals, including but not limited to: titanium (Ti), aluminum (Al), tungsten (W), molybdenum (Mo), and platinum (Pt). Furthermore, the portion of the anode 1 that contacts the surface of the epitaxial wafer 2 forms a Schottky contact, while the portion that contacts the barrier layer forms an ohmic contact.

[0047] The cathode 3 is composed of one or more of the following metals, including but not limited to: nickel (Ni), gold (Au), platinum (Pt), aluminum (Al), titanium (Ti), tungsten (W), and molybdenum (Mo). The specific materials for the anode 1 and cathode 3 are not further limited; they can be chosen according to actual needs.

[0048] The sidewall-conducting heterojunction Schottky diode provided in this embodiment of the invention comprises an anode 1, an epitaxial wafer 2, a cathode 3, a first barrier layer 4, and a second barrier layer 5. The epitaxial wafer 2 has a first trench and a boss on the side facing the anode 1, and the first barrier layer 4 is covered on the bottom side of the inner wall of the first trench. The second barrier layer 5 is formed on the upper surface of the boss. After the anode 1 is deposited, the anode 1 can contact the first barrier layer 4 and the second barrier layer 5, thereby forming a metal-barrier layer-semiconductor structure. The sidewall of the first trench is not completely covered by the first barrier layer 4, so the anode 1 is also in direct contact with the epitaxial wafer 2.

[0049] Compared to existing technologies, the sidewall-conducting heterojunction Schottky diode provided in this embodiment of the invention has different heights for the first barrier layer 4 and the second barrier layer 5, both of which can form a heterojunction barrier together with the epitaxial wafer 2. The formed heterojunction barrier can shield the reverse electric field and reduce the leakage current of the device. When the device is forward-conducting, the current mainly flows through the sidewall, which is beneficial to reducing the on-resistance of the device. When the current flows through the first barrier layer 4, a potential difference is formed at that point with the second barrier layer 5 at the boss, which can utilize the heterojunction to turn on earlier and enhance the conductivity modulation effect, thereby giving the Schottky diode the characteristics of low on-resistance, high withstand voltage and strong surge resistance.

[0050] Based on the above embodiments, the epitaxial wafer 2 further includes a semiconductor substrate 21 and a semiconductor epitaxial layer 22.

[0051] The semiconductor epitaxial layer 22 is disposed on the semiconductor substrate 21, the cathode 3 is disposed at the bottom of the semiconductor substrate 21, and the anode 1 is disposed on the upper surface of the semiconductor epitaxial layer 22.

[0052] Specifically, both the semiconductor substrate 21 and the semiconductor epitaxial layer 22 are wide bandgap semiconductors or ultra-wide bandgap semiconductor layers.

[0053] The wide-bandgap semiconductor or ultra-wide-bandgap semiconductor layer here includes, but is not limited to, gallium nitride (GaN), gallium oxide (Ga2O3), aluminum nitride (AlN), and diamond.

[0054] In a specific example, the semiconductor substrate 21 can be N+ type doped (N type heavily doped) gallium oxide (Ga2O3), and the semiconductor epitaxial layer 22 can be N type doped (N type lightly doped) gallium oxide (Ga2O3).

[0055] Based on the above embodiments, further, such as Figure 1 As shown, the cross-section of the first barrier layer 4 is U-shaped, meaning that the first barrier layer 4 is only disposed at the bottom of the first trench and the bottom side of the sidewall.

[0056] The first barrier layer 4 can be prepared by depositing P-type semiconductor materials, such as NiO, Cu2O, Sn2O, etc.

[0057] Furthermore, the second barrier layer 5 can be achieved through the following three implementation methods:

[0058] The first method, such as Figure 1 As shown, a second groove is provided on the protrusion, the second groove extends along the first direction, and the inner wall of the second groove is covered with a second barrier layer 5 with a concave cross-section.

[0059] The depth of the second trench is less than the depth of the first trench.

[0060] The second method, such as Figure 2As shown, the second barrier layer 5 is linearly covered on the upper surface of the boss, forming a top heterojunction barrier.

[0061] Both of the above methods use a deposition method to deposit P-type semiconductor material on the upper surface of the boss to create a second barrier layer 5.

[0062] The third method, such as Figure 3 As shown, a second barrier layer 5 is formed on the upper surface of the boss by in-situ ion implantation. Specifically, by ion implantation of elements such as N and Mg, a high-resistivity region is formed in the implantation area (in-situ on the upper surface of the boss), which can also serve to shield the reverse electric field.

[0063] Based on the above embodiments, further, there are multiple first trenches and multiple protrusions; the multiple first trenches and multiple protrusions are arranged alternately along the second direction, wherein the second direction is perpendicular to the first direction. Correspondingly, the number of first barrier layers and second barrier layers depends on the number of first trenches and protrusions, and is not specifically limited here.

[0064] Secondly, the method for fabricating a sidewall-conducting heterojunction Schottky diode provided in the embodiments of the present invention includes:

[0065] A cathode 3 metal is deposited at the bottom of the epitaxial wafer 2 to form an ohmic contact;

[0066] A first trench is etched on the upper side of the epitaxial wafer 2, and a boss is formed thereon;

[0067] A first barrier layer 4 is deposited on the bottom side of the inner wall of the first trench, and a second barrier layer 5 is disposed on the upper surface of the boss.

[0068] Anode 1 metal is deposited on the upper surface of epitaxial wafer 2, and anode 1 metal is in contact with the first barrier layer 4 and the second barrier layer 5.

[0069] Specifically, the second barrier layer 5 on the upper surface of the boss includes:

[0070] A second trench is etched on the protrusion, and a P-type semiconductor material is deposited on the sidewalls and bottom surface of the second trench using a deposition method to form a second barrier layer 5.

[0071] Alternatively, a P-type semiconductor material can be deposited in a straight line on the upper surface of the boss using a deposition method to form a second barrier layer 5;

[0072] Alternatively, P-type ions can be implanted in situ onto the upper surface of the boss using ion implantation to form a second barrier layer 5.

[0073] The following example illustrates the deposition of a second barrier layer 5 on the sidewalls and bottom surface of the second trench using a deposition method:

[0074] Step 1: Provide an epitaxial wafer 2, which includes a semiconductor substrate 21 and a semiconductor epitaxial layer 22 located on the upper surface of the semiconductor substrate 21;

[0075] Step 2: Deposit cathode 3 metal on the bottom of semiconductor substrate 21 and form ohmic contact;

[0076] Step 3: Etch a first trench and a second trench on the upper side of the semiconductor epitaxial layer 22, wherein the first trench is deeper than the second trench, that is, the first trench is a deep trench and the second trench is a shallow trench.

[0077] Step 4: Sputter P-type NiO semiconductor material onto the surface of the epitaxial layer, and perform patterning photolithography on the P-type NiO semiconductor material;

[0078] Step 5: Etch the P-type NiO semiconductor material and remove the photoresist to obtain the first barrier layer 4 and the second barrier layer 5.

[0079] Step 5: Deposit anode 1 metal on the upper surface of semiconductor epitaxial layer 22, and extend anode 1 metal into the first trench and the second trench. Anode 1 metal contacts semiconductor epitaxial layer 22 to form a Schottky barrier, and contacts P-type NiO semiconductor material to form an ohmic contact.

[0080] The sidewall-conducting heterojunction Schottky diodes fabricated using the above method have the following advantages:

[0081] First, the epitaxial layer has a first trench and a second trench with different depths. P-type NiO semiconductor material is deposited in the trench. The heterojunction formed can effectively protect the Schottky barrier on the sidewalls, avoiding the problem of excessive leakage current of the device. At the same time, it can allow the current to flow along the (010) plane after the device is turned on, that is, the direction with the largest carrier mobility. This can compensate for the increased resistance of the JFET (PN Junction FET) region formed by the heterojunction. Therefore, the overall on-resistance will not increase.

[0082] Secondly, when current flows under the P-type NiO semiconductor material, a potential difference is generated between the metal electrode and the P-type NiO semiconductor material, which helps the heterojunction to turn on earlier, thus improving the device's surge resistance.

[0083] It should be noted that, in the description of this application, the terms "upper," "lower," "top," "bottom," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application.

[0084] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A sidewall conduction heterojunction Schottky diode, characterized in that, include: Anode, epitaxial wafer, cathode, first barrier layer and second barrier layer; The epitaxial wafer is disposed between the anode and the cathode; the epitaxial wafer includes a semiconductor substrate and a semiconductor epitaxial layer; the semiconductor epitaxial layer is disposed on the semiconductor substrate, the cathode is disposed at the bottom of the semiconductor substrate, and the anode is disposed on the upper surface of the semiconductor epitaxial layer; Both the semiconductor substrate and the semiconductor epitaxial layer are wide bandgap semiconductors or ultra-wide bandgap semiconductor layers. The epitaxial wafer has a first trench and a boss on the side facing the anode. The first trench extends along a first direction, and the bottom side of the inner wall of the first trench is covered with a first barrier layer. The anode extends along the first direction and fills the first trench. The upper surface of the boss is provided with a second barrier layer. The anode can contact the first barrier layer and the second barrier layer to form a metal-barrier layer-semiconductor structure. The cross-section of the first barrier layer is U-shaped; The protrusion is provided with a second groove, which extends along the first direction, and the inner wall of the second groove is covered with a second barrier layer with a concave cross-section.

2. The sidewall-conducting heterojunction Schottky diode of claim 1, wherein The depth of the second trench is less than the depth of the first trench.

3. The sidewall-conducting heterojunction Schottky diode of claim 1, wherein, The second barrier layer is linearly disposed on the upper surface of the boss.

4. The sidewall-conducting heterojunction Schottky diode of claim 1, wherein, The upper surface of the boss is formed with the second barrier layer by in-situ ion implantation.

5. The sidewall-conducting heterojunction Schottky diode of claim 1, wherein, There are multiple first grooves and multiple protrusions; the multiple first grooves and multiple protrusions are arranged alternately along the second direction. The second direction is perpendicular to the first direction.

6. A method of fabricating a lateral-wall-conducting heterojunction Schottky diode as claimed in any one of claims 1 to 5, characterized in that, include: Cathode metal is deposited at the bottom of the epitaxial wafer, forming an ohmic contact; A first groove is etched on the upper side of the epitaxial wafer, and a boss is formed thereon; A first barrier layer is deposited on the bottom side of the inner wall of the first trench, and a second barrier layer is disposed on the upper surface of the boss. An anode metal is deposited on the upper surface of the epitaxial wafer, and the anode metal is in contact with the first barrier layer and the second barrier layer.

7. The method of manufacturing according to claim 6, wherein, The provision of a second barrier layer on the upper surface of the boss specifically includes: A second trench is etched on the protrusion, and a P-type semiconductor material is deposited on the sidewalls and bottom surface of the second trench using a deposition method to form the second barrier layer. Alternatively, a P-type semiconductor material may be deposited in a straight line on the upper surface of the boss using a deposition method to form the second barrier layer; Alternatively, P-type ions can be implanted in situ onto the upper surface of the boss using ion implantation to form the second barrier layer.

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