Linear array image sensor chip and image sensor

Abstract

The application provides a linear array image sensor chip, which comprises a photosensitive unit 101, a signal storage unit 102, a signal transmission unit 103 and a timing control unit 104, wherein the photosensitive unit comprises photosensitive pixels, the photosensitive pixels comprise a photosensitive diode PD, a transfer switch Sk and an amplifier AMP, one end of the transfer switch is connected with the negative electrode of the photosensitive diode, and the other end of the transfer switch is connected with the input end of the amplifier; the timing control unit comprises a row start signal pin FS, a clock signal pin CLK, an exposure control signal pin STRL, a cascade start input signal pin SI and a cascade start output signal pin SO, so that the on time of the transfer switch can be controlled through the exposure control pin, the exposure time of each row of imaging of an image is controlled to be the same, the technical problem that the exposure amount of the images collected by the row cycles of the image sensor chip in the prior art is different and the picture quality is poor is solved, and the technical effect that the image quality of the collected images is improved is achieved.

Description

Technical Field

[0001] This invention relates to the field of image sensors, and more specifically, to a linear array image sensor chip and an image sensor. Background Technology

[0002] Contact image sensors are currently widely used in modern industrial inspection. When the image sensor is working, light emitted from the light source shines through the transparent glass onto the object being measured. The object reflects the light, and the reflected light passes through the glass and enters the lens. The lens then shines onto the photosensitive window of the chip. The photosensitive chip converts the received light signal into an electrical signal, which is output as image information. As the object being measured moves continuously, the detected signals are output line by line, eventually forming a complete 1:1 detection image. The object being measured is then detected and identified through the image.

[0003] In existing contact image sensors, to obtain a sufficiently strong output signal, the scanning cycle of a single line can receive external light signals for the rest of the time, except for the basic line reset and configuration time. This is not a problem for applications with a fixed line scanning cycle. However, with the expansion of the application fields of linear image sensors, the moving speed of the scanned object is not fixed in many applications. In order to obtain an image with the correct scale, the line scanning speed also varies with the speed of the scanned object. This creates a new problem: the scanning time of each line is different, that is, the line cycle is different. Since most of the time in the line cycle is in the exposure state, the exposure time is also different, and therefore the signal strength of each line is also different, which seriously affects the image quality. Summary of the Invention

[0004] The main objective of this invention is to provide a linear array image sensor chip and an image sensor to solve the technical problem of poor image quality caused by different exposure levels in images acquired by existing image sensor chips, thereby achieving the technical effect of improving the image quality of the acquired images.

[0005] To achieve the above objectives, according to one aspect of the present invention, a linear array image sensor chip 1 is provided, comprising: a photosensitive unit 101, wherein the photosensitive unit includes a photosensitive pixel, the photosensitive pixel includes a photodiode PD, a transmission switch Sk, and an amplifier AMP, a first terminal of the transmission switch Sk is connected to the negative terminal of the photosensitive diode PD, and a second terminal of the transmission switch Sk is connected to the input terminal of the amplifier AMP; a signal storage unit 102 connected to the photosensitive unit; a signal transmission unit 103 connected to the signal storage unit, the signal transmission unit including a signal output pin SIG; and a timing control unit 104 connected to the photosensitive unit and the signal transmission unit, wherein the timing control unit includes a line start signal pin FS, a clock signal pin CLK, an exposure control signal pin STRL, a cascade start input signal pin SI, and a cascade start output signal pin SO.

[0006] Furthermore, the photosensitive pixel also includes a reset switch Sr and a floating diffusion node capacitor Ct, wherein one end of the reset switch Sr is connected to the negative terminal of the photosensitive diode PD, and the other end is connected to a reference voltage; one end of the floating diffusion node capacitor Ct is grounded, and the other end is connected to the input terminal of the amplifier AMP.

[0007] Further, the timing control unit 104 includes: a counter 1041, a first comparator 1042, a second comparator 1043, and an OR gate circuit 1044. The two inputs of the counter 1041 are connected to the row start signal pin FS and the clock signal pin CLK, respectively, and the output of the counter 1041 is connected to the first comparator 1042 and the second comparator 1043, respectively. The three inputs of the first comparator 1042 are connected to a first counting threshold 1045, the output of the counter 1041, and a second counting threshold 1046, respectively, and the output of the first comparator 1042 is connected to a reset switch Sr. The two inputs of the second comparator 1043 are connected to the second counting threshold 1046 and the output of the counter 1041, respectively, and the output of the second comparator 1043 is connected to the OR gate circuit 1044. The two inputs of the OR gate circuit 1044 are connected to the output of the second comparator 1043 and the exposure control signal pin STRL, respectively, and the output of the OR gate circuit 1044 is connected to a transfer switch Sk.

[0008] Furthermore, the photosensitive unit includes multiple photosensitive pixels.

[0009] Furthermore, multiple photosensitive pixels are arranged linearly.

[0010] Furthermore, multiple photosensitive pixels are connected in parallel.

[0011] Furthermore, in order to achieve the above objectives, according to one aspect of the present invention, an image sensor is provided, comprising a linear image sensor chip 1 of any of the above.

[0012] Furthermore, the image sensor also includes: a substrate 2, a frame 3, an optical lens 4, a light source 5, and a socket interface 7; wherein, the optical lens 4 is disposed above the photosensitive window of the linear image sensor chip 1; the light source 5 is disposed on the side of the optical lens 4; and the socket interface 7 is connected to the linear image sensor chip 1 and the light source 5.

[0013] Furthermore, the image sensor includes multiple linear image sensor chips 1.

[0014] Furthermore, multiple linear image sensor chips 1 are arranged linearly.

[0015] Furthermore, each of the multiple linear array image sensor chips 1 includes a cascade start-up input signal pin SI and a cascade start-up output signal pin SO. The multiple linear array image sensor chips 1 are cascaded in a linear arrangement, and the cascade start-up output signal pin SO of the previous stage chip in the multiple linear array image sensor chips 1 is connected to the cascade start-up input signal pin SI of the next stage chip.

[0016] Applying the technical solution of this invention, the linear array image sensor chip 1 of this invention includes: a photosensitive unit 101, wherein the photosensitive unit includes a photosensitive pixel, the photosensitive pixel includes a photodiode PD, a transmission switch Sk, and an amplifier AMP, the first end of the transmission switch Sk is connected to the negative terminal of the photosensitive diode PD, and the second end of the transmission switch Sk is connected to the input terminal of the amplifier AMP; a signal storage unit 102, connected to the photosensitive unit; a signal transmission unit 103, connected to the signal storage unit, the signal transmission unit including a signal output pin SIG; and a timing control unit 104, connected to the photosensitive unit and the signal transmission unit, wherein the timing control unit 104... The sequence control unit includes a row start signal pin FS, a clock signal pin CLK, an exposure control signal pin STRL, a cascade start input signal pin SI, and a cascade start output signal pin SO. This allows the exposure control pin STRL to control the on-time of the transfer switch Sk, thereby controlling the time it takes for effective photosensitive charge to be transferred to the amplifier AMP. This ensures that the exposure time is the same for each line of the image, solving the technical problem in existing image sensor chips where different exposure levels result in poor image quality due to varying line periods. This achieves the technical effect of improving the image quality of the acquired images. Attached Figure Description

[0017] The accompanying drawings, which form part of this application, are used to provide a further understanding of the invention. The illustrative embodiments of the invention and their descriptions are used to explain the invention and do not constitute an undue limitation of the invention. In the drawings:

[0018] Figure 1 A schematic diagram of the overall structure of a linear image sensor chip provided according to an embodiment of the present invention is shown;

[0019] Figure 2 A schematic diagram of the overall structure of a photosensitive pixel provided according to an optional embodiment of the present invention is shown;

[0020] Figure 3 A schematic diagram of a signal variation method one provided according to an optional embodiment of the present invention is shown;

[0021] Figure 4 A schematic diagram of a signal variation method two provided according to an optional embodiment of the present invention is shown;

[0022] Figure 5 A schematic diagram of a timing control circuit according to an optional embodiment of the present invention is shown;

[0023] Figure 6 A schematic diagram of the internal circuitry of a linear image sensor chip according to an optional embodiment of the present invention is shown.

[0024] Figure 7 A schematic diagram of the overall structure of an image sensor according to an embodiment of the present invention is shown;

[0025] Figure 8 A schematic diagram of the connection of a linear image sensor chip according to an optional embodiment of the present invention is shown;

[0026] The above figures include the following reference numerals: 1. Linear image sensor chip; 2. Substrate; 3. Frame; 4. Optical lens; 5. Light source; 6. Transparent glass; 7. Socket interface; 101. Photosensitive unit; 102. Signal storage unit; 103. Signal transmission unit; 104. Timing control unit; PD. Photodiode; Sr. Reset switch; Sk. Transmission switch; St. Storage switch; AMP. Amplifier; Ct. Floating diffusion node capacitor; FS. Row start signal pin; CLK. Clock signal pin; STRL. Exposure control signal pin; SI. Cascade start input signal pin; SO. Cascade start output signal pin; 1041. Counter; 1042. First comparator; 1043. Second comparator; 1044. OR gate circuit; 1045. First counting threshold; 1046. Second counting threshold. Detailed Implementation

[0027] It should be noted that, unless otherwise specified, the embodiments and features described in this application can be combined with each other. The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all of them. The following description of at least one exemplary embodiment is merely illustrative and is in no way intended to limit the present invention or its application or use. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0028] It should be noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the exemplary embodiments according to this application. As used herein, the singular form is intended to include the plural form as well, unless the context clearly indicates otherwise. Furthermore, it should be understood that when the terms "comprising" and / or "including" are used in this specification, they indicate the presence of features, steps, operations, devices, components, and / or combinations thereof.

[0029] Unless otherwise specifically stated, the relative arrangement, numerical expressions, and values ​​of the components and steps set forth in these embodiments do not limit the scope of the invention. It should also be understood that, for ease of description, the dimensions of the various parts shown in the drawings are not drawn to actual scale. Techniques, methods, and devices known to those skilled in the art may not be discussed in detail, but where appropriate, such techniques, methods, and devices should be considered part of the specification. In all examples shown and discussed herein, any specific values ​​should be interpreted as merely exemplary and not as limitations. Therefore, other examples of exemplary embodiments may have different values. It should be noted that similar reference numerals and letters in the following figures denote similar items; therefore, once an item is defined in one figure, it need not be further discussed in subsequent figures.

[0030] In existing linear image sensors, light emitted from a light source passes through transparent glass and illuminates the object being measured. The object reflects the light, which then passes through the glass and enters a lens. The lens then illuminates the photosensitive window of the chip, which converts the received light signal into an electrical signal, outputting it as image information. When the linear image sensor images the object, the object moves continuously, and the detected signals are output line by line, ultimately forming a complete 1:1 detection image.

[0031] In existing contact image sensors, to obtain a sufficiently strong output signal, the scanning cycle of a single line can receive external light signals for the rest of the time, except for the basic line reset and configuration time. This is not a problem for applications with a fixed line scanning cycle. However, with the expansion of the application fields of linear image sensors, the moving speed of the scanned object is not fixed in many applications. In order to obtain an image with the correct scale, the line scanning speed also varies with the speed of the scanned object. This creates a new problem: the scanning time of each line is different, that is, the line cycle is different. Since most of the time in the line cycle is in the exposure state, the exposure time is also different, and therefore the signal strength of each line is also different, which seriously affects the image quality.

[0032] To address the shortcomings of existing technologies, this invention proposes a linear array image sensor chip 1 that ensures identical exposure for imaging each row of the image. Figure 1 A schematic diagram of the overall structure of the linear array image sensor chip 1 according to an embodiment of the present invention is shown, as follows: Figure 1 As shown, a linear array image sensor chip 1 is provided, including: a photosensitive unit 101, wherein the photosensitive unit 101 includes a photosensitive pixel, the photosensitive pixel includes a photodiode PD, a transmission switch Sk, and an amplifier AMP, the first end of the transmission switch Sk is connected to the negative terminal of the photosensitive diode PD, and the second end of the transmission switch Sk is connected to the input terminal of the amplifier AMP; a signal storage unit 102 connected to the photosensitive unit 101; a signal transmission unit 103 connected to the signal storage unit 102, the signal transmission unit 103 including a signal output pin SIG; and a timing control unit 104 connected to the photosensitive unit 101 and the signal transmission unit 103, wherein the timing control unit 104 includes a line start signal pin FS, a clock signal pin CLK, an exposure control signal pin STRL, a cascade start input signal pin SI, and a cascade start output signal pin SO.

[0033] The linear image sensor chip 1 has a photosensitive window. After sensing a light signal through the photosensitive window, the linear image sensor chip 1 can convert the light signal into an electrical signal and output the electrical signal. The linear image sensor chip 1 can include four units: a photosensitive unit 101 including photosensitive pixels, which can convert light signals into electrical signals and initially amplify the electrical signals; a signal storage unit 102, which can be connected to the photosensitive unit 101, storing the initially amplified electrical signals corresponding to each photosensitive pixel; a signal transmission unit 103, which can be connected to the signal storage unit 102, sequentially amplifying the electrical signals stored in the signal storage unit 102 and serially outputting them to the signal output pin SIG; and a timing control unit 104, which is connected to the photosensitive unit 101 and the signal transmission unit 103, receiving the line start signal, exposure control signal, and clock signal input to the linear image sensor, and generating control signals to control the internal switches of the linear image sensor chip 1 based on the line start signal, exposure control signal, and clock signal.

[0034] Specifically, the photosensitive pixel consists of a photodiode (PD), a transmission switch (Sk), and an amplifier (AMP). The first terminal of the transmission switch (Sk) is connected to the negative terminal of the photodiode (PD), and the second terminal of the transmission switch (Sk) is connected to the input terminal of the amplifier (AMP). When the transmission switch (Sk) is closed, the connection circuit between the photodiode (PD) and the amplifier (AMP) is connected, and the photodiode (PD) can convert the sensed light signal into an electrical signal and transmit it to the amplifier (AMP). The timing control unit 104 includes a horizontal start signal pin (FS), a clock signal pin (CLK), an exposure control signal pin (STRL), a cascade start input signal pin (SI), and a cascade start output signal pin (SO). The horizontal start signal pin (FS) can receive the horizontal start signal transmitted from the outside to the linear image sensor chip 1. The clock signal pin (CLK) can receive the clock signal transmitted from the outside. The exposure control signal pin (STRL) can receive the exposure control signal transmitted from the outside. When multiple linear image sensor chips 1 are connected, the cascade start input signal pin (SI) and the cascade start output signal pin (SO) can receive the cascade start signal transmitted from other linear image sensor chips 1, or output the cascade start signal to other linear image sensor chips 1.

[0035] The linear array image sensor chip 1 can control the connection between the photodiode PD and the initial amplifier AMP by switching the transmission switch Sk in each photosensitive pixel of the photosensitive unit 101 on or off. When the transmission switch Sk is on, the photodiode PD can receive external light source 5 for exposure. Since the charge generated by receiving external exposure can continuously accumulate in the amplifier AMP, the amplifier AMP can continuously amplify the accumulated and changing signal and transmit it to other units of the linear array image sensor chip 1. When the transmission switch Sk is off, the photodiode PD can still receive external light source 5 for exposure, but at this time, the charge generated by the photodiode PD due to receiving external exposure cannot be input to the amplifier AMP. The electrical signal output by the amplifier AMP remains in the state at the moment the transmission switch Sk is off, thus achieving the technical effect of controlling the exposure time of the image when the linear array image sensor chip 1 scans the image.

[0036] Furthermore, the photosensitive pixel also includes a reset switch Sr and a floating diffusion node capacitor Ct. One end of the reset switch Sr is connected to the negative terminal of the photosensitive diode PD, and the other end is connected to a reference voltage. One end of the floating diffusion node capacitor Ct is grounded, and the other end is connected to the input terminal of the amplifier AMP. Optionally, the reset switch Sr, the transmission switch Sk, and the amplifier AMP are all composed of transistors.

[0037] Figure 2 A schematic diagram of the overall structure of a photosensitive pixel according to an optional embodiment of the present invention is shown, such as... Figure 2 As shown, each photosensitive pixel includes a photodiode PD, a reset switch Sr, a transfer switch Sk, and an amplifier AMP. The transfer switch Sk is located between the negative terminal of the photodiode PD and the input terminal of the amplifier AMP. The linear array image sensor chip 1 can control the connection between the photodiode PD and the initial amplifier AMP by switching the transfer switch Sk and the reset switch Sr in each photosensitive pixel of the photosensitive unit 101 on or off. Figure 2As shown, the capacitor depicted by the dashed line is the floating diffusion node capacitor Ct, which can be used to store the electrical signal output by the photodiode (PD). The voltage at the connection point between the floating diffusion node capacitor Ct and the input terminal of the amplifier AMP is the floating diffusion node voltage. In the embodiment provided by this invention, the value of the floating diffusion node voltage can be used to measure the amount of charge output by the photodiode (PD). It should be noted that the floating diffusion node capacitor Ct is different from the capacitor in the signal storage unit 102 that stores the electrical signal. The floating diffusion node capacitor Ct directly stores the electrical charge output by the photodiode (PD), while the storage capacitor in the signal storage unit 102 is used to store the electrical charge of the signal after the amplifier AMP amplifies the electrical signal output by the photodiode (PD). When the transmission switch Sk is turned on and the reset switch Sr is turned off after one closure, the floating diffusion node voltage is reset. The photodiode PD can then receive external light source 5 for exposure, and the floating diffusion node voltage will continuously decrease. Since the charge generated by the external exposure is continuously input to the floating diffusion node capacitor Ct and amplifier AMP, when the transmission switch Sk is turned off, the connection between the photodiode PD and the floating diffusion node capacitor Ct and amplifier AMP is broken. At this time, the charge in the floating diffusion node capacitor Ct remains unchanged, and the floating diffusion node voltage remains at the state at the instant the transmission switch Sk is turned off. When the reset switch Sr is turned on, resetting the floating diffusion node voltage, the floating diffusion node voltage remains consistent with the reference voltage Vref. The electrical signal output by the photodiode PD does not affect the floating diffusion node voltage, and the photosensitive pixel is not affected by external light, so exposure has not begun. By controlling the opening and closing of the reset switch Sr and the transmission switch Sk, the linear array image sensor chip 1 can achieve the function of controlling the exposure time.

[0038] Specifically, Figure 3 A schematic diagram of a signal variation mode according to an optional embodiment of the present invention is shown, wherein the exposure operating mode of the contact image sensor can be set to... Figure 3 As shown, the FS signal is the row start signal in the FS pin, the STRL signal is the exposure control signal in the STRL pin, the Sr signal is the timing signal controlling the opening and closing of the reset switch Sr, and the Sk signal is the timing signal controlling the opening and closing of the transfer switch Sk. A high level controls the switch to be on, and a low level controls the switch to be off. The V_Ct voltage is the floating diffusion node voltage, and the LED signal can be the timing signal controlling the image sensor light source 5. The FS signal changing from low to high and then from high to low indicates that the linear image sensor chip 1 is ready to scan a line of images. Figure 3In the diagram, A represents the scan cycle of one line. When the FS signal transitions from low to high, the next line scan cycle begins. Simultaneously with the FS signal transitioning from low to high, the STRL signal can also transition from low to high. When the STRL signal transitions from high to low, the Sk signal, controlled by the STRL signal, also transitions from high to low, thus controlling the transmission switch Sk to open. This prevents the amplifier AMP from receiving the electrical signal generated by the photodiode PD due to exposure, meaning the floating diffusion node voltage V_Ct remains unchanged, ending the exposure time for this line scan and achieving the effect of controlling the exposure time. When the Sk signal transitions from low to high, the transmission switch Sk is turned on, connecting the photodiode PD and the amplifier AMP. When the Sr signal transitions from low to high, the reset switch Sr is turned on, and when the transmission switch Sk is on, the floating diffusion node voltage V_Ct can be reset, transitioning from low to high. The voltage reset can be maintained for a period of time. During this reset period, the LED signal can control the light source 5 to illuminate, reducing the impact of light source pulse fluctuations on the photodiode PD and improving image quality. When the Sr signal changes from high to low, the floating diffusion node voltage reset ends. At this time, the transmission switch Sk is also turned on, so the electrical signal generated by the photosensitive pixel due to external exposure can be transmitted normally to the amplifier AMP. The V_Ct voltage gradually decreases until the STRL signal controls the Sk signal to change from high to low. The transmission switch Sk is turned off, and the electrical signal generated by the photosensitive pixel cannot be transmitted to the amplifier AMP. The V_Ct voltage stops decreasing, and the exposure of one line scan ends until the next line scan cycle arrives.

[0039] Specifically, Figure 4 The diagram illustrates a signal variation mode two according to an optional embodiment provided by the present invention, another operating mode of the image sensor as follows. Figure 4 As shown, in this mode, the LED signal does not require control, and the light source 5 is always on. The other working principles and processes are the same as those in signal change mode one described above. This working mode is suitable for contact image sensors with an external light source 5. In this mode, although the light source 5 is always on, the effective charge transfer exposure time still begins after the reset switch Sr is opened and ends after the transfer switch Sk is opened. The charge generated by the photodiode PD at other times during the scanning cycle does not affect the voltage on the floating diffusion node. Therefore, the output signal of each row of photosensitive pixels is stable, and the control of the light source 5 is simple.

[0040] Further, the timing control unit 104 includes: a counter 1041, a first comparator 1042, a second comparator 1043, and an OR gate circuit 1044. The two inputs of the counter 1041 are connected to the row start signal pin FS and the clock signal pin CLK, respectively, and the output of the counter 1041 is connected to the first comparator 1042 and the second comparator 1043, respectively. The three inputs of the first comparator 1042 are connected to a first counting threshold 1045, the output of the counter 1041, and a second counting threshold 1046, respectively, and the output of the first comparator 1042 is connected to a reset switch Sr. The two inputs of the second comparator 1043 are connected to the second counting threshold 1046 and the output of the counter 1041, respectively, and the output of the second comparator 1043 is connected to the OR gate circuit 1044. The two inputs of the OR gate circuit 1044 are connected to the output of the second comparator 1043 and the exposure control signal pin STRL, respectively, and the output of the OR gate circuit 1044 is connected to a transfer switch Sk.

[0041] Figure 5 A schematic diagram of a timing control circuit according to an optional embodiment of the present invention is shown, such as... Figure 5 As shown, external signals FS, CLK, and STRL can be input to the timing control unit 104 via the line start signal pin FS, the clock signal pin CLK, and the exposure control signal pin STRL, respectively. The timing control unit 104 can then... Figure 5 The circuit shown generates Sk and Sr signals based on the FS, CLK, and STRL signals, and transmits the Sk signal to the photosensitive pixel to control the opening and closing of the transmission switch Sk and the reset switch Sr in the photosensitive pixel, respectively. Figure 5As shown, the input terminals of counter 1041 are connected to the row start signal pin FS and the clock signal pin CLK, respectively. It can count according to the CLK signal when a row scan cycle represented by the FS signal arrives, achieving a counting effect that starts timing from the beginning of a row scan cycle. The first comparator 1042 is a three-input comparator, with its three input terminals connected to the first counting threshold 1045, the output terminal of counter 1041, and the second counting threshold 1046, respectively. It outputs a high level when the value output by counter 1041 is greater than the first counting threshold 1045 and less than the second counting threshold 1046; otherwise, it outputs a low level. The two input terminals of the second comparator 1043 are connected to the second counting threshold 1046 and the clock signal pin, respectively. The output of counter 1041 is high when the value output by counter 1041 is less than or equal to the second counting threshold 1046, and low otherwise. OR gate 1044 is a logic circuit; when one of its two inputs is high, the output is high. The two inputs of OR gate 1044 are connected to the output of the second comparator 1043 and the exposure control signal pin STRL, respectively. Therefore, when the value output by counter 1041 is less than the second counting threshold 1046, the second comparator 1043 outputs a high level, and the Sk signal is high; when the value output by counter 1041 is greater than the second counting threshold 1046, the second comparator 1043 outputs a low level, and the Sk signal is controlled by the STRL signal.

[0042] Can Figure 2 , Figure 3 and Figure 5 By combining the FS, CLK, and STRL signals, the Sr and Sk signals can be controlled, thereby controlling the exposure time. Figure 3 At time B (marked in the diagram), the output value of counter 1041 is the first threshold, and the first comparator 1042 outputs a high level, so the Sr signal is high. At this time, the reset switch Sr is turned on, and the V_Ct voltage reset begins. Simultaneously, the second comparator 1043 outputs a high level, so the Sk signal is high, and the transmission switch Sk is turned on. At time C (marked in the diagram), the output value of counter 1041 is the second threshold, and the first comparator 1042 outputs a low level, so the Sr signal is low. At this time, the reset switch Sr is turned off, the V_Ct voltage reset ends, and the transmission switch Sk remains on. The electrical signal generated by the photodiode PD due to exposure can be transmitted to the amplifier AMP for subsequent processing, and the exposure begins. At time D (marked in the diagram), the Sk signal is controlled by the STRL signal, changing from a high level to a low level. The transmission switch Sk is turned off, and the newly generated electrical signal by the photodiode PD is no longer transmitted to the amplifier AMP, and the exposure ends.

[0043] As a specific embodiment, after the FS signal indicates the start of a line scan cycle, the STRL signal also changes from low to high level. The reset switch Sr is in the off state and controls the transmission switch Sk to turn on. The timing control circuit controls the reset switch Sr to turn on according to the timing of the CLK signal, and resets the floating diffusion node voltage corresponding to the photodiode PD and the initial amplifier AMP. Before the reset is completed, the LED can be controlled to be high level to start lighting the light source 5. The photodiode PD completes the reset, that is, the Sr switch is controlled to turn off. At this time, the photodiode PD receives the external light source 5 for exposure and continuously transfers the charge after photoelectric conversion to the floating diffusion node capacitor Ct. The V_Ct voltage continues to decrease. When the level of the STRL signal in the exposure control pin STRL changes from high to low, the timing control unit controls the transmission switch Sk to turn off. At this time, although the light source 5 is in the light-emitting state, the photodiode PD still generates charge, but the charge cannot be transferred to the floating diffusion node capacitor Ct. Therefore, the V_Ct voltage remains constant and is no longer affected by the external light. After the STRL signal switches to a low level, the control LED signal is also low, turning off light source 5. At this time, since light source 5 is on during the reset period and off after STRL switches to a low level, and during the period when the transmission switch Sk is on after the reset, the current of light source 5 is constant, and the exposure time for transmitting charge is constant. Therefore, the voltage of all pixel signals is stable and is not affected by changes in the scan cycle duration. At the same time, it can reduce the extra power consumption caused by light source 5 being constantly on.

[0044] Furthermore, the photosensitive unit 101 includes a plurality of photosensitive pixels. The plurality of photosensitive pixels can be arranged linearly. The plurality of photosensitive pixels can be connected in parallel.

[0045] Figure 6 A schematic diagram of the internal circuitry of a linear image sensor chip 1 according to an optional embodiment of the present invention is shown, as follows: Figure 6The diagram shows the circuit connections of the photosensitive unit 101, signal storage unit 102, and signal transmission unit 103 in the linear array image sensor chip 1. The diagram includes 864 photosensitive pixels, which are arranged linearly in parallel. PD1 to PD864 are photodiodes PD in photosensitive unit 101, AMP1 to AMP864 are amplifiers AMP in photosensitive unit 101, Ct1 to Ct864 are floating diffusion node capacitors Ct corresponding to amplifiers AMP in photosensitive unit 101, Sr1 to Sr864 are reset switches Sr in photosensitive unit 101, and Sk1 to Sk864 are transmission switches Sk in photosensitive unit 101. The internal connection circuit of each photosensitive pixel is as follows: the photosensitive diode PD is connected to the amplifier AMP through the transmission switch Sk, and the photosensitive diode PD and the transmission switch Sk are connected to the reference voltage Vref through the reset switch Sr. Ct_1 to Ct_864 are the storage capacitors in the signal storage unit 102. The amplifier AMP in the photosensitive unit 101 is connected to each storage capacitor through the storage switch St. The storage capacitors are connected to the transmission amplifier AMP' through the shift switches sch_1 to sch_864. The transmission amplifier AMP' amplifies the input electrical signal and outputs the amplified electrical signal to the signal output pin SIG.

[0046] The workflow of multiple photosensitive pixels is as follows: After the FS signal pulse arrives, the transmission switch Sk is turned on and the reset switch Sr is turned off. The timing control circuit, according to the clock signal CLK, controls the reset switch Sr to close, resetting the voltage of the floating diffusion node corresponding to each photodiode PD. After the reset is complete, the reset switch Sr is turned off. At this time, each photodiode PD can accept external light source 5 for exposure and continuously transfers the photoelectric converted charge to the corresponding floating diffusion node capacitor Ct. The V_Ct voltage continuously decreases, and the amplifier AMP amplifies the voltage in reverse. When... When the external STRL signal goes low, the timing control circuit controls the transmission switch Sk to open, so the voltage on each floating diffusion node capacitor Ct remains constant and is no longer affected by external light. The output voltage of the corresponding amplifier AMP also remains constant. At this time, the timing control circuit controls the storage switch St to close, transferring the voltage on all amplifier AMPs to the corresponding storage capacitors Ct_1 to Ct864. Then, the timing control unit 104 controls the shift switches sch_1 to sch_864 to turn on in sequence, and the voltages corresponding to each storage capacitor are amplified by the transmission amplifier AMP' and output serially.

[0047] As can be seen from the above description, the above embodiments of the present invention achieve the technical effect of making the linear array image sensor chip 1 unaffected by external light and realizing the function of controlling the exposure time.

[0048] According to one aspect of the present invention, an image sensor is provided, comprising a linear image sensor chip 1 according to any one of the above.

[0049] When the contact image sensor composed of any of the above linear array image sensor chips 1 is scanning at variable speed, although the scanning time of each line is different, the exposure time of each line can be made the same through the exposure control pin. During the remaining non-exposure time, even if the time length is different or there is external light interference or fluctuations in the on / off state of the external light source, it will not affect the voltage of the pixel signal generated during the exposure stage. Therefore, the signal output is stable and the image quality is greatly improved.

[0050] Furthermore, the image sensor also includes: a substrate 2, a frame 3, an optical lens 4, a light source 5, and a socket interface 7; wherein, the optical lens 4 is disposed above the photosensitive window of the linear image sensor chip 1; the light source 5 is disposed on the side of the optical lens 4; and the socket interface 7 is connected to the linear image sensor chip 1 and the light source 5.

[0051] Figure 7 A schematic diagram of the overall structure of an image sensor according to an embodiment of the present invention is shown, as follows. Figure 7 As shown, the image sensor includes a supporting frame 3, an optical lens 4 inside the frame 3, a light source 5 on the side of the optical lens 4, and a substrate 2 below the lens. The substrate 2 can be a PCB substrate. A linear array image sensor chip 1 and a socket interface 7 are mounted on the substrate 2. The linear array image sensor chip 1 is linearly arranged directly below the lens. A transparent glass 6 is mounted on the frame 3. The linear array image sensor chip 1 has a photosensitive window, which is the main part for light sensing. The optical lens 4 needs to be positioned above the photosensitive window of the linear array image sensor chip 1.

[0052] The linear image sensor chip 1 has an exposure control signal pin. Multiple linear image sensor chips 1 can be interconnected and led out to the socket interface 7 of the image sensor. The exposure time of the contact image sensor can be controlled externally through the exposure control signal pin.

[0053] Furthermore, the image sensor includes multiple linear image sensor chips 1, which are arranged linearly.

[0054] Furthermore, each of the multiple linear array image sensor chips 1 includes a cascade start-up input signal pin SI and a cascade start-up output signal pin SO. The multiple linear array image sensor chips 1 are cascaded in a linear arrangement, and the cascade start-up output signal pin SO of the previous stage chip in the multiple linear array image sensor chips 1 is connected to the cascade start-up input signal pin SI of the next stage chip.

[0055] Figure 8A schematic diagram of the connection of the linear array image sensor chip 1 according to an optional embodiment provided by the present invention is shown, as follows: Figure 8 As shown, three linear image sensor chips are configured. The row start signal pin FS, clock signal pin CLK, exposure control signal pin STRL, and output signal pin SIG of the three chips are connected to each other respectively. The cascade start input signal pin SI of the first chip is left floating, and the cascade start output signal pin SO is connected to the cascade start input signal pin SI of the second chip. The cascade start output signal pin SO of the second chip is connected to the cascade start input signal pin SI of the third chip, and the cascade start output signal pin SO of the third chip is left floating. The light source control signal LED, the row start signal pin FS, the clock signal pin CLK, and the exposure control signal pin STRL are all integrated into the socket interface 7. The exposure timing of the three chips can be controlled simultaneously through the socket interface 7. The signal corresponding to the photosensitive pixel of each chip is finally output serially by the signal output pin SIG.

[0056] The linear array image sensor chip 1 of the present invention includes: a photosensitive unit 101, wherein the photosensitive unit 101 includes a photosensitive pixel, the photosensitive pixel includes a photodiode PD, a transmission switch Sk, and an amplifier AMP, the first end of the transmission switch Sk is connected to the negative terminal of the photosensitive diode PD, and the second end of the transmission switch Sk is connected to the input terminal of the amplifier AMP; a signal storage unit 102 connected to the photosensitive unit 101; a signal transmission unit 103 connected to the signal storage unit 102, the signal transmission unit 103 including a signal output pin SIG; and a timing control unit 104 connected to the photosensitive unit 101 and the signal transmission unit 103, wherein the timing control unit 104 includes a row start signal pin FS, a clock signal pin CLK, an exposure control signal pin STRL, a cascade start input signal pin SI, and a cascade start output signal pin SO. This can control the exposure time to be the same when imaging each row of the image, which can solve the technical problem of poor image quality caused by different exposures in the images acquired by the image sensor chip in the prior art, and achieve the technical effect of improving the image quality of the acquired image.

[0057] In the description of this invention, it should be understood that the orientation or positional relationship indicated by directional terms such as "front, back, up, down, left, right", "horizontal, vertical, horizontal" and "top, bottom" is generally based on the orientation or positional relationship shown in the accompanying drawings, and is only for the convenience of describing this invention and simplifying the description. Unless otherwise stated, these directional terms do not indicate or imply that the device or element referred to must have a specific orientation or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation on the scope of protection of this invention; the directional terms "inner" and "outer" refer to the inner and outer contours relative to the outline of each component itself.

[0058] For ease of description, spatial relative terms such as "above," "on top of," "on the upper surface of," "above," etc., are used herein to describe the spatial positional relationship of a device or feature as shown in the figures to other devices or features. It should be understood that spatial relative terms are intended to encompass different orientations in use or operation beyond the orientation of the device as described in the figures. For example, if the device in the figures were inverted, a device described as "above" or "on top of" other devices or structures would subsequently be positioned as "below" or "under" other devices or structures. Thus, the exemplary term "above" can include both "above" and "below." The device may also be positioned in other different ways (rotated 90 degrees or in other orientations), and the spatial relative descriptions used herein will be interpreted accordingly.

[0059] Furthermore, it should be noted that the use of terms such as "first" and "second" to define components is merely for the purpose of distinguishing the corresponding components. Unless otherwise stated, the above terms have no special meaning and therefore should not be construed as limiting the scope of protection of this invention.

[0060] The above are merely preferred embodiments of the present invention and are not intended to limit the present invention. Various modifications and variations can be made to the present invention by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A linear array image sensor chip (1), characterized in that The application relates to a pixel array, which comprises: a photosensitive unit (101), wherein the photosensitive unit (101) comprises photosensitive pixels, the photosensitive pixels comprise a photosensitive diode (PD), a transfer switch (Sk) and an amplifier (AMP), a first end of the transfer switch (Sk) is connected to a negative electrode of the photosensitive diode (PD), and a second end of the transfer switch (Sk) is connected to an input end of the amplifier (AMP); a signal storage unit (102) connected to the photosensitive unit (101); a signal transmission unit (103) connected to the signal storage unit (102), wherein the signal transmission unit (103) comprises a signal output pin (SIG); a timing control unit (104) connected to the photosensitive unit (101) and the signal transmission unit (103), wherein the timing control unit (104) comprises a row start signal pin (FS), a clock signal pin (CLK), an exposure control signal pin (STRL), a cascade start input signal pin (SI) and a cascade start output signal pin (SO), and the exposure control signal pin (STRL) is used for receiving an exposure control signal to control on-off of the transfer switch (Sk); wherein the photosensitive pixel further comprises a reset switch (Sr) and a floating diffusion node capacitor (Ct), one end of the reset switch (Sr) is connected to the negative electrode of the photosensitive diode (PD), and the other end is connected to a reference voltage; one end of the floating diffusion node capacitor (Ct) is connected to the ground, and the other end is connected to the input end of the amplifier (AMP); the floating diffusion node capacitor (Ct) is used for storing charges generated by the photosensitive diode (PD) and passing through the transfer switch (Sk); and the reset switch (Sr) is used for being closed before exposure to reset the floating diffusion node capacitor (Ct).

2. The linear array image sensor chip (1) according to claim 1, characterized in that The timing control unit (104) comprises a counter (1041), a first comparator (1042), a second comparator (1043) and an or gate circuit (1044), wherein, two input ends of the counter (1041) are respectively connected to the row start signal pin (FS) and the clock signal pin (CLK), and an output end of the counter (1041) is respectively connected to the first comparator (1042) and the second comparator (1043); three input ends of the first comparator (1042) are respectively connected to a first counting threshold (1045), the output end of the counter (1041) and a second counting threshold (1046), and an output end of the first comparator (1042) is connected to the reset switch (Sr); two input ends of the second comparator (1043) are respectively connected to the second counting threshold (1046) and the output end of the counter (1041), and an output end of the second comparator (1043) is connected to the or gate circuit (1044); Two inputs of the or gate circuit (1044) are connected to the output of the second comparator (1043) and the exposure control signal pin (STRL) respectively, and the output of the or gate circuit (1044) is connected to the transmission switch (Sk).

3. The linear array image sensor chip (1) according to claim 1, characterized in that The photosensitive unit (101) comprises a plurality of photosensitive pixels.

4. The linear array image sensor chip (1) according to claim 3, characterized in that The plurality of photosensitive pixels are linearly arranged.

5. The linear array image sensor chip (1) according to claim 3, characterized in that The plurality of photosensitive pixels are connected in parallel.

6. An image sensor, characterized by, The linear array image sensor chip (1) according to any one of claims 1 to 5.

7. The image sensor of claim 6, wherein, Further comprising: a substrate (2), a frame (3), an optical lens (4), a light source (5), and a socket interface (7); wherein, the optical lens (4) is arranged above the photosensitive window of the linear array image sensor chip (1); the light source (5) is arranged on the side of the optical lens (4); the socket interface (7) is connected to the linear array image sensor chip (1) and the light source (5).

8. The image sensor of claim 6, wherein, The image sensor comprises a plurality of the linear array image sensor chips (1).

9. The image sensor of claim 8, wherein, The plurality of linear array image sensor chips (1) are linearly arranged.

10. The image sensor of claim 9, wherein, The plurality of linear array image sensor chips (1) each comprise a cascade start input signal pin (SI) and a cascade start output signal pin (SO), the plurality of linear array image sensor chips (1) are connected in cascade according to the linear arrangement order, and the cascade start output signal pin (SO) of the upper chip of the plurality of linear array image sensor chips (1) is connected to the cascade start input signal pin (SI) of the lower chip.

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