Memory sharing system and upgrading method thereof

Abstract

The application provides a memory sharing system and an upgrading method thereof, which comprises the following steps: step 1, a first type processor divides a flash memory into a free area and a program area according to a first rule; step 2, a second type processor sends an upgrading request to the first type processor, the first type processor receives the upgrading request, enters an upgrading mode, and prohibits reading and writing of the flash memory; step 3, the second type processor writes an upgrading file into the free area of the flash memory, and informs the first type processor to restart; and step 4, the first type processor upgrades a program file of a target processor according to the type of the upgrading file. The application realizes that multiple processors or special chips can share one flash memory, reduces product cost, and improves product competitiveness.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of storage, in particular to a memory sharing system and an upgrading method thereof. BACKGROUND

[0002] In the prior art, a dedicated processor or chip is configured with a single Flash memory to store the program files required by the processor or chip, that is, there are several Flash memories for several dedicated processors or chips. However, this storage method, although logically simple, has the disadvantages of wasting memory space and excessive components on the circuit board. Moreover, the current data storage method of the Flash memory is not very reasonable, which greatly reduces the service life of the Flash memory.

[0003] Therefore, it is necessary to provide a method for multiple dedicated processors or chips to share a Flash memory and to provide a reasonable algorithm to maximize the use efficiency of the Flash memory, so as to reduce product cost and improve competitiveness. SUMMARY

[0004] The present application provides a memory sharing system and an upgrading method thereof, aiming to solve the defects in the prior art, realize that multiple processors or dedicated chips can share a Flash memory, reduce product cost, and thus improve product competitiveness.

[0005] To achieve the above-mentioned purpose, the technical solution adopted by the present application is as follows:

[0006] The present application provides a memory sharing system, comprising a Flash memory and a plurality of first-type processors and a plurality of second-type processors, wherein the plurality of second-type processors share the Flash memory.

[0007] Specifically, the Flash memory is divided into a free area and a plurality of program areas equal in number to the second-type processors, the free area is logically connected to the first-type processors, and the program areas are respectively connected to the corresponding second-type processors, the free area is used to store temporary files, and the program areas are used to store programs corresponding to the second-type processors.

[0008] Specifically, the first-type processors have autonomous upgrading capability and can upgrade the programs of the second-type processors, and the second-type processors do not have autonomous upgrading capability, wherein any one has wireless communication capability to download required files and write them into the free area.

[0009] The present application provides a memory sharing system and an upgrading method thereof, aiming to solve the defects in the prior art, realize that multiple processors or dedicated chips can share a Flash memory, reduce product cost, and thus improve product competitiveness.

[0010] Step 1, the first type processor divides the Flash memory into free area and program area according to the first rule;

[0011] Step 2, the second type processor sends an upgrade request to the first type processor, the first type processor receives the upgrade request, enters the upgrade mode, and prohibits reading and writing of the Flash memory;

[0012] Step 3, the second type processor writes the upgrade file into the free area of the Flash memory, and notifies the first type processor to restart;

[0013] Step 4, the first type processor upgrades the program file of the target processor according to the type of the upgrade file.

[0014] Specifically, the first rule comprises:

[0015] Step 101, an ordered bidirectional list is established, the ordered bidirectional list is used to save the free blocks of the Flash memory, and the free blocks are arranged from the head to the tail in the ordered bidirectional list according to the erase times from small to large;

[0016] Step 102, reading the use time and the possession ratio of valid data of all blocks in the existing free area and program area of the Flash memory, and calculating the sorting parameters of all blocks according to the first preset formula;

[0017] Step 103, arranging all blocks in the free area and program area according to the small-large order of the sorting parameters to obtain the first array and the second array respectively;

[0018] Step 104, processing the blocks corresponding to the first array and the second array according to the second preset rule;

[0019] Step 105, taking the first part of the ordered bidirectional list as the new free area, and taking the other blocks of the Flash memory as the new program area.

[0020] Specifically, the first preset formula is: k=t*(1-r) / 2r, wherein k represents the sorting parameter, t represents the use time, and r represents the possession ratio of valid data.

[0021] Specifically, the second preset rule comprises:

[0022] Step 1041, traversing all elements in the first array and the second array, and if the current element satisfies the first preset relationship, the next step is entered;

[0023] Step 1042, after transferring the valid data on the second storage block to the first storage block, erasing the second storage block, and inserting it into the ordered bidirectional linked list according to the erasing times of the second storage block, the first storage block is the block corresponding to the current element in the first array, and the second storage block is the block corresponding to the current element in the second array.

[0024] Specifically, the first preset relationship is:

[0025] y[j]-x[i]>0.1(Max-y[j]), wherein x[i] represents the erasing times of the block corresponding to the element in the first array, y[j] represents the erasing times of the block corresponding to the element in the second array, Max represents the maximum allowed erasing times of the block, i=1, 2, 3…m, m represents the total number of idle blocks, j=1, 2, 3…n, and n represents the total number of data blocks.

[0026] Specifically, the step 4 comprises:

[0027] If the upgrade file is the upgrade file of the second type processor, the first type processor writes it into the target area of the program area and performs verification;

[0028] If the upgrade file is the upgrade file of the first type processor, the first type processor writes it into the built-in Flash memory and performs verification.

[0029] The application has the advantages that: the application divides the Flash memory into the idle area and the program area according to the preset rules, stores the program files corresponding to different processors or special chips in the program area, and upgrades with the assistance of other processors, so that multiple processors or special chips can share one piece of Flash memory, the product cost is reduced, and the product competitiveness is improved. BRIEF DESCRIPTION OF DRAWINGS

[0030] Figure 1 is a structural schematic diagram of a memory sharing system of the application;

[0031] Figure 2 is a flow schematic diagram of a memory sharing system upgrade method of the application. DETAILED DESCRIPTION

[0032] The embodiments of the application are specifically described below with reference to the drawings, which are only used for reference and illustration, and do not constitute a limitation on the patent protection scope of the application.

[0033] In the flow described in the specification, claims, or drawings of the present application, the serial numbers of the respective steps (such as steps 10, 20, etc.) are only used to distinguish the respective steps, and the serial numbers themselves do not represent any execution order. It should be noted that the descriptions of "first", "second", etc. herein are only used to distinguish the description objects, and do not represent the order or that "first", "second", etc. are different types.

[0034] Example 1

[0035] As shown in Figure 1 The embodiment provides a memory sharing system, which comprises a Flash memory, a plurality of first-type processors, and a plurality of second-type processors sharing the Flash memory.

[0036] In the embodiment, the Flash memory is divided into a free area and a plurality of program areas equal in number to the second-type processors, the free area is logically connected to the first-type processors, the program areas are respectively connected to the corresponding second-type processors, the free area is used for storing temporary files, and the program areas are used for storing programs corresponding to the second-type processors.

[0037] In the embodiment, the first-type processors have autonomous upgrade capability and can upgrade the programs of the second-type processors, and the second-type processors do not have autonomous upgrade capability, wherein any one has wireless communication capability and is used for downloading required files and writing the files into the free area.

[0038] Example 2

[0039] As shown in Figure 2 The embodiment provides a memory sharing system upgrade method, which comprises:

[0040] Step 1, the first-type processors divide the Flash memory into a free area and a program area according to a first rule.

[0041] In the embodiment, the first rule comprises:

[0042] Step 101, an ordered bidirectional linked list is established, the ordered bidirectional linked list is used for saving free blocks of the Flash memory, and the free blocks are arranged from the head to the tail in the ordered bidirectional linked list according to the number of erasures from small to large.

[0043] Step 102, the use time and the possession ratio of valid data of all blocks in the existing free area and program area of the Flash memory are read, and the sorting parameters of all blocks are calculated according to a first preset formula.

[0044] In the embodiment, the first preset formula is k=t*(1-r) / 2r, where k represents the sorting parameter, t represents the using time, and r represents the occupancy ratio of the valid data.

[0045] In step 103, all blocks in the idle area and the program area are arranged in the order of the sorting parameter to obtain a first array and a second array, respectively.

[0046] That is, all blocks in the idle area are arranged according to the sorting parameter to obtain the first array X, and all blocks in the program area are arranged according to the sorting parameter to obtain the second array Y.

[0047] In step 104, the blocks corresponding to the first array and the second array are processed according to a second preset rule.

[0048] In the embodiment, the second preset rule includes:

[0049] In step 1041, all elements x[i] and y[j] in the first array and the second array are traversed, and if the current element satisfies a first preset relationship, the next step is entered.

[0050] In the embodiment, the first preset relationship is:

[0051] y[j]-x[i]>0.1(Max-y[j]), where x[i] represents the erasing times of the block corresponding to the element in the first array, y[j] represents the erasing times of the block corresponding to the element in the second array, Max represents the maximum allowed erasing times of the block, i=1, 2, 3…m, which represents the total number of idle blocks, and j=1, 2, 3…n, which represents the total number of data blocks.

[0052] In step 1042, the valid data on the second storage block BY j is transferred to the first storage block BX i , the second storage block BY j is erased, and the second storage block BY j is inserted into the ordered bidirectional linked list according to the erasing times of the second storage block BY i , where the first storage block BX j is the block corresponding to the current element x[i] in the first array, and the second storage block BY j is the block corresponding to the current element y[j] in the second array.

[0053] It is easy to understand that when the valid data on the second storage block BY i is transferred to the first storage block BX iThe middle block will not be a free block any more, and will be automatically deleted from the ordered double-direction list.

[0054] Step 105, the first block of the ordered double-direction list is taken as a new free area with the size equal to the size of the free area, and the other blocks of the Flash memory are taken as new program areas.

[0055] Step 2, the second type processor sends an upgrade request to the first type processor, the first type processor receives the upgrade request, enters an upgrade mode, and prohibits reading and writing of the Flash memory.

[0056] Step 3, the second type processor writes the upgrade file into the free area of the Flash memory, and informs the first type processor to restart.

[0057] Step 4, the first type processor upgrades the program file of the target processor according to the type of the upgrade file.

[0058] In the embodiment, the step 4 comprises:

[0059] If the upgrade file is the upgrade file of the second type processor, the first type processor writes it into the target area of the program area, and checks it;

[0060] If the upgrade file is the upgrade file of the first type processor, the first type processor writes it into the built-in Flash memory, and checks it.

[0061] The above only discloses the preferred embodiments of the present application, and cannot limit the protection scope of the present application, thus equivalent changes made according to the patent application scope of the present application still belong to the scope covered by the present application.

Claims

1. A memory sharing system, characterized by, The application comprises: a piece of Flash memory, and a plurality of first type processors and a plurality of second type processors sharing the Flash memory; the Flash memory is divided into a free area and a plurality of program areas equal in number to the second type processors, the free area is logically connected to the first type processors, and the program areas are respectively connected to the corresponding second type processors, the free area is used to store temporary files, and the program areas are used to store programs corresponding to the second type processors; the first type processors have the capability of autonomous upgrading and can upgrade the programs of the second type processors, and the second type processors do not have the capability of autonomous upgrading, wherein at least one of the second type processors has the capability of wireless communication and is used to download required files and write them into the free area.

2. A method for upgrading a memory sharing system, the method comprising: The application comprises: Step 1: The first type processors divide the Flash memory into a free area and a plurality of program areas according to a first rule, the number of the program areas is equal to the number of the second type processors, the free area is logically connected to the first type processors, and the program areas are respectively connected to the corresponding second type processors, the free area is used to store temporary files, and the program areas are used to store programs corresponding to the second type processors; Step 2: The second type processors send an upgrading request to the first type processors, the first type processors receive the upgrading request, enter an upgrading mode, and prohibit reading and writing of the Flash memory; Step 3: The second type processors write upgrading files into the free area of the Flash memory and notify the first type processors to restart; Step 4: The first type processors upgrade the program files of target processors according to the types of the upgrading files.

3. The memory sharing system upgrade method of claim 2, wherein, The first rule comprises: Step 101: An ordered bidirectional list is established, the ordered bidirectional list is used to save free blocks of the Flash memory, and the free blocks are arranged from the head to the tail of the ordered bidirectional list according to the number of erasing times from small to large; Step 102: The use time and the possession ratio of valid data of all blocks in the existing free area and program area of the Flash memory are read, and the sorting parameters of all blocks are calculated according to a first preset formula; Step 103: All blocks in the free area and program area are arranged according to the order of the sorting parameters from small to large to obtain a first array and a second array respectively; Step 104: The blocks corresponding to the first array and the second array are processed according to a second preset rule; Step 105: The first part of the ordered bidirectional list and the blocks equal in size to the free area are used as a new free area, and the other blocks of the Flash memory are used as new program areas.

4. The memory sharing system upgrade method of claim 3, wherein, The first preset formula is k=t*(1-r) / 2r, wherein k represents the sorting parameter, t represents the use time, and r represents the possession ratio of valid data.

5. The memory sharing system upgrade method of claim 4, wherein, Specifically, the second preset rule comprises: Step 1041, traversing all elements in the first array and the second array, if the current element satisfies the first preset relational expression, entering the next step; Step 1042, after transferring the valid data on the second storage block to the first storage block, erasing the second storage block, and inserting the second storage block into the ordered bidirectional linked list according to the erasing times of the second storage block, the first storage block is the block corresponding to the current element in the first array, and the second storage block is the block corresponding to the current element in the second array.

6. The memory sharing system upgrade method of claim 5, wherein, The first preset relational expression is: y[j]-x[i]>0.1(Max-y[j]), wherein x[i] represents the erasing times of the block corresponding to the element in the first array, y[j] represents the erasing times of the block corresponding to the element in the second array, Max represents the maximum allowed erasing times of the block, i=1, 2, 3 …m, m represents the total number of idle blocks, and j=1, 2, 3 …n, n represents the total number of data blocks.

7. The memory sharing system upgrade method of claim 2, wherein, The step 4 comprises: If the upgrade file is the upgrade file of the second type processor, the first type processor writes the upgrade file into the target area of the program area and performs verification; If the upgrade file is the upgrade file of the first type processor, the first type processor writes the upgrade file into the built-in flash memory of the first type processor and performs verification.

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