Data processing equipment and data processing methods

Abstract

This application provides a data processing device and a data processing method. In this application embodiment, for multiple scalar sequences and point sequences on elliptic curves used for MSM calculations, at least a programmable hardware unit is used to read the multiple scalar sequences and point sequences in parallel from a storage module, and at least a programmable hardware unit is used to calculate the multi-scalar product of the multiple scalar sequences and point sequences in parallel. On the one hand, parallel operation can improve data processing speed; on the other hand, using a programmable hardware unit to calculate the multi-scalar product of multiple scalar sequences and point sequences in parallel can achieve hardware acceleration of multi-scalar multiplication, further improving the computational efficiency of MSM.

Description

Technical Field

[0001] This application relates to the field of data security technology, and in particular to a data processing device and a data processing method. Background Technology

[0002] Zero-knowledge proof (ZKP) technology involves a prover and a verifier. Its core application lies in the prover's ability to convince the verifier that a certain statement is true without providing the verifier with any useful information.

[0003] A necessary but extremely time-consuming step in zero-knowledge proof is multiscalar multiplication (MSM). MSM involves numerous dot product and accumulation operations on finite field elliptic curves, which are extremely computationally intensive. Therefore, improving the computational efficiency of MSM and reducing its computation time has become a crucial technical challenge requiring continuous improvement in zero-knowledge proof technology. Summary of the Invention

[0004] This application provides a data processing apparatus and a data processing method to improve the computational speed of multiscalar multiplication.

[0005] This application provides a data processing device, including: a storage module and a processing module; the storage module and the processing module are electrically connected; the processing module includes: a programmable hardware unit;

[0006] The storage module is used to store multiple scalar sequences and point sequences on the elliptic curve for multi-scalar multiplication calculations; each scalar sequence corresponds to a point in the point sequence.

[0007] The processing module uses the programmable hardware unit to read the plurality of scalar sequences and the point sequence in parallel from the storage module, and at least uses the programmable hardware unit to calculate the multi-scalar product of the plurality of scalar sequences and the point sequence in parallel.

[0008] Optionally, when at least using a programmable hardware unit to compute the multi-scalar product of the plurality of scalar sequences and the point sequence in parallel, the programmable hardware unit is specifically configured to: divide each scalar sequence into multiple windows in a parallel manner to obtain a scalar quantum sequence corresponding to each window; each window corresponds to multiple buckets, the number of the multiple buckets being determined by the window bit width; according to the scalar quantum sequence under any of the multiple windows, divide the points in the point sequence into the buckets corresponding to the any window in parallel; and calculate the weighted sum of the points in the multiple buckets under the any window to obtain the value of the any window;

[0009] The processing module is further configured to perform a weighted summation on an elliptic curve based on the values ​​of the multiple windows and the window bit width, so as to obtain the multi-scalar product of the multiple scalar sequences and the point sequence.

[0010] This application embodiment also provides a data processing method, applicable to a processing module, the processing module including: a programmable hardware unit; the programmable hardware unit being electrically connected to the storage module; the method including:

[0011] Obtain from the storage module multiple scalar sequences and a point sequence on the elliptic curve for multi-scalar multiplication calculations; each scalar sequence corresponds to a point in the point sequence;

[0012] The multi-scalar product of the plurality of scalar sequences and the point sequence is computed in parallel using at least a programmable hardware unit.

[0013] In this embodiment, for multiple scalar sequences and point sequences on elliptic curves used for MSM computation, at least a programmable hardware unit is used to read multiple scalar sequences and point sequences in parallel from the storage module, and at least a programmable hardware unit is used to compute the multi-scalar product of multiple scalar sequences and point sequences in parallel. Parallel operation can improve data processing speed, and using a programmable hardware unit to compute the multi-scalar product of multiple scalar sequences and point sequences in parallel can achieve hardware acceleration of multi-scalar multiplication, further improving the computational efficiency of MSM. Attached Figure Description

[0014] The accompanying drawings, which are included to provide a further understanding of this application and form part of this application, illustrate exemplary embodiments and are used to explain this application, but do not constitute an undue limitation of this application. In the drawings:

[0015] Figure 1a and Figure 1b This is a schematic diagram of the structure of the data processing device provided in the embodiments of this application;

[0016] Figure 2 This is a schematic diagram of the structure of another data processing device provided in an embodiment of this application;

[0017] Figure 3 A schematic diagram illustrating the process of bucketing a point sequence as provided in an embodiment of this application;

[0018] Figure 4a and Figure 4b This is a flowchart illustrating the data processing method provided in an embodiment of this application. Detailed Implementation

[0019] To make the objectives, technical solutions, and advantages of this application clearer, the technical solutions of this application will be clearly and completely described below in conjunction with specific embodiments and corresponding drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0020] To improve the computational efficiency of Multi-Scalar Multiplication (MSM), in some embodiments of this application, for multiple scalar sequences and point sequences on elliptic curves used for MSM computation, at least programmable hardware units are used to read multiple scalar sequences and point sequences in parallel from a storage module, and at least programmable hardware units are used to compute the multi-scalar product of multiple scalar sequences and point sequences in parallel. Parallel operation can improve data processing speed, and using programmable hardware units to compute the multi-scalar product of multiple scalar sequences and point sequences in parallel can achieve hardware acceleration of multi-scalar multiplication, further improving the computational efficiency of MSM.

[0021] The technical solutions provided by the various embodiments of this application are described in detail below with reference to the accompanying drawings.

[0022] It should be noted that the same reference numerals denote the same object in the following figures and embodiments. Therefore, once an object is defined in one figure or embodiment, it does not need to be discussed further in subsequent figures and embodiments.

[0023] In the field of data security, many applications require the use of multi-scalar multiplication (MSM) algorithms, such as elliptic curve cryptography and zero-knowledge proofs. Zero-knowledge proof is essentially a protocol involving two or more parties; it outlines a series of steps required for two or more parties to complete a task. The prover demonstrates to the verifier that they know or possess a certain message, but the proof process does not reveal any information about the message being proven to the verifier.

[0024] Zero-knowledge proofs are applied in various fields to protect data privacy. For example, in finance, mortgage applicants and financial institutions can use zero-knowledge proofs to demonstrate that a loan applicant's repayment ability is within an acceptable range without disclosing the applicant's exact income. In online voting, zero-knowledge proofs can be used for anonymous voting and to verify whether a voter's vote is included in the final count. Zero-knowledge proofs can also be used to authenticate users without exchanging confidential information such as passwords. In machine learning, owners of machine learning algorithms can use zero-knowledge proofs to convince others that the model's results are credible without revealing any information about the model itself. Finally, in the blockchain field, zero-knowledge proofs can be used to protect the privacy of blockchain participants, and so on.

[0025] MSM is a key step in elliptic curve cryptography and zero-knowledge proofs. Therefore, improving the computational efficiency of MSM helps to increase the data processing speed of these processes. For example, improving the computational efficiency of MSM can increase the speed of zero-knowledge proofs. Similarly, improving the computational efficiency of MSM can help increase the speed of elliptic curve cryptography.

[0026] In this embodiment, to improve the computational efficiency of MSM, a pipelined hardware data processing device is proposed to accelerate MSM computation. The following is an illustrative description with reference to specific embodiments.

[0027] Figure 1a and Figure 1b This is a schematic diagram of the structure of the data processing device provided in an embodiment of this application. Figure 1a and Figure 1b As shown, the data processing device includes a storage module 10 and a processing module 20. The storage module 10 and the processing module 20 are electrically connected.

[0028] In this embodiment, storage module 10 refers to a readable storage medium with data storage function. In this embodiment, storage module 10 is used to store data used for MSM calculation during the MSM calculation process. Therefore, storage module 10 can be implemented as volatile memory. In this embodiment, the specific implementation form of storage module 10 is not limited. For example, storage module 10 can be implemented as one or more of the following: Static Random-Access Memory (SRAM), Dynamic Random Access Memory (DRAM), Synchronous Dynamic Random Access Memory (SDRAM), and Double Data Rate Synchronous Dynamic Random Access Memory (DDR SDRAM). "Multiple" refers to two or more types. Among them, DDR SDRAM, which can be simply referred to as DDR memory, is SDRAM with double data transfer rate, and its data transfer speed is twice the system clock frequency.

[0029] Since the amount of data used for MSM calculation is large, in order to improve the efficiency of MSM calculation, the storage module 10 can use DDR memory to improve the data transfer efficiency during subsequent MSM calculation.

[0030] Processing module 20 refers to a hardware processing device with data processing capabilities. In this embodiment, to improve data processing speed, hardware acceleration can be used for data processing. Accordingly, such as... Figure 1a and Figure 1b As shown, the processing module 20 may include a programmable hardware unit 201. The programmable hardware unit 201 is electrically connected to the storage module 10.

[0031] Programmable hardware unit 201 refers to a hardware device that can process data using a hardware description language (HDL). A hardware description language is a language used to design digital logic systems and describe digital circuits, and may include: Very-High-Speed ​​Integrated Circuit Hardware Description Language (VHDL), Verilog HDL, SystemVerilog, or System C, etc.

[0032] The programmable hardware unit 201 can be a field-programmable gate array (FPGA), a programmable array logic (PAL), a general array logic (GAL), a complex programmable logic device (CPLD), or an application-specific integrated circuit (ASIC), etc.

[0033] Of course, the processing module 20 may also include other processors, such as a central processing unit (CPU), a graphics processing unit (GPU), or a microcontroller unit (MCU).

[0034] For example, such as Figure 1b and Figure 2 As shown, the processing module 20 may include a programmable hardware unit 201 and a CPU 202. The programmable hardware unit 201 may be electrically connected to the CPU 202 and the storage module 10.

[0035] In this embodiment, the storage module 10 is used to store multiple scalar sequences K for multi-scalar multiplication (MSM) computation. i i = 0, 1, ..., (n-1). n represents the total number of scalar sequences. N is an integer, and n ≥ 2. In this embodiment, the scalar sequence refers to the binary sequence of the scalars. A scalar is a very large integer. For example, assuming a scalar is the decimal number 10, the binary sequence corresponding to 10 is 1010.

[0036] Storage module 10 also stores the point sequence P on the elliptic curve. i A point P in a point sequence. i Let K be a point on the elliptic curve. In this embodiment, the number of points in the point sequence is equal to the total number of points in the scalar sequence, that is, the total number of points in the point sequence is also n. Each scalar sequence corresponds to a point in the point sequence. For example, the scalar sequence K... i Point P in the corresponding point sequence i .

[0037] For the above multiple scalar sequences K i and point sequence P i The MSM algorithm can be expressed as:

[0038]

[0039] In equation (1), Q represents multiple scalar sequences K i and point sequence P i The product of multiple scalars. n represents the total number of scalar sequences, and also the total number of points in the point sequence. K i Let P represent the i-th scalar sequence. i K represents the i-th point in the point sequence. i P i K represents i With P i The dot product on an elliptic curve; ∑· represents the dot addition operation on an elliptic curve.

[0040] It should be noted that, in the embodiments of this application, multiplication refers to dot multiplication on an elliptic curve, and addition refers to dot addition on an elliptic curve.

[0041] In this embodiment, in order to compute multiple scalar sequences K i and point sequence P i Multiscalar products, such as Figure 1a As shown, the programmable hardware unit 201 can read multiple scalar sequences K in parallel from the storage module 10. i and point sequence P i Furthermore, for processing module 20, at least programmable hardware units can be used to compute scalar sequences K in parallel. i and point sequence P i Multiscalar multiplication. On the one hand, parallel operation can improve data processing speed; on the other hand, by using programmable hardware units to compute the multiscalar multiplication of multiple scalar sequences and point sequences in parallel, hardware acceleration of multiscalar multiplication can be achieved, further improving the computational efficiency of MSM.

[0042] In this embodiment, the programmable hardware unit can be used to calculate the entire process of multiplying multiple scalar sequences and point sequences into a multi-scalar product, or it can be used to calculate a portion of the process of multiplying multiple scalar sequences and point sequences into a multi-scalar product. The following is an exemplary description of a specific method for calculating the multiplying multiple scalar sequences and point sequences into a multi-scalar product.

[0043] In this embodiment, the scalar sequence K i The total length S bits can be used to convert a scalar sequence K... i Split into a window with a width of r bits, and then split the scalar sequence K. i Convert to 2 r Number system. Where the scalar sequence K... i It can be represented as:

[0044]

[0045] Where W represents the number of windows, W = S / r. This represents the scalar subsequence of the i-th scalar sequence divided into the w-th window. w = 0, 1, ..., (W-1). "+" indicates elliptic curve point addition.

[0046] Therefore, K i P i It can be represented as:

[0047]

[0048] According to equation (3), the above equation (1) can be transformed into:

[0049]

[0050] Among them, let Equation (4) can then be transformed into the following equation (5):

[0051]

[0052] Comparing equations (1) and (5), we can see that by applying the scalar sequence K... i By performing windowing, the original S-bit MSM problem can be transformed into a smaller r-bit problem.

[0053] Based on the derivation process of equations (1) to (5) above, it can be seen that by converting the multi-scalar multiplication in equation (1) into equation (5), the S-bit MSM problem in the original equation (1) can be transformed into a smaller r-bit problem, which helps to reduce the computational amount of MSM and improve the computational efficiency of MSM.

[0054] Based on the above analysis, in the embodiments of this application, such as Figure 1b As shown, the processing module 20 can process each scalar sequence K in parallel. i The data is divided into multiple windows, resulting in a scalar quantum sequence for each window. The number of windows is W = S / r.

[0055] In this embodiment, in order to improve windowing efficiency, such as Figure 1b and Figure 2 As shown, the above windowing steps can be executed by the programmable hardware unit 201. Specifically, the programmable hardware unit 201 can read multiple scalar sequences in parallel from the storage module 10, and divide each scalar sequence into multiple windows in a parallel manner. Then, the programmable hardware unit 201 stores the multiple windows corresponding to each scalar sequence into the storage module 10.

[0056] Specifically, for any scalar sequence K i The programmable hardware unit 201 can follow the scalar sequence K i The scalar sequence K is formed by taking the binary bits in ascending order.i The scalar quantum sequence is divided into multiple scalar quantum sequences of size r bits (a window width). Each scalar quantum sequence has a width of r bits. These sequences can then be further divided into multiple windows. Each scalar quantum sequence corresponds to one window, and the window number is equal to the least significant bit of the scalar quantum sequence within that window being in the scalar sequence K. i The number of bits is divided by the window width r. For example, as... Figure 2 As shown, for a scalar sequence K i The least significant bit of the scalar sequence corresponding to the first window is the scalar sequence K. i If the 0th bit is the first bit, then the window number of that window is 0; the least significant bit of the scalar sequence corresponding to the second window is the scalar sequence K. i If the r-th bit is a scalar, then the window number of that window is 1, and so on. That is, the least significant bit of the scalar sequence corresponding to the w-th window is the scalar sequence K. i If the (w*r)th position is a given position, then the wth window is w.

[0057] After the programmable hardware unit 201 divides multiple scalar sequences into multiple windows in parallel, it can store the multiple windows corresponding to each scalar sequence in parallel to the storage module 10 for subsequent calculations.

[0058] The inventors of this application continue to refine G in formula (5). w Expression studies have found that it is possible to extract The same coefficient, G w Another representation of it is:

[0059]

[0060] make Then the above equation (6) can be expressed as:

[0061]

[0062] To calculate G w Each window can have multiple buckets, the number of which is determined by the window's bit width r. Assuming each window has R buckets, then R = 2. r -1. In the above formula (7), j represents the j-th bucket. j = 1, 2, ..., (2 r -1), B j,w Let represent the set of points in the point sequence that are divided into the j-th bucket under the w-th window.

[0063] The following example, using any one of the multiple windows w, illustrates the MSM calculation method provided in this application.

[0064] Based on equations (6) and (7) above, as follows Figure 1bAs shown, the programmable hardware unit 201 in the processing module 20 can, in parallel, divide the points in the point sequence into the buckets corresponding to any window w based on the scalar quantum sequence under that window w. Specifically, the programmable hardware unit 201 can, in parallel, divide the points in the point sequence into the buckets corresponding to any window w based on the bit value of the scalar quantum sequence under that window w. Here, the scalar sequence is a binary sequence. Correspondingly, the scalar quantum sequence is also a binary sequence. The bit value of the scalar quantum sequence refers to the value of the scalar quantum sequence converted to decimal. For example, assuming the window bit width r = 4, the scalar quantum sequence is 1000, then the bit value of the scalar quantum sequence is 8; the scalar quantum sequence is 1010, and the bit value of the scalar quantum sequence is 10. The bit value of the scalar quantum sequence corresponding to a point divided into a bucket is equal to the bucket number of that bucket. For example, the point corresponding to the scalar quantum sequence with a bit value of 10 is divided into the bucket with bucket number 10.

[0065] For example, such as Figure 3 As shown, the scalar sequence K i Given a bit width S = 16 bits and a window bit width r = 4 bits, for window 0, the scalar quantum sequence corresponding to point P1 in the point sequence under window 0 is 1110. The bit value of the scalar quantum sequence 1110 is 14. Therefore, point P1 is assigned to the bucket with bucket number 14 corresponding to window 0. Accordingly, the bucket with bucket number 14 corresponding to window 0 can represent B. 14,0 And B 14,0 =P1. Similarly, the scalar quantization sequences under window 0 corresponding to points P2, P3, P4, and P5 in the point sequence are all 0101. The bit value of the scalar quantization sequence 0101 is 5. Therefore, points P2, P3, P4, and P5 are assigned to the bucket with bucket number 5 corresponding to window 0. Accordingly, the bucket with bucket number 5 corresponding to window 0 can represent B. 5,0 And B 5,0 Let P2, P3, P4, and P5 be the set of points. Figure 3 In the middle, G0=∑iB i,0 =B 1,0 +2B 2,0 +...+15B 15,0 .

[0066] Based on the above equation (7), the programmable hardware unit 201 can calculate the weighted sum of multiple bucket points under any window w, and obtain the value G of the window w. w In this application embodiment, the specific implementation of the programmable hardware unit 201 calculating the weighted sum of multiple bucket points under any window w is not limited. In some embodiments, the programmable hardware unit 201 may use an elliptic curve dot multiplication circuit and an elliptic curve dot addition circuit that reflect the calculation logic of equation (7) to calculate the weighted sum of multiple bucket points under any window w, and obtain the value G of window w. w .

[0067] However, it can be seen from the above equation (7) that calculating G w This requires a large number of elliptic curve dot product operations and a large number of elliptic curve dot addition operations. Because elliptic curve dot product operations consume a significant amount of resources and involve a large computational load, the weighted sum operation of the bucket is time-consuming. In this embodiment, to further improve the efficiency of MSM operations, the elliptic curve dot product and elliptic curve dot addition operations provided by equation (7) can be converted into elliptic curve dot addition operations only. The conversion process will be described below and will not be repeated here. Accordingly, in this embodiment, as... Figure 1b As shown, the programmable hardware unit 201 can use an elliptic curve addition circuit to calculate the weighted sum of multiple points within a bucket under any window w, and obtain the value G of that window w. w The elliptic curve point addition circuit can be a hardware circuit built with electronic devices, or it can be implemented as a circuit constructed on a programmable hardware unit using a hardware description language (HDL). The HDL is a language supported by the programmable hardware unit. For example, if the programmable hardware unit is an FPGA or ASIC, the HDL can be VHDL, and so on. The number of adders in the elliptic curve addition circuit is determined by the bit width of the window. In the elliptic curve addition circuit, the number of times each point within a bucket under window w participates in the point addition operation on the elliptic curve is equal to the bit value of the scalar quantization sequence under window w.

[0068] After calculating the values ​​of each window, the processing module 20 can perform a weighted summation on an elliptic curve based on the values ​​and window widths of the multiple windows to obtain the aforementioned multiple scalar sequences K. i and point sequence P i Multiscalar product.

[0069] In this embodiment, for multiple scalar sequences used in MSM computation, each scalar sequence is divided into multiple windows in parallel. Based on the scalar sequence within any window, the point sequence used for MSM computation is then divided into corresponding buckets in parallel. This parallel operation improves data processing speed. Since the complexity of elliptic curve dot multiplication using hardware circuitry is higher than that of elliptic curve dot addition using hardware circuitry, this embodiment converts the elliptic curve dot multiplication and addition operations used in calculating the weighted sum of points within a bucket into elliptic curve dot addition operations. This reduces the hardware computational complexity of the weighted sum of points within a bucket, contributing to improved MSM computation efficiency. Furthermore, using elliptic curve addition circuitry to calculate the weighted sum of points within a bucket enables hardware acceleration of the weighted sum calculation process, further enhancing MSM computation efficiency.

[0070] In addition, when calculating the weighted sum of points within the bucket, the elliptic curve dot multiplication and elliptic curve dot addition operations are converted to using only elliptic curve dot addition operations to calculate the weighted sum of points within the bucket, thus avoiding elliptic curve dot multiplication operations and reducing hardware resource consumption.

[0071] In this embodiment, in order to achieve hardware acceleration of MSM computation, such as Figure 1b and Figure 2 As shown, the processing module 20 may include a programmable hardware unit 201. A description of the programmable hardware unit 201 can be found in the relevant content of the above embodiments, and will not be repeated here.

[0072] In this embodiment, the programmable hardware unit 201 can be used to implement the above-mentioned parallel windowing steps for multiple scalar sequences, parallel bucketing steps for point sequences, and weighted summation steps for points within buckets, etc. Of course, the programmable hardware unit 201 can also implement the above-mentioned weighted summation steps for the values ​​of multiple windows on an elliptic curve, etc. The following is in conjunction with... Figure 2 The execution logic of the programmable hardware unit 201 is described by way of example.

[0073] The specific implementation of the parallel windowing of multiple scalar sequences by the programmable hardware unit 201 has been described in the above embodiments and will not be repeated here.

[0074] In this embodiment, during MSM calculation, the programmable hardware unit 201 needs to read the scalar sequence and point sequence stored in the storage module 10 into its local memory. To improve data reading speed, the programmable hardware unit 201 can use Random Access Memory (RAM) 201a for data reading. RAM has a faster data reading speed. All scalar sequences and point sequences waiting to be processed are stored in the storage module 10. When certain data needs to be processed by the programmable hardware unit 201, the programmable hardware unit 201 will read the data required for calculation from the storage module 10 and store the read data in the RAM 201a of the programmable hardware unit 201. The storage space of RAM is smaller than the storage space of the storage module 10.

[0075] To achieve ordered data reading and ordered computation, an input queue can be set up in the RAM 201a of the programmable hardware unit 201. This input queue is implemented as a First In First Out (FIFO) queue.

[0076] like Figure 2As shown, based on the multiple windows of each scalar sequence stored in the storage module 10, when performing MSM calculations, the programmable hardware unit 201 can read the scalar sequence corresponding to any window w from the multiple scalar sequences in the storage module 10 in a parallel manner. i = 1, 2, (n-1). Each process of the programmable hardware unit 201 reads a scalar quantum sequence of r bits at a time, that is, reads a window of scalar quantum sequence. The programmable hardware unit 201 can also read a point sequence P from the storage module 10. i Then, the programmable hardware unit 201 can read the scalar quantum sequence corresponding to any window w. and point sequence P i Store in the input queue.

[0077] Subsequently, the programmable hardware unit 201 can determine the scalar quantum sequence corresponding to any window w stored in the input queue. The bit value, and the point sequence P in the input queue are processed in parallel. i The points are assigned to the bucket corresponding to window w. Specifically, programmable hardware unit 201 assigns the point sequence P... i For a specific implementation method of assigning the point sequence P to the bucket corresponding to window w, please refer to the above-mentioned processing module 20 for processing the point sequence P. i The relevant content assigned to the bucket corresponding to window w will not be elaborated here.

[0078] Furthermore, the programmable hardware unit 201 can control the multiple buckets B corresponding to window w. j,w Stored to storage module 10, j = 1, 2, ..., (2 r -1). Each bucket stores the points assigned to that bucket.

[0079] Accordingly, when the programmable hardware unit 201 calculates the weighted sum of points within multiple buckets under any window w, it can read the points within the multiple buckets under window w from the storage module 10 and store the points within the multiple buckets under any window w into the input queue. Then, the programmable hardware unit 201 can use the elliptic curve addition circuit to calculate the points (i.e., B) within the multiple buckets under window w stored in the input queue. j,w The weighted sum of ) is used to obtain the value G of window w. w and set the value G of window w w The output queue is stored in the RAM 201a of the programmable hardware unit 201. The output queue may be a FIFO queue.

[0080] Specifically, according to the G shown in equation (7) above w The calculation method, in order to reduce G w The computational complexity can be reduced by transforming equation (7) into equation (8), which only involves elliptic curve addition:

[0081]

[0082] In equation (8), w represents the w-th window; w = 0, 1, ... (W-1), and W represents the number of windows; G w B represents the value of the w-th window; j,w This represents the set of points in the point sequence divided into the j-th bucket under the w-th window; j = 1, 2, ..., (2 r -1), r represents the window width; "+" and ∑· represent point addition operations on elliptic curves.

[0083] Based on the above equation (8), the programmable hardware unit 201 can use an elliptic curve addition circuit that reflects the calculation logic of the elliptic curve point addition formula shown in equation (8) to calculate the points (i.e., B) in multiple buckets corresponding to the window w. j,w The weighted sum of ) . In the elliptic curve addition circuit, the number of times each point in a bucket under window w participates in the point addition operation on the elliptic curve is equal to the bit value of the scalar quantum sequence under window w.

[0084] Specifically, the programmable hardware unit 201 can repeatedly execute the following steps until all points in multiple buckets have been read. The repeatedly executed steps include: for the Mth iteration, the programmable hardware unit 201 reads the set of points in each window from the buckets with the largest current bucket number stored in the storage module 10 that have not yet been read; M = 1, 2, ..., (2 r -1) any value; r represents the window bit width; and stores the set of points of the bucket with the largest current bucket number in each window to the input queue. The set of points of the bucket with the largest current bucket number in each window can be represented as: Bmax(j), w, w = 0, 1, ... (W-1), max(j) represents the largest bucket number in the buckets that have not yet been read stored in storage module 10. max(j) = (2 r -M).

[0085] Furthermore, for the set of points within the bucket corresponding to the w-th window read in the M-th loop, the programmable hardware unit 201 can use an elliptic curve addition circuit to perform an elliptic curve addition operation on the set of points within the bucket corresponding to the w-th window read in the M-th loop and the set of points within the bucket corresponding to the w-th window read in the previous (M-1) loops, so as to obtain the intermediate result TMP of the M-th loop. w .

[0086] Furthermore, using an elliptic curve addition circuit, the intermediate result of the Mth iteration is combined with the weighted sum of the buckets corresponding to the wth window calculated in the (M-1)th iteration by performing an elliptic curve point addition operation to obtain the weighted sum of the buckets corresponding to the wth window calculated in the Mth iteration.

[0087] Repeat the above steps until M = (2 r -1), and use the weighted sum of the buckets corresponding to the w-th window calculated when the loop stops as the weighted sum of the points in multiple buckets under the w-th window, that is, the value of the w-th window.

[0088] The same method can be used to calculate the weighted sum of points in multiple buckets under each window. After calculating the value of each window, the programmable hardware unit 201 can store the value of each window to the output queue. Then, the value of each window stored in the output queue can be stored in the storage module 10 so that the subsequent processing module 20 can read the value of each window and calculate the multi-scalar product of the scalar sequence and the point sequence.

[0089] The aforementioned processing module 20 performs a weighted summation on an elliptic curve based on the values ​​and window widths of multiple windows to obtain the aforementioned multiple scalar sequences K. i and point sequence P i The multi-scalar product can be executed by the programmable hardware unit 201. Since this process mainly involves weighted summation of the values ​​of multiple windows on an elliptic curve according to the above equation (5), its computational complexity is relatively small. Therefore, this step can be executed by software.

[0090] In an embodiment where software performs a weighted summation of values ​​from multiple windows on an elliptic curve, processing module 20 may further include a CPU 202. CPU 202 is electrically connected to storage module 10. CPU 202 can read the values ​​G from multiple windows from storage module 10. w w = 1, 2, ..., (W-1). Furthermore, CPU 202 can determine the value G based on multiple windows. w and window width r, and the value G for multiple windows. w Perform weighted summation on the elliptic curve to obtain multi-scalar products of multiple scalar sequences and point sequences.

[0091] Specifically, CPU 202 can determine the weight of the window based on the product of the window bit width r and the window number w. Here, the window number w is equal to the scalar quantization sequence of the window. The least significant bit is in the target scalar sequence K i The number of bits is divided by the window width r. The target scalar sequence is the scalar sequence of this window. The scalar sequence K it belongs to i .

[0092] Furthermore, the weights of multiple windows can be used to perform a weighted summation on an elliptic curve to obtain a multi-scalar product Q of multiple scalar sequences and point sequences. Specifically, the values ​​G of multiple windows can be obtained using the above equation (5). wBy performing weighted summation, we obtain the multi-scalar product Q of multiple scalar sequences and point sequences.

[0093] In this embodiment, a programmable hardware unit is used to accelerate MSM calculations and transform complex scalar multiplication into a simple accumulation operation, which can reduce computational complexity, improve MSM calculation efficiency, and reduce the resource consumption of hardware acceleration.

[0094] The multi-scalar product Q calculated using MSM in this application embodiment can be applied to scenarios such as elliptic curve cryptography and zero-knowledge proofs, thereby improving the data processing efficiency in these scenarios.

[0095] In addition to the data processing device described above, embodiments of this application also provide a data processing method. The data processing method provided in the embodiments of this application will be described exemplarily below.

[0096] Figure 4a This is a flowchart illustrating a data processing method provided in an embodiment of this application. The method is applicable to a processing module. The processing module includes: a programmable hardware unit; the programmable hardware unit is electrically connected to a storage module within the processing module. Figure 4a As shown, the data processing methods mainly include:

[0097] 41. Using a programmable hardware unit in a parallel manner, multiple scalar sequences and point sequences on an elliptic curve are obtained from the storage module for multi-scalar multiplication calculations; each scalar sequence corresponds to a point in the point sequence.

[0098] 42. At least using programmable hardware units, the multi-scalar product of the plurality of scalar sequences and the point sequence is computed in parallel.

[0099] In this embodiment, the storage module and the processing module are electrically connected. For a description of the storage module and the processing module, please refer to the relevant content of the above device embodiment; it will not be repeated here.

[0100] In this embodiment, hardware acceleration can be used to improve data processing speed. Accordingly, the processing module may include a programmable hardware unit. A description of the programmable hardware unit can be found in the relevant content of the above device embodiment, and will not be repeated here. Of course, the processing module may also include other processors, such as a CPU, GPU, or MCU.

[0101] In this embodiment, the storage module is used to store multiple scalar sequences K for multi-scalar multiplication (MSM) computation. i i = 0, 1, ..., (n-1). n represents the total number of scalar sequences. N is an integer, and n ≥ 2.

[0102] The storage module also stores the point sequence P on the elliptic curve. iA point P in a point sequence. i Let K be a point on the elliptic curve. In this embodiment, the number of points in the point sequence is equal to the total number of points in the scalar sequence, that is, the total number of points in the point sequence is also n. Each scalar sequence corresponds to a point in the point sequence. For example, the scalar sequence K... i Point P in the corresponding point sequence i .

[0103] For the above multiple scalar sequences K i and point sequence P i The MSM algorithm can be expressed as equation (1) in the above embodiments.

[0104] In this embodiment, in order to compute multiple scalar sequences K i and point sequence P i The multi-scalar product can be implemented by using programmable hardware units to read multiple scalar sequences K in parallel from the storage module. i and point sequence P i Furthermore, at least programmable hardware units can be used to compute scalar sequences K in parallel. i and point sequence P i Multiscalar multiplication. On the one hand, parallel operation can improve data processing speed; on the other hand, by using programmable hardware units to compute the multiscalar multiplication of multiple scalar sequences and point sequences in parallel, hardware acceleration of multiscalar multiplication can be achieved, further improving the computational efficiency of MSM.

[0105] In this embodiment, the programmable hardware unit can be used to calculate the entire process of multiplying multiple scalar sequences and point sequences into a multi-scalar product, or it can be used to calculate a portion of the process of multiplying multiple scalar sequences and point sequences into a multi-scalar product. The following is an exemplary description of a specific method for calculating the multiplying multiple scalar sequences and point sequences into a multi-scalar product.

[0106] Figure 4b This is a flowchart illustrating a data processing method provided in an embodiment of this application. This method is applicable to processing modules. Figure 4b As shown, the data processing methods mainly include:

[0107] 401. A programmable hardware unit that uses a parallel approach to obtain multiple scalar sequences and point sequences on an elliptic curve for multi-scalar multiplication calculations from a storage module; each scalar sequence corresponds to a point in the point sequence.

[0108] 402. The programmable hardware unit uses a parallel approach to divide each scalar sequence into multiple windows to obtain the scalar quantum sequence corresponding to each window; each window corresponds to multiple buckets, and the number of buckets is determined by the window bit width.

[0109] 403. The programmable hardware unit divides the points in the point sequence into the buckets corresponding to the window in parallel according to the scalar quantum sequence under any window in multiple windows.

[0110] 404. The programmable hardware unit calculates the weighted sum of multiple bucket points under any window to obtain the value of that window.

[0111] 405. The processing module performs a weighted summation on an elliptic curve based on the values ​​and window widths of multiple windows to obtain a multi-scalar product of multiple scalar sequences and point sequences.

[0112] Based on the derivation process of equations (1) to (5) of the above device embodiment, it can be seen that by converting the multi-scalar multiplication in equation (1) into equation (5), the S-bit MSM problem in the original equation (1) can be transformed into a smaller r-bit problem, which helps to reduce the computational amount of MSM and improve the computational efficiency of MSM.

[0113] Based on the above analysis, in step 401, the programmable hardware unit can use a parallel approach to obtain multiple scalar sequences K from the storage module for multi-scalar multiplication (MSM) computation. i and the point sequence P on the elliptic curve i Furthermore, in step 402, the programmable hardware unit can process each scalar sequence K in parallel. i The data is divided into multiple windows, resulting in a scalar quantum sequence for each window. The number of windows is W = S / r.

[0114] In this embodiment, to improve windowing efficiency, the above-mentioned windowing steps can be performed by a programmable hardware unit. Specifically, the programmable hardware unit can read multiple scalar sequences from the storage module in parallel and divide each scalar sequence into multiple windows in a parallel manner. Then, the programmable hardware unit stores the multiple windows corresponding to each scalar sequence into the storage module.

[0115] Specifically, for any scalar sequence K i Programmable hardware units can follow a scalar sequence K i The scalar sequence K is formed by taking the binary bits in ascending order. i The scalar quantum sequence is divided into multiple scalar quantum sequences of size r bits (a window width). Each scalar quantum sequence has a width of r bits. These sequences can then be further divided into multiple windows. Each scalar quantum sequence corresponds to one window, and the window number is equal to the least significant bit of the scalar quantum sequence within that window being in the scalar sequence K. i The number of bits is divided by the window width r.

[0116] After the programmable hardware unit divides multiple scalar sequences into multiple windows in parallel, it can store the multiple windows corresponding to each scalar sequence in parallel to the storage module for subsequent reading during computation.

[0117] The inventors of this application continue to refine G in formula (5). w Expression studies have found that it is possible to extract The same coefficient, G w Another representation is shown in the device embodiment (6).

[0118] make Equation (6) can then be expressed as Equation (7) of the device embodiment.

[0119] To calculate G in equation (7) w Each window can have multiple buckets, the number of which is determined by the window's bit width r. Assuming each window has R buckets, then R = 2. r -1. In the above formula (7), j represents the j-th bucket. j = 1, 2, ..., (2 r -1), B j,w Let represent the set of points in the point sequence that are divided into the j-th bucket under the w-th window.

[0120] Based on equations (6) and (7) above, in step 403, the programmable hardware unit can, in parallel, divide the points in the point sequence into the buckets corresponding to window w according to the scalar quantum sequence under any window w. Specifically, the points in the point sequence can be divided into the buckets corresponding to window w in parallel according to the bit value of the scalar quantum sequence under window w. Here, the bit value of the scalar quantum sequence refers to the value of the scalar quantum sequence converted to decimal. Here, the bit value of the scalar quantum sequence corresponding to the point divided into a bucket is equal to the bucket number of that bucket. Based on equation (7) above, in step 404, the programmable hardware unit can calculate the weighted sum of the points in multiple buckets under any window w to obtain the value G of window w. w In this application embodiment, the specific implementation of the programmable hardware unit 201 calculating the weighted sum of multiple bucket points under any window w is not limited. In some embodiments, the programmable hardware unit 201 may use an elliptic curve dot multiplication circuit and an elliptic curve dot addition circuit that reflect the calculation logic of equation (7) to calculate the weighted sum of multiple bucket points under any window w, and obtain the value G of the window w. w .

[0121] From equation (7) above, we can see that calculating G... wThis requires a large number of elliptic curve dot product operations and a large number of elliptic curve dot addition operations. Since elliptic curve dot product operations consume a lot of resources and have a large computational load, the weighted sum operation of the buckets takes a long time. In this embodiment, in order to further improve the efficiency of MSM operation, the elliptic curve dot product operation and elliptic curve dot addition operation provided by equation (7) can be converted into only elliptic curve dot addition operation. The conversion process will be described below and will not be repeated here. Accordingly, step 404 can be implemented as follows: the elliptic curve addition operation circuit can be used to calculate the weighted sum of multiple buckets under window w to obtain the value G of window w. w In an elliptic curve addition circuit, the number of times each point within a bucket under window w participates in point addition on the elliptic curve is equal to the bit value of the scalar quantization sequence under window w.

[0122] Steps 403 and 404, using window w as an example, illustrate the method for calculating the weighted sum of points within multiple buckets under window w. Using the same or similar methods, the weighted sum of points within multiple buckets under each window can be obtained.

[0123] After calculating the values ​​of each window, in step 405, the values ​​of multiple windows can be weighted and summed on an elliptic curve based on the values ​​and window widths to obtain the aforementioned multiple scalar sequences K. i and point sequence P i The multiscalar product Q.

[0124] In this embodiment, for multiple scalar sequences used in MSM computation, each scalar sequence is divided into multiple windows in parallel. Based on the scalar quanta within the same window, the point sequences used for MSM computation are then divided into corresponding buckets in parallel. This parallel operation improves data processing speed. Since the complexity of elliptic curve dot multiplication using hardware circuitry is higher than that of elliptic curve dot addition using hardware circuitry, this embodiment converts the elliptic curve dot multiplication and addition operations used in calculating the weighted sum of points within a bucket into elliptic curve dot addition operations. This reduces the computational complexity of the weighted sum of points within a bucket, contributing to improved MSM computation efficiency. Furthermore, using elliptic curve addition circuitry to calculate the weighted sum of points within a bucket enables hardware acceleration of the weighted sum calculation process, further enhancing MSM computation efficiency.

[0125] In addition, when using hardware circuits to calculate the weighted sum of points within the bucket, the elliptic curve dot multiplication and elliptic curve dot addition operations are converted to using only elliptic curve dot addition operations to calculate the weighted sum of points within the bucket, thus avoiding elliptic curve dot multiplication operations and reducing hardware resource consumption.

[0126] In this embodiment, in order to achieve hardware acceleration of MSM computing, the processing module may include a programmable hardware unit.

[0127] In this embodiment, the programmable hardware unit can be used to implement steps 401-404, etc. Of course, the programmable hardware unit can also implement step 405, etc. The execution logic of the programmable hardware unit will be described exemplarily below.

[0128] The specific implementation of the parallel windowing of multiple scalar sequences by the programmable hardware unit has been described in the above embodiments and will not be repeated here.

[0129] In this embodiment, during MSM calculation, the programmable hardware unit needs to read the scalar sequence and point sequence stored in the storage module into its local memory. To improve data reading speed, the programmable hardware unit can use RAM for data reading.

[0130] To achieve ordered data reading and ordered computation, an input queue can be set up in the RAM of the programmable hardware unit. This input queue is implemented as a FIFO queue.

[0131] Based on the multiple windows of each scalar sequence stored in the storage module, the programmable hardware unit can read the scalar sequence corresponding to any window w from the multiple scalar sequences in the storage module in a parallel manner when performing MSM calculations. i = 1, 2, (n-1). Each process of the programmable hardware unit, operating in parallel, reads a scalar quantum sequence of r bits at a time, i.e., reads the scalar quantum sequence of any window. The programmable hardware unit can also read a point sequence P from the memory module. i Then, the programmable hardware unit can read the scalar quantum sequence corresponding to any window w. and point sequence P i Store in the input queue.

[0132] Then, the programmable hardware unit can determine the scalar quantum sequence corresponding to any window w stored in the input queue. The bit value, and the point sequence P in the input queue are processed in parallel. i The points are assigned to the bucket corresponding to window w. The programmable hardware unit will then assign the point sequence P... i For a specific implementation of dividing the point sequence P into the bucket corresponding to window w, please refer to the above embodiment showing the method of dividing the point sequence P. i The relevant content assigned to the bucket corresponding to window w will not be elaborated here.

[0133] Furthermore, the programmable hardware unit can control the multiple buckets B corresponding to window w. j,w Stored to storage module, j = 1, 2, ..., (2 r-1). Each bucket stores the points assigned to that bucket.

[0134] Accordingly, when the programmable hardware unit calculates the weighted sum of points within multiple buckets under any given window w, it can read the points within those buckets from the storage module and store them in the input queue. Then, the programmable hardware unit can use the elliptic curve addition circuit to calculate the points (i.e., B) within the multiple buckets under window w stored in the input queue. j,w The weighted sum of ) is used to obtain the value G of window w. w and the value of mouth w G w The output queue is stored in the RAM of the programmable hardware unit. The output queue can be a FIFO queue.

[0135] Specifically, according to the G shown in equation (7) above w The calculation method, in order to reduce G w The computational complexity can be reduced by converting equation (7) into equation (8), which only involves elliptic curve addition. Equation (8) can be found in the above-described device embodiment.

[0136] Based on the above equation (8), the programmable hardware unit can use the elliptic curve addition operation circuit constructed by the elliptic curve point addition operation formula shown in equation (8) to calculate the points (i.e., B) in multiple buckets corresponding to window w. j,w The weighted sum of ).

[0137] Specifically, the programmable hardware unit can repeatedly execute the following steps until all points in multiple buckets have been read. The repeatedly executed steps include: for the Mth iteration, the programmable hardware unit reads the set of points in each window from the buckets with the largest current bucket number stored in the storage module that have not yet been read; M = 1, 2, ..., (2 r -1) any value; r represents the window bit width; and the set of points of the bucket with the largest current bucket number under each window is stored in the input queue. The set of points of the bucket with the largest current bucket number under each window can be represented as: B max(j)，w , w = 0, 1, ... (W-1), max(j) represents the maximum bucket number among the buckets that have not yet been read from the storage module 10. max(j) = (2 r -M).

[0138] Furthermore, for the set of points within the bucket corresponding to the w-th window read in the M-th loop, the programmable hardware unit can use an elliptic curve addition circuit to perform an elliptic curve addition operation on the set of points within the bucket corresponding to the w-th window read in the M-th loop and the set of points within the bucket corresponding to the w-th window read in the previous (M-1) loops, to obtain the intermediate result TMP of the M-th loop. w .

[0139] Furthermore, using an elliptic curve addition circuit, the intermediate result of the Mth iteration is combined with the weighted sum of the buckets corresponding to the wth window calculated in the (M-1)th iteration by performing an elliptic curve point addition operation to obtain the weighted sum of the buckets corresponding to the wth window calculated in the Mth iteration.

[0140] Repeat the above steps until M = (2 r -1), and use the weighted sum of the buckets corresponding to the w-th window calculated when the loop stops as the weighted sum of the points in multiple buckets under the w-th window, that is, the value of the w-th window.

[0141] The same method can be used to calculate the weighted sum of points within multiple buckets under each window. After calculating the value of each window, the programmable hardware unit can store the value of each window into the output queue. Then, after all the values ​​of each window have been stored in the output queue, the values ​​of each window can be stored in the storage module for subsequent processing modules to read the values ​​of each window and calculate the multi-scalar product of the scalar sequence and the point sequence.

[0142] Step 405 above can be executed by a programmable hardware unit. Since this process mainly involves weighted summation of the values ​​of multiple windows on an elliptic curve according to the above formula (5), its computational complexity is relatively small. Therefore, this step can be executed by software.

[0143] For an embodiment where software performs a weighted summation of values ​​from multiple windows on an elliptic curve, the processing module may further include a CPU. The CPU is electrically connected to the storage module. The CPU can read the values ​​G from the storage module. w w = 1, 2, ..., (W-1). Furthermore, the CPU can determine the value G based on multiple windows. w and window width r, and the value G for multiple windows. w Perform weighted summation on the elliptic curve to obtain multi-scalar products of multiple scalar sequences and point sequences.

[0144] Specifically, the CPU can determine the weight of a window based on the product of its bit width r and its window number w. Here, the window number w is equal to the scalar quantization of the window. The least significant bit is in the target scalar sequence K i The number of bits is divided by the window width r. The target scalar sequence is the scalar sequence of this window. The scalar sequence K it belongs to i .

[0145] Furthermore, the weights of multiple windows can be used to perform a weighted summation on an elliptic curve to obtain a multi-scalar product Q of multiple scalar sequences and point sequences. Specifically, the values ​​G of multiple windows can be obtained using the above equation (5). wBy performing weighted summation, we obtain the multi-scalar product Q of multiple scalar sequences and point sequences.

[0146] In this embodiment, a programmable hardware unit is used to accelerate MSM calculations and transform complex scalar multiplication into a simple accumulation operation, which can reduce computational complexity, improve MSM calculation efficiency, and reduce the resource consumption of hardware acceleration.

[0147] The multi-scalar product Q calculated using MSM in this application embodiment can be applied to scenarios such as elliptic curve cryptography and zero-knowledge proofs, thereby improving the data processing efficiency in these scenarios.

[0148] It should be noted that the execution subject of each step of the method provided in the above embodiments can be the same device, or the method can be executed by different devices. For example, the execution subject of steps 401 and 402 can be device A; or the execution subject of step 401 can be device A, and the execution subject of step 402 can be device B; and so on.

[0149] Furthermore, some processes described in the above embodiments and accompanying drawings include multiple operations that appear in a specific order. However, it should be clearly understood that these operations may not be executed in the order they appear herein, or they may be executed in parallel. The operation numbers, such as 401, 402, etc., are merely used to distinguish different operations and do not represent any execution order. In addition, these processes may include more or fewer operations, and these operations may be executed sequentially or in parallel.

[0150] It should be noted that the terms "first" and "second" in this article are used to distinguish different messages, devices, modules, etc., and do not represent a chronological order, nor do they limit "first" and "second" to different types.

[0151] Those skilled in the art will understand that embodiments of this application can be provided as methods, systems, or computer program products. Therefore, this application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this application can take the form of a computer program product implemented on one or more computer-usable storage media (including, but not limited to, disk storage, compact disc read-only memory (CD-ROM), optical storage, etc.) containing computer-usable program code.

[0152] This application is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this application. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in one or more flowchart illustrations and / or one or more block diagrams.

[0153] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means that implement the functions specified in one or more flowcharts and / or one or more block diagrams.

[0154] These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer-implemented process, such that the instructions, which execute on the computer or other programmable apparatus, provide steps for implementing the functions specified in one or more flowcharts and / or one or more block diagrams.

[0155] In a typical configuration, a computing device includes one or more processors (CPU, etc.), input / output interfaces, network interfaces, and memory.

[0156] Memory may include non-persistent storage in computer-readable media, such as random-access memory (RAM) and / or non-volatile memory, such as read-only memory (ROM) or flash RAM. Memory is an example of computer-readable media.

[0157] Computer storage media are readable storage media, also known as removable media. Removable and non-removable media can be used to store information using any method or technology. Information can be computer-readable instructions, data structures, program modules, or other data. Examples of computer storage media include, but are not limited to, phase-change memory (PRAM), static random-access memory (SRAM), dynamic random-access memory (DRAM), other types of random-access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technologies, CD-ROM, Digital Video Disc (DVD) or other optical storage, magnetic tape, disk storage or other magnetic storage devices, or any other non-transfer medium that can be used to store information accessible by a computing device. As defined in this article, computer-readable media do not include transient computer-readable media, such as modulated data signals and carrier waves.

[0158] It should also be noted that the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes the aforementioned element.

[0159] The above description is merely an embodiment of this application and is not intended to limit the scope of this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the scope of the claims of this application.

Claims

1. A data processing device, characterized by, The method comprises the following steps: a storage module and a processing module are provided; the storage module and the processing module are electrically connected; the processing module comprises a programmable hardware unit and a central processing unit; the central processing unit is electrically connected with the programmable hardware unit; the programmable hardware unit is electrically connected with the storage module; the storage module is configured to store a plurality of scalar sequences and a point sequence on an elliptic curve for a multi-scalar multiplication calculation; each scalar sequence corresponds to a point in the point sequence; the programmable hardware unit is configured to divide each scalar sequence into a plurality of windows in a parallel manner to obtain a scalar sub-sequence corresponding to each window; each window corresponds to a plurality of buckets, and the number of the plurality of buckets is determined by a window bit width; according to the scalar sub-sequence under any window of the plurality of windows, points in the point sequence are divided into the buckets corresponding to the any window in a parallel manner; and a weighted sum of the points in the plurality of buckets under the any window is calculated to obtain a value of the any window; the central processing unit is configured to perform a weighted summation on the values of the plurality of windows on the elliptic curve according to the values of the plurality of windows and the window bit width to obtain a multi-scalar product of the plurality of scalar sequences and the point sequence.

2. The apparatus of claim 1, wherein, The scalar sequence is a binary sequence; and the programmable hardware unit is further configured to store the plurality of windows corresponding to each scalar sequence into the storage module; the programmable hardware unit comprises a random access memory; and the random access memory comprises an input queue; the programmable hardware unit is configured to read the scalar sub-sequence corresponding to any window from the storage module in a parallel manner; and store the scalar sub-sequence corresponding to the any window and the point sequence into the input queue; the programmable hardware unit is configured to divide, according to the scalar sub-sequence under any window of the plurality of windows, points in the point sequence into the buckets corresponding to the any window in a parallel manner; and the programmable hardware unit is configured to divide, according to bit values of the scalar sub-sequence corresponding to the any window stored in the input queue, points in the point sequence in the input queue into the buckets corresponding to the any window in a parallel manner; the bit values of the scalar sub-sequence corresponding to the any window refer to decimal values corresponding to the scalar sub-sequence corresponding to the any window; the buckets corresponding to the any window are stored into the storage module; and each bucket stores points divided into the bucket. the random access memory further comprises an output queue; and the programmable hardware unit is configured to, when calculating the weighted sum of the points in the plurality of buckets under the any window, read the points in the plurality of buckets corresponding to the any window from the storage module; and store the points in the plurality of buckets corresponding to the any window into the input queue; 3. The apparatus of claim 2, wherein, the programmable hardware unit is configured to calculate, by using an elliptic curve addition operation circuit, the weighted sum of the points in the plurality of buckets under the any window stored in the input queue to obtain the value of the any window; and the programmable hardware unit is configured to store the value of the any window into the output queue. r represents the window bit width; wherein the steps of the loop execution comprise: storing the point set of the bucket with the largest current bucket number under each window into the input queue; and 4. The apparatus of claim 3, wherein, The programmable hardware unit, when calculating the weighted sum of the points in the plurality of buckets under any window by using the elliptic curve addition operation circuit, is specifically configured to perform the following steps in a loop until the number of loops M is equal to The weighted sum of the points in the plurality of buckets under any window calculated when the loop is stopped is taken as the weighted sum of the points in the plurality of buckets under the any window. ​ ​ For the Mth cycle, read the point set of the bucket with the largest current bucket number under each window from the buckets stored in the storage module that have not been read; M = 1, 2, …, any value in the range of 0 to 1. ​ The elliptic curve addition operation circuit is used to perform elliptic curve point addition operation on the point set in the bucket corresponding to the wth window of the Mth cycle read and the point set in the bucket corresponding to the wth window of the previous (M-1) cycles respectively read, to obtain an intermediate result of the Mth cycle; And the elliptic curve addition operation circuit is used to perform elliptic curve point addition operation on the intermediate result of the Mth cycle and the weighted sum of the bucket corresponding to the wth window calculated by the (M-1)th cycle, to obtain the weighted sum of the bucket corresponding to the wth window calculated by the Mth cycle.

5. The apparatus of claim 3 or 4, wherein, The programmable hardware unit is specifically used for: For any scalar sequence, the any scalar sequence is divided into a plurality of scalar subsequences with a size of the window bit width in a low-to-high order of binary bits in the any scalar sequence; The plurality of scalar subsequences are divided into the plurality of windows; each scalar subsequence corresponds to a window, and the window number of each window is equal to the lowest bit of the scalar subsequence of the window divided by the bit number of the any scalar sequence.

6. The apparatus of claim 5, wherein, The programmable hardware unit is configured to store the output queue to the storage module; The central processing unit is configured to read the values of the plurality of windows from the output queue of the storage module before performing weighted summation on the values of the plurality of windows on the elliptic curve.

7. The apparatus of claim 1, wherein, The central processing unit is specifically configured to: For any window in the plurality of windows, the weight of the any window is determined according to the product of the window bit width and the window number of the any window; the window number of the any window is equal to the lowest bit of the scalar subsequence of the any window divided by the bit number of the target scalar sequence; and the target scalar sequence is the scalar sequence in which the scalar subsequence of the any window is located; The values of the plurality of windows are weighted and summed on the elliptic curve by using the weights of the plurality of windows, to obtain the multi-scalar product of the plurality of scalar sequences and the point sequence.

8. A data processing method, applicable to a processing module, characterized in that, The processing module includes a programmable hardware unit and a central processing unit; the central processing unit is electrically connected with the programmable hardware unit; the programmable hardware unit is electrically connected with a storage module; and the method includes: The programmable hardware unit is used to acquire, in a parallel mode, a plurality of scalar sequences and a point sequence on an elliptic curve for multi-scalar multiplication calculation from the storage module; each scalar sequence corresponds to a point in the point sequence; The programmable hardware unit divides each scalar sequence into a plurality of windows in a parallel mode, to obtain a scalar subsequence corresponding to each window; each window corresponds to a plurality of buckets, and the number of the plurality of buckets is determined by a window bit width; The programmable hardware unit divides, in parallel, a point in the point sequence into a bucket corresponding to any window in the plurality of windows according to the scalar subsequence under the any window; The programmable hardware unit calculates a weighted sum of points in a plurality of buckets under the any window, to obtain a value of the any window; And, The central processing unit performs weighted summation on the values of the plurality of windows on an elliptic curve according to the values of the plurality of windows and the window bit width, to obtain a multi-scalar product of the plurality of scalar sequences and the point sequence.

9. The method of claim 8, wherein, The programmable hardware unit comprises a random access memory; the random access memory comprises an input queue; the programmable hardware unit obtains, from the storage module, a plurality of scalar sequences and a point sequence on an elliptic curve for multi-scalar multiplication calculation, comprising: The programmable hardware unit reads the plurality of scalar sequences and the point sequence from the storage module in parallel; The programmable hardware unit divides each scalar sequence into a plurality of windows in parallel to obtain a scalar sub-sequence corresponding to each window, comprising: For any scalar sequence in the plurality of scalar sequences, the programmable hardware unit divides the scalar sequence into a plurality of scalar sub-sequences in the order of low to high of binary bits in the scalar sequence according to the scalar sequence; The plurality of scalar sub-sequences are divided into the plurality of windows; each scalar sub-sequence corresponds to a window; The plurality of windows corresponding to each scalar sequence are stored in the storage module.

10. The method of claim 9, wherein, The scalar sequence is a binary sequence; the point sequence is divided into the plurality of windows corresponding to the scalar sub-sequences in parallel, comprising: The programmable hardware unit reads the scalar sub-sequence corresponding to any window from the plurality of scalar sequences in the storage module in parallel; The scalar sub-sequence corresponding to any window and the point sequence are stored in the input queue; The point in the point sequence is divided into the bucket corresponding to any window according to the bit value of the scalar sub-sequence corresponding to any window stored in the input queue in parallel; the bit value of the scalar sub-sequence corresponding to any window is equal to the decimal value of the scalar sub-sequence corresponding to any window; The method further comprises: The programmable hardware unit stores the plurality of buckets corresponding to any window in the storage module; each bucket stores the points divided into the bucket.

11. The method of claim 10, wherein, The programmable hardware unit calculates the weighted sum of the points in the plurality of buckets under any window to obtain the value of any window, comprising: The programmable hardware unit reads the points in the plurality of buckets corresponding to any window from the storage module; and stores the points in the plurality of buckets corresponding to any window in the input queue; An elliptic curve addition operation circuit is used to calculate the weighted sum of the points in the plurality of buckets under any window stored in the input queue to obtain the value of any window; The value of any window is stored in the output queue.

12. The method of claim 11, wherein, The elliptic curve addition operation circuit utilizes the programmable hardware unit to calculate the weighted sum of the points in the plurality of buckets under the any window stored in the input queue to obtain the value of the any window, including that the programmable hardware unit cyclically executes the following steps until the cycle number M is equal to The weighted sum of the points in the plurality of buckets under the any window calculated when the cycle is stopped is taken as the weighted sum of the points in the plurality of buckets under the any window; r represents the window bit width; The steps of the loop execution include: For the Mth cycle, read the point set of the bucket with the largest current bucket number under each window from the buckets stored in the storage module that have not been read; M = 1, 2, …, any value in the range of 0 to 1000. The point set of the bucket with the largest current bucket number under each window is stored in the input queue; The elliptic curve addition operation circuit is used to perform elliptic curve point addition operation on the point set in the bucket corresponding to the wth window of the Mth cycle and the point set in the bucket corresponding to the wth window read respectively in the previous (M-1) cycles to obtain an intermediate result of the Mth cycle; And the elliptic curve addition operation circuit is used to perform elliptic curve point addition operation on the intermediate result of the Mth cycle and the weighted sum of the bucket corresponding to the wth window calculated in the (M-1)th cycle to obtain the weighted sum of the bucket corresponding to the wth window calculated in the Mth cycle.

13. The method according to claim 11 or 12, characterized in that The method further comprises: The programmable hardware unit stores the values of the any window to the output queue; and stores the output queue to the storage module when the values of the plurality of windows are stored to the output queue; The central processor performs weighted summation on the values of the plurality of windows on the elliptic curve according to the values of the plurality of windows and the window bit width to obtain the multi-scalar product of the plurality of scalar sequences and the point sequence, comprising: The central processor reads the values of the plurality of windows from the storage module; For any window, the weight of the any window is determined according to the product of the window bit width and the window number of the any window; the window number of the any window is equal to the lowest bit of the scalar sub-sequence of the any window divided by the window bit width in the bit number of the target scalar sequence; the target scalar sequence is the scalar sequence in which the scalar sub-sequence of the any window is located; The weighted summation is performed on the values of the plurality of windows on the elliptic curve by using the weights of the plurality of windows to obtain the multi-scalar product of the plurality of scalar sequences and the point sequence.

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